CN108922854B - Implementation method of transient circuit packaging structure for packaging silicon-based chip - Google Patents
Implementation method of transient circuit packaging structure for packaging silicon-based chip Download PDFInfo
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- CN108922854B CN108922854B CN201810614062.XA CN201810614062A CN108922854B CN 108922854 B CN108922854 B CN 108922854B CN 201810614062 A CN201810614062 A CN 201810614062A CN 108922854 B CN108922854 B CN 108922854B
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- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 103
- 239000010703 silicon Substances 0.000 title claims abstract description 103
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 101
- 238000004806 packaging method and process Methods 0.000 title claims abstract description 38
- 238000000034 method Methods 0.000 title claims abstract description 36
- 230000001052 transient effect Effects 0.000 title claims abstract description 23
- 239000004372 Polyvinyl alcohol Substances 0.000 claims abstract description 45
- 229920002451 polyvinyl alcohol Polymers 0.000 claims abstract description 45
- 239000011248 coating agent Substances 0.000 claims abstract description 15
- 238000000576 coating method Methods 0.000 claims abstract description 15
- 238000001035 drying Methods 0.000 claims abstract description 15
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims abstract description 11
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 claims description 20
- 229910052751 metal Inorganic materials 0.000 claims description 16
- 239000002184 metal Substances 0.000 claims description 16
- 239000000853 adhesive Substances 0.000 claims description 13
- 230000001070 adhesive effect Effects 0.000 claims description 13
- 238000005520 cutting process Methods 0.000 claims description 11
- 206010040844 Skin exfoliation Diseases 0.000 claims description 8
- 238000012545 processing Methods 0.000 claims description 7
- 238000005530 etching Methods 0.000 claims description 5
- 238000002791 soaking Methods 0.000 claims description 5
- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical compound [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 claims description 4
- 229910052749 magnesium Inorganic materials 0.000 claims description 4
- 239000011777 magnesium Substances 0.000 claims description 4
- 229920002120 photoresistant polymer Polymers 0.000 claims description 4
- 230000003068 static effect Effects 0.000 claims description 2
- 239000000463 material Substances 0.000 abstract description 7
- 238000012858 packaging process Methods 0.000 abstract description 7
- 239000004698 Polyethylene Substances 0.000 abstract description 3
- 230000005540 biological transmission Effects 0.000 abstract description 3
- -1 polyethylene Polymers 0.000 abstract description 3
- 229920000573 polyethylene Polymers 0.000 abstract description 3
- 231100000331 toxic Toxicity 0.000 abstract description 3
- 230000002588 toxic effect Effects 0.000 abstract description 3
- 239000005022 packaging material Substances 0.000 abstract description 2
- 238000005516 engineering process Methods 0.000 description 8
- 239000000758 substrate Substances 0.000 description 4
- 238000010586 diagram Methods 0.000 description 2
- 238000004090 dissolution Methods 0.000 description 2
- 230000007613 environmental effect Effects 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 238000002360 preparation method Methods 0.000 description 2
- 229920002379 silicone rubber Polymers 0.000 description 2
- 239000002002 slurry Substances 0.000 description 2
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- FKSZLDCMQZJMFN-UHFFFAOYSA-N [Mg].[Pb] Chemical compound [Mg].[Pb] FKSZLDCMQZJMFN-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 230000018044 dehydration Effects 0.000 description 1
- 238000006297 dehydration reaction Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 238000003912 environmental pollution Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000003698 laser cutting Methods 0.000 description 1
- 231100000053 low toxicity Toxicity 0.000 description 1
- VTHJTEIRLNZDEV-UHFFFAOYSA-L magnesium dihydroxide Chemical compound [OH-].[OH-].[Mg+2] VTHJTEIRLNZDEV-UHFFFAOYSA-L 0.000 description 1
- 229910001862 magnesium hydroxide Inorganic materials 0.000 description 1
- 239000000347 magnesium hydroxide Substances 0.000 description 1
- 238000012544 monitoring process Methods 0.000 description 1
- 239000003960 organic solvent Substances 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 238000006748 scratching Methods 0.000 description 1
- 230000002393 scratching effect Effects 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- 238000010023 transfer printing Methods 0.000 description 1
- 238000002834 transmittance Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/568—Temporary substrate used as encapsulation process aid
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
The invention provides a method for realizing a transient circuit packaging structure for packaging a silicon-based chip, which comprises the steps of coating polyvinyl alcohol solution or water between a tube shell and a thin silicon wafer to be packaged; adhering a polyvinyl alcohol tube shell to the silicon-based chip; drying and baking to form an integral wafer structure; peeling off the whole wafer structure to peel off the silicon-based chip adhered to the polyethylene transmission pipe shell and the silicon-based support wafer and then establishing an electrical interconnection channel; the full circuit packaging structure can be degraded in water, and all packaging materials do not relate to toxic and non-degradable materials, so that the full circuit packaging structure is environment-friendly; the packaging process is relatively simple and can be repeatedly realized under the condition of the prior art; the packaging structure can prepare the tube shells with different sizes and leading-out end structures through the jig, can realize the plug exchange with the existing integrated circuit electronic device, subverts the tradition of the existing electronic industry, and has wide industrial prospect.
Description
Technical Field
The invention relates to the technical field of electronics, in particular to a method for realizing a transient circuit packaging structure for packaging a silicon-based chip.
Background
The mainstream electronic devices at present are usually made of non-degradable, very stable and possibly even toxic (such as gallium arsenide) substrate materials and electronic components in order to function stably. With the development of electronic preparation technology, serious environmental pollution is caused, and the electronic preparation technology becomes one of important problems threatening human society. Therefore, it is of great importance to develop an environment-friendly, low-toxicity, safe electronic device and other electronic devices that can replace the traditional electronic products.
The transient electronic technology is a revolutionary breakthrough technology of electronic technology newly proposed in recent years, and is a technology capable of solving the environmental protection problem of digital products, and related devices can be naturally decomposed and even absorbed by human bodies when products applying the technology are scrapped. The technology has potential application requirements in the fields of intelligent application, bioelectronics, environmental monitoring systems, information security and energy collection and storage. However, a transient packaging process for a silicon-based chip is not available at present, and therefore, a method for implementing a transient circuit packaging structure is urgently needed to meet the requirement that the whole circuit packaging structure can be completely degraded in water, and the transfer printing, assembly and interconnection of the silicon-based chip can be implemented in the packaging process.
Disclosure of Invention
In view of the above-mentioned shortcomings of the prior art, the present invention provides a method for implementing a transient circuit package structure for packaging a silicon-based chip, so as to solve the above-mentioned technical problems.
The invention provides a method for realizing a transient circuit packaging structure for packaging a silicon-based chip, which comprises the following steps:
coating polyvinyl alcohol solution or water between a tube shell and an ultrathin silicon wafer to be packaged, wherein the ultrathin silicon wafer to be packaged comprises a silicon-based supporting wafer and a silicon-based chip which are mutually connected, and the tube shell comprises a polyvinyl alcohol tube shell and a metal guide pin arranged on the polyvinyl alcohol tube shell;
adhering a polyvinyl alcohol tube shell to the silicon-based chip;
drying and baking to firmly adhere the polyvinyl alcohol tube shell and the silicon-based chip to form an integral wafer structure;
peeling the whole wafer structure to peel the silicon-based chip adhered to the polyethylene transmission pipe shell from the silicon-based support wafer;
and processing the silicon-based chip and the metal guide pins, establishing an electrical interconnection channel, and finishing the transient circuit packaging.
Further, the peeling treatment comprises the step of placing the whole wafer structure in an acetone solution for soaking, wherein the temperature of the acetone solution is 20-80 ℃.
Further, the acetone solution is an MOS-grade acetone solution, and the whole wafer structure after stripping treatment is rinsed until the photoresist adhesive for connecting the silicon-based support wafer and the silicon-based chip is rinsed.
And further, etching the rinsed silicon-based chip to remove a non-target active region on the silicon-based chip.
Further, before the peeling treatment is carried out on the whole wafer structure, the cutting treatment is carried out on the whole wafer structure, and the cutting treatment comprises the step of cutting the silicon-based chip by taking the polyvinyl alcohol tube shell as the outline.
Further, the processing of the silicon-based chip and the metal guide pin to establish the electrical interconnection channel specifically comprises coating a conductive adhesive between the chip bonding pad and the metal guide pin, and performing static drying processing on the conductive adhesive, wherein the conductive adhesive is a normal-temperature cured conductive adhesive, and the metal guide pin is a magnesium guide pin.
Further, the thickness of silicon-based chip is less than 10um, silicon-based backing sheet thickness is greater than 200um, the front of silicon-based chip sets up towards the silicon-based backing sheet.
Further, coating the surfaces of the silicon-based chip and the tube shell after the electrical interconnection channel is established, and coating polyvinyl alcohol solution on the surfaces of the silicon-based chip and the tube shell, wherein the concentration of the polyvinyl alcohol solution is more than 10%, and the thickness of the polyvinyl alcohol solution is more than 1 mm.
Further, the silicon-based chip and the tube shell coated with the polyvinyl alcohol solution are dried and baked until the polyvinyl alcohol solution is completely evaporated.
And further, detecting the silicon-based chip and the tube shell after the drying and baking treatment, and repeating the coating treatment and the drying and baking treatment if a cavity exists.
The invention has the beneficial effects that: the method for realizing the transient circuit packaging structure for packaging the silicon-based chip adopts a packaging structure different from the traditional electronic industry, the full circuit packaging structure can be degraded in water, and all packaging materials do not relate to toxic and non-degradable materials, so that the method is environment-friendly; the packaging process is relatively simple and can be repeatedly realized under the condition of the prior art; the packaging structure can prepare the tube shells with different sizes and leading-out end structures through the jig, can realize the plug exchange with the existing integrated circuit electronic device, and the transient circuit packaging structure in the invention subverts the tradition of the existing electronic industry and has wide industrial prospect.
Drawings
Fig. 1 is a schematic diagram of a transient circuit package structure implementing method for packaging a silicon-based chip in this embodiment.
Fig. 2 is a schematic diagram of a to-be-assembled silicon-based chip of the implementation method of the transient circuit packaging structure for packaging the silicon-based chip in the embodiment.
Fig. 3 is a flowchart of an ultra-thin silicon chip packaging process of the implementation method of the transient circuit packaging structure for packaging a silicon-based chip in this embodiment.
Fig. 4 is a schematic top view of the complete transient circuit package of the implementation method of the transient circuit package structure for packaging a silicon-based chip in this embodiment.
Fig. 5 is a schematic front view of the packaged complete transient circuit of the implementation method of the transient circuit packaging structure for packaging a silicon-based chip in this embodiment.
Reference numerals:
the manufacturing method comprises the following steps of 1-polyvinyl alcohol tube shell, 2-polyvinyl alcohol cover plate, 3-metal guide pins, 4-silicon-based chip, 5-active region, 6-chip bonding pad, 7-normal temperature curing conductive slurry and 8-silicon-based supporting wafer.
Detailed Description
The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention. It is to be noted that the features in the following embodiments and examples may be combined with each other without conflict.
It should be noted that the drawings provided in the following embodiments are only for illustrating the basic idea of the present invention, and the components related to the present invention are only shown in the drawings rather than drawn according to the number, shape and size of the components in actual implementation, and the type, quantity and proportion of the components in actual implementation may be changed freely, and the layout of the components may be more complicated.
The implementation method of the transient circuit packaging structure for packaging the silicon-based chip in the embodiment includes:
coating polyvinyl alcohol solution or water between a tube shell and a thin silicon wafer to be packaged, wherein the thin silicon wafer to be packaged comprises a silicon-based supporting wafer and a silicon-based chip which are mutually connected, the tube shell comprises a polyvinyl alcohol tube shell and a metal guide pin arranged on the polyvinyl alcohol tube shell, and the silicon-based chip in the embodiment is a silicon chip with the thickness of less than 10 microns;
adhering a polyvinyl alcohol tube shell to the silicon-based chip;
drying and baking to firmly adhere the polyvinyl alcohol tube shell and the silicon-based chip to form an integral wafer structure;
peeling the whole wafer structure to peel the silicon-based chip adhered to the polyethylene transmission pipe shell from the silicon-based support wafer;
and processing the silicon-based chip and the metal guide pins to establish an electrical interconnection channel.
As shown in fig. 1, the tube case in this embodiment is composed of a polyvinyl alcohol tube case 1 and a magnesium lead pin 3, and as shown in fig. 2, the ultra-thin silicon chip to be packaged is divided into two parts: the silicon-based chip 4 comprises a wafer and a silicon-based supporting wafer 8, wherein the wafer refers to a silicon wafer used for manufacturing a silicon semiconductor integrated circuit, the thickness of the silicon-based chip 4 is less than 10um, the thickness of the silicon-based supporting wafer is more than 200um, and the front surface (the surface of a chip bonding pad) of the silicon-based chip faces the silicon-based supporting wafer 8.
As shown in fig. 3, the overall packaging process flow in this embodiment is as follows:
coating polyvinyl alcohol solution or water on the bonding surface of the tube shell or the back surface of the silicon-based chip 4, adhering the tube shell on the silicon-based chip 4, and drying and baking for more than 1 hour in a normal temperature environment to ensure that the tube shell and the chip are firmly adhered;
cutting the silicon-based chip 4 by taking the polyvinyl alcohol tube shell as a profile, wherein the cutting can be manually performed by adopting laser cutting equipment or an operating blade, the cutting depth requires to cut through the ultrathin silicon chip, and cutting traces are not required to be left on the silicon-based supporting wafer 8;
soaking the whole wafer structure to be adhered, preferably, adopting an MOS-grade acetone solution as an acetone solution, wherein the soaking time is 1 hour, and the temperature of the solution is controlled to be 20-80 ℃; after the soaking, the polyvinyl alcohol tube shell 1 with the silicon-based chip 4 can be peeled off from the supporting wafer 8.
Collecting the tube shell from the solution, and paying attention to protect the appearance of the chip to avoid scratching the surface of the chip; repeatedly rinsing in an acetone solution until the photoresist adhesive for connecting the silicon-based supporting wafer and the silicon-based chip is cleaned;
etching the non-target active region of the chip surface cleanly, only reserving the target chip active region 5, wherein the etching can adopt conventional laser equipment, and mature laser tools are adopted to realize surface etching and cutting treatment on the non-active region of the chip, so as to realize the separation of the target chip and other structures on the silicon chip, as shown in fig. 4;
coating normal-temperature cured conductive adhesive between a chip bonding pad 6 and a metal lead pin 3, standing and drying at normal temperature to establish an electrical interconnection channel, preferably plating gold on the surface of the chip bonding pad 6, and realizing interconnection between the chip bonding pad 6 and a pin or a metal interconnection structure by adopting normal-temperature cured conductive slurry 7, so that damage to a substrate material and an ultrathin chip caused by high temperature in the traditional packaging process can be effectively avoided;
placing the circuit in a silicon rubber jig in the forward direction, dropping polyvinyl alcohol solution with the concentration of more than 10% on the surface of a chip, completely coating the solution on the surface of a tube shell, ensuring that the thickness of the solution is more than 1mm, and drying and baking the tube shell for 1 hour at normal temperature until the solution is completely evaporated;
checking whether there is a cavity, if there is a cavity, repeating the previous step to seal the cap again, in this embodiment, applying high-concentration polyvinyl alcohol solution drop on the chip and the tube shell, drying at normal temperature under the condition of silicon rubber jig to form a polyvinyl alcohol cover plate 2, completing the sealing cap of the circuit, isolating the chip from the external environment, and avoiding the chip being damaged by the external environment.
The complete transient circuit after encapsulation is shown in fig. 4 and 5.
In the embodiment, polyvinyl alcohol is used as a shell and a cover plate material of circuit packaging, the polyvinyl alcohol can be directly dissolved in water, the structural strength of the chip after dehydration is met, the polyvinyl alcohol is insoluble in various organic solvents commonly used in the packaging industry, the substrate material and the cleaning requirement of the chip support are met, the polyvinyl alcohol is used as an adhesive material between the chip and the shell, the adhesion between the chip and the tube shell is realized by utilizing the dissolution and adhesion characteristics of the polyvinyl alcohol, and the ultra-thin silicon chip and the silicon-based support wafer are peeled off and completely attached to the polyvinyl alcohol tube shell by utilizing the difference of the dissolution characteristics of the polyvinyl alcohol and photoresist in acetone. Preferably, the metal pins in this embodiment are made of magnesium, and on the premise that the requirement for interconnection between the packaged chip and an external circuit is met, the magnesium may react with water in the presence of water to generate magnesium hydroxide, so that the interconnection pins are degraded and disappear.
In the embodiment, the thickness of the packaged chip is less than 10um, the thin silicon wafer with the thickness less than 10um has flexibility, the influence on the CTE mismatch of a substrate medium can be reduced, the thin silicon wafer has certain light transmittance, and the chip can be aligned from the back of the chip on a wafer so as to realize relatively accurate assembly.
The foregoing embodiments are merely illustrative of the principles and utilities of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or change the above-mentioned embodiments without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which can be made by those skilled in the art without departing from the spirit and technical spirit of the present invention be covered by the claims of the present invention.
Claims (10)
1. A method for realizing a transient circuit packaging structure for packaging a silicon-based chip is characterized by comprising the following steps:
coating polyvinyl alcohol solution or water between a tube shell and a thin silicon wafer to be packaged, wherein the thin silicon wafer to be packaged comprises a silicon-based supporting wafer and a silicon-based chip which are mutually connected, and the tube shell comprises a polyvinyl alcohol tube shell and a metal guide pin arranged on the tube shell;
adhering a polyvinyl alcohol tube shell to the silicon-based chip;
drying and baking to firmly adhere the polyvinyl alcohol tube shell and the silicon-based chip to form an integral wafer structure;
peeling the whole wafer structure to peel the silicon-based chip adhered to the polyvinyl alcohol tube shell from the silicon-based supporting wafer;
and processing the silicon-based chip and the metal guide pins, establishing an electrical interconnection channel, and finishing the transient circuit packaging.
2. The method of claim 1, wherein the method comprises: the peeling treatment comprises the step of soaking the whole wafer structure in an acetone solution, wherein the temperature of the acetone solution is 20-80 ℃.
3. The method of claim 2, wherein the method comprises: and rinsing the stripped whole wafer structure until the photoresist adhesive for connecting the silicon-based supporting wafer and the silicon-based chip is rinsed.
4. The method of claim 3, wherein the method comprises: and etching the rinsed silicon-based chip to remove the non-target active region on the silicon-based chip.
5. The method of claim 1, wherein the method comprises: the method comprises the following steps of carrying out peeling treatment on an integral wafer structure, and carrying out cutting treatment on the integral wafer structure before carrying out peeling treatment on the integral wafer structure, wherein the cutting treatment comprises the step of cutting a silicon-based chip by taking the polyvinyl alcohol tube shell as a profile.
6. The method of claim 1, wherein the method comprises: the method comprises the steps of processing a silicon-based chip and a metal guide pin to establish an electrical interconnection channel, and specifically comprises the steps of coating conductive adhesive between a chip bonding pad and the metal guide pin, and carrying out static drying processing on the conductive adhesive, wherein the conductive adhesive is normal-temperature cured conductive adhesive, and the metal guide pin is a magnesium guide pin.
7. The method of claim 1, wherein the method comprises: the thickness of silicon-based chip is less than 10um, silicon-based backing sheet thickness is greater than 200um, the front of silicon-based chip sets up towards silicon-based backing sheet.
8. The method of claim 1, wherein the method comprises: and coating the surfaces of the silicon-based chip and the tube shell after the electrical interconnection channel is established, and coating a polyvinyl alcohol solution on the surfaces of the silicon-based chip and the tube shell, wherein the concentration of the polyvinyl alcohol solution is more than 10%, and the thickness of the polyvinyl alcohol solution is more than 1 mm.
9. The method of claim 8, wherein the method comprises: and drying and baking the silicon-based chip and the tube shell coated with the polyvinyl alcohol solution until the polyvinyl alcohol solution is completely evaporated.
10. The method of claim 9, wherein the method comprises: and detecting the silicon-based chip and the tube shell after the drying and baking treatment, and repeating the coating treatment and the drying and baking treatment if a cavity exists.
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| DE102004005337A1 (en) * | 2004-02-04 | 2005-08-25 | Studiengesellschaft Kohle Mbh | Microfluidic chips with intrinsic hydrophilic surfaces |
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