CN108899335A - Back side illumination image sensor and preparation method thereof - Google Patents
Back side illumination image sensor and preparation method thereof Download PDFInfo
- Publication number
- CN108899335A CN108899335A CN201810882983.4A CN201810882983A CN108899335A CN 108899335 A CN108899335 A CN 108899335A CN 201810882983 A CN201810882983 A CN 201810882983A CN 108899335 A CN108899335 A CN 108899335A
- Authority
- CN
- China
- Prior art keywords
- photodiode
- image sensor
- epitaxial layer
- semiconductor substrate
- back side
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000005286 illumination Methods 0.000 title claims 15
- 238000002360 preparation method Methods 0.000 title 1
- 239000000758 substrate Substances 0.000 claims abstract description 91
- 239000004065 semiconductor Substances 0.000 claims abstract description 80
- 238000009792 diffusion process Methods 0.000 claims abstract description 55
- 238000007667 floating Methods 0.000 claims abstract description 53
- 238000002955 isolation Methods 0.000 claims abstract description 28
- 238000004519 manufacturing process Methods 0.000 claims abstract description 23
- 230000005540 biological transmission Effects 0.000 claims description 25
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 17
- 229920005591 polysilicon Polymers 0.000 claims description 17
- 229910003460 diamond Inorganic materials 0.000 claims 2
- 239000010432 diamond Substances 0.000 claims 2
- 239000012774 insulation material Substances 0.000 claims 2
- 230000005622 photoelectricity Effects 0.000 claims 2
- 238000012546 transfer Methods 0.000 abstract description 17
- 230000000149 penetrating effect Effects 0.000 abstract description 6
- 238000000034 method Methods 0.000 description 59
- 230000008569 process Effects 0.000 description 49
- 150000002500 ions Chemical class 0.000 description 35
- 238000005468 ion implantation Methods 0.000 description 26
- 239000002019 doping agent Substances 0.000 description 12
- 239000011810 insulating material Substances 0.000 description 9
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 8
- 229910052710 silicon Inorganic materials 0.000 description 8
- 239000010703 silicon Substances 0.000 description 8
- 230000005855 radiation Effects 0.000 description 7
- 238000004140 cleaning Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 5
- 238000005530 etching Methods 0.000 description 5
- 238000000151 deposition Methods 0.000 description 4
- 230000008021 deposition Effects 0.000 description 4
- 239000012212 insulator Substances 0.000 description 4
- 238000000137 annealing Methods 0.000 description 3
- 238000011049 filling Methods 0.000 description 3
- 230000003287 optical effect Effects 0.000 description 3
- 238000001039 wet etching Methods 0.000 description 3
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 2
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 2
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 238000004891 communication Methods 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 229910052733 gallium Inorganic materials 0.000 description 2
- 229910052732 germanium Inorganic materials 0.000 description 2
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 2
- 238000002513 implantation Methods 0.000 description 2
- 229910052738 indium Inorganic materials 0.000 description 2
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 2
- 230000001788 irregular Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 229910052698 phosphorus Inorganic materials 0.000 description 2
- 239000011574 phosphorus Substances 0.000 description 2
- 230000008439 repair process Effects 0.000 description 2
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 2
- 229910010271 silicon carbide Inorganic materials 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- 206010034960 Photophobia Diseases 0.000 description 1
- 238000009825 accumulation Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000003153 chemical reaction reagent Substances 0.000 description 1
- 239000008367 deionised water Substances 0.000 description 1
- 229910021641 deionized water Inorganic materials 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000000227 grinding Methods 0.000 description 1
- 238000003384 imaging method Methods 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 208000013469 light sensitivity Diseases 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 230000003746 surface roughness Effects 0.000 description 1
- 230000005570 vertical transmission Effects 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
- H10F39/011—Manufacture or treatment of image sensors covered by group H10F39/12
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
- H10F39/10—Integrated devices
- H10F39/12—Image sensors
- H10F39/199—Back-illuminated image sensors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
- H10F39/80—Constructional details of image sensors
- H10F39/803—Pixels having integrated switching, control, storage or amplification elements
- H10F39/8033—Photosensitive area
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
- H10F39/80—Constructional details of image sensors
- H10F39/803—Pixels having integrated switching, control, storage or amplification elements
- H10F39/8037—Pixels having integrated switching, control, storage or amplification elements the integrated elements comprising a transistor
- H10F39/80373—Pixels having integrated switching, control, storage or amplification elements the integrated elements comprising a transistor characterised by the gate of the transistor
Landscapes
- Solid State Image Pick-Up Elements (AREA)
Abstract
本发明技术方案公开了一种背照式图像传感器及其制作方法,所述背照式图像传感器包括半导体衬底以及位于半导体衬底内的光电二极管和光电二极管隔离结构;位于半导体衬底上的外延层以及位于外延层中的浮动扩散区域和贯穿所述外延层的传输栅。所述图像传感器增大了光电二极管的面积,有效的提高了背照式图像传感器的量子效率。
The technical solution of the present invention discloses a back-illuminated image sensor and a manufacturing method thereof. The back-illuminated image sensor includes a semiconductor substrate, a photodiode and a photodiode isolation structure located in the semiconductor substrate; An epitaxial layer, a floating diffusion region in the epitaxial layer, and a transfer gate penetrating through the epitaxial layer. The image sensor increases the area of the photodiode, effectively improving the quantum efficiency of the back-illuminated image sensor.
Description
技术领域technical field
本发明涉及半导体器件的制造技术,尤其涉及背照式图像传感器及其制作方法。The invention relates to a manufacturing technology of a semiconductor device, in particular to a back-illuminated image sensor and a manufacturing method thereof.
背景技术Background technique
图像传感器是一种将光学图像转换成电信号的器件。随着计算机和通信产业的发展,对高性能图像传感器的需求不断增长,这些高性能图像传感器广泛用于诸如数字照相机、摄像录像机、个人通信系统(PCS)、游戏机、安防摄像机、医用微型照相机之类的各种领域。An image sensor is a device that converts an optical image into an electrical signal. With the development of the computer and communication industries, the demand for high-performance image sensors is increasing. These high-performance image sensors are widely used in digital cameras, video recorders, personal communication systems (PCS), game consoles, security cameras, and medical miniature cameras. various fields.
图像传感器通常为两种类型,电荷藕合器件(CCD)传感器和CMOS图像传感器(CMOSImage Sensors,CIS)。相比于CCD图像传感器,CMOS图像传感器具有集成度高、功耗小、生成成本低等优点。Image sensors are generally of two types, Charge Coupled Device (CCD) sensors and CMOS Image Sensors (CMOS Image Sensors, CIS). Compared with CCD image sensors, CMOS image sensors have the advantages of high integration, low power consumption, and low production cost.
在传统CMOS感光元件中,感光二极管位于电路晶体管后方,进光量会因遮挡受到影响。所谓背照式CMOS就是将它掉转方向,让光线首先进入感光二极管,从而增大感光量,显著提高低光照条件下的拍摄效果。In the traditional CMOS photosensitive element, the photosensitive diode is located behind the circuit transistor, and the amount of incoming light will be affected by shading. The so-called back-illuminated CMOS is to turn it around so that the light first enters the photosensitive diode, thereby increasing the light sensitivity and significantly improving the shooting effect under low light conditions.
然而,采用全局快门捕获技术的背照式图像传感器(BSI-CMOS Image Sensor),其浮动扩散区域(Floating Diffusion region,FD)通常与光电二极管相邻。这减小了光电二极管的填充因子(如大小),因此减小了光电二极管的量子效率(Quantum Efficiency)。此外,浮动扩散区域通常与光电二极管结构类似,因此浮动扩散区域响应于入射辐射而积累电荷。这种积累会污染浮动扩散区域中存储的电荷,并可能引起成像为伪像,为防止辐射污染浮动扩散区域,金属屏蔽物通常覆盖在浮动扩散区域表面。然而即使存在金属屏蔽物,通常也会有很多辐射到达浮动扩散区域,使得全局快门效率(Global Shutter Efficiency,GSE)变差。However, in a back-illuminated image sensor (BSI-CMOS Image Sensor) using a global shutter capture technology, its floating diffusion region (Floating Diffusion region, FD) is usually adjacent to the photodiode. This reduces the fill factor (eg size) of the photodiode, thus reducing the quantum efficiency (Quantum Efficiency) of the photodiode. In addition, the floating diffusion region is generally similar to a photodiode structure, so the floating diffusion region accumulates charge in response to incident radiation. This accumulation will contaminate the charge stored in the floating diffusion region and may cause imaging artifacts. To prevent radiation from contaminating the floating diffusion region, a metal shield is usually covered on the surface of the floating diffusion region. However, even if there is a metal shield, usually a lot of radiation reaches the floating diffusion region, making the global shutter efficiency (Global Shutter Efficiency, GSE) worse.
发明内容Contents of the invention
本发明技术方案要解决的技术问题是:针对现有的背照式图像传感器浮动扩散区域与光电二极管相邻设置导致的光电二极管的量子效率减小以及全局快门效率变差的缺陷,提供一种新的背照式图像传感器结构及其制作方法,提高背照式图像传感器的量子效率并改善全局快门效率。The technical problem to be solved by the technical solution of the present invention is: aiming at the defects that the quantum efficiency of the photodiode is reduced and the global shutter efficiency is deteriorated due to the adjacent arrangement of the floating diffusion region and the photodiode of the existing back-illuminated image sensor, to provide a A new structure of a back-illuminated image sensor and a fabrication method thereof improve the quantum efficiency of the back-illuminated image sensor and improve the global shutter efficiency.
为解决上述技术问题,本发明提供一种背照式图像传感器的制作方法,包括:提供半导体衬底,在半导体衬底内分别形成光电二极管和光电二极管隔离结构;在半导体衬底上形成外延层;在外延层中形成浮动扩散区域;在外延层中形成贯穿所述外延层的传输栅。In order to solve the above technical problems, the present invention provides a method for manufacturing a back-illuminated image sensor, comprising: providing a semiconductor substrate, forming a photodiode and a photodiode isolation structure in the semiconductor substrate; forming an epitaxial layer on the semiconductor substrate ; forming a floating diffusion region in the epitaxial layer; forming a transfer gate penetrating through the epitaxial layer in the epitaxial layer.
可选的,所述浮动扩散区域位置与光电二极管的位置对应并且不与光电二极管相连。Optionally, the position of the floating diffusion area corresponds to the position of the photodiode and is not connected to the photodiode.
可选的,所述传输栅包括多晶硅层以及位于多晶硅层与外延层之间用于隔离所述外延层和多晶硅层的绝缘材料层。Optionally, the transmission gate includes a polysilicon layer and an insulating material layer between the polysilicon layer and the epitaxial layer for isolating the epitaxial layer and the polysilicon layer.
可选的,所述的传输栅的截面结构为长方形,圆形,菱形或者十字形。Optionally, the cross-sectional structure of the transmission grid is a rectangle, a circle, a rhombus or a cross.
可选的,所述半导体衬底与外延层的掺杂类型相同。Optionally, the doping type of the semiconductor substrate and the epitaxial layer is the same.
可选的,所述的光电二极管为N型掺杂时,所述的光电二极管隔离结构为P型掺杂。所述浮动扩散区域为N型掺杂,所述传输栅为N型掺杂。Optionally, when the photodiode is N-type doped, the photodiode isolation structure is P-type doped. The floating diffusion region is N-type doped, and the transmission gate is N-type doped.
本发明还提供一种背照式图像传感器,包括:The present invention also provides a back-illuminated image sensor, including:
半导体衬底以及位于半导体衬底内的光电二极管和光电二极管隔离结构;位于半导体衬底上的外延层以及位于外延层中的浮动扩散区域和贯穿所述外延层的传输栅。A semiconductor substrate, a photodiode in the semiconductor substrate and a photodiode isolation structure; an epitaxial layer on the semiconductor substrate, a floating diffusion region in the epitaxial layer, and a transmission gate through the epitaxial layer.
可选的,所述浮动扩散区域位置与光电二极管的位置对应并且不与光电二极管相连。Optionally, the position of the floating diffusion area corresponds to the position of the photodiode and is not connected to the photodiode.
可选的,所述传输栅包括多晶硅层以及位于多晶硅层与外延层之间用于隔离所述外延层和多晶硅层的绝缘材料层。Optionally, the transmission gate includes a polysilicon layer and an insulating material layer between the polysilicon layer and the epitaxial layer for isolating the epitaxial layer and the polysilicon layer.
可选的,所述的传输栅的截面结构为长方形,圆形,菱形或者十字形。Optionally, the cross-sectional structure of the transmission grid is a rectangle, a circle, a rhombus or a cross.
可选的,所述半导体衬底与外延层的掺杂类型相同。Optionally, the doping type of the semiconductor substrate and the epitaxial layer is the same.
可选的,所述的光电二极管为N型掺杂时,所述的光电二极管隔离结构为P型掺杂。所述浮动扩散区域为N型掺杂,所述传输栅为N型掺杂。Optionally, when the photodiode is N-type doped, the photodiode isolation structure is P-type doped. The floating diffusion region is N-type doped, and the transfer gate is N-type doped.
技术方案具有以下有益效果:The technical solution has the following beneficial effects:
本发明所述的背照式图像传感器结构,将光电二极管和光电二极管隔离结构设置在半导体衬底中,在半导体衬底上形成外延层,并将传输栅TG和浮动扩散区域设置在外延层中,这样做增大了光电二极管的面积,有效的提高了背照式图像传感器的量子效率,并且防止入射辐射在浮动扩散区域积累电荷污染浮动扩散区域,改善了图像传感器的全局快门效率。In the back-illuminated image sensor structure of the present invention, the photodiode and the photodiode isolation structure are arranged in the semiconductor substrate, an epitaxial layer is formed on the semiconductor substrate, and the transmission gate TG and the floating diffusion region are arranged in the epitaxial layer In this way, the area of the photodiode is increased, the quantum efficiency of the back-illuminated image sensor is effectively improved, and the incident radiation is prevented from accumulating charges in the floating diffusion area to pollute the floating diffusion area, and the global shutter efficiency of the image sensor is improved.
本发明所述的背照式图像传感器的制作方法,首先在半导体衬底中形成光电二极管和光电二极管隔离结构,然后再在半导体衬底表面生长外延层,再在外延层中形成贯穿所述外延层的传输栅TG和浮动扩散区域,此传输栅可以同时控制4个光电二极管与浮动扩散区域。由于本发明所述工艺在半导体衬底中只形成光电二极管与光电二极管隔离结构,传输栅和浮动扩散区域是在外延层中形成的,这样做增大了光电二极管的面积,有效的提高了背照式图像传感器的量子效率,并且防止入射辐射在浮动扩散区域积累电荷污染浮动扩散区域,改善了图像传感器的全局快门效率。The manufacturing method of the back-illuminated image sensor according to the present invention first forms a photodiode and a photodiode isolation structure in the semiconductor substrate, then grows an epitaxial layer on the surface of the semiconductor substrate, and then forms a penetrating epitaxial layer in the epitaxial layer. Layer transfer gate TG and floating diffusion area, this transfer gate can control 4 photodiodes and floating diffusion area at the same time. Because the process of the present invention only forms the photodiode and the photodiode isolation structure in the semiconductor substrate, the transfer gate and the floating diffusion region are formed in the epitaxial layer, which increases the area of the photodiode and effectively improves the The quantum efficiency of the illuminated image sensor is improved, and the global shutter efficiency of the image sensor is improved by preventing the incident radiation from accumulating charges in the floating diffusion area to contaminate the floating diffusion area.
附图说明Description of drawings
图1至图9为本发明实施例中背照式图像传感器的制作方法各步骤对应的结构示意图;1 to 9 are structural schematic diagrams corresponding to each step of the manufacturing method of the back-illuminated image sensor in the embodiment of the present invention;
图10为本发明形成的所述背照式图像传感器的一个俯视结构图;FIG. 10 is a top structural view of the back-illuminated image sensor formed in the present invention;
图11为本发明形成的所述背照式图像传感器的另一个俯视结构图;FIG. 11 is another top structural view of the back-illuminated image sensor formed in the present invention;
图12为本发明形成的所述背照式图像传感器的又一个俯视结构图;Fig. 12 is another top structural view of the back-illuminated image sensor formed in the present invention;
图13为本发明形成的所述背照式图像传感器的又一个俯视结构图。FIG. 13 is another top structural view of the back-illuminated image sensor formed in the present invention.
具体实施方式Detailed ways
在下文中将参考附图对本发明构思进行更加全面的描述,在附图中示出了本发明构思的示例性实施例。通过下列参照附图更加详细描述的示例性实施例,本发明构思的优点和特征以及实现它们的方法将得以呈现。然而,应当注意,本发明构思不限于下列示例性实施例,而是可以按照各种形式来实现。因此,提供示例性实施例的目的仅仅用于公开本发明构思,并且使得本领域技术人员知晓本发明构思的范畴。在附图中,本发明构思的实施例不限于在此提供的特定示例,并且出于清楚的目的进行了放大。The inventive concept will be described more fully hereinafter with reference to the accompanying drawings, in which exemplary embodiments of the inventive concept are shown. Advantages and features of the inventive concept and methods of achieving them will be presented through the following exemplary embodiments described in more detail with reference to the accompanying drawings. It should be noted, however, that the inventive concept is not limited to the following exemplary embodiments but may be implemented in various forms. Therefore, the exemplary embodiments are provided only for the purpose of disclosing the present inventive concept and enabling those skilled in the art to understand the scope of the present inventive concept. In the drawings, embodiments of the inventive concept are not limited to the specific examples provided herein and are exaggerated for clarity.
在此使用的术语仅用于描述特定实施例的目的而不是用于限制本发明。如在此使用,单数术语“一”、“一个”和“该”也旨在包括复数形式,除非在上下文中另外明确地指出。如在此使用,术语“和/或”包括相关联的列出项目中的一个或多个的任意或全部组合。应当理解,当一个元件被称作“连接”或“耦接”至另一个元件时,其可以直接地连接或耦接至另一个元件,或者也可以存在中间元件。The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the singular terms "a," "an," and "the" are intended to include the plural unless the context clearly dictates otherwise. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items. It will be understood that when an element is referred to as being "connected" or "coupled" to another element, it can be directly connected or coupled to the other element or intervening elements may also be present.
类似地,应当理解,当诸如层、区域或衬底之类的元件被称作在另一个元件“上”时,其可以直接在另一个元件上,或者也可以存在中间元件。与之相反,术语“直接地”表示没有中间元件。还应当理解,术语“包含”、“包含着”、“包括”和/或“包括着”,在此使用时,指明存在所记载的特征、整体、步骤、操作、元件和/或组件,但并不排除存在或附加一个或多个其他特征、整体、步骤、操作、元件、组件和/或它们的组。Similarly, it will be understood that when an element such as a layer, region or substrate is referred to as being "on" another element, it can be directly on the other element or intervening elements may also be present. In contrast, the term "directly" means that there are no intervening elements. It should also be understood that the terms "comprising", "comprising", "comprising" and/or "comprising", when used herein, indicate the presence of stated features, integers, steps, operations, elements and/or components, but It does not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components and/or groups thereof.
另外,详细描述中的实施例将利用作为本发明构思的理想示例性示图的截面图来进行描述。因此,示例性示图的形状可以根据制造技术和/或可允许的误差进行改变。因此,本发明构思的实施例不限于在示例性示图中所示出的特定形状,而是可以包括可以根据制造工艺产生的其他形状。在附图中所示例的区域具有一般属性,并且被用于示出元件的特定形状。因此,这不应当被解释为对本发明构思的范围进行限制。In addition, the embodiments in the detailed description will be described using cross-sectional views that are idealized exemplary views of the inventive concept. Accordingly, the shapes of the exemplary illustrations may vary according to manufacturing techniques and/or allowable errors. Accordingly, embodiments of the inventive concepts are not limited to specific shapes shown in the exemplary diagrams, but may include other shapes that may be produced according to manufacturing processes. Regions illustrated in the figures have general attributes and are used to illustrate specific shapes of elements. Therefore, this should not be construed as limiting the scope of the inventive concept.
还应当理解,尽管术语第一、第二、第三等可以在此用于描述各种元件,但是这些元件不应当被这些术语所限制。这些术语仅用于将一个元件与另一个元件区分开。因此,在没有脱离本发明的教导的情况下,在一些实施例中的第一元件在其他实施例中可以被称为第二元件。相同的参考标号或相同的参考标志符在整个说明书中表示相同的元件。It will also be understood that although the terms first, second, third etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. Thus, a first element in some embodiments could be termed a second element in other embodiments without departing from the teachings of the present invention. The same reference numerals or the same reference designators denote the same elements throughout the specification.
此外,通过参考作为理想化的示例性图示的截面图示和/或平面图示来描述示例性实施例。因此,由于例如制造技术和/或容差导致的与图示的形状的不同是可预见的。因此,不应当将示例性实施例解释为限于在此所示出的区域的形状,而是应当包括由例如制造所导致的形状中的偏差。例如,被示出为矩形的蚀刻区域通常会具有圆形的或弯曲的特征。因此,在图中示出的区域实质上是示意性的,其形状不是为了示出器件的区域的实际形状也不是为了限制示例性实施例的范围。Furthermore, exemplary embodiments are described by reference to cross-sectional illustrations and/or plan illustrations that are idealized exemplary illustrations. Accordingly, variations from the illustrated shapes as a result, for example, of manufacturing techniques and/or tolerances are to be expected. Thus, example embodiments should not be construed as limited to the shapes of regions illustrated herein but are to include deviations in shapes that result, for example, from manufacturing. For example, an etched region illustrated as a rectangle will, typically, have rounded or curved features. Thus, the regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the actual shape of a region of a device and are not intended to limit the scope of example embodiments.
下面结合实施例和附图对本发明技术方案进行详细说明。The technical solution of the present invention will be described in detail below in conjunction with the embodiments and the accompanying drawings.
图1至图9为本发明实施例中背照式图像传感器的制作方法各步骤对应的结构示意图。所述背照式图像传感器的制作方法包括:提供半导体衬底10,在半导体衬底10内分别形成光电二极管11和光电二极管隔离结构12;在半导体衬底10上形成外延层20;在外延层中形成浮动扩散区域13;在外延层20中形成贯穿所述外延层20的传输栅14。1 to 9 are structural schematic diagrams corresponding to each step of the manufacturing method of the back-illuminated image sensor in the embodiment of the present invention. The manufacturing method of the back-illuminated image sensor includes: providing a semiconductor substrate 10, forming a photodiode 11 and a photodiode isolation structure 12 in the semiconductor substrate 10; forming an epitaxial layer 20 on the semiconductor substrate 10; A floating diffusion region 13 is formed in the epitaxial layer 20 ; a transmission gate 14 penetrating through the epitaxial layer 20 is formed in the epitaxial layer 20 .
参考图1,提供半导体衬底10,所述半导体衬底10可以为硅衬底,或者所述半导体衬底10的材料还可以为锗、锗化硅、碳化硅、砷化镓或镓化铟,所述半导体衬底10还可以为绝缘体上的硅衬底或者绝缘体上的锗衬底,或者是生长有外延层的衬底。Referring to Fig. 1, a semiconductor substrate 10 is provided, the semiconductor substrate 10 can be a silicon substrate, or the material of the semiconductor substrate 10 can also be germanium, silicon germanium, silicon carbide, gallium arsenide or gallium indium The semiconductor substrate 10 may also be a silicon-on-insulator substrate or a germanium-on-insulator substrate, or a substrate grown with an epitaxial layer.
本实施例中,所述的半导体衬底10包括P型硅,所述P型硅通过在硅衬底中进行P型掺杂来实现,例如使用离子注入或扩散的工艺实现全部掺杂。执行掺杂工艺时,掺杂离子的能量及掺杂浓度可以按照现有技术进行选择。所述的掺杂离子例如为B,BF2等,掺杂离子浓度范围为1E14~1E16/cm3。In this embodiment, the semiconductor substrate 10 includes P-type silicon, and the P-type silicon is realized by performing P-type doping in the silicon substrate, for example, ion implantation or diffusion process is used to achieve full doping. When performing the doping process, the energy and doping concentration of the doping ions can be selected according to the prior art. The dopant ions are, for example, B, BF 2 , etc., and the concentration range of the dopant ions is 1E14˜1E16/cm 3 .
如图1所示,在所述半导体衬底10上采用沉积以及刻蚀工艺形成第一光掩膜图案31,所述的第一光掩膜图案31用于定义出位于半导体衬底中的光电二极管11(PD)的位置,所述的光电二极管11用于将接收到的光信号转换为电信号的。所述的各光电二极管11在半导体衬底10中可以拜耳(Bayer)阵列布置,也可以根据需要布置成其他任何阵列。为了满足所述半导体衬底10的总厚度薄化的要求,通常各个所述光电二极管11在所述半导体衬底10中的位置基本上处于同一深度。As shown in FIG. 1, a first photomask pattern 31 is formed on the semiconductor substrate 10 by deposition and etching processes, and the first photomask pattern 31 is used to define the photoelectric pattern located in the semiconductor substrate. The position of the diode 11 (PD), the photodiode 11 is used to convert the received optical signal into an electrical signal. The photodiodes 11 described above can be arranged in a Bayer array in the semiconductor substrate 10 , and can also be arranged in any other array as required. In order to meet the requirement of thinning the total thickness of the semiconductor substrate 10 , generally, the positions of the photodiodes 11 in the semiconductor substrate 10 are substantially at the same depth.
之后,参考图1以及图2,执行一次以上的第一离子注入工艺,在半导体衬底10中设定位置形成所述光电二极管11,随后去除所述第一光掩膜图案31。Afterwards, referring to FIG. 1 and FIG. 2 , the first ion implantation process is performed more than once to form the photodiode 11 at a set position in the semiconductor substrate 10 , and then the first photomask pattern 31 is removed.
所述的第一离子注入工艺例如为N型离子掺杂,掺杂离子浓度范围为1E11~5E12/cm3,所述的掺杂离子包括磷,AS等离子,其在半导体衬底中的掺杂深度为2~2.5微米。The first ion implantation process is, for example, N-type ion doping, the doping ion concentration range is 1E11-5E12/cm 3 , the doping ions include phosphorus, AS plasma, and its doping in the semiconductor substrate The impurity depth is 2-2.5 microns.
所述的光电二极管11是通过执行一次以上的第一离子注入工艺形成的,通过调整每次注入的掺杂离子的浓度以及注入深度,形成所述光电二极管11。每次进行第一离子注入时所采用的掺杂离子注入浓度以及离子注入深度可以根据工艺需要进行调整,在此不做进一步的限定。在每次执行第一离子注入工艺之后,可以执行退火处理工艺,一方面用于修复第一离子注入工艺对晶格的损伤,另一方面使第一离子注入工艺中的注入离子进一步扩散均匀。The photodiode 11 is formed by performing more than one first ion implantation process, and the photodiode 11 is formed by adjusting the concentration and implantation depth of dopant ions implanted each time. The dopant ion implantation concentration and ion implantation depth used for each first ion implantation can be adjusted according to process requirements, which are not further limited here. After each execution of the first ion implantation process, an annealing process may be performed, on the one hand, for repairing the damage to the crystal lattice caused by the first ion implantation process, and on the other hand, to make the implanted ions in the first ion implantation process diffuse further and evenly.
在本实施例中,所述的第一光掩膜图案31为硬掩膜层(Hard mask),用于防止在后续进行离子注入时导致半导体衬底表面粗糙,去除所述第一光掩膜图案31的工艺例如为湿法刻蚀工艺。In this embodiment, the first photomask pattern 31 is a hard mask layer (Hard mask), which is used to prevent the surface roughness of the semiconductor substrate during the subsequent ion implantation, and the first photomask pattern 31 is removed. The process of the pattern 31 is, for example, a wet etching process.
如图3以及图4所示,在所述半导体衬底10上采用沉积以及刻蚀工艺形成第二光掩膜图案32,所述的第二光掩膜图案32用于定义出位于半导体衬底10中的光电二极管隔离结构12(Photodiode Isolation,PDI)的位置。As shown in FIG. 3 and FIG. 4, a second photomask pattern 32 is formed on the semiconductor substrate 10 by deposition and etching processes, and the second photomask pattern 32 is used to define the The position of the photodiode isolation structure 12 (Photodiode Isolation, PDI) in 10 .
所述的光电二极管隔离结构12用于隔离各个光电二极管,所述的各光电二极管隔离结构12在半导体衬底10中的排布方式依据光电二极管11的排布结构的变化而变化,在一个可选的实施例中,其排列为井字形阵列。各个所述光电二极管隔离结构12在所述半导体衬底10中的位置基本上设置于同一深度。The photodiode isolation structure 12 is used to isolate each photodiode, and the arrangement of each photodiode isolation structure 12 in the semiconductor substrate 10 varies according to the change of the arrangement structure of the photodiodes 11. In selected embodiments, it is arranged as a well-shaped array. The positions of each of the photodiode isolation structures 12 in the semiconductor substrate 10 are substantially set at the same depth.
之后,参考图3以及图4,执行第二离子注入工艺,在半导体衬底10中设定位置形成所述光电二极管隔离结构12,随后去除所述第二光掩膜图案32。After that, referring to FIG. 3 and FIG. 4 , a second ion implantation process is performed to form the photodiode isolation structure 12 at a set position in the semiconductor substrate 10 , and then the second photomask pattern 32 is removed.
在半导体衬底为P型掺杂,光电二极管为N型掺杂的情况下,所述的第二离子注入工艺例如为P型离子的掺杂工艺,掺杂离子浓度范围为1E12~1E13/cm3,所述的掺杂离子包括B离子,BF2等。其在半导体衬底中的掺杂深度为2~2.5微米。In the case that the semiconductor substrate is P-type doped and the photodiode is N-type doped, the second ion implantation process is, for example, a P-type ion doping process, and the doping ion concentration range is 1E12-1E13/cm 3. The dopant ions include B ions, BF 2 and so on. Its doping depth in the semiconductor substrate is 2-2.5 microns.
所述第二离子注入时所采用的掺杂离子注入类型以及离子注入浓度可以由本领域技术人员根据工艺需要进行调整,其离子注入深度可以根据光电二极管的离子注入深度进行调整,在此不做进一步的限定。执行第二离子注入工艺之后,可以执行退火处理工艺,一方面用于修复第二离子注入工艺对晶格的损伤,另一方面使第二离子注入工艺中的注入离子进一步扩散均匀。The dopant ion implantation type and ion implantation concentration used in the second ion implantation can be adjusted by those skilled in the art according to the process requirements, and the ion implantation depth can be adjusted according to the ion implantation depth of the photodiode, and no further details will be given here. limit. After performing the second ion implantation process, an annealing treatment process may be performed, on the one hand, to repair the damage to the crystal lattice caused by the second ion implantation process, and on the other hand, to make the implanted ions in the second ion implantation process diffuse further and evenly.
去除所述第二光掩膜图案32的工艺例如为湿法刻蚀工艺。The process of removing the second photomask pattern 32 is, for example, a wet etching process.
随后,对半导体衬底10进行清洗,去除上述形成光电二极管11和光电二极管隔离结构12工艺过程中对半导体衬底10表面造成的损伤。所述的清洗工艺包括:采用RCA清洗法,对半导体衬底表面执行清洗,清洗后对半导体衬底表面执行去离子水清洗工艺并烘干,并对所述半导体衬底表面进行低温退火以修复表面缺陷。Subsequently, the semiconductor substrate 10 is cleaned to remove the damage caused to the surface of the semiconductor substrate 10 during the above process of forming the photodiode 11 and the photodiode isolation structure 12 . The cleaning process includes: using the RCA cleaning method to clean the surface of the semiconductor substrate, performing a deionized water cleaning process on the surface of the semiconductor substrate after cleaning and drying, and performing low-temperature annealing on the surface of the semiconductor substrate to repair Surface defects.
所述的RCA清洗法主要使用SPM(H2SO4/H2O2)、DHF(H2O2/H2O)、APM(NH4OH/H2O2/H2O)、HPM(HCL/H2O2/H2O)等化学试剂对半导体衬底进行清洗。The RCA cleaning method mainly uses SPM (H 2 SO 4 /H 2 O 2 ), DHF (H 2 O 2 /H 2 O), APM (NH 4 OH/H 2 O 2 /H 2 O), HPM (HCL/H 2 O 2 /H 2 O) and other chemical reagents to clean the semiconductor substrate.
参照图5,在半导体衬底10上形成外延层20,所述的外延层20的掺杂类型与半导体衬底的掺杂类型相同,掺杂离子浓度也与半导体衬底的掺杂浓度相同。在本实施例中,形成的外延层20具有P型掺杂。Referring to FIG. 5 , an epitaxial layer 20 is formed on the semiconductor substrate 10 , the doping type of the epitaxial layer 20 is the same as that of the semiconductor substrate, and the doping ion concentration is also the same as that of the semiconductor substrate. In this embodiment, the formed epitaxial layer 20 has P-type doping.
形成所述外延层的工艺可以是本领域技术人员已知的任意一种外延生长工艺,随后对所述外延层进行P型掺杂工艺,所述的掺杂离子例如为B,BF2等,掺杂离子浓度范围为1E14~1E16/cm3。The process for forming the epitaxial layer can be any epitaxial growth process known to those skilled in the art, and then the epitaxial layer is subjected to a P-type doping process, and the doping ions are, for example, B, BF 2 , etc., The dopant ion concentration range is 1E14-1E16/cm 3 .
参考图6以及图7,在所述外延层20上采用沉积以及刻蚀工艺形成第三光掩膜图案33,所述的第三光掩膜图案33用于定义出位于外延层20中的浮动扩散区域13(FloatingDiffusion region,FD)的位置,所述的浮动扩散区域13嵌入所述外延层20中,其位置与半导体衬底中光电二极管的位置对应,位于光电二极管11的上方,并且不与光电二极管相连。Referring to FIG. 6 and FIG. 7, a third photomask pattern 33 is formed on the epitaxial layer 20 by deposition and etching processes, and the third photomask pattern 33 is used to define the floating The position of the diffusion region 13 (Floating Diffusion region, FD), the floating diffusion region 13 is embedded in the epitaxial layer 20, its position corresponds to the position of the photodiode in the semiconductor substrate, it is located above the photodiode 11, and is not connected with The photodiode is connected.
之后,参考图6以及图7,执行第三离子注入工艺,在外延层20中设定位置形成所述浮动扩散区域13,随后去除所述第三光掩膜图案33。Afterwards, referring to FIG. 6 and FIG. 7 , a third ion implantation process is performed to form the floating diffusion region 13 at a set position in the epitaxial layer 20 , and then the third photomask pattern 33 is removed.
所述的浮动扩散区域13可以接收存储在光电二极管中的电荷,以在浮动扩散区域中聚集电荷。在本实施例中,所述的浮动扩散区域13具有N型掺杂,掺杂离子浓度范围为1E13~2E15/cm3。The floating diffusion region 13 can receive the charges stored in the photodiode to accumulate the charges in the floating diffusion region. In this embodiment, the floating diffusion region 13 has N-type doping, and the doping ion concentration range is 1E13˜2E15/cm 3 .
所述的第三离子注入工艺至少包括一次N型离子的掺杂工艺,掺杂离子浓度范围为1E13~2E15/cm3,所述的掺杂离子包括P离子等。去除所述第三光掩膜图案33的工艺例如为湿法刻蚀工艺。The third ion implantation process includes at least one doping process of N-type ions, the doping ion concentration range is 1E13-2E15/cm 3 , and the doping ions include P ions and the like. The process of removing the third photomask pattern 33 is, for example, a wet etching process.
参考附图8,在所述外延层20上采用沉积以及刻蚀工艺形成第四光掩膜图案34,所述的第四光掩膜图案34用于定义出位于外延层20中的传输栅14的位置。以所述第四光掩膜图案34为掩膜,对所述外延层20进行刻蚀至暴露出半导体衬底,形成贯穿所述外延层20的沟槽。所述的刻蚀工艺例如为等离子体刻蚀。Referring to FIG. 8 , a fourth photomask pattern 34 is formed on the epitaxial layer 20 by deposition and etching processes, and the fourth photomask pattern 34 is used to define the transmission gate 14 located in the epitaxial layer 20 s position. Using the fourth photomask pattern 34 as a mask, the epitaxial layer 20 is etched to expose the semiconductor substrate to form a trench penetrating through the epitaxial layer 20 . The etching process is, for example, plasma etching.
附图9,在所述沟槽中形成传输栅14。形成传输栅14的工艺包括:首先在所述外延层以及沟槽的侧壁填充绝缘材料层14a,然后在所述绝缘材料层14a以及沟槽内填充N型掺杂的多晶硅14b,之后利用化学研磨工艺CMP去除外延层上的多晶硅14b以及绝缘材料层14a,形成填充所述沟槽的传输栅14。Referring to Fig. 9, a transfer gate 14 is formed in the trench. The process of forming the transfer gate 14 includes: first filling the insulating material layer 14a on the epitaxial layer and the sidewall of the trench, then filling the insulating material layer 14a and the trench with N-type doped polysilicon 14b, and then using chemical The grinding process CMP removes the polysilicon 14b and the insulating material layer 14a on the epitaxial layer to form the transfer gate 14 filling the trench.
传输栅14用于改善光电二极管中的电荷被传输到浮动扩散区域14中的效率,从而提高图像传感器的电荷传输效率。The transfer gate 14 is used to improve the transfer efficiency of the charge in the photodiode to the floating diffusion region 14, thereby improving the charge transfer efficiency of the image sensor.
其中,所述绝缘材料层可以包括氧化硅或氮化硅。形成所述绝缘材料层的工艺优选化学气相沉积工艺,例如等离子体化学气相沉积。Wherein, the insulating material layer may include silicon oxide or silicon nitride. The process for forming the insulating material layer is preferably a chemical vapor deposition process, such as plasma chemical vapor deposition.
经过上述附图1至附图9描述的背照式图像传感器的制作工艺,形成的所述背照式图像传感器的俯视图参考图10所示,其中图9为图10中沿AA方向的截面结构示意图。After the manufacturing process of the back-illuminated image sensor described in the accompanying drawings 1 to 9 above, the top view of the formed back-illuminated image sensor is shown in FIG. 10 , wherein FIG. 9 is a cross-sectional structure along the AA direction in FIG. 10 schematic diagram.
从图10可以看出,所述的传输栅14的截面结构为长方形结构,根据工艺设计的需要,所述的传输栅14的截面结构还可以做各种变形,比如正方形,初次之外,参考附图11至附图13,所述的传输栅的截面结构还可以为圆形,菱形,十字形等为规则或者不规则的结构。所述的不同的截面结构可以得到不同长度的沟道,能适应不同的工艺需求。It can be seen from FIG. 10 that the cross-sectional structure of the transmission grid 14 is a rectangular structure. According to the needs of process design, the cross-sectional structure of the transmission grid 14 can also be deformed in various ways, such as square. Except for the first time, refer to As shown in Figures 11 to 13, the cross-sectional structure of the transmission grid can also be a regular or irregular structure such as a circle, a rhombus, and a cross. The different cross-sectional structures can obtain channels with different lengths, which can adapt to different process requirements.
采用本发明实施例所述的背照式图像传感器的制作方法,首先在P型半导体衬底中利用离子注入形成光电二极管(N型)和光电二极管隔离结构PDI(P型),然后再在半导体衬底表面生长P型的外延层,再在外延层中形成垂直结构的传输栅TG和浮动扩散区域13(N型),此传输栅可以同时控制4个光电二极管与浮动扩散区域13。由于本发明所述工艺在半导体衬底中只形成光电二极管与光电二极管隔离结构,传输栅和浮动扩散区域是在外延层中形成的,这样做增大了光电二极管的面积,有效的提高了背照式图像传感器的量子效率,并且防止入射辐射在浮动扩散区域积累电荷污染浮动扩散区域,改善了图像传感器的全局快门效率。Using the manufacturing method of the back-illuminated image sensor described in the embodiment of the present invention, the photodiode (N-type) and the photodiode isolation structure PDI (P-type) are formed by ion implantation in the P-type semiconductor substrate first, and then in the semiconductor substrate A P-type epitaxial layer is grown on the surface of the substrate, and then a vertical transmission gate TG and a floating diffusion region 13 (N-type) are formed in the epitaxial layer. The transmission gate can simultaneously control four photodiodes and the floating diffusion region 13 . Because the process of the present invention only forms the photodiode and the photodiode isolation structure in the semiconductor substrate, the transfer gate and the floating diffusion region are formed in the epitaxial layer, which increases the area of the photodiode and effectively improves the The quantum efficiency of the illuminated image sensor is improved, and the global shutter efficiency of the image sensor is improved by preventing the incident radiation from accumulating charges in the floating diffusion area to contaminate the floating diffusion area.
实施例2Example 2
本发明实施例提供一种背照式图像传感器结构,参考图9所示,所述的背照式图像传感器结构包括:An embodiment of the present invention provides a back-illuminated image sensor structure, as shown in FIG. 9 , the back-illuminated image sensor structure includes:
半导体衬底10以及位于半导体衬底10内的光电二极管11和光电二极管隔离结构阵列12;位于半导体衬底10上的外延层20以及位于外延层20中的浮动扩散区域13和贯穿所述外延层20的传输栅14。Semiconductor substrate 10 and photodiode 11 and photodiode isolation structure array 12 located in semiconductor substrate 10; epitaxial layer 20 located on semiconductor substrate 10 and floating diffusion region 13 located in epitaxial layer 20 and penetrating the epitaxial layer 20 of the transmission grid 14 .
所述半导体衬底10可以为硅衬底,或者所述半导体衬底10的材料还可以为锗、锗化硅、碳化硅、砷化镓或镓化铟,所述半导体衬底10还可以为绝缘体上的硅衬底或者绝缘体上的锗衬底,或者是生长有外延层的衬底。The semiconductor substrate 10 may be a silicon substrate, or the material of the semiconductor substrate 10 may also be germanium, silicon germanium, silicon carbide, gallium arsenide or indium gallium, and the semiconductor substrate 10 may also be A silicon-on-insulator substrate or a germanium-on-insulator substrate, or a substrate grown with an epitaxial layer.
本实施例中,所述的半导体衬底10包括P型硅,所述P型硅通过在硅衬底中进行P型掺杂来实现,例如使用离子注入或扩散的工艺实现全部掺杂。执行掺杂工艺时,掺杂离子的能量及掺杂浓度可以按照现有技术进行选择。所述的掺杂离子例如为B,BF2等,掺杂离子浓度范围为1E14~1E16/cm3。In this embodiment, the semiconductor substrate 10 includes P-type silicon, and the P-type silicon is realized by performing P-type doping in the silicon substrate, for example, ion implantation or diffusion process is used to achieve full doping. When performing the doping process, the energy and doping concentration of the doping ions can be selected according to the prior art. The dopant ions are, for example, B, BF 2 , etc., and the concentration range of the dopant ions is 1E14˜1E16/cm 3 .
所述的光电二极管11用于将接收到的光信号转换为电信号的。所述的各光电二极管11在半导体衬底10中可以拜耳(Bayer)阵列布置,也可以根据需要布置成其他任何阵列。为了满足所述半导体衬底10的总厚度薄化的要求,通常各个所述光电二极管11在所述半导体衬底10中的位置基本上处于同一深度。The photodiode 11 is used to convert the received optical signal into an electrical signal. The photodiodes 11 described above can be arranged in a Bayer array in the semiconductor substrate 10 , and can also be arranged in any other array as required. In order to meet the requirement of thinning the total thickness of the semiconductor substrate 10 , generally, the positions of the photodiodes 11 in the semiconductor substrate 10 are substantially at the same depth.
光电二极管11为N型离子掺杂,掺杂离子浓度范围为1E11~5E12/cm3,所述的掺杂离子包括磷,AS等离子,其在半导体衬底中的掺杂深度为2~2.5微米。The photodiode 11 is doped with N-type ions, the doping ion concentration range is 1E11-5E12/cm 3 , the doping ions include phosphorus, AS plasma, and its doping depth in the semiconductor substrate is 2-2.5 Microns.
所述的光电二极管11是通过执行一次以上的第一离子注入工艺形成的,通过调整每次注入的掺杂离子的浓度以及注入深度,形成所述光电二极管11。The photodiode 11 is formed by performing more than one first ion implantation process, and the photodiode 11 is formed by adjusting the concentration and implantation depth of dopant ions implanted each time.
所述的光电二极管隔离结构12用于隔离各个光电二极管11,所述的各光电二极管隔离结构12在半导体衬底10中的排布方式依据光电二极管11的排布结构的变化而变化,在一个可选的实施例中,其排列为井字形阵列。各个所述光电二极管隔离结构12在所述半导体衬底10中的位置基本上设置于同一深度。The photodiode isolation structure 12 is used to isolate each photodiode 11, and the arrangement of each photodiode isolation structure 12 in the semiconductor substrate 10 changes according to the arrangement structure of the photodiode 11. In one In an optional embodiment, they are arranged in a well-shaped array. The positions of each of the photodiode isolation structures 12 in the semiconductor substrate 10 are substantially set at the same depth.
在半导体衬底为P型掺杂,光电二极管为N型掺杂的情况下,光电二极管隔离结构12为P型掺杂,掺杂离子浓度范围为1E12~1E13/cm3,所述的掺杂离子包括B离子,BF2等。其在半导体衬底中的掺杂深度为2~2.5微米。When the semiconductor substrate is P-type doped and the photodiode is N-type doped, the photodiode isolation structure 12 is P-type doped, and the doping ion concentration range is 1E12-1E13/cm 3 . Ions include B ions , BF2, etc. Its doping depth in the semiconductor substrate is 2-2.5 microns.
所述的外延层20的掺杂类型与半导体衬底的掺杂类型相同,掺杂离子浓度也与半导体衬底的掺杂浓度相同。在本实施例中,形成的外延层20具有P型掺杂。所述的掺杂离子例如为B,BF2等,掺杂离子浓度范围为1E14~1E16/cm3。The doping type of the epitaxial layer 20 is the same as that of the semiconductor substrate, and the concentration of doping ions is also the same as that of the semiconductor substrate. In this embodiment, the formed epitaxial layer 20 has P-type doping. The dopant ions are, for example, B, BF 2 , etc., and the concentration range of the dopant ions is 1E14˜1E16/cm 3 .
所述的浮动扩散区域13嵌入所述外延层20中,其位置对应于半导体衬底中光电二极管的位置对应,位于光电二极管11的上方,并且不与光电二极管相连。所述的浮动扩散区域13可以接收存储在光电二极管中的电荷,以在浮动扩散区域中聚集电荷。在本实施例中,所述的浮动扩散区域13具有N型掺杂,掺杂离子浓度范围为1E13~2E15/cm3。The floating diffusion region 13 is embedded in the epitaxial layer 20 , its position corresponds to that of the photodiode in the semiconductor substrate, it is located above the photodiode 11 , and is not connected to the photodiode. The floating diffusion region 13 can receive the charges stored in the photodiode to accumulate the charges in the floating diffusion region. In this embodiment, the floating diffusion region 13 has N-type doping, and the doping ion concentration range is 1E13˜2E15/cm 3 .
所述传输栅14贯穿所述外延层20,用于改善光电二极管中的电荷被传输到浮动扩散区域14中的效率,从而提高图像传感器的电荷传输效率。The transfer gate 14 runs through the epitaxial layer 20 and is used to improve the transfer efficiency of the charge in the photodiode to the floating diffusion region 14 , thereby improving the charge transfer efficiency of the image sensor.
所述传输栅14包括多晶硅层14b以及位于多晶硅层与外延层之间用于隔离所述外延层和多晶硅层的绝缘材料层14a。其中,所述绝缘材料层可以包括氧化硅或氮化硅。The transfer gate 14 includes a polysilicon layer 14b and an insulating material layer 14a between the polysilicon layer and the epitaxial layer for isolating the epitaxial layer and the polysilicon layer. Wherein, the insulating material layer may include silicon oxide or silicon nitride.
所述的背照式图像传感器的俯视图参考图10所示,其中图9为图10中沿A’A’方向的截面结构示意图。The top view of the back-illuminated image sensor is shown in FIG. 10 , wherein FIG. 9 is a schematic cross-sectional structure diagram along the A'A' direction in FIG. 10 .
从图10可以看出,所述的传输栅14的截面结构为长方形结构,根据工艺设计的需要,所述的传输栅14的截面结构还可以做各种变形,比如正方形,除此之外,参考附图11至附图13,所述的传输栅的截面结构还可以为圆形,菱形,十字形等为规则或者不规则的结构。所述的不同的截面结构可以得到不同长度的沟道,能适应不同的工艺需求。It can be seen from FIG. 10 that the cross-sectional structure of the transmission grid 14 is a rectangular structure. According to the needs of process design, the cross-sectional structure of the transmission grid 14 can also be deformed in various ways, such as a square. In addition, Referring to accompanying drawings 11 to 13, the cross-sectional structure of the transmission grid can also be a circle, a rhombus, a cross, etc., which are regular or irregular structures. The different cross-sectional structures can obtain channels with different lengths, which can adapt to different process requirements.
本实施例所述的背照式图像传感器结构,将光电二极管和光电二极管隔离结构设置在半导体衬底中,在半导体衬底上形成外延层,并将传输栅TG和浮动扩散区域设置在外延层中,这样做增大了光电二极管的面积,有效的提高了背照式图像传感器的量子效率,并且防止入射辐射在浮动扩散区域积累电荷污染浮动扩散区域,改善了图像传感器的全局快门效率。In the back-illuminated image sensor structure described in this embodiment, the photodiode and the photodiode isolation structure are arranged in the semiconductor substrate, an epitaxial layer is formed on the semiconductor substrate, and the transmission gate TG and the floating diffusion region are arranged in the epitaxial layer. In this way, the area of the photodiode is increased, the quantum efficiency of the back-illuminated image sensor is effectively improved, and the incident radiation is prevented from accumulating charges in the floating diffusion area to pollute the floating diffusion area, which improves the global shutter efficiency of the image sensor.
本发明虽然已以较佳实施方式公开如上,但其并不是用来限定本发明,任何本领域技术人员在不脱离本发明的精神和范围内,都可以利用上述揭示的方法和技术内容对本发明技术方案做出可能的变动和修改,因此,凡是未脱离本发明技术方案的内容,依据本发明的技术实质对以上实施方式所作的任何简单修改、等同变化及修饰,均属于本发明技术方案的保护范围。Although the present invention has been disclosed as above with a preferred embodiment, it is not intended to limit the present invention. Any person skilled in the art can use the methods and technical contents disclosed above to analyze the present invention without departing from the spirit and scope of the present invention. Therefore, any simple modification, equivalent change and modification made to the above implementation methods according to the technical essence of the present invention, which do not depart from the content of the technical solution of the present invention, all belong to the technical solution of the present invention. protected range.
Claims (14)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201810882983.4A CN108899335A (en) | 2018-08-06 | 2018-08-06 | Back side illumination image sensor and preparation method thereof |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201810882983.4A CN108899335A (en) | 2018-08-06 | 2018-08-06 | Back side illumination image sensor and preparation method thereof |
Publications (1)
Publication Number | Publication Date |
---|---|
CN108899335A true CN108899335A (en) | 2018-11-27 |
Family
ID=64353596
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201810882983.4A Pending CN108899335A (en) | 2018-08-06 | 2018-08-06 | Back side illumination image sensor and preparation method thereof |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN108899335A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109950263A (en) * | 2019-03-20 | 2019-06-28 | 德淮半导体有限公司 | Imaging sensor and forming method thereof |
CN109950268A (en) * | 2019-03-27 | 2019-06-28 | 德淮半导体有限公司 | PDAF image sensor and forming method thereof |
CN113540140A (en) * | 2021-07-15 | 2021-10-22 | 上海芯物科技有限公司 | Backside illuminated complementary metal oxide semiconductor image sensor and preparation method thereof |
CN115939159A (en) * | 2023-02-02 | 2023-04-07 | 合肥晶合集成电路股份有限公司 | Image sensor and manufacturing method thereof |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102177585A (en) * | 2008-10-16 | 2011-09-07 | 全视科技有限公司 | Image sensor with multiple sensing layers and method of operation and fabrication thereof |
US20110241145A1 (en) * | 2010-04-06 | 2011-10-06 | Victor Lenchenkov | Backside illumination image sensors with reflective light guides |
CN103441133A (en) * | 2013-08-30 | 2013-12-11 | 格科微电子(上海)有限公司 | Back side illumination image sensor and method for reducing dark current of back side illumination image sensor |
-
2018
- 2018-08-06 CN CN201810882983.4A patent/CN108899335A/en active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102177585A (en) * | 2008-10-16 | 2011-09-07 | 全视科技有限公司 | Image sensor with multiple sensing layers and method of operation and fabrication thereof |
US20110241145A1 (en) * | 2010-04-06 | 2011-10-06 | Victor Lenchenkov | Backside illumination image sensors with reflective light guides |
CN103441133A (en) * | 2013-08-30 | 2013-12-11 | 格科微电子(上海)有限公司 | Back side illumination image sensor and method for reducing dark current of back side illumination image sensor |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109950263A (en) * | 2019-03-20 | 2019-06-28 | 德淮半导体有限公司 | Imaging sensor and forming method thereof |
CN109950268A (en) * | 2019-03-27 | 2019-06-28 | 德淮半导体有限公司 | PDAF image sensor and forming method thereof |
CN113540140A (en) * | 2021-07-15 | 2021-10-22 | 上海芯物科技有限公司 | Backside illuminated complementary metal oxide semiconductor image sensor and preparation method thereof |
CN115939159A (en) * | 2023-02-02 | 2023-04-07 | 合肥晶合集成电路股份有限公司 | Image sensor and manufacturing method thereof |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
TWI834935B (en) | Method for passivating full front-side deep trench isolation structure | |
JP5529304B2 (en) | Image sensor and manufacturing method thereof | |
CN108899335A (en) | Back side illumination image sensor and preparation method thereof | |
JP2007027730A (en) | Image sensor and manufacturing method thereof | |
TW200945567A (en) | Image sensor and pixel including a deep photodetector | |
CN100517651C (en) | Method for forming pixel unit of CMOS image sensor | |
TWI801854B (en) | Low noise silicon germanium image sensor | |
US20190333962A1 (en) | Image sensors and forming methods of the same | |
TW201916388A (en) | Method of fabricating image sensor | |
CN204966500U (en) | Image sensor and system thereof | |
CN108258004A (en) | Imaging sensor and forming method thereof | |
CN112599548B (en) | Image sensor and method of manufacturing the same | |
CN105185699A (en) | Method of reducing white pixels of CMOS image sensor by C ion implantation | |
US20060128126A1 (en) | Masked sidewall implant for image sensor | |
US11862509B2 (en) | Shallow trench isolation (STI) structure for CMOS image sensor | |
CN104332481B (en) | Imaging sensor and forming method thereof | |
CN201904338U (en) | CMOS (Complementary Metal Oxide Semiconductor) image sensor | |
CN108281442B (en) | Image sensor and forming method thereof | |
JP2010251628A (en) | Solid-state imaging device and manufacturing method thereof | |
CN110400815A (en) | Image sensor and method of forming the same | |
CN113823649B (en) | Semiconductor device, image sensor and method for forming the same | |
JP2002124660A (en) | Solid-state image pickup element and method of manufacturing the same | |
KR100887155B1 (en) | Image sensor and manufacturing method | |
KR101025080B1 (en) | Manufacturing Method of Image Sensor | |
KR100954918B1 (en) | Manufacturing Method of Image Sensor |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
WD01 | Invention patent application deemed withdrawn after publication | ||
WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20181127 |