CN108880258A - Controller applied to secondary side of power converter and operation method thereof - Google Patents

Abstract

The invention discloses a controller applied to a secondary side of a power converter and an operation method thereof. The controller includes a sampling/tracking circuit and a comparator. The sampling/tracking circuit is coupled to the secondary side of the power converter and used for generating a sampling value corresponding to the output voltage of the power converter when a sampling signal is enabled and generating a tracking value corresponding to the output voltage; the comparator is coupled to the sample/trace circuit for generating an alarm signal to the primary-side regulator controller of the power converter during an enabled period of a trace signal according to the sample value and the trace value. The primary side adjusting controller adjusts the frequency of the grid control signal according to the warning signal, and the sampling signal and the tracking signal are not enabled simultaneously. Therefore, the present invention is suitable for applications requiring a variable output voltage and can prevent ripple noise from causing the comparator to generate the warning signal.

Description

Controller applied to secondary side of power converter and method of operation thereof

technical field

The present invention relates to a controller applied to the secondary side of a power converter and an operating method thereof, in particular to a controller capable of enabling the primary side regulation controller of a power converter to quickly respond to a sudden increase in load and its operation method.

Background technique

When the load on the secondary side of the power converter is light load, the frequency of the gate control signal generated by the voltage regulator controller on the primary side of the power converter is relatively low, so at this time the frequency of the gate control signal The cycle is longer. Therefore, when the load on the secondary side of the power converter increases suddenly, because the output power of the secondary side of the power converter can only be provided by the capacitor coupled to the secondary side of the power converter , so the output voltage of the secondary side of the power converter will drop sharply, that is to say, because the frequency of the gate control signal is low, the response of the regulator controller to the change of the output voltage It is also relatively slow, causing the voltage stabilizing controller to be unable to quickly respond to a sudden increase in load, causing the output voltage to drop sharply. Therefore, how to design a controller that enables the voltage stabilizing controller to quickly respond to a sudden increase in load will become an important issue.

Contents of the invention

An embodiment of the invention discloses a controller applied to a secondary side of a power converter. The controller includes a sampling/tracking circuit and a comparator. The sampling/tracking circuit is coupled to the secondary side of the power converter, and is used to generate a sample value corresponding to the output voltage of the power converter when a sampling signal is enabled, and to generate a value corresponding to the output voltage of the power converter. a tracking value of the output voltage; the comparator is coupled to the sampling/tracking circuit for generating a warning signal to the power conversion according to the sampled value and the tracking value during a tracking signal enabling period Primary side regulation (primary-side regulation, PSR) controller. The primary side regulation controller adjusts the frequency of the gate control signal according to the warning signal, and the sampling signal and the tracking signal are not enabled at the same time.

Another embodiment of the present invention discloses an operation method of a controller applied to a secondary side of a power converter, wherein the controller includes a sampling/tracking circuit and a comparator. The operation method includes the sampling/tracking circuit generating a sampling value corresponding to the output voltage of the power converter when a sampling signal is enabled; the sampling/tracking circuit generating a tracking value corresponding to the output voltage; The comparator generates a warning signal to the primary side regulation controller of the power converter according to the sampling value and the tracking value during a tracking signal activation period, wherein the primary side regulation controller according to the A warning signal is used to adjust the frequency of the gate control signal, and the sampling signal and the tracking signal will not be activated at the same time.

The invention discloses a controller applied to a secondary side of a power converter and an operation method thereof. The controller and the operation method use a sampling/tracking circuit to generate a sampling value and a tracking value corresponding to the output voltage of the power converter, and use a comparator to generate a warning signal to the primary regulation controller of the power converter. Then, the primary side regulating controller can increase the frequency of the gate control signal of the power switch of the primary side of the power converter according to the warning signal. Therefore, compared with the prior art, the present invention has the following advantages: First, because the tracking value corresponds to the real-time output voltage of the power converter, the present invention is suitable for applications requiring variable output voltage; Second, because the present invention determines whether to generate the warning signal to the primary-side regulation controller according to the drop percentage of the output voltage, the present invention can avoid ripple noise causing the The comparator generates the warning signal to the primary regulation controller.

Description of drawings

FIG. 1 is a schematic diagram of a controller applied to a secondary side of a power converter disclosed in the first embodiment of the present invention.

Fig. 2 illustrates the gate control signal corresponding to the power switch on the primary side of the power converter, the current on the secondary side of the power converter, the sampling signal, the tracking signal, the change of the load on the secondary side of the power converter, and the output voltage and the timing diagram of the warning signal.

FIG. 3A is a schematic diagram of a controller applied to the secondary side of a power converter disclosed in the second embodiment of the present invention.

FIG. 3B is a schematic diagram of a controller applied to the secondary side of a power converter disclosed by another embodiment of the present invention.

FIG. 4 is a flow chart of an operation method of a controller applied to the secondary side of a power converter disclosed by the third embodiment of the present invention.

Wherein, the reference signs are explained as follows:

100 power converter

102 load

104 power switch

106 primary side regulating controller

108 optocoupler

200, 200a, 200b controller

202, 300 sampling/tracking circuit

204 comparators

206 drive circuit

2022 Voltage divider unit

2024 Conditioning unit

2026, 302 current mirror

20222 First resistance

20224 Second resistor

20242 Operational Amplifier

20244 N-type metal oxide semiconductor transistor

20246 Third resistor

20262 The first P-type metal oxide semiconductor transistor

20264 Second p-type metal oxide semiconductor transistor

20266 The third P-type metal oxide semiconductor transistor

20268 First switch

20270 Second switch

20272 Fourth Resistor

20274 First Capacitor

3022 Fourth PMOS Transistor

3024 fifth p-type metal oxide semiconductor transistor

3026 Fifth resistor

3028 Third switch

3030 second capacitor

A node

DV divider

GCS gate control signal

GND1, GND2 ground terminal

I1 first current

I2 second current

I3 third current

ISEC current

PRI primary side

SEC secondary side

SAS sampled signal

TS tracking signal

T1-T8 time

VCC, OPTOD pins

VOUT, VOUT1, VOUT2 output voltage

V1 first voltage

V2 second voltage

VSAM sampled value

VT tracking value

WS warning sign

400-406 steps

Detailed ways

Please refer to FIG. 1 . FIG. 1 is a schematic diagram of a controller 200 applied to a secondary-side SEC of a power converter 100 disclosed in the first embodiment of the present invention. As shown in FIG. 1, the controller 200 includes a sampling/tracking circuit 202 and a comparator 204, wherein the sampling/tracking circuit 202 is coupled to the secondary side SEC of the power converter 100, and the comparator 204 is coupled to the sampling/tracking circuit 204. Tracking circuit 202 .

As shown in FIG. 1 , the sampling/tracking circuit 202 includes a voltage dividing unit 2022 , an adjusting unit 2024 and a current mirror 2026 . The voltage dividing unit 2022 includes a first resistor 20222 and a second resistor 20224, wherein the voltage dividing unit 2022 is coupled to the secondary side SEC of the power converter 100 for receiving the secondary voltage of the power converter 100 through a pin VCC The output voltage VOUT of the side SEC, and using the first resistor 20222 and the second resistor 20224 to divide the output voltage VOUT through formula (1) to generate a divided voltage DV:

Wherein R ₂₀₂₂₂ is the resistance value of the first resistor 20222 and R ₂₀₂₂₄ is the resistance value of the second resistor 20224 . In addition, the coupling relationship between the first resistor 20222 and the second resistor 20224 can refer to FIG. 1 , which will not be repeated here.

The adjustment unit 2024 includes an operational amplifier 20242, an NMOS transistor 20244, and a third resistor 20246, wherein the adjustment unit 2024 is coupled to the voltage divider 2022 for normal operation of the NMOS transistor 20244 When, according to the divided voltage DV, a first voltage V1 is generated, the first voltage V1 is related to the output voltage VOUT, the first voltage V1 is equal to the divided voltage DV, and the first voltage V1 and the third resistor 20246 can be determined by formula (2) A first current I1:

Wherein R ₂₀₂₄₆ is the resistance value of the third resistor 20246. In addition, the coupling relationship of the operational amplifier 20242 , the NMOS transistor 20244 and the third resistor 20246 can refer to FIG. 1 , and will not be repeated here.

In addition, as shown in FIG. 1, the current mirror 2026 is coupled to the adjustment unit 2024 and the comparator 204, including a first PMOS transistor 20262, a second PMOS transistor 20264, a third PMOS transistor 20266, a first switch 20268, a second switch 20270, a fourth resistor 20272 and a first capacitor 20274, wherein the width-to-length ratio of the third PMOS transistor 20266 is equal to the first The aspect ratio of the first PMOS transistor 20262, the aspect ratio of the second PMOS transistor 20264 is N times the aspect ratio of the first PMOS transistor 20262, and N is A real number greater than 1. In addition, the first PMOS transistor 20262, the second PMOS transistor 20264, the third PMOS transistor 20266, the first switch 20268, the second switch 20270, the fourth resistor 20272 and The coupling relationship of the first capacitor 20274 can be referred to FIG. 1 , and will not be repeated here. In addition, the present invention is not limited to the fact that the aspect ratio of the third PMOS transistor 20266 is equal to the aspect ratio of the first PMOS transistor 20262, that is to say, in another embodiment of the present invention Among them, the aspect ratio of the third PMOS transistor 20266 is not equal to the aspect ratio of the first PMOS transistor 20262. As shown in FIG. 1, because the aspect ratio of the second PMOS transistor 20264 is N times that of the first PMOS transistor 20262, the flow through the second PMOS transistor The second current I2 of the semiconductor transistor 20264 is N times the first current I1, and the third current I3 flowing through the third PMOS transistor 20266 is equal to the first current I1, wherein the second current I2 can be obtained by the formula ( 3) means:

Please refer to FIG. 2. FIG. 2 illustrates the gate control signal GCS of the power switch 104 corresponding to the primary side PRI of the power converter 100, the current ISEC of the secondary side SEC of the power converter 100, a sampling signal SAS, and a tracking signal. TS, the change of the load 102 of the secondary side SEC of the power converter 100, the output voltage VOUT and a timing diagram of a warning signal WS, wherein the sampling signal SAS and the tracking signal TS are generated by the signal generator (not shown) in the controller 200 As shown in FIG. 1 ), the sampling signal SAS and the tracking signal TS are not activated at the same time, and the sampling signal SAS and the tracking signal TS correspond to the gate control signal GCS. As shown in FIG. 2 , at a time T1 , the gate control signal GCS is turned off, so the secondary side SEC of the power converter 100 starts to discharge (the current ISEC has a maximum value at this time, and the tracking signal TS is also turned off). At a time T2, the secondary side SEC of the power converter 100 is completely discharged, and the sampling signal SAS is enabled. As shown in FIG. 1, at time T2, the second voltage V2 (corresponding to time T2) of a node A in the sampling/tracking circuit 202 can be expressed by formula (4), wherein R ₂₀₂₇₂ is the resistance value of the fourth resistor 20272 And VOUT1 is the output voltage VOUT corresponding to the sampling signal SAS (as shown in FIG. 2 , because at time T2, the secondary side SEC of the power converter 100 is completely discharged, so VOUT1 is the maximum value of the output voltage VOUT):

Because the sampling signal SAS is enabled, the second switch 20270 is turned on, causing the second voltage V2 of node A to start charging the first capacitor 20274 to generate a sampled value VSAM equal to the second voltage V2 at the positive input terminal of the comparator 204 (also It is at time T2 that the first capacitor 20274 will store the sampled value VSAM).

As shown in Figures 1 and 2, at a time T3, because the sampling signal SAS is off and the tracking signal TS is enabled, the second switch 20270 is turned off, and the first switch 20268 and the comparator 204 are turned on, wherein the tracking signal TS is enabled to One time T4. Therefore, as shown in FIG. 1, between time T3 and time T4, because the tracking signal TS is enabled, the first switch 20268 is turned on, resulting in a corresponding tracking value VT generated in the comparator 204 between time T3 and time T4. The negative input terminal and node A (that is to say, the sampling/tracking circuit 202 generates a tracking value VT during the period when the tracking signal TS is enabled), wherein the tracking value VT can be expressed by formula (5):

In addition, the operations of the controller 200 at time T4 , a time T5 and a time T6 may refer to the operations of the controller 200 at time T1 , time T2 and time T3 , which will not be repeated here.

Between time T3 and time T4, since the tracking signal TS is enabled, the comparator 204 is turned on. Therefore, between time T3 and time T4 (that is, during the period when the tracking signal TS is enabled), the comparator 204 can continuously compare the tracking value VT (from formula (5), the tracking value VT has real-time information of the output voltage VOUT) and the sampling Value VSAM.

Before a time T7, because the load 102 is lightly loaded, the frequency of the gate control signal GCS generated by the primary-side regulation (PSR) controller 106 of the primary side PRI of the power converter 100 is low ( For example, the frequency of the gate control signal GCS may be lower than 1 KHz). Therefore, if the load 102 suddenly increases at time T7, because the frequency of the gate control signal GCS is low, the response of the primary-side regulation controller 106 to the change of the output voltage VOUT is also slow, resulting in a sudden increase in the output voltage VOUT. decline. Therefore, at a time T8, the tracking value VT will be equal to the sampling value VSAM, wherein the relationship between the output voltage VOUT (that is, VOUT1) corresponding to the sampling signal SAS and the output voltage VOUT (that is, VOUT2) corresponding to the time T8 can be expressed by Equation (6 )Decide:

If N is 19, then when VOUT2 is less than 0.95*(VOUT1) (that is, after time T8), the comparator 204 will generate a warning signal WS and pass through a drive circuit 206, a pin OPTOD and An optocoupler 108 is connected to the primary-side regulation controller 106 , wherein the primary-side regulation controller 106 can increase the frequency and enable time of the gate control signal GCS according to the warning signal WS to quickly respond to the sudden increase of the load 102 . However, in another embodiment of the present invention, because the comparator 204 has a relatively large driving capability, the warning signal WS generated by the comparator 204 is directly sent to the primary side regulation controller 106 through the pin OPTOD and the optocoupler 108, That is to say, when the comparator 204 has a larger driving capability, the driving circuit 206 can be omitted.

In addition, the present invention is not limited to the timing of the sampling signal SAS and the tracking signal TS as shown in FIG. 2 , that is, as long as the sampling signal SAS and the tracking signal TS are not enabled at the same time, it falls within the scope of the present invention.

In addition, the ground terminal GND1 of the primary side PRI of the power converter 100 and the ground terminal GND2 of the secondary side SEC of the power converter 100 may have the same level or different levels.

Please refer to FIG. 3A . FIG. 3A is a schematic diagram of a controller 200 a applied to the secondary side SEC of the power converter 100 disclosed in the second embodiment of the present invention. As shown in FIG. 3A, the difference between the controller 200a and the controller 200 is that a current mirror 302 included in the sampling/tracking circuit 300 in the controller 200a continuously generates the tracking value VT according to the first voltage V1 (that is to say, no matter Whether the tracking signal TS is enabled or not, the sampling/tracking circuit 300 continues to generate the tracking value VT according to the first voltage V1. As shown in FIG. 3A, the current mirror 302 includes a fourth PMOS transistor 3022, a fifth PMOS transistor 3024, a fourth resistor 20272, a fifth resistor 3026, and a third switch 3028 and a second capacitor 3030, wherein the fourth PMOS transistor 3022, the fifth PMOS transistor 3024, the fourth resistor 20272, the fifth resistor 3026, the third switch 3028 and the second capacitor 3030 The coupling relationship can refer to FIG. 3A , which will not be repeated here. In addition, the aspect ratio of the fifth PMOS transistor 3024 is equal to the aspect ratio of the fourth PMOS transistor 3022 . However, the present invention is not limited to the fact that the aspect ratio of the fifth PMOS transistor 3024 is equal to the aspect ratio of the fourth PMOS transistor 3022 .

Please refer to Figures 2 and 3A. As shown in FIG. 2 , at time T2 , the secondary side SEC of the power converter 100 is completely discharged, and the sampling signal SAS is enabled. As shown in FIG. 3A, at time T2, the second voltage V2 (corresponding to time T2) of a node A in the current mirror 302 can be expressed by formula (7), wherein VOUT1 is the output voltage VOUT corresponding to the sampling signal SAS (such as As shown in FIG. 2, because at time T2, the secondary side SEC of the power converter 100 is fully discharged, so VOUT1 is the maximum value of the output voltage VOUT):

Because the sampling signal SAS is enabled, the third switch 3028 is turned on, causing the second voltage V2 of node A to start charging the second capacitor 3030 to generate a sampled value VSAM equal to the second voltage V2 at the positive input terminal of the comparator 204 (that is, At time T2, the first capacitor 20274 will store the sampled value VSAM). In addition, the tracking value VT can be determined by formula (8), wherein R ₃₀₂₆ is the resistance value of the fifth resistor 3026:

As shown in formula (8), when R ₂₀₂₇₂ is N times R ₃₀₂₆ , formula (8) can be rewritten into formula (9):

In addition, the sampling value VSAM can be determined by formula (10):

Therefore, as shown in FIG. 2, if the load 102 suddenly increases at time T7, the response of the primary-side regulation controller 106 to the change of the output voltage VOUT is relatively slow because the frequency of the gate control signal GCS is low. As a result, the output voltage VOUT will drop sharply. Therefore, at time T8, the tracking value VT will be equal to the sampling value VSAM, wherein the relationship between the output voltage VOUT corresponding to the sampling signal SAS (that is, VOUT1) and the output voltage VOUT corresponding to time T8 (that is, VOUT2) can be expressed by formula (6) Decide. Therefore, after time T8, the comparator 204 will generate a warning signal WS to the primary-side regulation controller 106, wherein the primary-side regulation controller 106 can increase the frequency and enable time of the gate control signal GCS according to the warning signal WS to respond quickly Sudden increase in load 102 . In addition, the rest of the operating principles of the controller 200a are the same as those of the controller 200, and will not be repeated here.

In addition, in another embodiment of the present invention (as shown in FIG. 3B ), the controller 200b applied to the secondary side SEC of the power converter 100 and the controller 200a applied to the secondary side SEC of the power converter 100 The difference is that the controller 200b does not include the fifth PMOS transistor 3024 and the third resistor 20246, that is to say, the difference from the controller 200b and the controller 200a is that the controller 200b does not have a current mirror function. Therefore, as shown in FIGS. 2 and 3B, at time T2, the second voltage V2 of node A in the current mirror 302 (corresponding to time T2) can be expressed by formula (11), wherein VOUT1 is the output voltage corresponding to the sampling signal SAS VOUT (as shown in FIG. 2 , because at time T2, the secondary side SEC of the power converter 100 is completely discharged, so VOUT1 is the maximum value of the output voltage VOUT):

In addition, the tracking value VT can be determined by formula (12):

In addition, the operating principle of the controller 200b may refer to the operating principle of the controller 200a and FIG. 2 , which will not be repeated here.

Please refer to FIGS. 1 , 2 , and 4 . FIG. 4 is a flowchart of an operation method of a controller applied to a secondary side of a power converter disclosed by a third embodiment of the present invention. The operation method in Figure 4 is explained by using Figures 1 and 2, and the detailed steps are as follows:

Step 400: start;

Step 402: the sampling/tracking circuit 202 generates a sampling value VSAM corresponding to the output voltage VOUT of the power converter 100 when the sampling signal SAS is enabled;

Step 404: the sampling/tracking circuit 202 generates a tracking value VT corresponding to the output voltage VOUT;

Step 406 : The comparator 204 generates a warning signal WS to the primary-side regulator controller 106 of the power converter 100 according to the sampled value VSAM and the tracking value VT during the active period of the tracking signal TS, and returns to step 402 .

In step 402, the voltage dividing unit 2022 in the sampling/tracking circuit 202 can use the first resistor 20222 and the second resistor 20224 to divide the output voltage VOUT to generate a divided voltage DV; the adjusting unit 2024 in the sampling/tracking circuit 202 can be used in When the NMOS transistor 20244 is in normal operation, it generates a first voltage V1 according to the divided voltage DV, wherein the first voltage V1 is related to the output voltage VOUT, the first voltage V1 is equal to the divided voltage DV, and the first voltage V1 is related to the output voltage VOUT. The three resistors 20246 can determine the first current I1.

As shown in FIG. 2 , at time T1 , the gate control signal GCS is turned off, so the secondary side SEC of the power converter 100 starts to discharge (the current ISEC has a maximum value and the tracking signal TS is also turned off). At time T2, the secondary side SEC of the power converter 100 is completely discharged, and the sampling signal SAS is enabled. As shown in FIG. 1 , at time T2, because the sampling signal SAS is enabled, the second switch 20270 is turned on, causing the second voltage V2 of node A (determined by the fourth resistor 20272 and the second current I2) to start to affect the first capacitor 20274 is charged to generate a sampled value VSAM equal to the second voltage V2 at the positive input terminal of the comparator 204 (that is, at time T2, the first capacitor 20274 will store the sampled value VSAM).

In step 404, as shown in Figures 1 and 2, at time T3, because the sampling signal SAS is off and the tracking signal TS is enabled, the second switch 20270 is turned off, and the first switch 20268 and the comparator 204 are turned on, wherein the tracking signal TS will be enabled until time T4, and the sampling signal SAS and the tracking signal TS will not be enabled at the same time. Therefore, as shown in FIG. 1, between time T3 and time T4, because the tracking signal TS is enabled, the first switch 20268 is turned on, resulting in a corresponding tracking value VT generated between the time T3 and time T4 at the negative side of the comparator 204. input and node A. In addition, as shown in Figures 3A and 3B, in another embodiment of the present invention, the current mirror 302 included in the sampling/tracking circuit 300 in the controller 200a continuously generates the tracking value VT according to the first voltage V1, also That is to say, no matter whether the tracking signal TS is enabled or not, the sampling/tracking circuit 300 in the controller 200a continues to generate the tracking value VT according to the first voltage V1.

In step 406, between time T3 and time T4, the comparator 204 is turned on because the tracking signal TS is enabled. Therefore, the comparator 204 can compare the tracking value VT and the sampled value VSAM in real time between the time T3 and the time T4 (that is, when the tracking signal TS is enabled). Before time T7, because the load 102 is light-loaded, the frequency of the gate control signal GCS generated by the primary-side regulation controller 106 is relatively low (eg, the frequency of the gate control signal GCS may be lower than 1 KHz). Therefore, if the load 102 suddenly increases at time T7, the response to the change of the output voltage VOUT is slow because the frequency of the gate control signal GCS is low, causing the output voltage VOUT to drop sharply. Therefore, at time T8, the tracking value VT is equal to the sampling value VSAM. After time T8, because the tracking value VT is smaller than the sampled value VSAM, the comparator 204 will generate a warning signal WS and send the warning signal WS to the primary side regulation controller 106, wherein the primary side regulation controller 106 can increase according to the warning signal WS. The frequency and enable time of the gate control signal GCS can quickly respond to a sudden load increase 102 .

In summary, the controller and its operation method applied to the secondary side of the power converter disclosed in the present invention use the sampling/tracking circuit to generate a sampling value and a tracking value corresponding to the output voltage of the power converter , and using the comparator to generate the warning signal to the primary side regulation controller according to the sampled value and the tracking value. Then, the primary side regulation controller can increase the frequency of the gate control signal according to the warning signal. Therefore, compared with the prior art, the present invention has the following advantages: First, because the tracking value corresponds to the real-time output voltage of the power converter, the present invention is suitable for applications requiring variable output voltage; Second, because the present invention determines whether to generate the warning signal to the primary-side regulation controller according to the drop percentage of the output voltage, the present invention can avoid ripple noise causing the The comparator generates the warning signal to the primary regulation controller.

The above descriptions are only preferred embodiments of the present invention, and are not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and changes. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present invention shall be included within the protection scope of the present invention.

Claims (13)

1. a kind of controller of the secondary side applied to power adapter, it is characterised in that include：

One sampling/tracking circuit, is coupled to the secondary side of the power adapter, to generate when a sampled signal enables One sampling value of the output voltage of the corresponding power adapter, and the tracking to generate the corresponding output voltage Value；And

One comparator, coupling Jie is in the sampling/tracking circuit, to during a trace signals enable, according to the sampling value With the tracking value, the primary side adjusting controller of a caution signal to the power adapter is generated；

Wherein the primary side adjusting controller adjusts the frequency of the grid control signal, and institute according to the caution signal Stating sampled signal and the trace signals will not enable simultaneously.

2. controller as described in claim 1, it is characterised in that：When the tracking value is less than the sampling value, the ratio The caution signal is generated to the primary side adjusting controller compared with device.

3. controller as described in claim 1, it is characterised in that：The primary side adjusting controller is according to the warning letter Number, increase the frequency of the grid control signal.

4. controller as described in claim 1, it is characterised in that：The sampling/tracking circuit is enabled in the trace signals Period generates the tracking value.

5. controller as described in claim 1, it is characterised in that：The sampled signal and the trace signals correspond to the electricity The grid control signal of the power switch of the primary side of source converter.

6. controller as described in claim 1, it is characterised in that the sampling/tracking circuit includes：

One partial pressure unit is coupled to the secondary side of the power adapter, to generate a partial pressure according to the output voltage；

One adjusts unit, is coupled to the divider, a first voltage is generated, wherein described first according to the partial pressure Voltage is related with the output voltage；And

One current mirror is coupled to the adjusting unit and the comparator, in the sampled signal enable when, according to described First voltage, generates the sampling value, and during the trace signals enable, according to the first voltage, described in generation Tracking value.

7. controller as described in claim 1, it is characterised in that the sampling/tracking circuit includes：

One partial pressure unit is coupled to the secondary side of the power adapter, to generate a partial pressure according to the output voltage；

One adjusts unit, is coupled to the divider, a first voltage is generated, wherein described first according to the partial pressure Voltage is related with the output voltage；And

One current mirror is coupled to the adjusting unit and the comparator, in the sampled signal enable when, according to described First voltage generates the sampling value, and to generate the tracking value according to the first voltage.

8. controller as described in claim 1, it is characterised in that additionally comprise：

One drive circuit, coupling Jie is between the comparator and the primary side adjusting controller of the power adapter, to pass Send the caution signal to the primary side adjusting controller of the power adapter.

9. a kind of operating method of the controller of the secondary side applied to power adapter, wherein the controller one is sampled/chased after Track circuit and a comparator, it is characterised in that include：

The sampling/tracking circuit generates the one of the output voltage of the corresponding power adapter when sampled signal enables Sampling value；

The sampling/tracking circuit generates a tracking value of the corresponding output voltage；And

The comparator, according to the sampling value and the tracking value, generates a caution signal during a trace signals enable To the primary side adjusting controller of the power adapter；

Wherein the primary side adjusting controller adjusts the frequency of the grid control signal, and institute according to the caution signal Stating sampled signal and the trace signals will not enable simultaneously.

10. operating method as claimed in claim 9, it is characterised in that：It is described when the tracking value is less than the sampling value Comparator generates the caution signal to the primary side adjusting controller.

11. operating method as claimed in claim 9, it is characterised in that：The primary side adjusting controller is according to the warning Signal increases the frequency of the grid control signal.

12. operating method as claimed in claim 9, it is characterised in that：The sampling/tracking circuit is opened in the trace signals With period, the tracking value is generated.

13. operating method as claimed in claim 9, it is characterised in that：The sampled signal and the trace signals correspond to institute State the grid control signal of the power switch of the primary side of power adapter.