CN108809299B - Signal frequency measurement system - Google Patents
Signal frequency measurement system Download PDFInfo
- Publication number
- CN108809299B CN108809299B CN201811005837.XA CN201811005837A CN108809299B CN 108809299 B CN108809299 B CN 108809299B CN 201811005837 A CN201811005837 A CN 201811005837A CN 108809299 B CN108809299 B CN 108809299B
- Authority
- CN
- China
- Prior art keywords
- timer
- preset
- signal
- value
- frequency
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K21/00—Details of pulse counters or frequency dividers
Landscapes
- Measuring Frequencies, Analyzing Spectra (AREA)
Abstract
The invention provides a signal frequency measuring system, which comprises a microcontroller, a first timer, a second timer and an internal clock source, wherein the first timer and the second timer are respectively connected with the microcontroller; the internal clock source is connected with the second timer and provides a clock signal for the second timer; a first preset overloading value is set in the first timer; the second timer is provided with a preset timing duration; inputting a signal to be tested into a first timer and a second timer; the first timer starts counting under the triggering of a preset jump edge pulse of a signal to be measured, and the numerical value is updated when the preset jump edge pulse is detected; the second timer starts timing under the triggering of the preset jump edge pulse, and the timer value is updated when the preset timing time is reached; and the microcontroller reads the count value of the second timer when the count value of the first timer reaches a first preset heavy load value so as to determine the frequency of the signal to be measured according to the first preset heavy load value and the count value of the second timer, thereby realizing the efficient measurement of the frequency of the signal to be measured.
Description
Technical Field
The invention relates to the technical field of signal measurement, in particular to a signal frequency measurement system.
Background
Frequency is a most basic physical quantity, and in many engineering applications, there is a need to measure the frequency of a signal, for example, by measuring the frequency of a signal, and on the basis of knowing the frequency of the signal, performing a certain control process on the signal to output a driving signal for driving a certain device.
In order to realize the measurement of the signal frequency, a common method is to measure the period of the signal to be measured by using a timer in a single chip microcomputer, and then convert the frequency of the signal to be measured. It is understood that, for a periodic signal, taking a rising edge as an example, the time length between adjacent rising edges is a period. Therefore, if the timer is triggered after the rising edge reaches, the next rising edge can be accurately identified, and the time length of reaching the next rising edge is obtained through timing, that is, the time length of one period can be obtained, and the reciprocal is the frequency.
For this reason, when the timer is used to measure the period of the signal to be measured, it is generally required to configure the counting time interval of the timer, i.e. count every how long, for example, 1 ms. Therefore, assuming that a timer is triggered to start counting when a rising edge arrives, when the counting number is updated to 1 after 1ms of timing, after each counting, the microcontroller in the single chip microcomputer needs to execute an interrupt processing logic, wherein the interrupt processing logic mainly judges whether edge jump occurs or not, and the process is repeated until the rising edge of the signal to be detected is judged again after the counting at a certain time is increased by one, and then a period is considered to have reached at the moment, and the time length of the period can be obtained by multiplying the total number of counting times by the counting time interval.
Therefore, the interrupt processing logic needs to be executed once after each counting, which occupies too much processing resources of the microcontroller, especially under the condition that the frequency of the signal to be measured is very high, because the set counting time interval is often small to ensure that the frequency of the signal to be measured can be accurately measured even if the frequency of the signal to be measured is very high, the interrupt processing logic needs to be executed more frequently, which not only reduces the efficiency of frequency measurement, but also occupies more processing resources of the microcontroller, thereby affecting the normal operation of the microcontroller, reducing the working efficiency of the microcontroller and affecting the service life of the microcontroller.
Disclosure of Invention
In view of the above, the present invention provides a signal frequency measurement system, which is used to improve the measurement efficiency of signal frequency and reduce the excessive occupation of the microcontroller processing resources by the signal frequency measurement.
The embodiment of the invention provides a signal frequency measurement system, which comprises:
the system comprises a microcontroller, a first timer, a second timer and an internal clock source, wherein the first timer and the second timer are respectively connected with the microcontroller;
the internal clock source is connected with the second timer to provide a clock signal for the second timer; a first preset overloading value is set in the first timer; a preset timing duration is set in the second timer;
inputting a signal to be tested into the first timer and the second timer;
the first timer is used for starting counting under the triggering of a preset jump edge pulse of the signal to be measured, and the numerical value is updated when the preset jump edge pulse is detected;
the second timer is used for starting timing under the pulse triggering of the preset jump edge and updating the time value every time when the preset timing duration is reached;
and the microcontroller is used for reading the count value of the second timer when the count value of the first timer reaches the first preset heavy load value so as to determine the frequency of the signal to be detected according to the first preset heavy load value and the count value of the second timer.
The invention provides a signal frequency measuring system, which comprises a microcontroller, a first timer and a second timer which are respectively connected with the microcontroller, and an internal clock source. The internal clock source is connected with the second timer and provides clock signals for the second timer, a first preset overloading value is set in the first timer, a preset timing duration is set in the second timer, and the signals to be tested are input into the first timer and the second timer. The first timer starts counting under the triggering of a preset jump edge pulse of a signal to be measured, and the numerical value is updated every time the preset jump edge pulse is detected until the first preset heavy load value is counted. The second timer starts to time under the triggering of the preset jump edge pulse, and the time value is updated every time when the preset time duration is reached. Based on this, when the count value of the first timer reaches the first preset overloading value, the microcontroller reads the count value of the second timer so as to determine the frequency of the signal to be detected according to the first preset overloading value and the count value of the second timer.
According to the scheme, the first timer starts counting under the trigger of the preset jump edge pulse of the signal to be measured, the timer value is updated when the preset jump edge pulse is detected until the first preset heavy load value is counted, only the preset jump edge needs to be detected and counting is conducted during the period, and the processing of interrupting logic is not needed. And the second timer starts timing under the pulse triggering of the preset jump edge, the timer value is updated every time when the preset timing duration is reached, and the second timer stops counting until the first timer counts the first preset heavy load value, and the interrupt logic processing is not needed in the period. Therefore, the processing times of the interrupt logic in the signal frequency measurement process are reduced, and the processing efficiency of the signal frequency measurement is improved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the embodiments or the description of the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and other drawings can be obtained by those skilled in the art without creative efforts.
Fig. 1 is a schematic structural diagram of a signal frequency measurement system according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of another signal frequency measurement system according to an embodiment of the present invention;
fig. 3 is a schematic waveform diagram of frequency division processing performed on a signal to be detected according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of another signal frequency measurement system according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The terminology used in the embodiments of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in the description of the invention and the appended claims, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise, and "the plural" typically includes at least two.
It should be understood that the term "and/or" as used herein is merely one type of association that describes an associated object, meaning that three relationships may exist, e.g., a and/or B may mean: a exists alone, A and B exist simultaneously, and B exists alone. In addition, the character "/" herein generally indicates that the former and latter related objects are in an "or" relationship.
The words "if", as used herein, may be interpreted as "at … …" or "at … …" or "in response to a determination" or "in response to a detection", depending on the context. Similarly, the phrases "if determined" or "if detected (a stated condition or event)" may be interpreted as "when determined" or "in response to a determination" or "when detected (a stated condition or event)" or "in response to a detection (a stated condition or event)", depending on the context.
It is also noted that the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a good or system that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such good or system. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a commodity or system that includes the element.
It is further worth noting that the order between the steps in the embodiments of the present invention may be adjusted, and is not necessarily performed in the order illustrated below.
Fig. 1 is a schematic structural diagram of a signal frequency measurement system according to an embodiment of the present invention, and as shown in fig. 1, the signal frequency measurement system includes: microcontroller 11, first timer 12, second timer 13, internal clock source 14.
A microcontroller 11, a first timer 12 and a second timer 13 connected to the microcontroller 11, respectively, and an internal clock source 14.
Wherein the internal clock source 14 is connected to the second timer 13 to provide a clock signal for the second timer 13.
Wherein, the first timer 12 is set with a first preset reloading value; the second timer 13 is set with a preset timer period.
The signal to be measured is input to the first timer 12 and the second timer 13.
The first timer 12 is used for starting counting under the triggering of the preset jump edge pulse of the signal to be measured, and the numerical value is updated every time the preset jump edge pulse is detected.
And a second timer 13 for starting timing at a preset transition edge pulse trigger and counting the value update every time when the preset timing duration is counted.
And the microcontroller 11 is configured to read the count value of the second timer 13 when the count value of the first timer 12 reaches the first preset reload value, so as to determine the frequency of the signal to be detected according to the first preset reload value and the count value of the second timer 13.
In this embodiment, the first timer 12 is set with a first preset reload value, and takes the signal to be measured as its trigger source and clock source, starts counting under the preset jump edge pulse trigger of the signal to be measured, and may send an interrupt trigger signal to the microcontroller 11 whenever the update of the timer value along the pulse is detected until the first preset reload value is counted, so as to inform the microcontroller 11 that the first timer 12 has counted the first preset reload value currently.
In practical applications, the signal frequency measuring system may include a register corresponding to the first timer 12, so that the first preset override value may be written into the register in advance to complete the setting of the first preset override value to the first timer 12.
The second timer 13 is set with a preset timing length, and takes the signal to be measured as a trigger source, the internal clock as a clock source, starts timing under the pulse triggering of the preset transition edge of the signal to be measured, clocks the preset timing length under the control of the clock pulse output by the internal clock, and updates the value of the timing length every time the preset timing length is reached. In practical applications, the signal frequency measuring system may include a register corresponding to the second timer 13, so that the preset time duration may be written into the register in advance to complete the setting of the preset time duration to the second timer 13.
When the count value of the first timer T1 reaches the first preset reload value, the microcontroller 11 reads the count value of the second timer T2 to determine the frequency of the signal to be measured according to the first preset reload value and the count value of the second timer T2. In this embodiment, after reading the count value of the second timer 13, the microcontroller 11 clears the count value of the second timer 13, so that the second timer 13 restarts counting.
Based on the signal frequency testing system provided in this embodiment, the signal to be tested is input into the first timer 12, taking the above-mentioned preset transition edge pulse as a rising edge pulse as an example, the first timer 12 starts counting under the trigger of the first rising edge pulse of the signal to be tested, the timer value is updated each time a rising edge pulse is detected, until the first preset reload value (assumed to be N) is counted, and when the first preset reload value N is counted, the first timer 12 can restart timing.
The first predetermined reloading value N of the first timer 12 is actually the number of cycles that the signal under test has gone through. That is, the first timer 12 is equivalent to counting from the first rising edge pulse of the signal to be measured, and counting the number of cycles N that the signal to be measured has gone through, where N cycles correspond to N rising edge pulses received consecutively.
The second timer 13 starts timing under the pulse triggering of the rising edge of the signal to be measured, and if the preset timing duration is 1us, the time counting value is increased by one every time 1us is counted until the microcontroller 11 finds that the first timer 12 counts N, the second timer 13 is controlled to be cleared, and timing is restarted.
It can be seen that the second timer 13 is equivalent to the time length from the first timer 12 to the time counting to N, i.e. the time length corresponding to N cycles of the signal to be measured. When the time length of the N periods is determined, the corresponding frequency of the signal to be measured in the N periods can be calculated.
The calculation formula is as follows: the frequency of the signal to be measured is the first preset reloading value/(the count value of the second timer T2 is the preset timing duration).
In practical applications, the frequency of the signal to be measured may slightly vibrate, so that when the first timer 12 counts the first preset reloading value N, that is, N periods have been counted, the signal to be measured is still input, and at this time, the frequency of the next N periods of the signal to be measured can be continuously measured according to the above-described process.
It should be noted that, as can be seen from the timing functions of the first timer 12 and the second timer 13, the first timer 12 is mainly used for counting the number of cycles that the signal to be measured has gone through, in practical applications, the value of N can be set reasonably, and is generally not too high, so that the requirement on the counting range of the first timer 12 is not large, and therefore, the 16-bit timer can generally meet the requirement. However, in order to meet the requirement of accurately measuring the frequencies of the signals to be measured with different frequencies, the frequency of the internal clock source is often higher, and the requirement on the counting range of the second timer 13 is higher, so a 32-bit timer may be generally used as the second timer 13.
In addition, optionally, the signal frequency measurement system provided by the embodiment of the invention can be implemented based on an STM32 series single chip microcomputer.
In summary, according to the present disclosure, in N cycles, the first timer 12 and the second timer 13 do not generate an interrupt, that is, it is not necessary to frequently perform the detection of the jumping edge, and it is not necessary to frequently perform the interrupt logic processing, so as to improve the processing efficiency of the signal frequency measurement.
Fig. 2 is a schematic structural diagram of another signal frequency measurement system according to an embodiment of the present invention, as shown in fig. 2, based on the embodiment shown in fig. 1, the signal frequency measurement system may further include:
a third timer 15, and a second preset reload value is set in the third timer 15.
In practical applications, the signal frequency measuring system may include a register corresponding to the third timer 15, so that the second predetermined override value may be pre-written into the register to complete the setting of the second predetermined override value to the third timer 15.
One end of the third timer 15 is connected to the signal to be measured, and the other end of the third timer 15 is connected to the first timer 12 and the second timer 13, respectively.
And the third timer 15 is used for starting counting under the triggering of a preset jump edge pulse of the signal to be measured, counting the value updating every time the preset jump edge pulse is detected, and outputting the first pulse signal to the first timer 12 and the second timer 13 respectively when the counting value is updated to a second preset overloading value so that the first timer 12 starts counting under the triggering of the first pulse signal and the second timer 13 starts counting under the triggering of the first pulse signal.
The third timer 15 is further configured to restart counting after the count value is updated to the second preset reload value, and output a second pulse signal to the first timer 12 when the count value is restarted to the second preset reload value, where the second pulse signal has a level property opposite to that of the first pulse signal.
In this embodiment, the third timer 15 provides a frequency division function, and the second predetermined reloading value is a frequency division multiple. In practical applications, in the case that the third timer 15 is counted from 0, the actual dispensing multiple is the second preset reload value +1, and the following description takes the counting from 0 as an example.
In the present embodiment, the third timer 15 providing the frequency division function is provided because in practical applications, the frequency of the signal to be measured may be very high, and if the frequency of the signal to be measured is higher than the frequency of the internal clock source, it is likely to cause an inaccurate frequency measurement result, based on which, the frequency of the signal input to the first timer 12 may be reduced by the frequency division function of the third timer 15.
In practical applications, optionally, the signal frequency measurement system provided in this embodiment may be implemented based on an STM32 series single chip microcomputer, and in this case, the third timer 15 may be a timer provided with a frequency division function in the single chip microcomputer.
For the sake of understanding the frequency division operation of the third timer 15, the basic principle of the frequency division function provided by the third timer 15 will be briefly described with reference to fig. 3:
assuming that the second preset reload value is 1, the frequency division multiple is 1+1 ═ 2, and the preset transition edge pulse triggering the third timer 15 to start counting is assumed to be a rising edge pulse. Based on this, when the third timer 15 receives the rising edge pulse of the signal to be measured for the first time, it is triggered to start counting from 0, and the counting value is 0 at this time. Then, when the third timer 15 receives the rising edge pulse again, the count value is updated to be 1, and at this time, the count value reaches the second preset reloading value 1, and at this time, the third timer 15 may simultaneously output a first pulse signal, such as a rising edge pulse signal, to the first timer 12 and the second timer 13, where the first pulse signal is used as a trigger signal for the first timer 12 and the second timer 13 to trigger counting at the same time.
When the first timer 12 starts counting based on the trigger of the first pulse signal, for example, if the first timer 12 also starts counting from the initial value of 0, the count value of the first timer 12 at this time is the initial value of 0. Based on the triggering of the first pulse signal, the second timer 13 starts to operate, i.e., starts counting for a preset time period, such as 1us, and increments the count value by one when each time reaches 1 us.
When the third timer 15 counts to the second preset reload value, the count value is updated to be the initial value 0, and counting is restarted, that is, when the third rising edge pulse is received, the count value is updated to be 1, at this time, the count value reaches the second preset reload value 1 again, and at this time, the third timer 15 may output a second pulse signal, such as a falling edge pulse signal.
In the above example, the effective transition edge pulse of the first timer 12 for updating the count value is the rising edge pulse signal, so the falling edge pulse signal output by the third timer 15 at this time does not cause the update of the count value of the first timer 12.
The output of the falling edge pulse signal is, on the one hand, for the purpose of frequency division by 2 of the signal to be measured, and on the other hand, since the third timer 15 serves as a clock source of the first timer 12, if the third timer 15 stops outputting the electric signal to the first timer 12 after outputting the rising edge pulse signal for the first time, the first timer 12 will not work, and based on this, as shown in fig. 3, the third timer 15 keeps outputting the corresponding high level signal after outputting the rising edge pulse signal for the first time, outputs the falling edge pulse signal after counting again to the second preset reload value, keeps outputting the low level signal after counting again until counting again to the second preset reload value, outputs the rising edge pulse signal again, the rising edge pulse signal causes the count value of the first timer 12 to be updated, and so on.
In summary, after the third timer 15 is introduced, the output of the third timer 15 will serve as the trigger source (trigger start count) and clock source of the first timer 12, and as the trigger source of the second timer 13.
The process after the first timer 12 and the second timer 13 are triggered to start counting may refer to the description in the embodiment shown in fig. 1, and is not described again.
Based on the above premise that the count value starts to count from 0, optionally, the microcontroller 11 may calculate the frequency of the signal to be measured according to the following formula: the frequency of the signal to be measured is (first preset reload value + 1)/(count value of the second timer T2 is preset for a predetermined time duration).
Fig. 4 is a schematic structural diagram of another signal frequency measurement system according to an embodiment of the present invention. As shown in fig. 4, based on the embodiment shown in fig. 1, the signal frequency measurement system may further include:
a frequency divider 16, wherein the frequency divider 16 is set with a preset division multiple.
One end of the frequency divider 16 is connected to the signal to be measured, and the other end of the frequency divider 16 is connected to the first timer 12 and the second timer 13, respectively.
And the frequency divider 16 is configured to perform frequency division processing of a preset frequency division multiple on the signal to be detected, and output the signal to be detected after frequency division to the first timer 12 and the second timer 13.
Similar to the frequency division function provided by the third timer 15 in fig. 2, in the present embodiment, the frequency division of the signal to be measured can be realized by the conventional frequency divider 16.
Unlike the embodiment shown in fig. 2, in this embodiment, the signal to be measured is divided by the frequency divider to obtain a divided signal, for example, the waveform diagram shown in fig. 3 after frequency division by 2, and then the divided signal is output to the first timer 12 and the second timer 13, at this time, compared with the scheme of the embodiment shown in fig. 2, since the frequency division processing is performed on the complete signal to be measured first, it will take a certain time, and therefore, the divided signal input to the first timer 12 and the second timer 13 has a certain time delay.
In this embodiment, the frequency-divided signal may be regarded as the signal to be measured in the embodiment shown in fig. 1, so that the frequency-divided signal serves as a trigger source and a clock source of the first timer 12 and serves as a trigger source of the second timer 13, and a first preset transition edge pulse, such as a rising edge pulse, in the frequency-divided signal triggers the first timer 12 and the second timer 13 to start counting at the same time.
The working processes of the first timer 12 and the second timer 13 are not described in detail herein.
In this embodiment, the microcontroller may calculate the frequency of the signal to be measured according to the following formula:
the frequency of the signal to be measured is (the first preset reload value is the preset frequency division multiple)/(the count value of the second timer is the preset timing duration).
The above-described embodiments of the apparatus are merely illustrative, and the units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one position, or may be distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of the present embodiment. One of ordinary skill in the art can understand and implement it without inventive effort.
Finally, it should be noted that: the above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.
Claims (6)
1. A signal frequency measurement system, comprising:
the system comprises a microcontroller, a first timer, a second timer and an internal clock source, wherein the first timer and the second timer are respectively connected with the microcontroller;
the internal clock source is connected with the second timer to provide a clock signal for the second timer; a first preset overloading value is set in the first timer; a preset timing duration is set in the second timer;
inputting a signal to be tested into the first timer and the second timer;
the first timer is used for starting counting under the triggering of a preset jump edge pulse of the signal to be measured, and the numerical value is updated when the preset jump edge pulse is detected;
the second timer is used for starting timing under the pulse triggering of the preset jump edge and updating the time value every time when the preset timing duration is reached;
the microcontroller is used for reading the count value of the second timer when the count value of the first timer reaches the first preset overloading value so as to determine the frequency of the signal to be detected according to the first preset overloading value and the count value of the second timer;
the signal frequency measurement system further comprises a third timer or frequency divider;
a second preset reloading value is set in the third timer; one end of the third timer is connected with the signal to be detected, and the other end of the third timer is respectively connected with the first timer and the second timer; the third timer is used for starting counting under the triggering of a preset jump edge pulse of the signal to be measured, counting value updating is carried out every time the preset jump edge pulse is detected, and when the counting value is updated to the second preset overloading value, first pulse signals are respectively output to the first timer and the second timer, so that the first timer starts counting under the triggering of the first pulse signals and the second timer starts timing under the triggering of the first pulse signals;
the frequency divider is set with a preset frequency division multiple; one end of the frequency divider is connected with the signal to be detected, and the other end of the frequency divider is respectively connected with the first timer and the second timer; and the frequency divider is used for carrying out frequency division processing of the preset frequency division multiple on the signal to be detected and outputting the signal to be detected after frequency division to the first timer and the second timer.
2. The system of claim 1, wherein the microcontroller is further configured to clear the count value of the second timer after reading the count value of the second timer.
3. The system of claim 1, wherein the microcontroller is configured to determine the frequency of the signal under test as: the first preset reloading value/(the count value of the second timer) × the preset timing duration).
4. The system according to claim 1, wherein the third timer is further configured to restart counting after the counting value is updated to the second preset reload value, and output a second pulse signal to the first timer when the counting value is restarted to the second preset reload value, wherein the second pulse signal has a level property opposite to that of the first pulse signal.
5. The system of claim 1, wherein the microcontroller is further configured to determine the frequency of the signal under test as: (the first preset reload value + 1)/(the count value of the second timer + the preset timed duration).
6. The system of claim 1, wherein the microcontroller is further configured to determine the frequency of the signal under test as: (the first preset reload value is the preset frequency division multiple)/(the count value of the second timer is the preset timing duration).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811005837.XA CN108809299B (en) | 2018-08-30 | 2018-08-30 | Signal frequency measurement system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811005837.XA CN108809299B (en) | 2018-08-30 | 2018-08-30 | Signal frequency measurement system |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN108809299A CN108809299A (en) | 2018-11-13 |
| CN108809299B true CN108809299B (en) | 2022-07-08 |
Family
ID=64081363
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201811005837.XA Active CN108809299B (en) | 2018-08-30 | 2018-08-30 | Signal frequency measurement system |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN108809299B (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110794573B (en) * | 2019-10-21 | 2022-03-18 | 歌尔光学科技有限公司 | MEMS galvanometer feedback signal acquisition method, driving method and system |
| CN113075720B (en) * | 2021-03-24 | 2024-05-31 | 福州智元仪器设备有限公司 | Alpha and beta ray discrimination system and method based on combined timer |
| CN113162619B (en) * | 2021-04-29 | 2025-03-07 | 北京奕斯伟计算技术股份有限公司 | Frequency divider and control method thereof, clock signal generating circuit and electronic device |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5844435A (en) * | 1997-03-11 | 1998-12-01 | Lucent Technologies Inc | Low power, high accuracy clock circuit and method for integrated circuits |
| CN1355434A (en) * | 2000-11-30 | 2002-06-26 | 中国科学院微电子中心 | Method and device for measuring frequency and period |
| CN101029900A (en) * | 2007-02-06 | 2007-09-05 | 鲁东大学 | Apparatus and method for measuring rotation-axis speed by impulse |
| CN101067797A (en) * | 2007-06-25 | 2007-11-07 | 中兴通讯股份有限公司 | Processor availability measuring device and method |
| CN104115403A (en) * | 2012-10-24 | 2014-10-22 | Abb技术有限公司 | Pulse frequency measurement device and method and control system |
-
2018
- 2018-08-30 CN CN201811005837.XA patent/CN108809299B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5844435A (en) * | 1997-03-11 | 1998-12-01 | Lucent Technologies Inc | Low power, high accuracy clock circuit and method for integrated circuits |
| CN1355434A (en) * | 2000-11-30 | 2002-06-26 | 中国科学院微电子中心 | Method and device for measuring frequency and period |
| CN101029900A (en) * | 2007-02-06 | 2007-09-05 | 鲁东大学 | Apparatus and method for measuring rotation-axis speed by impulse |
| CN101067797A (en) * | 2007-06-25 | 2007-11-07 | 中兴通讯股份有限公司 | Processor availability measuring device and method |
| CN104115403A (en) * | 2012-10-24 | 2014-10-22 | Abb技术有限公司 | Pulse frequency measurement device and method and control system |
Non-Patent Citations (1)
| Title |
|---|
| 基于 PSoC 芯片的两路高精度频率测量系统设计;赵浩 等;《电子设计工程》;20140805;第22卷(第15期);174-176 * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN108809299A (en) | 2018-11-13 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN108809299B (en) | Signal frequency measurement system | |
| US20180188282A1 (en) | Method and device for measuring speed of permanent magnet synchronous motor | |
| CN114636862B (en) | High-precision pulse width measuring circuit and measuring method | |
| US6597205B2 (en) | High accuracy method for determining the frequency of a pulse input signal over a wide frequency range | |
| TW201303315A (en) | Method and system for measuring frequency | |
| JPWO2006038468A1 (en) | Phase difference measurement circuit | |
| KR100220672B1 (en) | Time interval measuring instrument with parallel structure | |
| US9255950B2 (en) | Method and arrangement for frequency determination | |
| US4168467A (en) | Measurement of pulse duration | |
| US5357490A (en) | Measuring timer system | |
| CN102457268B (en) | Implementation method for 32-bit capture register | |
| RU2210785C2 (en) | Digital frequency meter | |
| CN110687773B (en) | Method, device and system for measuring timing accuracy of time unified system | |
| US6072338A (en) | Method of and device for determining pulse width | |
| CN114546029B (en) | Control chip, MCU chip, MPU chip and DSP chip | |
| US5511047A (en) | High resolution timer using low resolution counter | |
| EP4382927A1 (en) | Clock monitoring circuit | |
| CN116048191A (en) | Time calibration method, device, equipment and storage medium | |
| US7620512B2 (en) | Determining a time base for a microcontroller | |
| JPS5741709A (en) | Operation monitor device | |
| SU1056209A1 (en) | Multichannel statistical analyzer | |
| CN116466638A (en) | Pulse number acquisition equipment and system, pulse signal processing method and device | |
| CN111123085A (en) | Measuring method and circuit | |
| KR890004865Y1 (en) | Delayed short frequency divider using counter | |
| UA127443C2 (en) | DIGITAL FREQUENCY METER |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| TA01 | Transfer of patent application right |
Effective date of registration: 20201030 Address after: 261061 north of Yuqing East Street, east of Dongming Road, Weifang High tech Zone, Weifang City, Shandong Province (Room 502, Geer electronic office building) Applicant after: GoerTek Optical Technology Co.,Ltd. Address before: 261031 No. 268 Dongfang Road, Weifang hi tech Industrial Development Zone, Shandong, Weifang Applicant before: GOERTEK Inc. |
|
| TA01 | Transfer of patent application right | ||
| CB02 | Change of applicant information |
Address after: 261061 east of Dongming Road, north of Yuqing East Street, high tech Zone, Weifang City, Shandong Province (Room 502, Geer electronics office building) Applicant after: GoerTek Optical Technology Co.,Ltd. Address before: 261061 East of Dongming Road, Weifang High-tech Zone, Weifang City, Shandong Province, North of Yuqing East Street (Room 502, Goertek Office Building) Applicant before: GoerTek Optical Technology Co.,Ltd. |
|
| CB02 | Change of applicant information | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |