CN108666057B - Chip resistor and preparation method thereof - Google Patents
Chip resistor and preparation method thereof Download PDFInfo
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- CN108666057B CN108666057B CN201810296003.2A CN201810296003A CN108666057B CN 108666057 B CN108666057 B CN 108666057B CN 201810296003 A CN201810296003 A CN 201810296003A CN 108666057 B CN108666057 B CN 108666057B
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- 238000002360 preparation method Methods 0.000 title claims description 7
- 239000000956 alloy Substances 0.000 claims abstract description 51
- 239000000758 substrate Substances 0.000 claims abstract description 39
- 229910045601 alloy Inorganic materials 0.000 claims abstract description 37
- 239000011888 foil Substances 0.000 claims abstract description 31
- 239000010410 layer Substances 0.000 claims description 182
- 239000011241 protective layer Substances 0.000 claims description 53
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 30
- 229910052802 copper Inorganic materials 0.000 claims description 30
- 239000010949 copper Substances 0.000 claims description 30
- 238000007639 printing Methods 0.000 claims description 28
- 238000007747 plating Methods 0.000 claims description 21
- 238000000034 method Methods 0.000 claims description 20
- 238000005498 polishing Methods 0.000 claims description 19
- 230000008569 process Effects 0.000 claims description 19
- 238000000576 coating method Methods 0.000 claims description 14
- 229920001721 polyimide Polymers 0.000 claims description 13
- 239000004642 Polyimide Substances 0.000 claims description 12
- 239000011248 coating agent Substances 0.000 claims description 10
- 238000001259 photo etching Methods 0.000 claims description 10
- 238000009713 electroplating Methods 0.000 claims description 9
- 238000005516 engineering process Methods 0.000 claims description 8
- 230000008439 repair process Effects 0.000 claims description 8
- PNEYBMLMFCGWSK-UHFFFAOYSA-N Alumina Chemical compound [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 7
- 239000000919 ceramic Substances 0.000 claims description 4
- 238000007650 screen-printing Methods 0.000 claims description 4
- 239000000126 substance Substances 0.000 claims description 4
- 229910000881 Cu alloy Inorganic materials 0.000 claims description 3
- 229910000640 Fe alloy Inorganic materials 0.000 claims description 3
- 229910001030 Iron–nickel alloy Inorganic materials 0.000 claims description 3
- 239000004697 Polyetherimide Substances 0.000 claims description 3
- 229910000676 Si alloy Inorganic materials 0.000 claims description 3
- 229910001128 Sn alloy Inorganic materials 0.000 claims description 3
- NWLCFADDJOPOQC-UHFFFAOYSA-N [Mn].[Cu].[Sn] Chemical compound [Mn].[Cu].[Sn] NWLCFADDJOPOQC-UHFFFAOYSA-N 0.000 claims description 3
- 238000003486 chemical etching Methods 0.000 claims description 3
- GOECOOJIPSGIIV-UHFFFAOYSA-N copper iron nickel Chemical compound [Fe].[Ni].[Cu] GOECOOJIPSGIIV-UHFFFAOYSA-N 0.000 claims description 3
- HPDFFVBPXCTEDN-UHFFFAOYSA-N copper manganese Chemical compound [Mn].[Cu] HPDFFVBPXCTEDN-UHFFFAOYSA-N 0.000 claims description 3
- UTICYDQJEHVLJZ-UHFFFAOYSA-N copper manganese nickel Chemical compound [Mn].[Ni].[Cu] UTICYDQJEHVLJZ-UHFFFAOYSA-N 0.000 claims description 3
- -1 nickel-chromium-aluminum-silicon Chemical compound 0.000 claims description 3
- 229910000623 nickel–chromium alloy Inorganic materials 0.000 claims description 3
- 229920001601 polyetherimide Polymers 0.000 claims description 3
- 238000004544 sputter deposition Methods 0.000 claims description 3
- 239000004962 Polyamide-imide Substances 0.000 claims description 2
- 150000004767 nitrides Chemical class 0.000 claims description 2
- 238000000059 patterning Methods 0.000 claims description 2
- 229920002312 polyamide-imide Polymers 0.000 claims description 2
- 230000007613 environmental effect Effects 0.000 abstract description 5
- 230000007774 longterm Effects 0.000 abstract description 2
- 238000012360 testing method Methods 0.000 description 16
- 239000003822 epoxy resin Substances 0.000 description 15
- 229920000647 polyepoxide Polymers 0.000 description 15
- 238000013461 design Methods 0.000 description 13
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 description 12
- 230000008859 change Effects 0.000 description 11
- 238000005260 corrosion Methods 0.000 description 10
- 230000007797 corrosion Effects 0.000 description 10
- 239000000463 material Substances 0.000 description 9
- 238000005530 etching Methods 0.000 description 7
- 239000002002 slurry Substances 0.000 description 7
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical group [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 6
- 238000005245 sintering Methods 0.000 description 6
- 239000002356 single layer Substances 0.000 description 5
- CDBYLPFSWZWCQE-UHFFFAOYSA-L Sodium Carbonate Chemical compound [Na+].[Na+].[O-]C([O-])=O CDBYLPFSWZWCQE-UHFFFAOYSA-L 0.000 description 4
- 229910003460 diamond Inorganic materials 0.000 description 4
- 239000010432 diamond Substances 0.000 description 4
- 238000000227 grinding Methods 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 4
- 238000012797 qualification Methods 0.000 description 4
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical group [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 229910052759 nickel Inorganic materials 0.000 description 3
- 239000002253 acid Substances 0.000 description 2
- 238000004140 cleaning Methods 0.000 description 2
- 239000008187 granular material Substances 0.000 description 2
- RBTARNINKXHZNM-UHFFFAOYSA-K iron trichloride Chemical compound Cl[Fe](Cl)Cl RBTARNINKXHZNM-UHFFFAOYSA-K 0.000 description 2
- 230000001681 protective effect Effects 0.000 description 2
- 229910000029 sodium carbonate Inorganic materials 0.000 description 2
- 238000009966 trimming Methods 0.000 description 2
- QPLDLSVMHZLSFG-UHFFFAOYSA-N Copper oxide Chemical compound [Cu]=O QPLDLSVMHZLSFG-UHFFFAOYSA-N 0.000 description 1
- 239000005751 Copper oxide Substances 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- NIXOWILDQLNWCW-UHFFFAOYSA-N acrylic acid group Chemical group C(C=C)(=O)O NIXOWILDQLNWCW-UHFFFAOYSA-N 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000009954 braiding Methods 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 229910000431 copper oxide Inorganic materials 0.000 description 1
- 238000005202 decontamination Methods 0.000 description 1
- 230000003588 decontaminative effect Effects 0.000 description 1
- 238000005238 degreasing Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 150000003839 salts Chemical class 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 238000004513 sizing Methods 0.000 description 1
- 239000007921 spray Substances 0.000 description 1
- 229910001220 stainless steel Inorganic materials 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C7/00—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
- H01C7/18—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material comprising a plurality of layers stacked between terminals
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C1/00—Details
- H01C1/02—Housing; Enclosing; Embedding; Filling the housing or enclosure
- H01C1/032—Housing; Enclosing; Embedding; Filling the housing or enclosure plural layers surrounding the resistive element
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C1/00—Details
- H01C1/14—Terminals or tapping points or electrodes specially adapted for resistors; Arrangements of terminals or tapping points or electrodes on resistors
- H01C1/142—Terminals or tapping points or electrodes specially adapted for resistors; Arrangements of terminals or tapping points or electrodes on resistors the terminals or tapping points being coated on the resistive element
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
- H01C17/02—Apparatus or processes specially adapted for manufacturing resistors adapted for manufacturing resistors with envelope or housing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
- H01C17/06—Apparatus or processes specially adapted for manufacturing resistors adapted for coating resistive material on a base
- H01C17/07—Apparatus or processes specially adapted for manufacturing resistors adapted for coating resistive material on a base by resistor foil bonding, e.g. cladding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
- H01C17/28—Apparatus or processes specially adapted for manufacturing resistors adapted for applying terminals
- H01C17/288—Apparatus or processes specially adapted for manufacturing resistors adapted for applying terminals by thin film techniques
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Apparatuses And Processes For Manufacturing Resistors (AREA)
- Details Of Resistors (AREA)
- Non-Adjustable Resistors (AREA)
Abstract
The invention discloses a chip resistor, which comprises an insulating substrate; the upper surface of the insulating substrate is provided with a first resistance layer, the lower surface of the insulating substrate is provided with a second resistance layer, the upper surface of the end part of the first resistance layer is provided with a pair of first electrode layers, the lower surface of the end part of the second resistance layer is provided with a pair of second electrode layers, the upper surface of the first resistance layer is covered with a first protection layer, the upper surface of the first protection layer is covered with a second protection layer, the lower surface of the second resistance layer is covered with a third protection layer, and the lower surface of the third protection layer is covered with a fourth protection layer; the first resistance layer and the second resistance layer are alloy foil layers. The chip resistor has higher temperature drift resistance and power tolerance, and the long-term stability and environmental tolerance of the product are better.
Description
Technical Field
The invention relates to a resistor and a preparation method thereof, in particular to a chip resistor and a preparation method thereof.
Background
In the conventional chip resistor element, a heat dissipation film made of epoxy resin is generally adopted to bond an insulating substrate and an alloy resistor layer together, and then an internal electrode layer, an oxide layer, a protective layer and an external electrode layer are respectively formed on the resistor layer in a mode of etching, oxidation, printing, electroplating or chemical plating, so that the resistor element with different resistance values is manufactured.
The existing chip resistor element has simple process, low realization difficulty and low cost, but the product uses the heat radiation film of the epoxy resin to bond the base plate and the alloy resistor layer, and the epoxy resin has poor high temperature resistance, so that the alloy resistor layer and the insulating substrate are separated due to the fact that the viscosity of the epoxy resin is possibly reduced under the environment of long-term working of the product, and when internal stress occurs in the resistor, impact is caused on the resistor layer to form cracks or the resistor body is disconnected, so that the resistor body is invalid. In addition, conventional single layer protection designs are inadequate for protection of current sensing resistors for accurate current measurement (current typically in the mA scale), and thus external environmental effects must be adequately accounted for, including moisture, salt spray, acid corrosion, and the like.
Disclosure of Invention
Based on this, it is an object of the present invention to overcome the above-mentioned disadvantages of the prior art and to provide a chip resistor having a lower resistance and a higher power withstand capability.
In order to achieve the above purpose, the technical scheme adopted by the invention is as follows: the chip resistor comprises an insulating substrate, wherein a first resistance layer is arranged on the upper surface of the insulating substrate, a second resistance layer is arranged on the lower surface of the insulating substrate, a pair of first electrode layers are arranged on the upper surface of the end part of the first resistance layer, a pair of second electrode layers are arranged on the lower surface of the end part of the second resistance layer, a first protection layer is covered on the upper surface of the first resistance layer, a second protection layer is covered on the upper surface of the first protection layer, a third protection layer is covered on the lower surface of the second resistance layer, and a fourth protection layer is covered on the lower surface of the third protection layer; the first resistance layer and the second resistance layer are alloy foil layers.
Preferably, one side of the alloy foil layer is plated with copper, and the first electrode layer and the second electrode layer are copper plating layers.
The chip resistor provided by the invention has the advantages that through the design of the double-layer resistor and the double-layer protection layer, on one hand, the resistance value of the product is lower, the power tolerance capability is better, and on the other hand, the environmental tolerance capability of the product is stronger, so that the chip resistor is suitable for application in more occasions. And the bonding is realized by adopting a mode of plating copper and then bonding, so that the alloy materials which cannot be bonded under the conventional conditions are bonded.
Preferably, the insulating substrate is an alumina ceramic substrate or an alumina nitride ceramic substrate with a thin layer of alumina deposited on the surface. The insulating substrate has good insulativity and thermal conductivity.
Preferably, the first resistance layer and the second resistance layer are both composed of an alloy material, and the alloy material is one of manganese copper alloy, nickel chromium alloy, nickel iron alloy, manganese copper tin alloy, manganese copper nickel alloy, nickel copper iron alloy and nickel chromium aluminum silicon alloy; one surface of the first resistance layer and one surface of the second resistance layer are plated with copper with the thickness of 0.1-10 um. The alloy material has the characteristics of low temperature drift coefficient and high power coefficient, and can improve the heat conductivity of the alloy material after being bonded with an insulating substrate, so that the alloy material has larger current bearing capacity.
Preferably, the copper plating process of the first resistor layer and the second resistor layer is sputtering, evaporation or electroplating.
Preferably, the first protective layer and the third protective layer are polyimide coatings.
More preferably, the first protective layer and the third protective layer are at least one of polyetherimide coating, polyamideimide coating and polydimaleimide coating.
More preferably, the first protective layer and the third protective layer are polyetherimide coatings.
Preferably, the second protective layer and the fourth protective layer are made of epoxy resin materials.
The polyimide coating is well combined with the alloy material in the resistance layer, so that the problem of gaps easily occurring when protective materials such as epoxy resin or acrylic are combined with the resistance layer is avoided, the polyimide coating has higher moisture resistance and corrosion resistance, and then the polyimide coating is covered with a layer of epoxy resin for protection, so that the acid corrosion resistance of the product can be further improved.
Preferably, the side surface of the insulating substrate is provided with a pair of end surface electrode layers, and the end surface electrode layers cover the side surface of the first electrode layer, the side surface of the first resistor layer, the side surface of the insulating substrate, the side surface of the second resistor layer and the side surface of the second electrode layer.
Preferably, the side face of the end face electrode layer is provided with a pair of external electrode layers which cover the end face electrode layer and at least partially cover the second protective layer and the fourth protective layer.
Preferably, the materials of the first electrode layer and the second electrode layer are copper.
Preferably, the material of the end face electrode layer is nickel, and the material of the outer electrode layer is tin.
The copper layer electrode is designed to reduce the contact resistance of the alloy foil surface of the product and improve the testing precision of the resistance of the product; the nickel layer electrode is an intermediate buffer layer, and the tin layer electrode is used for welding with other external elements.
Preferably, the first protective layer partially covers the first electrode layer, and the third protective layer partially covers the second electrode layer. The design can better play the role of the protective layer and protect the resistor layer more comprehensively.
Meanwhile, the invention also provides a preparation method of the chip resistor, which comprises the following steps:
(1) Carrying out surface copper plating treatment on one surface of the alloy foil layer;
(2) Bonding the surface of the alloy foil layer subjected to surface copper plating treatment on the upper surface and the lower surface of the insulating substrate respectively through a high-temperature bonding process;
(3) Carrying out mask patterning covering through a photoetching process, and then forming a first resistor layer and a second resistor layer through a chemical etching mode;
(4) Forming a first electrode layer and a second electrode layer on the upper surface of the end face of the first resistor layer and the lower surface of the end face of the second resistor layer respectively through a high-speed electroplating process;
(5) Mechanically polishing and repairing the resistor layer treated in the step (4);
(6) Printing a first protective layer on the upper surface of the first resistor layer subjected to the modification in the step (5) through a thick film screen printing technology, and printing a third protective layer on the lower surface of the second resistor layer;
(7) Printing a second protective layer on the upper surface of the first protective layer and printing a fourth protective layer on the lower surface of the third protective layer through thick film screen printing technology;
(8) Forming end face electrode layers on the first electrode layer, the second electrode layer and the side face of the insulating substrate through a magnetron vacuum sputtering process;
(9) And forming an external electrode layer on the side surface of the end surface electrode layer by electroplating technology.
In the manufacturing method of the present invention, the photolithography process includes printing a mask layer, exposing, developing, removing the mask layer, etc., and the chemical etching process includes chemical liquid etching, vapor etching, etc. The person skilled in the art can also make specific choices according to the actual circumstances.
Preferably, in the step (2), the high-temperature bonding process is as follows: the surface of the alloy foil layer subjected to the surface copper plating treatment is fixed on an insulating substrate by high temperature to form chemical bonding.
In the step (2), the specific steps of the high-temperature bonding process are as follows: the surface degreasing, decontamination, pressurization leveling and slight corrosion treatment are carried out on the alloy foil, then the alloy foil is flatly placed on an insulating substrate, then the alloy foil and the insulating substrate are put into a sintering container, the sintering container is put into a high-temperature sintering furnace for sintering, the sintering temperature is 1065-1083 ℃ (and 0.1008% -0.139% of oxygen is introduced, and copper oxide and aluminum oxide reaction bonding is formed on the surface of the metal foil in the sintering process.
Preferably, the high-speed electroplating process in the step (4) is rack plating.
Preferably, in the step (5), at least the upper surface of the first resistive layer and/or the lower surface of the second resistive layer is mechanically polished.
Preferably, in the step (5), the mechanical polishing repair is single-hole polishing or complex-hole polishing; the mechanical polishing depth is that polishing holes penetrate through the alloy foil to expose the ceramic substrate or polishing holes do not penetrate through the alloy foil; the track of mechanical polishing is at least one of a circular track, an elliptic track, a track-shaped track and a rectangular track.
The specific process of mechanical polishing and repairing in the step (5) is as follows: adopt high-accuracy repair to hinder the machine, the product pan feeding uses the diamond grinding rod to polish and repair to hinder first resistance layer, and the ejection of compact after accomplishing, then the pan feeding after the product reversal uses the diamond grinding rod to polish and repair to hinder second resistance layer, ejection of compact after accomplishing.
In addition, the invention also provides a resistance element of the chip resistor.
Compared with the prior art, the invention has the beneficial effects that:
The invention makes the alloy resistance layer temperature drift coefficient, power coefficient and power area obtain the best combination through the introduction of the processes of alloy material selection, double-layer resistance design, high temperature bonding, double-layer protection design, high-speed hanging plating, mechanical repair and the like. And the bonding is realized by adopting a mode of plating copper and then bonding, so that the alloy materials which cannot be bonded under the conventional conditions are bonded.
The design of the double-layer resistor can enable the resistance value to be 0.1mΩ at the lowest, while the single-layer resistor design in the prior art can only achieve 1mΩ at the lowest; according to the high-temperature bonding technology, the highest product power can be improved to 5W by matching with mechanical resistance repair, the highest resistance qualification rate of +/-1% can reach 90%, meanwhile, under a high Wen Tongdian test of 1000h, the resistance change rate can be controlled within +/-0.5%, while the highest product power can only reach 3W, the highest resistance qualification rate of +/-1% can only be controlled within 70%, and under a high Wen Tongdian test of 1000h, the resistance change rate can only be controlled within +/-1%; the double-layer protection design can control the resistance change rate within +/-0.5% under the environment corrosion resistance test condition of 1000 hours, while the single-layer protection design in the prior art can only control the resistance change rate within +/-1% under the environment corrosion resistance test condition of 1000 hours.
Drawings
Fig. 1 is a schematic diagram of a chip resistor according to the present invention;
fig. 2 is a flowchart of a method of manufacturing a chip resistor according to the present invention;
1, an insulating substrate; 2. a first resistive layer; 3. a second resistive layer; 4. a first electrode layer; 5. a second electrode layer; 6. a first protective layer; 7. a third protective layer; 8. a second protective layer; 9. a fourth protective layer; 10. an end face electrode layer; 11. an external electrode layer.
Detailed Description
For better illustrating the objects, technical solutions and advantages of the present invention, the present invention will be further described with reference to the accompanying drawings and specific examples, and in addition, the selection of the alloy materials according to the present invention may be selected by those skilled in the art according to specific situations, and the selection is not listed here, and only the structure, the preparation method and the effect of the chip resistor in the present invention will be further described by taking the present examples as examples.
Referring to FIG. 1, the chip resistor of the present embodiment includes
An insulating substrate 1; the upper surface of the insulating substrate 1 is provided with a first resistor layer 2, the lower surface of the insulating substrate 1 is provided with a second resistor layer 3, the upper surface of the end part of the first resistor layer 2 is provided with a pair of first electrode layers 4, the lower surface of the end part of the second resistor layer 3 is provided with a pair of second electrode layers 5, the upper surface of the first resistor layer 2 is covered with a first protective layer 6, the upper surface of the first protective layer 6 is covered with a second protective layer 8, the lower surface of the second resistor layer 3 is covered with a third protective layer 7, the lower surface of the third protective layer 7 is covered with a fourth protective layer 9, the first protective layer 6 is partially covered with the first electrode layers 4, the third protective layer 7 is partially covered with the second electrode layers 5, the side surface of the insulating substrate 1 is provided with a pair of end surface electrode layers 10, the end surface electrode layers 10 are covered with the side surfaces of the first electrode layers 4, the side surfaces of the first resistor layer 2, the side surfaces of the insulating substrate 1, the side surfaces of the second resistor layer 3 and the side surfaces of the second electrode layers 5; the side face of the end face electrode layer 10 is provided with a pair of external electrode layers 11, and the external electrode layers 11 cover the end face electrode layer 10 and at least partially cover the second protective layer 8 and the fourth protective layer 9.
The first resistor layer 2 and the second resistor layer 3 are both composed of alloy materials, wherein the alloy materials are one of manganese-copper alloy, nickel-chromium alloy, nickel-iron alloy, manganese-copper-tin alloy, manganese-copper-nickel alloy, nickel-copper-iron alloy and nickel-chromium-aluminum-silicon alloy; the first protective layer 6 and the third protective layer 7 are polyimide coatings; the second protective layer 8 and the fourth protective layer 9 are made of epoxy resin materials; the materials of the first electrode layer 4 and the second electrode layer 5 are copper, the material of the end surface electrode layer 10 is nickel, and the material of the outer electrode layer 11 is tin.
Referring to fig. 2, the method for manufacturing the chip resistor in this embodiment includes the following steps:
Step one: carrying out surface copper plating treatment on the surfaces to be bonded of the two alloy foils, wherein the thickness of the copper layer is controlled to be 0.1-10um;
Step two: bonding the front and back surfaces of the insulating substrate 1 with the surfaces to be bonded of the two alloy foils at a high temperature of 1065-1083 ℃;
step three: printing alloy foil masks, namely printing photoetching mask slurry on the surfaces of two alloy foils respectively, enabling the alloy foils to be covered by the masks, and then curing at 180-220 ℃ to form a photoetching mask layer, wherein the photoetching mask layer is shown in fig. 2 (a);
Step four: exposing and developing the alloy foil mask, exposing the mask on the two alloy foils after being covered by a pattern negative film, and then developing by using sodium carbonate solution, wherein the development is shown in fig. 2 (b);
Step five: etching the alloy foil and demolding the alloy foil mask, etching metal parts of the two alloy foils which are not covered by the mask by using ferric trichloride solution, and then cleaning the film by using sodium hydroxide to remove the film from the alloy foil mask to form a first resistance layer 2 and a second resistance layer 3, as shown in fig. 2 (c);
Step six: copper plating mask printing, namely printing cleanable mask slurry on the surfaces of the first resistor layer 2 and the second resistor layer 3 respectively, and then curing at 180-220 ℃ to form a mask layer, as shown in fig. 2 (d);
Step seven: plating copper and stripping the copper plating mask, performing high-speed copper electroplating on the alloy foil part which is not covered by the mask to form a first electrode layer 4 and a second electrode layer 5, and then cleaning the copper plating mask by using sodium hydroxide to remove the film, as shown in fig. 2 (e);
Step eight: mechanically repairing, namely polishing and repairing the adjustable parts of the resistor on the upper surface and the lower surface by using a diamond grinding rod respectively, wherein after repairing, the resistor is shown in the figure 2 (f);
Step nine: polyimide protective printing, namely printing polyimide slurry on the upper surface resistor and the lower surface resistor respectively, and then curing at 180-220 ℃ to form a first protective layer 6 and a third protective layer 7, as shown in fig. 2 (g);
Step ten: epoxy resin protection printing, namely printing epoxy resin slurry on the polyimide coating respectively, and then curing at 180-220 ℃ to form a second protective layer 8 and a fourth protective layer 9, as shown in fig. 2 (h);
step eleven: printing a mark, namely printing a mark slurry on the epoxy resin protective layer on the upper surface, and then curing at 180-220 ℃ to form a mark layer, as shown in fig. 2 (i);
step twelve: a folding bar for dividing the product into strips from blocks along the dividing line of X1, as shown in FIG. 2 (j);
Step thirteen: a side seal, wherein silver paste is soaked and sealed on the strip-shaped product or conductor metal is sputtered to form an end face electrode layer 10;
step fourteen: folding the granules to divide the product into granules along the dividing line of Y1 from a strip shape, as shown in FIG. 2 (k);
fifteen steps: the granular product is electroplated to form the outer electrode layer 11 on the surface of the end electrode layer 10, thereby realizing the solderability.
As a specific embodiment of the present invention, another manufacturing method of the chip resistor of this embodiment is as follows:
(1) Copper plating treatment is carried out on the surfaces to be bonded of two copper sheets with the thickness of 150um, and the thickness of the copper layers is controlled to be 1-5um.
(2) Bonding the surface to be bonded of the copper sheet and an alumina ceramic substrate with the thickness of 0.4mm at a high temperature of 1065-1083 ℃, and preserving the heat for 30 minutes;
(3) Printing a photoetching mask, namely a 120-250 mesh stainless steel wire screen, printing by a full-automatic screen printer, and drying for 10 minutes at 150 ℃;
(4) Exposing, namely exposing the photomask by using a 320 x 620 pattern, wherein the exposure time is 5-12 s;
(5) Developing, namely developing the exposed photoetching mask by using 0.1% -5% sodium carbonate solution;
(6) Etching, namely etching the developed copper sheet by using 30% -70% ferric trichloride solution to form electrode and resistance patterns, and then removing a photoetching mask by using 1% -10% sodium hydroxide;
(7) And (3) hanging plating, namely covering the resistor by using a photoetching mask, and then plating copper on the electrode part to form a copper electrode. Then removing the photoetching mask by sodium hydroxide;
(8) Mechanically trimming, namely polishing and trimming the adjustable part of the resistor on the upper surface by using a diamond grinding rod, wherein the resistance is controlled to be 0.1mΩ;
(9) Polyimide protection printing, namely printing polyimide slurry on the resistor body, and curing at 180-220 ℃ to form a polyimide protection layer;
(10) Printing epoxy resin protection, namely printing epoxy resin slurry on a polyimide film, and curing at 180-220 ℃ to form an epoxy resin protection layer;
(11) Printing marks, namely printing marking sizing agent on the epoxy resin protective layer on the upper surface, and then curing at 180-220 ℃ to form a marking layer;
(12) Folding the strips, side sealing, folding the grains and electroplating to finish a finished product;
(13) The finished product is tested to have the resistance value (4000 pcs) by a braiding machine, and the percent of pass of the resistance value of +/-1 percent is 92 percent.
(14) The finished product samples 80pcs are arranged into four groups (20 pcs) to obtain a TCR value of 25-38ppm, wherein the TCR value is obtained by a Temperature Coefficient of Resistance (TCR) test, a 5W power test, a high Wen Tongdian test for 1000 hours and an environmental corrosion resistance test for 1000 hours; the maximum resistance change rate after the 5W power test is 0.13%; the maximum resistance change rate after 1000h of high-temperature power-on test is 0.25%; the maximum resistance change rate after 1000h of environmental corrosion resistance test is 0.15%.
The design of the double-layer resistor can enable the resistance value to be 0.1mΩ at the lowest, while the single-layer resistor design in the prior art can only achieve 1mΩ at the lowest; according to the high-temperature bonding technology, the highest product power can be improved to 5W by matching with mechanical resistance repair, the highest resistance qualification rate of +/-1% can reach 90%, meanwhile, under a high Wen Tongdian test of 1000h, the resistance change rate can be controlled within +/-0.5%, while the highest product power can only reach 3W, the highest resistance qualification rate of +/-1% can only be controlled within 70%, and under a high Wen Tongdian test of 1000h, the resistance change rate can only be controlled within +/-1%; the double-layer protection design can control the resistance change rate within +/-0.5% under the environment corrosion resistance test condition of 1000 hours, while the single-layer protection design in the prior art can only control the resistance change rate within +/-1% under the environment corrosion resistance test condition of 1000 hours.
Finally, it should be noted that the above embodiments are only for illustrating the technical solution of the present invention and not for limiting the scope of the present invention, and although the present invention has been described in detail with reference to the preferred embodiments, it should be understood by those skilled in the art that the technical solution of the present invention may be modified or substituted equally without departing from the spirit and scope of the technical solution of the present invention.
Claims (9)
1. The chip resistor is characterized by comprising an insulating substrate, wherein a first resistance layer is arranged on the upper surface of the insulating substrate, a second resistance layer is arranged on the lower surface of the insulating substrate, a pair of first electrode layers are arranged on the upper surface of the end part of the first resistance layer, a pair of second electrode layers are arranged on the lower surface of the end part of the second resistance layer, a first protection layer is covered on the upper surface of the first resistance layer, a second protection layer is covered on the upper surface of the first protection layer, a third protection layer is covered on the lower surface of the second resistance layer, and a fourth protection layer is covered on the lower surface of the third protection layer; the first resistance layer and the second resistance layer are alloy foil layers; the preparation method of the chip resistor comprises the following steps:
(1) Carrying out surface copper plating treatment on one surface of the alloy foil layer;
(2) Bonding one surface of the alloy foil layer subjected to surface copper plating treatment with the upper surface and the lower surface of the insulating substrate respectively through a high-temperature bonding process;
(3) Carrying out mask patterning covering through a photoetching process, and then forming a first resistor layer and a second resistor layer through a chemical etching mode;
(4) Forming a first electrode layer and a second electrode layer on the upper surface of the end face of the first resistor layer and the lower surface of the end face of the second resistor layer respectively through a high-speed electroplating process;
(5) Mechanically polishing and repairing the resistor layer treated in the step (4);
(6) Printing a first protective layer on the upper surface of the first resistance layer after the resistance is modified in the step (5) through a thick film screen printing technology, and printing a third protective layer on the lower surface of the second resistance value;
(7) Printing a second protective layer on the upper surface of the first protective layer and printing a fourth protective layer on the lower surface of the third protective layer through thick film screen printing technology;
(8) Forming end face electrode layers on the first electrode layer, the second electrode layer and the side face of the insulating substrate through a magnetron vacuum sputtering process;
(9) And forming an external electrode layer on the side surface of the end surface electrode layer by electroplating technology.
2. The chip resistor of claim 1 wherein the insulating substrate is an alumina ceramic substrate or an alumina nitride ceramic substrate having a thin layer of alumina deposited on the surface.
3. The chip resistor of claim 1 wherein the first resistive layer and the second resistive layer are each comprised of an alloy material, the alloy material being one of a manganese-copper alloy, a nickel-chromium alloy, a nickel-iron alloy, a manganese-copper-tin alloy, a manganese-copper-nickel alloy, a nickel-copper-iron alloy, a nickel-chromium-aluminum-silicon alloy; one surface of the first resistance layer and one surface of the second resistance layer are plated with copper with the thickness of 0.1-10 um.
4. The chip resistor of claim 1 wherein the first and third protective layers are polyimide coatings.
5. The chip resistor of claim 4 wherein the first protective layer, the third protective layer, is at least one of a polyetherimide coating, a polyamideimide coating, a polydimaleimide coating.
6. A resistive element comprising the chip resistor according to any one of claims 1 to 5.
7. The chip resistor of claim 1, wherein in the step (2), the high temperature bonding process is as follows: the surface of the alloy foil layer subjected to the surface copper plating treatment is fixed on an insulating substrate by high temperature to form chemical bonding.
8. Chip resistor according to claim 1, characterized in that in step (5) at least the upper surface of the first resistive layer and/or the lower surface of the second resistive layer is mechanically polished.
9. The chip resistor of claim 1 wherein in step (5), the mechanical polishing repair is single hole polishing or multiple hole polishing; the mechanical polishing depth is that polishing holes penetrate through the alloy foil to expose the ceramic substrate or polishing holes do not penetrate through the alloy foil; the track of mechanical polishing is at least one of a circular track, an elliptic track, a track-shaped track and a rectangular track.
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| TWI682407B (en) * | 2019-04-02 | 2020-01-11 | 光頡科技股份有限公司 | Four-terminal resistor |
| CN110459373A (en) * | 2019-08-19 | 2019-11-15 | 南京隆特电子有限公司 | A kind of low-resistance resistor and manufacturing method |
| CN110660551B (en) * | 2019-09-20 | 2021-03-02 | 丽智电子（南通）有限公司 | Method for manufacturing alloy plate metal resistor for electronic product |
| CN111030640B (en) * | 2019-12-27 | 2021-05-28 | 苏州市新诚氏通讯电子股份有限公司 | Surface-mounted miniature superposed circuit attenuation sheet and preparation method thereof |
| CN111733418A (en) * | 2020-06-30 | 2020-10-02 | 苏州蓝晶研材料科技有限公司 | Ceramic conductive material containing alloy layer and preparation method thereof |
| CN112185637A (en) * | 2020-09-02 | 2021-01-05 | 广东风华高新科技股份有限公司 | Manufacturing method of direct-insertion type precision network resistor and resistor |
| CN114823020A (en) * | 2022-05-23 | 2022-07-29 | 贝迪斯电子有限公司 | Anti-surge chip resistor and manufacturing method thereof |
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