CN108665850B - Drive substrate and display panel - Google Patents

Abstract

The present application provides a driving substrate and a display panel. The driving substrate includes a base, a detection circuit layer, a first insulating layer and at least one signal line. The detection circuit layer is arranged in the non-display area and is arranged around the display area. The first insulating layer is located in the special-shaped non-display area and the special-shaped display area, and is arranged between the substrate and the detection circuit layer. The signal lines are used for driving a plurality of first pixel driving units disposed in the special-shaped display area. At least one signal line is arranged between the substrate and the first insulating layer, and the at least one signal line extends from the non-display area of the irregular shape to the display area of the irregular shape, so that the detection circuit layer and the at least one signal line form at least one compensation capacitor. The compensation capacitor can increase the load of the signal line, so that the display area of the screen body tends to be consistent.

Description

Drive substrate and display panel

technical field

The present invention relates to the field of display, in particular to a driving substrate and a display panel.

Background technique

With the continuous development of the mobile phone industry, the screen body of the full-screen mobile phone has the advantages of a large screen ratio and a narrow frame, which greatly improves the visual effect of the viewer, and has attracted widespread attention.

In the production process of the full screen, the special-shaped display area is usually formed by a special-shaped design such as a slot on the screen body. The number of pixels at the slot is less than the number of pixels in the normal display area. Therefore, the load of the pixel drive signal in the irregular display area is very different from the capacitance load of the pixel drive signal in the normal display area, resulting in different delays of the drive signals such as pixel scanning. Due to the different delays of driving signals such as pixel scanning of the screen body, the brightness of the special-shaped display area of the screen body and the normal display area are different, which affects the normal use.

SUMMARY OF THE INVENTION

Based on this, it is necessary to provide a driving substrate and a display panel to solve the problem that the brightness of the abnormal-shaped display area and the normal display area of the existing mobile phone are different.

A drive substrate, comprising:

a substrate, the substrate includes a display area and a non-display area, the non-display area is arranged around the display area, the non-display area includes a non-display area with a special shape, the display area includes a display area with a special shape, and the non-display area with a special shape The area is adjacent to the special-shaped display area;

a detection circuit layer, arranged in the non-display area and around the display area;

a first insulating layer, located in the irregular non-display area and the irregular display area, and disposed between the substrate and the detection circuit layer;

at least one signal line for driving a plurality of first pixel driving units disposed in the irregular-shaped display area, the at least one signal line is disposed between the substrate and the first insulating layer, the at least one The signal line extends from the non-display area of the special shape to the display area of the special shape, so that the detection circuit layer and the at least one signal line form at least one compensation capacitor.

In one embodiment, it also includes:

The first wiring layer is located in the special-shaped display area and the special-shaped non-display area, and is arranged on the surface of the first insulating layer away from the substrate. In the special-shaped non-display area, the detection circuit layer and all the the projection of the first wiring layer on the substrate at least partially overlaps;

The second insulating layer is located in the special-shaped display area and the special-shaped non-display area, and is disposed on the surface of the first wiring layer away from the substrate, as well as the detection circuit layer and the first wiring layer between.

In one embodiment, in the non-display area with irregular shapes, the vertical distance between the first wiring layer and the detection circuit layer on the projection overlap portion of the substrate is smaller than that between the first wiring layer and the The vertical distance between the projected non-overlapping portions of the circuit layer on the substrate is detected.

In one embodiment, it further includes a second wiring layer, which is arranged in the special-shaped display area, the second wiring layer is arranged on the same layer as the detection circuit layer, and is arranged on the second insulating layer away from all the the surface of the substrate.

In one embodiment, the first pixel driving unit includes a thin film transistor disposed between the first insulating layer and the substrate, the thin film transistor includes a gate layer, and the gate layer It is integrally formed on the same layer as the signal line.

In one embodiment, the thin film transistor further includes an active layer, the active layer is disposed between the substrate and the gate layer, and an active layer is disposed between the active layer and the gate layer the third insulating layer.

In one embodiment, it further includes at least one gate driving unit, which is arranged on the substrate and is located in the non-display area with irregular shapes, and is arranged on the detection circuit on the plane where the substrate is located. Between the layer and the special-shaped display area, one of the gate driving units is electrically connected to the row of pixel driving units through one of the signal lines.

In one embodiment, at least one capacitor electrode layer is further included, located in the non-display area with special shape, and on the plane where the non-display area with special shape is located, the capacitor electrode layer is disposed on the gate driving unit and the special-shaped non-display area. Between the display areas, the capacitive electrode layer is disposed on the side of the first insulating layer away from the substrate, and the projection of the capacitive electrode layer on the substrate and the projection of the signal line on the substrate are at least partially coincide.

In one embodiment, the capacitive electrode layer and the detection circuit layer are disposed on the same layer.

A display panel, the display area further includes a normal display area, including:

The driving substrate includes a plurality of second pixel driving units, which are arranged on the base and located in the

display area;

a plurality of first pixel units electrically connected to the plurality of first pixel driving units in a one-to-one correspondence;

The plurality of second pixel units are electrically connected to the plurality of second pixel driving units in one-to-one correspondence.

In the driving substrate provided in this embodiment, the first insulating layer is disposed between the substrate and the detection circuit layer. At least one signal line is disposed between the substrate and the first insulating layer. The signal line, the first insulating layer and the detection circuit layer are arranged in sequence so that the detection circuit layer and the at least one signal line form at least one compensation capacitor. The electrical compensation capacitor may increase the capacitive load of the signal line. The increase of the capacitive load of the signal lines can make the capacitive load of each signal line in the special-shaped display area and the capacitive load of each signal line in the normal display area tend to be the same, thereby making the screen surface brightness tend to be uniform. Using the existing detection circuit layers and signal lines to form a capacitive load can save costs and improve production efficiency.

Description of drawings

FIG. 1 is a schematic diagram of a driving substrate provided by an embodiment of the present application;

FIG. 2 is a cross-sectional view A-A of a special-shaped non-display area provided by an embodiment of the present application;

FIG. 3 is a cross-sectional view of a non-display area B-B of a special shape provided by an embodiment of the present application;

FIG. 4 is a partial enlarged view of a non-display area with a special shape according to an embodiment of the present application.

Description of reference numbers:

drive substrate 10

Display area 100

Shaped display area 110

Normal display area 120

base 130

Non-display area 200

Shaped non-display area 210

Detection circuit layer 310

Signal line 320

Pixel drive unit row 330

The first pixel driving unit 331

The second pixel driving unit 332

Thin film transistor 340

Active layer 341

gate layer 342

The first wiring layer 350

The second wiring layer 360

first insulating layer 410

The second insulating layer 420

The third insulating layer 430

Gate drive unit 500

Capacitive electrode layer 510

Detailed ways

Referring to FIGS. 1-3 , an embodiment of the present application provides a driving substrate 10 . The driving substrate 10 includes a base 130 , a detection circuit layer 310 and at least one signal line 320 . The substrate 130 includes a display area 100 and a non-display area 200 . The non-display area 200 is arranged around the display area 100 . The non-display area 200 includes a special-shaped non-display area 210 . The display area 100 includes a special-shaped display area 110 . The special-shaped non-display area 210 and the special-shaped display area 110 are disposed adjacent to each other.

The first insulating layer 410 is located in the non-display area 210 with different shapes and the display area 110 with different shapes. The first insulating layer 410 is disposed between the substrate 130 and the detection circuit layer 310 . The detection circuit layer 310 is disposed in the non-display area 200 . The detection circuit layer 310 is disposed around the display area 100 . The signal line 320 is disposed between the substrate 130 and the first insulating layer 410 . That is, the first insulating layer 410 is disposed between the signal line 320 and the detection circuit layer 310 . The at least one signal line 320 extends from the special-shaped non-display area 210 to the special-shaped display area 110 . So that the detection circuit layer 310 and the at least one signal line 320 form at least one compensation capacitor. That is, in the non-display area 210 with special shapes, the surface of the signal line 320 facing away from the substrate 130 and the surface of the detection circuit layer 310 facing the substrate 130 are disposed opposite to each other to form the compensation capacitor.

The signal lines 320 are used for driving a plurality of first pixel driving units 331 disposed in the irregular-shaped display area 110 . The special-shaped display area 10 further includes at least one pixel driving unit row 330 . The pixel driving unit row 330 includes a plurality of first pixel driving units 331 . The pixel driving unit row 330 is disposed on the substrate 130 and located in the special-shaped display area 110 . One of the signal lines 320 is electrically connected to a plurality of first pixel driving units 331 in one of the pixel driving unit rows 330 .

The signal line 320 has a certain width, that is, the projection of the signal line 320 on the substrate 130 has a certain area. The surface of the signal line 320 facing away from the substrate 130 , that is, the surface of the signal line 320 facing the detection circuit layer 310 . The compensation capacitor is formed by the surface of the detection circuit layer 310 facing the substrate 130 and the surface of the signal line 320 facing away from the substrate 130 .

The driving substrate 10 can be used for an OLED display screen. The special-shaped non-display area 210 and the special-shaped display area 110 may have shapes such as slots or arcs. Due to the slot or arc structure, the number of the first pixel driving units 331 in the driving substrate 10 is different from the number of the second pixel driving units 332 in the normal display area 120 . A plurality of signal lines 320 are usually provided on the driving substrate 10 . Each signal line 320 drives a plurality of pixel driving units. In the normal display area 120 , the number of pixel driving units driven by each of the signal lines 320 is generally the same. Since the number of pixel driving units in the abnormal-shaped display area 110 and the normal display area 120 is different, in the abnormal-shaped display area 110 , the number of the first pixel driving units 331 driven by each signal line 320 is the same as that in the normal display area 120 . The number of the second pixel driving units 332 driven by the signal lines 320 is different. And generally, the number of the first pixel driving units 331 driven by each signal line 320 in the irregular display area 110 is less than the number of pixel driving units driven by each signal line 320 in the normal display area 120 . Therefore, the capacitive load of each signal line 320 in the special-shaped display area 110 is smaller than that of each signal line 320 in the normal display area 120 . It can be understood that the signal lines 320 may be scan lines or data lines.

The special-shaped non-display area 210 may be provided with a driving circuit, a power supply circuit, and the like. The special-shaped non-display area 210 may be disposed around the special-shaped display area 110 . The special-shaped non-display area 210 may be set according to the shape of the special-shaped display area 110 . When the special-shaped display area 110 is directly adjacent to the normal display area 120 , the special-shaped non-display area 210 only surrounds the edge of the special-shaped display area 110 that is not adjacent to the normal display area 120 .

The arrangement of the first pixel driving units 331 may be determined according to the shape of the special-shaped display area 110 . The plurality of first pixel driving units 331 may be driven by at least one of the signal lines 320 . The signal line 320 can connect the plurality of first pixel driving units 331 in series to form the pixel driving unit row 330 . The signal line 320 may have a curved or broken line structure. The arrangement form of the first pixel driving units 331 can be set according to the shape of the special-shaped display area 110 . The detection circuit layer 310 may be formed on the surface of the substrate 130 by deposition. The detection circuit layer 310 can be used to detect cracks in the screen body. It can be understood that the detection circuit layer 310 may be formed on the upper surface of the substrate 130 through a patterning process. The detection circuit layer 310 has a certain area.

In one embodiment, the plane where the detection circuit layer 310 is located and the surface of the signal line 320 facing away from the substrate 130 are relatively parallel to each other. The surface of the detection circuit layer 310 facing the substrate 130 and the surface of the signal line 320 facing away from the substrate 130 are disposed opposite to each other to form a capacitive structure and have a capacitive load. In the special-shaped display area 110, since the number of the first pixel driving units 331 connected to each of the scan lines is different, the capacitive loads to be compensated for each of the scan lines are also different. By changing the surface area of the signal line 320 away from the substrate 130 and the surface area of the detection circuit layer 310 facing the substrate 130 , the size of the capacitor structure can be changed.

Referring to FIG. 3 again, in one embodiment, there may be a plurality of scan lines arranged in parallel. The scan lines and the detection circuit layer 310 form a plurality of compensation capacitors. Each of the compensation capacitance loads may be changed, and capacitance compensation may be performed on different scan lines. Therefore, it can be understood that the signal line 320 may be formed by patterning a metal layer deposited on the surface of the substrate 130 . The first insulating layer 410 can be patterned to obtain structures with different functions.

In the embodiment of the present application, the first insulating layer 410 is disposed between the substrate 130 and the detection circuit layer 310 . At least one signal line 320 is disposed between the substrate 130 and the first insulating layer 410 . The signal line 320 , the first insulating layer 410 and the detection circuit layer 310 are arranged in sequence so that the detection circuit layer 310 and the at least one signal line 320 form at least one compensation capacitor. That is, the surface of the signal line 320 facing away from the substrate 130 and the surface of the detection circuit layer 310 facing the substrate 130 are disposed opposite to each other, so that the signal line 320 , the first insulating layer 410 and the detection circuit layer 310 constitutes a compensation capacitor. The compensation capacitor can increase the capacitive load of the signal line 320 . After the capacitive load of the signal line 320 is increased, the capacitive load of each of the signal lines 320 in the special-shaped display area 110 and the capacitive load of each signal line 320 in the normal display area 120 tend to be the same, thereby making the screen surface Brightness tends to be consistent. Using the existing detection circuit layer 310 and the signal line 320 to form a capacitive load can save costs and improve production efficiency.

Referring to FIG. 2 again, in one embodiment, the first pixel driving unit 331 includes a thin film transistor 340 . The thin film transistor 340 is disposed between the first insulating layer 410 and the substrate 130 . The thin film transistor 340 is disposed on the surface of the substrate 130 . The thin film transistor 340 includes an active layer 341 and a gate layer 342 . The active layer 341 is disposed between the substrate 130 and the gate layer 342 . The gate layer 342 may be integrally formed with the signal line 320 at the same layer. The gate layer 342 and the signal line 320 may be formed by performing image processing on the same metal layer deposited on the surface of the substrate 130 . The gate layer 342 and the signal line 320 may be continuously extending structures, thereby improving production efficiency.

In one embodiment, the signal lines 320 are scan lines. The gate layer 342 may be made of metal material. The active layer 341 may form the source, drain and channel of the thin film transistor.

In one embodiment, the driving substrate 10 further includes a first wiring layer 350 and a second insulating layer 420 . The first wiring layer 350 is located in the irregular-shaped display area 110 and the irregular-shaped non-display area 210 , and is disposed on the surface of the first insulating layer 410 away from the substrate 130 .

The second insulating layer 420 is located in the irregular-shaped display area 110 and the irregular-shaped non-display area 210 . The second insulating layer 420 is also disposed on the surface of the first wiring layer 350 away from the substrate 130 and between the detection circuit layer 310 and the first wiring layer 350 . In the non-display area 210 with irregular shapes, the projections of the detection circuit layer 310 and the first wiring layer 350 on the substrate 130 at least partially overlap. Therefore, the detection circuit layer 310 and the first wiring layer 350 can form a capacitor structure. That is, in the non-display area 210 with special shapes, the surface of the first wiring layer 350 facing away from the substrate 130 and the surface of the detection circuit layer 310 facing the substrate 130 are disposed opposite to each other to form the capacitor structure.

The surface of the first wiring layer 350 facing away from the substrate 130 is disposed opposite to the surface of the detection circuit layer 310 facing the substrate 130, so that the first wiring layer 350, the second insulating layer 420 and the The detection circuit layer 310 sequentially forms a capacitor structure. In one embodiment, the surface of the first wiring layer 350 facing away from the substrate 130 is disposed parallel to the surface of the detection circuit layer 310 facing the substrate 130 .

The first wiring layer 350 may be made of metal material. The first wiring layer 350 and the gate layer 342 may form a capacitance structure to further improve the capacitance load of the scan lines.

In one embodiment, the planes where the first wiring layer 350 , the detection circuit layer 310 and the signal line 320 are located may be three parallel planes arranged at intervals. Therefore, the first wiring layer 350 , the detection circuit layer 310 and the scan lines have a common projected area on the substrate 130 . Therefore, the first wiring layer 350 and the signal line 320 may also have opposite areas. The first wiring layer 350 and the signal line 320 may form a capacitive structure to further increase the capacitive load of the signal line 320 .

In one embodiment, in the non-display area 210 with special shapes, the vertical distance between the first wiring layer 350 and the overlapping portion of the detection circuit layer 310 projected on the substrate 130 is smaller than the first wiring The vertical distance between the projections of the layer 350 and the detection circuit layer 310 on the substrate 130 do not overlap. That is, the thickness of the part of the second insulating layer 420 located between the first wiring layer 350 and the detection circuit layer 310 is smaller than that in the special-shaped display area 110 and the special-shaped non-display area (210). other thicknesses of the second insulating layer 420 . In the process of fabricating the second insulating layer 420 , the thickness of the second insulating layer 420 is made thinner through a mask process. The vertical distance between the projection overlap portion of the first wiring layer 350 and the detection circuit layer 310 on the substrate 130 is smaller than that of the first wiring layer 350 and the detection circuit layer 310 on the substrate 130 The vertical distance between the projected non-overlapping parts can further increase the capacitive load formed by the detection circuit layer 310 and the first wiring layer 350 , and the process is simple and the work efficiency can be improved.

In one embodiment, the driving substrate 10 further includes a second wiring layer 360 . The second wiring layer 360 is disposed in the special-shaped display area 110 . The second wiring layer 360 is disposed on the same layer as the detection circuit layer 310 . The second insulating layer 420 is disposed between the second wiring layer 360 and the first wiring layer 350 . The second wiring layer 360 is insulated from the detection circuit layer 310 . That is, there is no electrical connection between the second wiring layer 360 and the detection circuit layer 310 , so as to prevent the detection circuit layer 310 from being disturbed. The second wiring layer 360 may be provided with a power signal circuit. The second insulating layer 420 is disposed between the second wiring layer 360 and the first wiring layer 350 to avoid short circuit between the second wiring layer 360 and the first wiring layer 350 .

In one embodiment, the driving substrate 10 further includes a third insulating layer 430 . The third insulating layer 430 is disposed between the active layer 341 and the gate layer 342 . The third insulating layer 430 can prevent the active layer 341 from contacting the gate layer 342 .

Referring to FIG. 4 , in one embodiment, at least one gate driving unit 500 is further included. The gate driving unit 500 is disposed on the substrate 130 and located in the non-display area 210 with a special shape. On the plane where the substrate 130 is located, the gate driving unit 500 is disposed between the detection circuit layer 310 and the special-shaped display area 110 . One of the gate driving units 500 is electrically connected to the pixel driving unit row 330 through one of the signal lines 320 . The gate driving unit 500 may output a scan signal to the signal line 320 . The thin film transistor 340 can be driven to open and close by the scan signal. The gate driving unit 500 may be a multi-layer structure. In addition, the multi-layer structure of the gate driving unit 500 may be formed together with each layer structure in the first pixel driving unit 331 during the process of forming the first pixel driving unit 331 , and different layers are formed by patterning. functional structure.

Referring to FIG. 2 again, in one embodiment, the driving substrate 10 further includes at least one capacitor electrode layer 510 . The capacitive electrode layer 510 is located in the non-display area 210 with special shapes. On the plane where the irregular-shaped non-display area 210 is located, the capacitive electrode layer 510 is disposed between the gate driving unit 500 and the irregular-shaped display area 110 . The capacitor electrode layer 510 is disposed on the side of the first insulating layer 410 away from the substrate 130 . The projection of the capacitor electrode layer 510 on the substrate 130 and the projection of the signal line 320 on the substrate 130 at least partially overlap. The projection of the capacitive electrode layer 510 on the substrate 130 and the projection of the signal line 320 on the substrate 130 at least partially overlap, so that the capacitive electrode layer 510 and the substrate 130 form a capacitive structure.

In one embodiment, the projection of the capacitive electrode layer 510 on the substrate 130 covers the projection of the signal line 320 . Therefore, the surface of the capacitor electrode layer 510 facing the substrate 130 and the surface of the signal line 320 facing away from the substrate 130 are disposed opposite to each other to form a capacitor structure. In turn, the capacitive load of the signal line 320 is increased.

In one embodiment, the capacitive electrode layer 510 and the detection circuit layer 310 may be formed on the same layer. The capacitive electrode layer 510 may be separated from the detection circuit layer 310 by an insulating material to avoid affecting the normal use of the detection circuit layer 310 . The capacitive electrode layer 510 may be disposed opposite to at least one of the signal lines 320 . According to the different loads to be added to each signal line 320, the relative area of the capacitive electrode layer 510 and the signal line 320 can be different, so the load of each signal line 320 can be freely adjusted, which is convenient and flexible.

Embodiments of the present application also provide a display panel. The display panel includes the driving substrate 10 . The driving substrate 10 includes a plurality of second pixel driving units 332 . The second pixel driving unit 332 is disposed on the substrate 130 . The second pixel driving unit 332 is located in the display area 100 . The display panel further includes a plurality of first pixel units and a plurality of second pixel units. The first pixel driving unit 331 is electrically connected to the first pixel unit in a one-to-one correspondence. The second pixel driving unit 332 is electrically connected to the second pixel unit in a one-to-one correspondence. The surface of the first pixel driving unit 331 may form the first pixel unit. The surface of the second pixel driving unit 332 may form the second pixel unit. By adjusting the capacitive load of the first pixel driving unit 331 , the capacitive load of the scan line in the irregular-shaped display area 110 and the capacitive load of the scan line in the normal display area 120 can be made to be the same. Therefore, the light intensities of the abnormal-shaped display area 110 and the normal display area 120 of the display panel tend to be the same, which can improve the look and feel.

The technical features of the above-described embodiments can be combined arbitrarily. For the sake of brevity, all possible combinations of the technical features in the above-described embodiments are not described. However, as long as there is no contradiction between the combinations of these technical features, All should be regarded as the scope described in this specification.

The above-mentioned embodiments only represent several embodiments of the present invention, and the descriptions thereof are specific and detailed, but should not be construed as a limitation on the scope of the invention patent. It should be pointed out that for those of ordinary skill in the art, without departing from the concept of the present invention, several modifications and improvements can also be made, which all belong to the protection scope of the present invention. Therefore, the protection scope of the patent of the present invention should be subject to the appended claims.

Claims (9)

1. A drive substrate, comprising:

a substrate (130), the substrate (130) comprising a display area (100) and a non-display area (200), the non-display area (200) being disposed around the display area (100), the non-display area (200) comprising a shaped non-display area (210), the display area (100) comprising a shaped display area (110), the shaped non-display area (210) and the shaped display area (110) being disposed adjacent to each other;

a detection circuit layer (310) disposed in the non-display region (200) and surrounding the display region (100);

a first insulating layer (410) positioned between the substrate (130) and the detection circuit layer (310), the first insulating layer being positioned between the shaped non-display region (210) and the shaped display region (110);

at least one signal line (320) for driving a plurality of first pixel driving units (331) disposed in the shaped display region (110), the at least one signal line (320) being disposed between the substrate (130) and the first insulating layer (410), the at least one signal line (320) extending from the shaped non-display region (210) toward the shaped display region (110) such that the detection circuit layer (310) and the at least one signal line (320) form at least one compensation capacitance;

a first routing layer (350) located in the specially-shaped display area (110) and the specially-shaped non-display area (210), and arranged on the surface of the first insulating layer (410) far away from the substrate (130), wherein in the specially-shaped non-display area (210), the projection of the detection circuit layer (310) and the first routing layer (350) on the substrate (130) at least partially coincide;

in the special-shaped non-display area (210), the vertical distance between the first routing layer (350) and the projection superposition part of the detection circuit layer (310) on the substrate (130) is smaller than the vertical distance between the first routing layer (350) and the projection superposition part of the detection circuit layer (310) on the substrate (130).

2. The drive substrate of claim 1, further comprising:

and the second insulating layer (420) is positioned in the special-shaped display area (110) and the special-shaped non-display area (210), is arranged on the surface of the first routing layer (350) far away from the substrate (130), and is arranged between the detection circuit layer (310) and the first routing layer (350).

3. The driving substrate of claim 2, further comprising a second wiring layer (360) disposed on the irregular display area (110), wherein the second wiring layer (360) is disposed on the same layer as the detection circuit layer (310) and on a surface of the second insulating layer (420) away from the substrate (130).

4. The driving substrate of claim 1, wherein the first pixel driving unit (331) comprises a thin film transistor (340), the thin film transistor (340) is disposed between the first insulating layer (410) and the substrate (130), the thin film transistor (340) comprises a gate layer (342), and the gate layer (342) and the signal line (320) are integrally formed in a same layer.

5. The driving substrate according to claim 4, wherein the thin film transistor (340) further comprises an active layer (341), the active layer (341) is disposed between the substrate (130) and the gate layer (342), and a third insulating layer (430) is disposed between the active layer (341) and the gate layer (342).

6. The driving substrate of claim 1, further comprising at least one gate driving unit (500) disposed on the substrate (130) and located in the non-display area (210), wherein the gate driving unit (500) is disposed between the detection circuit layer (310) and the non-display area (110) in a plane of the substrate (130), and wherein one of the gate driving units (500) is electrically connected to the pixel driving unit row (330) through one of the signal lines (320).

7. The driving substrate of claim 6, further comprising at least one capacitive electrode layer (510) disposed in the non-display area (210) and located in a plane where the non-display area (210) is located, wherein the capacitive electrode layer (510) is disposed between the gate driving unit (500) and the non-display area (110), the capacitive electrode layer (510) is disposed on a side of the first insulating layer (410) away from the substrate (130), and a projection of the capacitive electrode layer (510) on the substrate (130) and a projection of the signal line (320) on the substrate (130) at least partially coincide.

8. The driving substrate according to claim 7, wherein the capacitive electrode layer (510) is disposed in the same layer as the detection circuit layer (310).

9. A display panel, comprising:

the driving substrate as claimed in any of claims 1-8, comprising a plurality of second pixel driving units (332) arranged at said base (130) in said display area (100);

the plurality of first pixel units are electrically connected with the plurality of first pixel driving units (331) in a one-to-one correspondence manner;

and the plurality of second pixel units are electrically connected with the plurality of second pixel driving units (332) in a one-to-one correspondence mode.

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