CN108631284B - Electrostatic discharge protection circuit - Google Patents
Electrostatic discharge protection circuit Download PDFInfo
- Publication number
- CN108631284B CN108631284B CN201710169712.XA CN201710169712A CN108631284B CN 108631284 B CN108631284 B CN 108631284B CN 201710169712 A CN201710169712 A CN 201710169712A CN 108631284 B CN108631284 B CN 108631284B
- Authority
- CN
- China
- Prior art keywords
- voltage
- terminal
- detection
- control
- coupled
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000001514 detection method Methods 0.000 claims abstract description 112
- 230000003071 parasitic effect Effects 0.000 claims description 4
- 238000010586 diagram Methods 0.000 description 14
- 230000002159 abnormal effect Effects 0.000 description 5
- 239000003990 capacitor Substances 0.000 description 3
- 238000007599 discharging Methods 0.000 description 2
- 230000007812 deficiency Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H9/00—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
- H02H9/04—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage
- H02H9/041—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage using a short-circuiting device
Landscapes
- Emergency Protection Circuit Devices (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
The invention discloses an electrostatic discharge protection circuit, the embodiment of which comprises: a first terminal for providing a first voltage, the first voltage having a first value in a normal mode; a second terminal for providing a second voltage, the value of the second voltage being a second value in the normal mode; a detection circuit coupled between the first and second terminals for providing a detection voltage according to the first and second voltages; and the protection circuit is coupled with the detection circuit, coupled between the first end and a grounding end, and coupled between the second end and the grounding end, and is used for operating in a normal mode or an electrostatic discharge mode according to the detection voltage, and when the difference between the value of the detection voltage and the average value of the first value and the second value reaches a preset threshold value, the protection circuit enters the electrostatic discharge mode from the normal mode, so that the protection circuit enables the first path between the first end and the grounding end to be changed from a non-conduction state to a conduction state and/or the second path between the second end and the grounding end to be changed from the non-conduction state to the conduction state.
Description
Technical Field
The present invention relates to a protection circuit, and more particularly, to an electrostatic discharge protection circuit.
Background
The conventional Electrostatic Discharge (ESD) protection circuit detects a power source terminal (e.g. a high voltage V)DDTerminal and low voltage VSSTerminal) or detecting the voltages of the power terminal and the ground terminal to activate the protection mechanism. The conventional ESD protection circuit usually employs a diode as a part of the protection circuit, and the discharge is performed from the power source end path to the ground end, because the use of the diode increases the impedance of the circuit (e.g. the impedance of the input/output end), and the discharge path from the power source end is generally longer and not favorable for real-time discharge, the conventional ESD protection circuit still has room for improvement.
The relevant prior art can be found in the following documents: "Advances in Solid State Circuit technologies", Chapter tenth.
Disclosure of Invention
In view of the deficiencies of the prior art, it is an object of the present invention to provide an esd protection circuit for improving the prior art.
The invention discloses an electrostatic discharge protection circuit, one embodiment of which comprises a first end, a second end, a detection circuit and a protection circuit. The first terminal is used for providing a first voltage, and the value of the first voltage is a first value in a normal mode. The second terminal is used for providing a second voltage, and the value of the second voltage is a second value in the normal mode. The detection circuit is coupled between the first end and the second end and is used for providing a detection voltage according to the first voltage and the second voltage. The protection circuit is coupled to the detection circuit, between the first terminal and a ground terminal, and between the second terminal and the ground terminal, and is configured to operate in the normal mode or an electrostatic discharge mode according to the detection voltage, and enter the electrostatic discharge mode from the normal mode when a difference between a value of the detection voltage and an average value of the first and second values or a difference between a value of the detection voltage and a reference value derived from the first and second values reaches a predetermined threshold value, so that the protection circuit changes a first path between the first terminal and the ground terminal from a non-conductive state to a conductive state and/or changes a second path between the second terminal and the ground terminal from a non-conductive state to a conductive state, thereby discharging abnormal energy.
The features, operation and efficacy of the present invention are described in detail below in the preferred embodiments with reference to the drawings.
Drawings
FIG. 1a is a functional block diagram of an ESD protection circuit according to an embodiment of the present invention;
FIG. 1b is a schematic diagram of an application of the ESD protection circuit of the present invention;
FIG. 2 is a schematic diagram of an exemplary embodiment of the detection circuit of FIG. 1 a;
FIG. 3 is a schematic diagram of another exemplary embodiment of the detection circuit of FIG. 1 a;
FIG. 4 is a schematic diagram of an exemplary implementation of the first and second voltage divider circuits of FIG. 3;
FIG. 5 is a schematic diagram of yet another exemplary embodiment of the detection circuit of FIG. 1 a;
FIG. 6 is a schematic diagram of an exemplary implementation of the first and second voltage divider circuits of FIG. 5;
FIG. 7 is a schematic diagram of an exemplary embodiment of the protection circuit of FIG. 1 a; and
FIG. 8 is a schematic diagram of another exemplary embodiment of the protection circuit of FIG. 1 a.
Detailed Description
The terms in the following description refer to the conventional terms in the field, and some terms are defined or explained in the specification, and are to be interpreted according to the description or the definition of the specification.
The invention discloses an Electrostatic Discharge (ESD) protection circuit, which can reduce the use of diodes to reduce the influence of the use of the diodes on impedance and can shorten an Electrostatic Discharge path to accelerate the Discharge of abnormal energy. The present invention can be applied to various circuits such as ethernet circuits and other circuits requiring ESD protection, and is applicable to circuits using differential signals, but the application of the present invention is not limited thereto.
Please refer to fig. 1a, which is a functional block diagram of an esd protection circuit according to an embodiment of the present invention. As shown in fig. 1a, the esd protection circuit 100 includes a first terminal 110, a second terminal 120, a detection circuit 130 and a protection circuit 140, and can operate in a normal mode or an esd protection mode. In addition, as shown in fig. 1b, a circuit to be protected 10 may be coupled to the first terminal 110 and the second terminal 120 of the esd protection circuit 100 for protection, and the circuit to be protected 10 is generally coupled between a power terminal 12 and a ground terminal.
Referring to fig. 1a, the first terminal 110 is used for providing a first voltage, the value of the first voltage is a first value in the normal mode, when the protection circuit 100 is applied to a circuit using differential signals, the first terminal 110 is used for receiving a positive end signal of the differential signals, and the first voltage is a dc level of the positive end signal. The second terminal 120 is used for providing a second voltage, the value of the second voltage is a second value in the normal mode, when the protection circuit 100 is applied to a circuit using differential signals, the second terminal 120 is used for receiving a negative terminal signal of the differential signals, and the second voltage is a dc level of the negative terminal signal. The detection circuit 130 is coupled between the first terminal 110 and the second terminal 120, and configured to provide a detection voltage according to the first and second voltages, where the detection voltage is between a sum of the first and second voltages and zero (i.e., zero ≦ the detection voltage ≦ the sum of the first and second voltages). The protection circuit 140 is coupled to the detection circuit 130, and coupled between the first terminal 110 and a ground terminalAnd the protection circuit 140 is coupled between the second terminal 120 and the ground terminal, and is configured to operate in the normal mode or the electrostatic discharge mode according to the detection voltage, when the first terminal 110 and/or the second terminal 120 receives an abnormal voltage (e.g., a surge voltage), the first voltage and/or the second voltage increases rapidly, so that the detection voltage increases rapidly, if a difference between the detection voltage and an average value of the first and second values or a difference between the detection voltage and a reference value derived from the first and second values reaches a predetermined threshold, the protection circuit 140 enters the electrostatic discharge mode from the normal mode, so that the protection circuit 140 changes a first path between the first terminal 110 and the ground terminal from a non-conductive state to a conductive state and/or changes a second path between the second terminal 120 and the ground terminal from a non-conductive state to a conductive state, thereby discharging abnormal energy. The preset threshold value is related to the design of the protection circuit 140 and the reference value is related to the design of the detection circuit 130, which will be described in the following exemplary embodiments. It is noted that, in the present embodiment, the first and second paths may not include (or pass) a power source terminal (e.g., a high voltage V)DDTerminal), but this is not a limitation of the present invention, and those skilled in the art can design a discharge path through a power terminal according to the disclosure and requirements of the present invention.
Please refer to fig. 2, which is a schematic diagram illustrating an exemplary embodiment of the detection circuit 130 of fig. 1 a. As shown in fig. 2, the detection circuit 130 includes: a detection voltage output terminal 132 coupled to the protection circuit 140 for outputting the detection voltage; a first resistor 134 coupled between the first terminal 110 and the detection voltage output terminal 132; and a second resistor 136 coupled between the second terminal 120 and the detection voltage output terminal 132. In the exemplary embodiment, the resistance values of the first resistor 134 and the second resistor 136 are equal, so that the detection voltage is equal to the average value of the first value and the second value in the normal mode, in other words, when the protection circuit 100 is applied to a circuit using differential signals, the detection voltage is equal to a common mode voltage in the normal mode, however, the resistance values of the first resistor 134 and the second resistor 136 may be different (in this case, the detection voltage is equal to the reference voltage in the normal mode), so that the electrostatic discharge conditions of the first terminal 110 and the second terminal 120 are different on the premise that the conduction conditions of the first path and the second path are the same, or the electrostatic discharge conditions of the first terminal 110 and the second terminal 120 are the same on the premise that the conduction conditions of the first path and the second path are different, and all the implementation changes belong to the scope of the present invention.
Please refer to fig. 3, which is another exemplary embodiment of the detection circuit 130 of fig. 1 a. Fig. 3 differs from fig. 2 in that the detection circuit 130 of fig. 3 further includes: a first voltage divider 310 coupled between the first terminal 110 and the detection voltage output terminal 132 for providing a first divided voltage to the protection circuit 140 according to the first and second voltages, the first divided voltage being different from the detection voltage; and a second voltage divider 320 coupled between the second terminal 120 and the detection voltage output terminal 132 for providing a second divided voltage to the protection circuit 140 according to the first and second voltages, the second divided voltage being different from the detection voltage, wherein the first and second divided voltages are associated (correct with) the predetermined threshold. For example, as shown in fig. 4, the first voltage dividing circuit 310 is composed of N diodes (N is 4 in fig. 4), and the first voltage division is a voltage between the first M diodes (M is 3 in fig. 4) and the last (N-M) diodes, since the second voltage dividing circuit 320 is similar to the first voltage dividing circuit 310, the second voltage division can be determined in the same manner, and the more the first voltage division is smaller than the detection voltage, the higher the preset threshold value; similarly, the more the second divided voltage is smaller than the detection voltage, the higher the preset threshold value is. For example, the diode of fig. 4 may be replaced by other impedance elements (e.g., resistors).
Please refer to fig. 5, which is a schematic diagram illustrating another exemplary embodiment of the detection circuit 130 of fig. 1 a. As shown in fig. 5, the detection circuit 130 includes: a detection voltage output terminal 132 coupled to the protection circuit 140 for outputting the detection voltage; a first voltage divider 510 coupled between the first terminal 110 and the detection voltage output terminal 132 for providing a first divided voltage to the protection circuit 140 according to the first and second voltages, the first divided voltage being different from the detection voltage; and a second voltage divider 520 coupled between the second terminal 120 and the detection voltage output terminal 132 for providing a second divided voltage to the protection circuit 140 according to the first and second voltages, the second divided voltage being different from the detection voltage, wherein the first and second divided voltages are associated with the predetermined threshold, and more specifically, the predetermined threshold is higher when the first divided voltage is less than the detection voltage; similarly, the more the second divided voltage is smaller than the detection voltage, the higher the preset threshold value is.
Please refer to fig. 6, which is a schematic diagram illustrating an exemplary implementation of the first voltage divider 510 and the second voltage divider 520 of fig. 5. As shown in fig. 6, the first voltage dividing circuit 510 includes a resistor 512 and a resistor 514, and the first divided voltage is a voltage between the resistor 512 and the resistor 514; the second voltage divider 520 includes a resistor 522 and a resistor 524, and the second voltage divider is a voltage between the resistor 522 and the resistor 524. In the exemplary embodiment, the sum of the resistances of the resistors 512 and 514 is equal to the sum of the resistances of the resistors 522 and 524, and more specifically, the resistors 512 and 514 are equal to the resistor 524, so that the detection voltage is equal to the average value of the first and second values in the normal mode, in other words, when the protection circuit 100 is applied to a circuit using differential signals, the detection voltage is equal to a common mode voltage in the normal mode, but the sum of the resistances of the resistors 512 and 514 and the sum of the resistances of the resistors 522 and 524 may also be different (in this case, the detection voltage is equal to the reference voltage in the normal mode), so that the esd conditions of the first terminal 110 and the second terminal 120 are different on the premise that the conduction conditions of the first and second paths are the same, or the esd conditions of the first terminal 110 and the second terminal 120 are the same on the premise that the conduction conditions of the first and second paths are different, all such variations are intended to be within the scope of the present invention.
Please refer to fig. 7, which is a schematic diagram illustrating an exemplary embodiment of the protection circuit 140 of fig. 1 a. As shown in fig. 7, the protection circuit 140 includes: a detection voltage input 1410 coupled to the detection circuit 130 for receiving the detection voltage; a control voltage terminal 1420 for outputting a control voltage; a resistor 1430 coupled between the detection voltage input 1410 and the control voltage 1420; a resistor 1440 coupled between the resistor 1430 and the ground; a first switch 1450, coupled between the first terminal 110 and the ground terminal; a second switch 1460 coupled between the second terminal 120 and the ground terminal; a first control unit 1470 coupled between the control voltage terminal 1420 and the first switch 1450 for turning off or turning on the first switch 1450 according to the control voltage; and a second control unit 1480 coupled between the control voltage terminal 1420 and the second switch 1460 for turning off or turning on the second switch 1460 according to the control voltage.
Please continue to refer to fig. 7. In the exemplary embodiment, the impedance 1440 includes a capacitor and/or a resistor, so that the control voltage can be determined by the resistor 1430 and the impedance 1440 according to the detection voltage, for example, when the impedance 1440 is a capacitor, the control voltage is equal to the detection voltage by charging the capacitor in the normal mode; it is to be noted that the difference between the detection voltage and the control voltage corresponds to the aforementioned "difference between the value of the detection voltage and the average value of the first and second values" or "difference between the value of the detection voltage and a reference value derived from the first and second values". In addition, in the embodiment, each of the first control unit 1470 and the second control unit 1480 is an inverter, but the present invention is not limited thereto, and other control units that enter the esd mode when the difference between the detected voltage and the average value of the first and second values or the difference between the detected voltage and a reference value derived from the first and second values reaches the predetermined threshold may be used to replace the first control unit 1470 and the second control unit 1480.
Referring to fig. 7 again, when the first control unit 1470 and the second control unit 1480 are coupled between the detection voltage input terminal 1410 and the ground terminal (or when the detection circuit 130 does not include the voltage divider circuit), the first control unit 1470 is configured to determine a first low voltage output path between a first control terminal (e.g., a gate of an NMOS) of the first switch 1450 (e.g., an NMOS) and the ground terminal (i.e., the first control terminal is coupled through the first control unit) according to the control voltage1470 to ground) and is used to determine whether a first high output path between the first control terminal of the first switch 1450 and the detection voltage input terminal 1410 (i.e., the path from the first control terminal to the detection voltage input terminal 1410 via the first control unit 1470) is turned on according to the control voltage and the detection voltage, for example, when the first terminal 110 receives a surge voltage, the detection voltage will rise rapidly, but the control voltage will rise slowly, so the gate-to-source voltage V of the PMOS of the first control unit 1470 is turned onGSThe first high potential output path is conducted by positive and negative rotation. Similarly, the second control unit 1480 is configured to determine whether a second low-potential output path between a second control terminal of the second switch 1460 and the ground terminal (i.e. a path from the second control terminal to the ground terminal via the second control unit 1480) is turned on according to the control voltage, and to determine whether a second high-potential output path between the second control terminal of the second switch 1460 and the detection voltage input terminal 1410 (i.e. a path from the second control terminal to the detection voltage input terminal 1410 via the second control unit 1480) is turned on according to the control voltage and the detection voltage, for example, when the second terminal 120 receives a surge voltage, the detection voltage rises rapidly, but the control voltage rises slowly, so that the gate-to-source voltage V of the PMOS of the second control unit 1480 is turned onGSThe second high potential output path is conducted by positive and negative. When the first and second low potential output paths are turned on, the first control unit 1470 and the second control unit 1480 turn off the first switch 1450 and the second switch 1460, respectively, and the protection circuit 100 is in the normal mode; when the first and second high voltage output paths are turned on, the first control unit 1470 and the second control unit 1480 turn on the first switch 1450 and the second switch 1460, respectively, and the protection circuit 100 is in the esd mode.
Referring to fig. 8, when the first control unit 1470 and the second control unit 1480 are coupled between the voltage dividing input terminal and the ground terminal (or when the detecting circuit 130 includes a voltage dividing circuit), the protection circuit 140 of fig. 8 further includes: a first divided voltage input 810 for receiving a first divided voltage from the detection circuit 130, the first divided voltage being derived from the first and second voltages and being different from the detection voltage; and a second voltage division input 820 for receiving a second divided voltage from the detection circuit 130, the second divided voltage being derived from the first and second voltages and different from the detection voltage. In addition, the first control unit 1470 is coupled between the first voltage division input terminal 810 and the ground terminal, and is configured to determine whether a first low voltage output path between a first control terminal of the first switch 1450 and the ground terminal (i.e., a path from the first control terminal to the ground terminal via the first control unit 1470) is turned on according to the control voltage, and determine whether a first high voltage output path between the first control terminal of the first switch 1450 and the first voltage division input terminal 810 (i.e., a path from the first control terminal to the first voltage division input terminal 810 via the first control unit 1470) is turned on according to the control voltage and the first voltage division; similarly, the second control unit 1480 is coupled between the second voltage-dividing input terminal 820 and the ground terminal, and is configured to determine whether a second low-voltage output path between a second control terminal of the second switch 1460 and the ground terminal (i.e., a path from the second control terminal to the ground terminal via the second control unit 1480) is turned on according to the control voltage, and determine whether a second high-voltage output path between the second control terminal of the second switch 1460 and the second voltage-dividing input terminal 820 (i.e., a path from the second control terminal to the second voltage-dividing input terminal 820 via the second control unit 1480) is turned on according to the control voltage and the second voltage-dividing. When the first and second low potential output paths are turned on, the first control unit 1470 and the second control unit 1480 turn off the first switch 1450 and the second switch 1460, respectively, and the protection circuit 100 is in the normal mode; when the first and second high voltage output paths are turned on, the first control unit 1470 and the second control unit 1480 turn on the first switch 1450 and the second switch 1460, respectively, and the protection circuit 100 is in the esd mode.
In the embodiment of fig. 7 and 8, the first switch 1450 includes an NMOS transistor including a parasitic diode that acts as an energy release when the ground terminal receives a surge voltageA path; similarly, the second switch 1460 comprises an NMOS transistor comprising a parasitic diode that acts as an energy release path when the ground terminal receives a surge voltage, although other known and suitable switching elements may be used as the first switch 1450 and the second switch 1460 by those skilled in the art. In addition, when the first control unit 1470 and the second control unit 1480 are inverters, one skilled in the art can recognize that the characteristic curve (or operation/conduction condition) of the inverter can be controlled by various known means (e.g., doping to control the gate-to-source voltage V of the MOS) through various methodsGS) It is determined that the preset threshold can be set by the above-mentioned means, and of course, those skilled in the art can adopt other known and suitable control components as the first control unit 1470 and the second control unit 1480.
Since the details and variations of the embodiments can be understood by those skilled in the art with reference to the disclosure of the embodiments, that is, the technical features of the embodiments can be reasonably applied to other embodiments, the repeated and redundant description is omitted herein without affecting the disclosure and the requirement of the implementability.
In summary, the present invention can reduce the use of the diode to reduce the influence of the use of the diode on the impedance, and can shorten the electrostatic discharge path to accelerate the discharge of the abnormal energy.
Although the embodiments of the present invention have been described above, these embodiments are not intended to limit the present invention, and those skilled in the art can make variations on the technical features of the present invention according to the explicit or implicit contents of the present invention, and all such variations are possible within the scope of the patent protection sought by the present invention.
[ notation ] to show
10 circuit to be protected
12 power supply terminal
100 ESD protection circuit
110 first end
120 second end
130 detection circuit
132 detection voltage output terminal
134 first resistance
136 second resistance
140 protection circuit
310 first voltage dividing circuit
320 second voltage division circuit
510 first voltage divider circuit
520 second voltage division circuit
512. 514, 522, 524 resistors
1410 sense voltage input
1420 control voltage terminal
1430 resistance
1440 impedance
1450 first switch
1460 second switch
1470 first control unit
1480 second control Unit
810 first voltage division input terminal
820 second divided voltage input.
Claims (8)
1. An ESD protection circuit, comprising:
a first terminal for providing a first voltage, the value of the first voltage being a first value in a normal mode;
a second terminal for providing a second voltage, the value of the second voltage being a second value in the normal mode;
a detection circuit coupled between the first terminal and the second terminal for providing a detection voltage according to a first voltage provided by the first terminal and a second voltage provided by the second terminal; and
a protection circuit coupled to the detection circuit, the protection circuit being coupled between the first terminal and a ground terminal and coupled between the second terminal and the ground terminal, the protection circuit being configured to operate in the normal mode or an electrostatic discharge mode according to the detection voltage, and enter the electrostatic discharge mode from the normal mode when a difference between a value of the detection voltage and an average value of the first value and the second value or a difference between the value of the detection voltage and a reference value derived from the first value and the second value reaches a predetermined threshold, so that the protection circuit changes a first path between the first terminal and the ground terminal from a non-conductive state to a conductive state and/or changes a second path between the second terminal and the ground terminal from the non-conductive state to the conductive state;
wherein, the detection circuit further comprises:
a detection voltage output end coupled to the protection circuit for outputting the detection voltage;
a first voltage dividing circuit coupled between the first terminal and the detection voltage output terminal for providing a first divided voltage to the protection circuit according to the first voltage and the second voltage, the first divided voltage being different from the detection voltage; and
a second voltage divider coupled between the second terminal and the detection voltage output terminal for providing a second divided voltage to the protection circuit according to the first voltage and the second voltage, the second divided voltage being different from the detection voltage,
the first partial pressure and the second partial pressure are related to the preset threshold value.
2. The ESD protection circuit of claim 1, wherein the first terminal is configured to receive a positive side signal of a differential signal, the first voltage is a DC level of the positive side signal, the second terminal is configured to receive a negative side signal of the differential signal, and the second voltage is a DC level of the negative side signal.
3. The ESD protection circuit of claim 1 or 2, wherein the detection voltage is equal to an average of the first value and the second value in the normal mode.
4. The esd protection circuit of claim 1 or 2, wherein the detection circuit further comprises:
a first resistor coupled between the first terminal and the detection voltage output terminal; and
and the second resistor is coupled between the second end and the detection voltage output end.
5. The ESD protection circuit of claim 1 or 2, wherein the protection circuit comprises:
a detection voltage input end coupled to the detection circuit for receiving the detection voltage;
a control voltage terminal for outputting a control voltage;
a resistor coupled between the detection voltage input terminal and the control voltage terminal;
an impedance coupled between the resistor and the ground terminal;
a first switch coupled between the first terminal and the ground terminal;
a second switch coupled between the second terminal and the ground terminal;
a first control unit coupled between the control voltage terminal and the first switch for turning off or on the first switch according to the control voltage; and
and the second control unit is coupled between the control voltage end and the second switch and used for closing or opening the second switch according to the control voltage.
6. The ESD protection circuit of claim 5, wherein the first control unit is further coupled between the detection voltage input terminal and the ground terminal for determining whether a first low output path between a first control terminal of the first switch and the ground terminal is turned on according to the control voltage, and for determining whether a first high output path between the first control terminal of the first switch and the detection voltage input terminal is turned on according to the control voltage and the detection voltage, and when the first high output path is turned on, the first control unit turns on the first switch; the second control unit is further coupled between the detection voltage input terminal and the ground terminal for determining whether a second low potential output path between a second control terminal of the second switch and the ground terminal is conducted according to the control voltage, and for determining whether a second high potential output path between the second control terminal of the second switch and the detection voltage input terminal is conducted according to the control voltage and the detection voltage, and when the second high potential output path is conducted, the second control unit turns on the second switch.
7. The ESD protection circuit of claim 5, wherein the protection circuit further comprises:
a first voltage division input end for receiving a first voltage division from the detection circuit, the first voltage division being derived from the first voltage and the second voltage and being different from the detection voltage; and
a second voltage division input terminal for receiving a second voltage division from the detection circuit, the second voltage division being derived from the first voltage and the second voltage and being different from the detection voltage,
the first control unit is coupled between the first voltage division input end and the grounding end, and is used for determining whether a first low potential output path between a first control end of the first switch and the grounding end is conducted or not according to the control voltage, and determining whether a first high potential output path between the first control end of the first switch and the first voltage division input end is conducted or not according to the control voltage and the first voltage division, and when the first high potential output path is conducted, the first control unit opens the first switch; the second control unit is coupled between the second voltage division input end and the grounding end, is used for determining whether a second low potential output path between a second control end of the second switch and the grounding end is conducted or not according to the control voltage, and is used for determining whether a second high potential output path between the second control end of the second switch and the second voltage division input end is conducted or not according to the control voltage and the second voltage division, and when the second high potential output path is conducted, the second control unit opens the second switch.
8. The ESD protection circuit of claim 5, wherein the first switch comprises a first transistor comprising a first parasitic diode; the second switch includes a second transistor including a second parasitic diode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710169712.XA CN108631284B (en) | 2017-03-21 | 2017-03-21 | Electrostatic discharge protection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710169712.XA CN108631284B (en) | 2017-03-21 | 2017-03-21 | Electrostatic discharge protection circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN108631284A CN108631284A (en) | 2018-10-09 |
| CN108631284B true CN108631284B (en) | 2020-08-25 |
Family
ID=63687245
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710169712.XA Active CN108631284B (en) | 2017-03-21 | 2017-03-21 | Electrostatic discharge protection circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN108631284B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113258953B (en) * | 2021-06-25 | 2021-10-01 | 成都爱旗科技有限公司 | Radio frequency device, communication device and electrostatic protection method of radio frequency device |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1551447A (en) * | 2003-05-19 | 2004-12-01 | ��ͳ�Ƽ��ɷ�����˾ | Electrostatic discharge protection circuit with adjustable gate bias |
| CN103412216A (en) * | 2013-07-31 | 2013-11-27 | 格科微电子（上海）有限公司 | Electrostatic discharge detection circuit and processing system |
| CN104979814A (en) * | 2014-04-02 | 2015-10-14 | 中芯国际集成电路制造(上海)有限公司 | Electrostatic discharge protecting circuit |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9893517B2 (en) * | 2014-12-15 | 2018-02-13 | Arm Limited | Electrostatic discharge protection circuitry |
-
2017
- 2017-03-21 CN CN201710169712.XA patent/CN108631284B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1551447A (en) * | 2003-05-19 | 2004-12-01 | ��ͳ�Ƽ��ɷ�����˾ | Electrostatic discharge protection circuit with adjustable gate bias |
| CN103412216A (en) * | 2013-07-31 | 2013-11-27 | 格科微电子（上海）有限公司 | Electrostatic discharge detection circuit and processing system |
| CN104979814A (en) * | 2014-04-02 | 2015-10-14 | 中芯国际集成电路制造(上海)有限公司 | Electrostatic discharge protecting circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| CN108631284A (en) | 2018-10-09 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR102519118B1 (en) | Battery protection circuit | |
| TWI607613B (en) | Electrostatic discharge protection circuit | |
| US8693150B2 (en) | Semiconductor apparatus | |
| US20080192396A1 (en) | Over-voltage protection circuit and method thereof | |
| CN110098597B (en) | Drive circuit with overcurrent protection function | |
| US9203119B2 (en) | Battery device | |
| US20190214982A1 (en) | Power supply control device | |
| US10078343B2 (en) | Output circuit | |
| US11705725B2 (en) | Integrated circuit with electrostatic discharge protection | |
| US8243404B2 (en) | ESD protection circuit with merged triggering mechanism | |
| US20060164778A1 (en) | Inrush current limiting circuit | |
| CN108631284B (en) | Electrostatic discharge protection circuit | |
| US11789061B2 (en) | Integrated circuit and semiconductor device | |
| JP6648895B2 (en) | Output circuit | |
| JP2024104752A (en) | Motor Drive Unit | |
| US12149233B2 (en) | Power switch with normally on transistor | |
| US11296689B2 (en) | Output circuit having voltage-withstanding mechanism | |
| EP3928403B1 (en) | Turn off circuit for protection switch | |
| US7116537B2 (en) | Surge current prevention circuit and DC power supply | |
| US11855614B2 (en) | Semiconductor device | |
| CN111725795B (en) | Battery protection circuit | |
| US12322956B2 (en) | Protection circuit and semiconductor device | |
| US20240170956A1 (en) | Signal output circuit and semiconductor integrated circuit device | |
| CN112055923B (en) | Circuit arrangement for protecting electronic components | |
| JP2022189105A (en) | Voltage monitoring circuit |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |