CN108615735A - 一种阵列基板、显示装置及阵列基板的制作方法 - Google Patents
一种阵列基板、显示装置及阵列基板的制作方法 Download PDFInfo
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Abstract
本发明公开了一种阵列基板、显示装置及阵列基板的制作方法,以避免刻蚀液损伤有源层,优化薄膜晶体管特性。阵列基板包括:衬底基板;位于衬底基板之上的栅极以及与栅极连接的栅线;位于栅极和栅线远离衬底基板一侧的栅极绝缘层;位于栅极绝缘层远离栅极一侧的有源层;位于有源层远离栅极绝缘层一侧且覆盖基板的覆盖层,覆盖层包括金属导电部分和透明绝缘金属氧化物部分,金属导电部分和透明绝缘金属氧化物部分的金属元素相同,金属导电部分包括相对设置且分别与有源层连接的源极和漏极,以及与源极连接的数据线。
Description
技术领域
本发明涉及显示技术领域,特别是涉及一种阵列基板、显示装置及阵列基板的制作方法。
背景技术
TFT(Thin Film Transistor,薄膜晶体管)是场效应晶体管的种类之一,主要应用于平板显示装置中。在平板显示装置中,薄膜晶体管液晶显示器(Thin Film TransistorLiquid Crystal Display,简称TFT-LCD)在当前的平板显示器市场占据了主导地位。在TFT-LCD的生产工艺中,阵列工序主要是用来制作TFT基板及彩色滤光片。
现有技术中的阵列基板制作工艺主要工序为:玻璃基板清洗→镀膜→清洗→光刻胶涂附→曝光→显影→刻蚀→光刻胶剥离→清洗→检查。镀膜分金属膜和非金属膜,金属膜采用物理气相淀积的方式成膜,又叫溅射;非金属膜采用化学气相淀积法成膜。光刻胶涂附指将光刻胶均匀涂附到玻璃基板表面的工序。曝光就是要将掩模板上的图形转移到涂附好光刻胶的玻璃基板上,精度要求极高。显影就是将曝光后感光部分的光刻胶溶解并去除,留下未感光部分的光刻胶,从而形成图形,光刻胶有正胶、负胶,负胶就是感光了的光刻胶留下。经过显影留下来的光刻胶成了保护掩模板,未被保护的薄膜将通过刻蚀工艺去除。光刻胶的剥离是指将刻蚀完成后的光刻胶去除。
可以看出,在现有技术阵列基板的制作工艺中,有刻蚀这一工序,而在TFT的刻蚀工艺中,背沟道刻蚀由于制程简单经常被采用。目前TFT的制作大都采用具有高载流子迁移率的IGZO(Indium Gallium Zinc Oxide,氧化铟镓锌)做有源层。但是当用IGZO做有源层时,若采用背沟道刻蚀形成源极和漏极时,刻蚀液会不可避免的对已形成的IGZO有源层造成损伤,从而严重影响到TFT的特性。
发明内容
本发明实施例的目的是提供一种阵列基板、显示装置及阵列基板的制作方法,以避免刻蚀液损伤有源层,优化TFT特性。
本发明实施例提供的一种阵列基板,包括:
衬底基板;
位于所述衬底基板之上的栅极以及与所述栅极连接的栅线;
位于所述栅极和所述栅线远离所述衬底基板一侧的栅极绝缘层;
位于所述栅极绝缘层远离所述栅极一侧的有源层;
位于所述有源层远离所述栅极绝缘层一侧且覆盖所述基板的覆盖层,所述覆盖层包括金属导电部分和透明绝缘金属氧化物部分,所述金属导电部分和所述透明绝缘金属氧化物部分的金属元素相同,所述金属导电部分包括相对设置且分别与所述有源层连接的源极和漏极,以及与所述源极连接的数据线。
采用本发明上述实施例的技术方案,源极、漏极和数据线不需要通过刻蚀工艺形成图案,并且有源层沟道区上方被透明绝缘金属氧化物覆盖,从而避免了现有技术刻蚀工艺中刻蚀液对有源层造成的损伤,优化了TFT的特性。
可选的,所述金属为Hf,所述透明绝缘金属氧化物为HfO2。
可选的,所述金属为Ta,所述透明绝缘金属氧化物为Ta2O5。
可选的,所述有源层材质为金属氧化物半导体;所述金属氧化物半导体包括氧化铟镓锌IGZO、氧化锌ZnO或氮氧化锌ZnON。
较佳的,所述的阵列基板还包括:位于所述覆盖层远离所述有源层一侧的钝化层。
本发明实施例还提供一种显示装置,包括前述任一技术方案所述的阵列基板。由于阵列基板的TFT性能较佳,因此,显示装置也具有较佳的产品品质。
本发明实施例还提供一种阵列基板的制作方法,包括:
在衬底基板之上形成栅极以及与栅极连接的栅线;
在栅极和栅线远离衬底基板一侧形成栅极绝缘层;
在栅极绝缘层远离栅极一侧形成有源层;
在有源层远离栅极绝缘层一侧形成覆盖基板的覆盖层,覆盖层包括金属导电部分和透明绝缘金属氧化物部分,金属导电部分和透明绝缘金属氧化物部分的金属元素相同,金属导电部分包括相对设置且分别与有源层连接的源极和漏极,以及与源极连接的数据线。
采用本发明上述实施例的制作方法,不需要通过刻蚀工艺形成源极、漏极和数据线图案,从而避免了现有技术刻蚀工艺中刻蚀液对有源层造成的损伤,优化了TFT的特性。
具体的,所述在有源层远离栅极绝缘层一侧形成覆盖基板的覆盖层,包括:
在有源层远离栅极绝缘层一侧形成覆盖基板的金属层;
在金属层远离有源层一侧形成对应源极、漏极和数据线区域的遮挡层;
对基板进行氧等离子体轰击处理,使金属层未被遮挡层遮挡的区域氧化为透明绝缘金属氧化物;
剥离遮挡层。
采用本发明上述实施例的制作方法,在金属层远离有源层一侧形成的对应源极、漏极和数据线区域覆盖遮挡层后,对基板进行氧等离子体轰击处理,未被遮挡层保护的金属层被氧化成透明绝缘的金属氧化物,最后对基板进行剥离遮挡层处理后,就形成了源极、漏极和数据线区域的图案,这种构图工艺避免了现有技术中通过刻蚀工艺造成对有源层的损伤,优化了TFT特性,提高了显示装置的产品品质。
可选的,所述遮挡层为光刻胶层。
较佳的,所述的阵列基板的制作方法还包括在所述覆盖层远离所述有源层一侧形成钝化层。
可选的,所述金属层材质为Hf,透明绝缘金属氧化物为HfO2;或所述金属层材质为Ta,透明绝缘金属氧化物为Ta2O5。
可选的,所述有源层材质为金属氧化物半导体,所述金属氧化物半导体包括氧化铟镓锌IGZO、氧化锌ZnO或氮氧化锌ZnON。
采用本发明实施例方法制作的阵列基板,TFT的性能较佳,该阵列基板应用于显示装置,显示装置的产品品质也较高。
附图说明
图1为本发明一实施例阵列基板制作中对基板进行氧等离子体轰击处理示意图;
图2为本发明一实施例阵列基板示意图;
图3为本发明另一实施例阵列基板示意图;
图4为本发明一实施例阵列基板的制作方法流程图;
图5为本发明一实施例阵列基板的覆盖层制作流程图。
附图标记:
1-衬底基板
2-栅极
3-栅极绝缘层
4-有源层
5-覆盖层
6-金属层
7-遮挡层
8-钝化层
9-源极
10-漏极
11-透明绝缘金属氧化物
具体实施方式
为避免刻蚀液损伤有源层,优化TFT特性,本发明实施例提供了一种阵列基板、显示装置及阵列基板的制作方法。为使本发明的目的、技术方案和优点更加清楚,以下举实施例对本发明作进一步详细说明。
如图2所示,本发明一实施例提供的阵列基板,包括:
衬底基板1;
位于衬底基板1之上的栅极2以及与栅极2连接的栅线;
位于栅极2和栅线远离衬底基板1一侧的栅极绝缘层3;
位于栅极绝缘层3远离栅极2一侧的有源层4;
位于有源层4远离栅极绝缘层3一侧且覆盖基板的覆盖层5,覆盖层5包括金属导电部分和透明绝缘金属氧化物11部分,金属导电部分和透明绝缘金属氧化物11部分的金属元素相同,金属导电部分包括相对设置且分别与有源层4连接的源极9和漏极10,以及与源极9连接的数据线。
本发明实施例中,衬底基板1的具体材质不限,例如可以采用玻璃、树脂,或塑料等。
在本发明的一实施例中,金属层6材质为Hf,透明绝缘金属氧化物11为HfO2;或金属层6材质为Ta,透明绝缘金属氧化物11为Ta2O5。
在本发明的一实施例中,有源层4材质为金属氧化物半导体;金属氧化物半导体包括氧化铟镓锌IGZO、氧化锌ZnO或氮氧化锌ZnON等,这类金属氧化物半导体具有高载流子迁移率,能够满足大尺寸显示装置的驱动需要,被广泛的应用于TFT的制作中。
如图3所示,本发明一实施例的阵列基板还包括位于覆盖层5远离有源层4一侧的钝化层8,钝化层8材质可选用氮化硅等。
本发明实施例还提供一种显示装置,包括前述任一技术方案的阵列基板。由于阵列基板的TFT性能较佳,因此,显示装置具有较佳的产品品质。显示装置的具体类型不限,例如,可以为TFT-LCD显示装置、AMOLED显示装置等等;显示装置的具体产品类型不限,例如,可以为显示器、显示屏、平板电视等等。
结合图2和图4所示,本发明实施例还提供一种阵列基板的制作方法,包括以下步骤:
步骤S1、在衬底基板1之上形成栅极2以及与栅极2连接的栅线;
步骤S2、在栅极2和栅线远离衬底基板1一侧形成栅极绝缘层3;
步骤S3、在栅极绝缘层3远离栅极2一侧形成有源层4;
步骤S4、在有源层4远离栅极绝缘层3一侧形成覆盖基板的覆盖层5,覆盖层5包括金属导电部分和透明绝缘金属氧化物11部分,金属导电部分和透明绝缘金属氧化物11部分的金属元素相同,金属导电部分包括相对设置且分别与有源层4连接的源极9和漏极10,以及与源极9连接的数据线。
结合图1、图2和图5所示,具体的,本发明实施例提供的一种阵列基板的制作方法,在有源层4远离栅极绝缘层3一侧形成覆盖基板的覆盖层5的制作,包括以下步骤:
步骤S401、在有源层4远离栅极绝缘层3一侧形成覆盖基板的金属层6;
步骤S402、在金属层6远离有源层4一侧形成对应源极9、漏极10和数据线区域的遮挡层7;
步骤S403、对基板进行氧等离子体轰击处理,使金属层6未被遮挡层7遮挡的区域氧化为透明绝缘金属氧化物11;
步骤S404、剥离遮挡层7。
采用本发明实施例方法制作的阵列基板,在金属层远离有源层一侧形成的对应源极、漏极和数据线区域覆盖遮挡层后,对基板进行氧等离子体轰击处理,未被遮挡层遮挡的金属层被氧化成透明绝缘的金属氧化物,之后对基板进行剥离遮挡层处理后,形成了源极、漏极和数据线区域的图案,这种构图工艺避免了现有技术中通过刻蚀工艺对有源层造成的损伤,优化了TFT特性,提高了显示装置的产品品质。
其中,遮挡层可以为光刻胶层。
如图3所示,本发明实施例方法制作的阵列基板,在覆盖层5远离有源层4一侧形成钝化层8,钝化层8材质可选用氮化硅等。
本发明实施例方法制作的阵列基板,金属层6材质为Hf,透明绝缘金属氧化物11为HfO2;或金属层6材质为Ta,透明绝缘金属氧化物11为Ta2O5。
本发明实施例方法制作的阵列基板,有源层4材质为金属氧化物半导体,金属氧化物半导体包括氧化铟镓锌IGZO、氧化锌ZnO或氮氧化锌ZnON等,这类金属氧化物半导体因具有高载流子迁移率,而被广泛的应用于TFT的制作中。
显然,本领域的技术人员可以对本发明进行各种改动和变型而不脱离本发明的精神和范围。这样,倘若本发明的这些修改和变型属于本发明权利要求及其等同技术的范围之内,则本发明也意图包含这些改动和变型在内。
Claims (12)
1.一种阵列基板,其特征在于,包括:
衬底基板;
位于所述衬底基板之上的栅极以及与所述栅极连接的栅线;
位于所述栅极和所述栅线远离所述衬底基板一侧的栅极绝缘层;
位于所述栅极绝缘层远离所述栅极一侧的有源层;
位于所述有源层远离所述栅极绝缘层一侧且覆盖所述基板的覆盖层,所述覆盖层包括金属导电部分和透明绝缘金属氧化物部分,所述金属导电部分和所述透明绝缘金属氧化物部分的金属元素相同,所述金属导电部分包括相对设置且分别与所述有源层连接的源极和漏极,以及与所述源极连接的数据线。
2.如权利要求1所述的阵列基板,其特征在于,所述金属为Hf,所述透明绝缘金属氧化物为HfO2。
3.如权利要求1所述的阵列基板,其特征在于,所述金属为Ta,所述透明绝缘金属氧化物为Ta2O5。
4.如权利要求1所述的阵列基板,其特征在于,所述有源层材质为金属氧化物半导体;所述金属氧化物半导体包括氧化铟镓锌IGZO、氧化锌ZnO或氮氧化锌ZnON。
5.如权利要求1~4任一项所述的阵列基板,其特征在于,还包括:位于所述覆盖层远离所述有源层一侧的钝化层。
6.一种显示装置,其特征在于,包括如权利要求1~5任一项所述的阵列基板。
7.一种阵列基板的制作方法,其特征在于,包括:
在衬底基板之上形成栅极以及与栅极连接的栅线;
在栅极和栅线远离衬底基板一侧形成栅极绝缘层;
在栅极绝缘层远离栅极一侧形成有源层;
在有源层远离栅极绝缘层一侧形成覆盖基板的覆盖层,覆盖层包括金属导电部分和透明绝缘金属氧化物部分,金属导电部分和透明绝缘金属氧化物部分的金属元素相同,金属导电部分包括相对设置且分别与有源层连接的源极和漏极,以及与源极连接的数据线。
8.如权利要求7所述的阵列基板的制作方法,其特征在于,所述在有源层远离栅极绝缘层一侧形成覆盖基板的覆盖层,包括:
在有源层远离栅极绝缘层一侧形成覆盖基板的金属层;
在金属层远离有源层一侧形成对应源极、漏极和数据线区域的遮挡层;
对基板进行氧等离子体轰击处理,使金属层未被遮挡层遮挡的区域氧化为透明绝缘金属氧化物;
剥离遮挡层。
9.如权利要求8所述的阵列基板的制作方法,其特征在于,所述遮挡层为光刻胶层。
10.如权利要求8所述的阵列基板的制作方法,其特征在于,还包括:
在所述覆盖层远离所述有源层一侧形成钝化层。
11.如权利要求8~10任一项所述的阵列基板的制作方法,其特征在于,所述金属层材质为Hf,透明绝缘金属氧化物为HfO2;或所述金属层材质为Ta,透明绝缘金属氧化物为Ta2O5。
12.如权利要求8所述的阵列基板的制作方法,其特征在于,所述有源层材质为金属氧化物半导体,所述金属氧化物半导体包括氧化铟镓锌IGZO、氧化锌ZnO或氮氧化锌ZnON。
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CN112114460A (zh) * | 2020-09-23 | 2020-12-22 | 北海惠科光电技术有限公司 | 基于阵列基板的绝缘单元及其制备方法、阵列基板及其制备方法、显示机构 |
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Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102646699A (zh) * | 2012-01-13 | 2012-08-22 | 京东方科技集团股份有限公司 | 一种氧化物薄膜晶体管及其制备方法 |
CN102646676A (zh) * | 2011-11-03 | 2012-08-22 | 京东方科技集团股份有限公司 | 一种tft阵列基板 |
CN102812555A (zh) * | 2010-03-11 | 2012-12-05 | 夏普株式会社 | 半导体装置及其制造方法 |
CN104600077A (zh) * | 2013-10-31 | 2015-05-06 | 乐金显示有限公司 | 用于液晶显示装置的阵列基板及其制造方法 |
CN105137672A (zh) * | 2015-08-10 | 2015-12-09 | 深圳市华星光电技术有限公司 | 阵列基板及其制造方法 |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3378280B2 (ja) * | 1992-11-27 | 2003-02-17 | 株式会社東芝 | 薄膜トランジスタおよびその製造方法 |
JP2001013523A (ja) * | 1999-06-30 | 2001-01-19 | Nec Corp | 液晶表示装置及びその製造方法 |
TWI374544B (en) * | 2006-11-13 | 2012-10-11 | Au Optronics Corp | Thin film transistor array substrates and fbricating method thereof |
KR101322267B1 (ko) | 2008-06-12 | 2013-10-25 | 엘지디스플레이 주식회사 | 액정표시장치용 어레이 기판 및 그 제조방법 |
CN104934330A (zh) * | 2015-05-08 | 2015-09-23 | 京东方科技集团股份有限公司 | 一种薄膜晶体管及其制备方法、阵列基板和显示面板 |
CN108615735B (zh) | 2018-05-03 | 2021-01-22 | 京东方科技集团股份有限公司 | 一种阵列基板、显示装置及阵列基板的制作方法 |
-
2018
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-
2019
- 2019-04-17 WO PCT/CN2019/083096 patent/WO2019210776A1/zh active Application Filing
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Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102812555A (zh) * | 2010-03-11 | 2012-12-05 | 夏普株式会社 | 半导体装置及其制造方法 |
CN102646676A (zh) * | 2011-11-03 | 2012-08-22 | 京东方科技集团股份有限公司 | 一种tft阵列基板 |
CN102646699A (zh) * | 2012-01-13 | 2012-08-22 | 京东方科技集团股份有限公司 | 一种氧化物薄膜晶体管及其制备方法 |
CN104600077A (zh) * | 2013-10-31 | 2015-05-06 | 乐金显示有限公司 | 用于液晶显示装置的阵列基板及其制造方法 |
CN105137672A (zh) * | 2015-08-10 | 2015-12-09 | 深圳市华星光电技术有限公司 | 阵列基板及其制造方法 |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2019210776A1 (zh) * | 2018-05-03 | 2019-11-07 | 京东方科技集团股份有限公司 | 阵列基板、显示装置、薄膜晶体管及阵列基板的制作方法 |
US11177296B2 (en) | 2018-05-03 | 2021-11-16 | Hefei Xinsheng Optoelectronics Technology Co., Ltd. | Array substrate, display device, thin film transistor, and method for manufacturing array substrate |
CN112114460A (zh) * | 2020-09-23 | 2020-12-22 | 北海惠科光电技术有限公司 | 基于阵列基板的绝缘单元及其制备方法、阵列基板及其制备方法、显示机构 |
US11984460B2 (en) | 2020-09-23 | 2024-05-14 | Beihai Hkc Optoelectronics Technology Co., Ltd. | Insulation unit based on array substrate and manufacturing method thereof, array substrate and manufacturing method thereof, and electronic device |
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