[go: up one dir, main page]

CN108365826B - Programmable gain amplifier - Google Patents

Programmable gain amplifier Download PDF

Info

Publication number
CN108365826B
CN108365826B CN201711431388.0A CN201711431388A CN108365826B CN 108365826 B CN108365826 B CN 108365826B CN 201711431388 A CN201711431388 A CN 201711431388A CN 108365826 B CN108365826 B CN 108365826B
Authority
CN
China
Prior art keywords
resistor
operational amplifier
dac
programmable gain
amplifier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201711431388.0A
Other languages
Chinese (zh)
Other versions
CN108365826A (en
Inventor
李虎彪
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ZHEJIANG HECHUAN TECHNOLOGY CO LTD
Original Assignee
ZHEJIANG HECHUAN TECHNOLOGY CO LTD
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ZHEJIANG HECHUAN TECHNOLOGY CO LTD filed Critical ZHEJIANG HECHUAN TECHNOLOGY CO LTD
Priority to CN201711431388.0A priority Critical patent/CN108365826B/en
Publication of CN108365826A publication Critical patent/CN108365826A/en
Application granted granted Critical
Publication of CN108365826B publication Critical patent/CN108365826B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03GCONTROL OF AMPLIFICATION
    • H03G3/00Gain control in amplifiers or frequency changers
    • H03G3/20Automatic control
    • H03G3/30Automatic control in amplifiers having semiconductor devices
    • H03G3/3089Control of digital or coded signals

Landscapes

  • Control Of Amplification And Gain Control (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

The invention relates to a programmable gain amplifier, wherein a multiplication type DAC in the programmable gain amplifier is provided with a serial interface or a parallel interface, and is formed by combining an inverted T-shaped resistor network in the multiplication type DAC and an operational amplifier, wherein the feedback end of a high-precision weight resistor network in the multiplication type DAC is the signal input end of the operational amplifier, and the reference end is the output feedback end of the operational amplifier. The invention has the advantages of simple design, small volume, convenient control, high precision, flexible use and low cost.

Description

Programmable gain amplifier
Technical Field
The present invention relates to a programmable gain amplifier.
Background
With the use of computers, in order to reduce hardware devices, a Programmable gain amplifier (PGA: programmable GAIN AMPLIFIER), which is a very versatile amplifier whose amplification factor can be controlled by a program as needed, may be used. By adopting the amplifier, the amplification factor can be adjusted by a program, so that the full-scale signal of the A/D converter is uniform, and the measurement accuracy is greatly improved. The automatic range conversion is to automatically adjust the multiple of the processed signal by using a programmable gain amplifier according to the requirement so as to meet the requirements of subsequent circuits and systems.
At present, the programmable gain amplifier has two kinds of combined PGA and integrated PGA, the combined PGA is generally composed of an operational amplifier, an instrument amplifier or an isolated discharger and some other additional circuits, the working principle is that the value of a feedback resistor which is connected with a multiplexing switch is adjusted through a program, so that the amplification factor of the amplifier is adjusted, the combined PGA is flexible in design, the PGA with various amplification factors can be easily designed, but the combined PGA is complex in design, huge in circuit size and low in precision. The programmable gain amplifier circuit specially designed is integrated PGA, and the types of integrated PGA circuits are many, such as MCP6S21, MCP6S22, MCP6S26 and MCP6S28 series produced by micro chip corporation of America, AD8321 produced by Analog Devices of Analog instruments of America, etc., belong to the programmable gain amplifier, and the integrated PGA has the advantages of simple use, small volume and high precision, but has the limitations of practical circuit design due to the expensive cost, particularly the PGA with multiple gain choices.
Disclosure of Invention
The invention aims to provide a design method of a programmable gain amplifier, which has the advantages of flexible design, low cost, simple use, small volume and high precision of the integrated PGA.
The technical scheme adopted by the invention is as follows: the programmable gain amplifier is characterized by comprising a multiplication DAC and an operational amplifier, wherein the feedback end of a high-precision weight resistor network in the multiplication DAC is an operational amplifier signal input end, and the reference end is an output feedback end of the operational amplifier.
The programmable gain amplifier is characterized in that a multiplication type DAC in the programmable gain amplifier is provided with a serial interface or a parallel interface, and is formed by combining an inverted T-shaped resistor network and an operational amplifier in the multiplication type DAC.
The invention has the following beneficial effects: (1) The design is simple, the volume is greatly reduced, and only two chips are needed; (2) The control is simple, the precision is high, the gain precision is ensured by utilizing a high-precision weight resistor network in the multiplication DAC, and the control of the gain can be realized only by controlling Dn of the DAC; (3) The PGA with various bandwidths and different gain stages can be combined by changing different multiplication DACs and operational amplifiers, for example, the DACs can be selected from 8 bits to 16 bits; if the DAC and the operational amplifier which are packaged in the same way are selected, the PCB is not required to be modified when the bandwidth or the gain level of the PGA is modified, and the requirements of the volume and the control speed of the PCB (the volume of the serial DAC is small, the control speed of the parallel DAC is high) can be met by selecting the serial DAC or the parallel DAC, and the serial DAC or the parallel DAC can correspond to the singlechips or the controllers of different interfaces; (4) The cost is low, and the scheme is far lower than the integrated PGA under the condition of the same amplification gain stage number.
Drawings
Fig. 1 is a schematic diagram of the internal resistor network structure of the 12-bit multiplying DAC of the present invention.
Fig. 2 is an internal structure diagram of a 12-bit serial multiplication DAC of the present invention.
Fig. 3 is an internal structure diagram of a 12-bit parallel multiplying DAC of the present invention.
Fig. 4 is a schematic diagram of the connection of the present invention.
Detailed Description
The invention will be further illustrated with reference to specific examples.
Referring to fig. 1, the multiplying DAC belongs to an R-2R type DAC, i.e. an inverted-T resistor network D/a converter,
Referring to fig. 2 or 3, the multiplying DAC may be a multiplying DAC having a serial interface or a parallel interface.
Referring to fig. 4, the programmable gain amplifier is composed of a multiplication DAC and an operational amplifier, the multiplication DAC is simplified to 4 bits, the feedback terminal RFB port of the high-precision weight resistor network in the multiplication DAC is the signal input terminal of the operational amplifier, the reference terminal VREF terminal is the output feedback terminal of the operational amplifier, S3, S2, S1 and S0 are 4 internal electronic switches, their states are controlled by the values of the input codes d3, d2, d1 and d0, the switch is connected to V-when the code is 1, and the switch is connected to v+ when the code is 0. When the operational amplifier is used as an inverting amplifier, the V-level and the V+ level are equal and close to zero, and no matter which side the switch is connected to, the current flowing through each branch is always unchanged when the operational amplifier is connected to the ground. The equivalent resistance of the weighted resistor network part is R, and if the total output current is I, the current flowing through each branch is I/2, I/4, I/8 and I/16 respectively, wherein I=VOUT/R. The programmable method for realizing the gain of the whole circuit comprises the following steps:
1. If the switch Si is grounded (connected to the v+ of the amplifier) when di=0 and Si is connected to the input V-of the amplifier when di=1, dn is known from fig. 4
2. The input end has VSIN= -Ri sigma, and is substituted with I=VOUT/R to obtain
3. For a multiplying DAC with n-bit input, the output analog voltage formula is
Dn is an n-bit binary number ranging from 0 to 2 n -1.
4. The above description shows that the output voltage is inversely related to the input digital quantity, and the gain of the whole circuit is
5. Conclusion: the gain of the whole circuit can be programmable by controlling the value of Dn.

Claims (2)

1. The programmable gain amplifier is characterized by comprising a multiplication DAC and an operational amplifier, wherein a feedback end RFB end of a high-precision weight resistor network in the multiplication DAC is an operational amplifier signal input end, a reference end VREF end is an output feedback end of the operational amplifier, an input end corresponding to the voltage VSIN of an external input signal is connected with the feedback end RFB end, the feedback end RFB end is connected with a first end of an equivalent resistor, a second end of the equivalent resistor is respectively connected with a first end of each electronic switch, and the feedback end VREF end is connected with a negative input end V-end of the operational amplifier; the positive input end of the operational amplifier is respectively connected with the second ends of the electronic switches and connected with the first end of the first 2R resistor of the current-driven R-2R resistor ladder network; the third end of each electronic switch is correspondingly connected with the first ends of the rest 2R resistors of the R-2R resistor ladder network driven by current respectively, and the second end of the first 2R resistor is connected with the second end of the next 2R resistor; the other 2R resistances except the first 2R resistance are all in parallel connection; and each other 2R resistor is separated by one R resistor, and the R resistors are in series connection, and the number of the 2R resistors of the current-driven R-2R resistor ladder network is one more than that of the R resistors; the second end of the last 2R resistor is connected with the VREF end and is used as an output feedback end of the operational amplifier; the equivalent resistance of the weight resistor network part is R, if the output total current is I, wherein I=VOUT/R; if di=0, the switch Si is grounded, and if di=1, the switch Si is connected to the input end of the operational amplifier, and for the n-bit input multiplication DAC, the output analog voltage formula is:
wherein VSIN is the voltage of the external input signal.
2. A programmable gain amplifier according to claim 1, characterized in that the multiplying DAC in the programmable gain amplifier has a serial interface or a parallel interface and is formed by combining an inverted-T resistor network inside the multiplying DAC with an operational amplifier.
CN201711431388.0A 2017-12-26 2017-12-26 Programmable gain amplifier Active CN108365826B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201711431388.0A CN108365826B (en) 2017-12-26 2017-12-26 Programmable gain amplifier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201711431388.0A CN108365826B (en) 2017-12-26 2017-12-26 Programmable gain amplifier

Publications (2)

Publication Number Publication Date
CN108365826A CN108365826A (en) 2018-08-03
CN108365826B true CN108365826B (en) 2024-07-12

Family

ID=63010544

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201711431388.0A Active CN108365826B (en) 2017-12-26 2017-12-26 Programmable gain amplifier

Country Status (1)

Country Link
CN (1) CN108365826B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110365303A (en) * 2019-07-11 2019-10-22 厦门大学嘉庚学院 Controllable gain amplifier and control method

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105203089A (en) * 2015-09-30 2015-12-30 中国人民解放军海军工程大学 Selsyn solid-state axial angle sending system
CN207677696U (en) * 2017-12-26 2018-07-31 浙江禾川科技股份有限公司 A Programmable Gain Amplifier

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101207399B (en) * 2006-12-06 2014-06-04 美国博通公司 Method and system for controlling circuit in an emitter
CN103248330B (en) * 2013-01-31 2015-10-21 南京邮电大学 A kind of programmable gain amplifier of high-gain precision
US20170126196A1 (en) * 2015-11-02 2017-05-04 Ess Technology, Inc. Low Noise Audio Rendering Circuit
CN105515472B (en) * 2016-01-25 2018-05-25 南京凌鸥创芯电子有限公司 Motor drive current detection circuit and control system
CN105743454B (en) * 2016-01-31 2018-12-04 天津大学 A kind of binary weights dB linear switch resistor-type CMOS programmable gain amplifier

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105203089A (en) * 2015-09-30 2015-12-30 中国人民解放军海军工程大学 Selsyn solid-state axial angle sending system
CN207677696U (en) * 2017-12-26 2018-07-31 浙江禾川科技股份有限公司 A Programmable Gain Amplifier

Also Published As

Publication number Publication date
CN108365826A (en) 2018-08-03

Similar Documents

Publication Publication Date Title
KR100304955B1 (en) Digital to analog converter
CN102859881A (en) Analog-to-digital converter
GB2485703A (en) A sigma-delta analogue-to-digital converter using an RC integrator
CN101425805A (en) High resolution small area A/D conversion circuit
CN108540135B (en) Digital-to-analog converter and conversion circuit
CN110380731B (en) Digital-analog conversion circuit
CN108365826B (en) Programmable gain amplifier
US6958720B1 (en) Fine string compensation to minimize digital to analog converter differential nonlinearity error
US7042381B1 (en) Delay equalized Z/2Z ladder for digital to analog conversion
CN115833841A (en) Digital-to-analog converter, chip and electronic equipment
KR20090031184A (en) Digital to analog converter
CN207677696U (en) A Programmable Gain Amplifier
US20130234685A1 (en) Highly linear programmable v-i converter using a compact switching network
EP1813020B1 (en) Balanced dual resistor string digital to analog converter system and method
CN109586726B (en) Segmented digital-to-analog converter
CN109586725B (en) Ultra-high precision R-2R resistor network switch array
KR20180075319A (en) Multiple resistor string digital to analog converter having improved switching noise
CN110737299A (en) low-voltage variable constant current source device
CN113114246B (en) High-precision micro-current linear calibration circuit
WO1981000653A1 (en) Cyclic digital-to-analog conversion system
CN104168023A (en) High-precision analog-to-digital converter
CN109687871B (en) Analog-to-digital converter
CN220067405U (en) Digital-to-analog conversion device and signal processing apparatus
CN208862818U (en) A digital to analog converter
US7132970B2 (en) Delay equalized Z/2Z ladder for digital to analog conversion

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant