CN108364962B - Array substrate, display panel and packaging method thereof - Google Patents
Array substrate, display panel and packaging method thereof Download PDFInfo
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- CN108364962B CN108364962B CN201810186405.7A CN201810186405A CN108364962B CN 108364962 B CN108364962 B CN 108364962B CN 201810186405 A CN201810186405 A CN 201810186405A CN 108364962 B CN108364962 B CN 108364962B
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- 239000000758 substrate Substances 0.000 title claims abstract description 173
- 238000004806 packaging method and process Methods 0.000 title claims abstract description 86
- 238000000034 method Methods 0.000 title claims abstract description 20
- 239000002184 metal Substances 0.000 claims abstract description 115
- 238000005538 encapsulation Methods 0.000 claims description 21
- 238000000059 patterning Methods 0.000 claims description 13
- 239000008393 encapsulating agent Substances 0.000 claims 3
- 230000000903 blocking effect Effects 0.000 claims 1
- 239000000853 adhesive Substances 0.000 description 25
- 230000001070 adhesive effect Effects 0.000 description 25
- 238000001723 curing Methods 0.000 description 24
- 239000003292 glue Substances 0.000 description 13
- 238000004519 manufacturing process Methods 0.000 description 8
- 239000004973 liquid crystal related substance Substances 0.000 description 6
- 239000011248 coating agent Substances 0.000 description 4
- 238000000576 coating method Methods 0.000 description 4
- 230000001678 irradiating effect Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000003848 UV Light-Curing Methods 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 230000000750 progressive effect Effects 0.000 description 1
- 239000000565 sealant Substances 0.000 description 1
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
- H10D86/441—Interconnections, e.g. scanning lines
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1339—Gaskets; Spacers; Sealing of cells
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
- H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
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Abstract
本发明提供了一种阵列基板、显示面板及其封装方法。所述阵列基板由内到外依次划分为显示区、封装区以及绑定区，阵列基板包括衬底基板以及形成在衬底基板上的金属信号线和遮挡层，其中，金属信号线自显示区贯穿封装区并延伸至绑定区，且金属信号线上形成有镂空区域，镂空区域在衬底基板上形成的第一正投影位于封装区，遮挡层在衬底基板上形成的第二正投影部分覆盖第一正投影，且封装区内金属信号线在衬底基板上形成的第三正投影与第二正投影之间形成有用于发生衍射的狭缝。用于发生衍射的狭缝的设置，降低了对镂空区域的尺寸要求，从而减小了金属信号线的电阻，降低了金属信号线的功耗，保证了阵列基板及由阵列基板制成的产品的性能。
The present invention provides an array substrate, a display panel and a packaging method thereof. The array substrate is sequentially divided into a display area, a packaging area and a binding area from inside to outside. The array substrate includes a base substrate, metal signal lines and a shielding layer formed on the base substrate, wherein the metal signal lines are formed from the display area. It runs through the packaging area and extends to the binding area, and a hollow area is formed on the metal signal line. The first orthographic projection formed by the hollow area on the base substrate is located in the packaging area, and the second orthographic projection formed by the shielding layer on the base substrate The first orthographic projection is partially covered, and a slit for diffracting is formed between the third orthographic projection and the second orthographic projection of the metal signal line in the packaging area formed on the base substrate. The setting of the slit for diffraction reduces the size requirements of the hollow area, thereby reducing the resistance of the metal signal line, reducing the power consumption of the metal signal line, and ensuring the array substrate and the products made of the array substrate. performance.
Description
Technical Field
The invention relates to the technical field of display, in particular to an array substrate, a display panel and a packaging method of the display panel.
Background
The upper and lower substrates of the display panel can be packaged and fixed by packaging glue, and then the packaging glue is irradiated and cured by UV light and the like. However, on the lower substrate, such as an array substrate of a liquid crystal display, metal signal lines are usually arranged to extend from the display region through the encapsulation region to the bonding region, where the encapsulation region is a region for coating the encapsulation adhesive for encapsulation and fixation, and when the sealant is cured, the irradiation light is shielded by the metal signal lines, which affects the curing of the shielded encapsulation adhesive.
To improve the curing of the blocked encapsulation adhesive, currently, as shown in fig. 1, a hollow-out region 111 is formed on the metal signal line 11 penetrating through the encapsulation region. During curing, the UV light can irradiate the packaging adhesive through the hollow area on the metal signal line, so that the packaging adhesive in the hollow area is cured.
In order to meet the requirement of curing rate of the packaging adhesive, a part of the metal signal lines needs to be provided with a hollow area with a larger size, however, the arrangement of the hollow area with the larger size can increase the resistance of the metal signal lines, which leads to increase of power consumption of the metal signal lines, so that the local heating of the device is serious, and the performance of the product is affected.
Disclosure of Invention
The invention provides an array substrate, which comprises a substrate, and a metal signal line and a shielding layer which are formed on the substrate, wherein a hollow area is formed on the metal signal line in a packaging area, the shielding layer partially covers the hollow area, and a slit for diffraction is formed between the metal signal line and the shielding layer.
On one hand, the array substrate is provided and is sequentially divided into a display area, a packaging area and a binding area from inside to outside, and comprises a substrate, and a metal signal line and a shielding layer which are formed on the substrate;
the metal signal line penetrates through the packaging area from the display area and extends to the binding area, a hollow area is formed on the metal signal line, a first orthographic projection of the hollow area formed on the substrate base plate is located in the packaging area, a second orthographic projection part formed on the substrate base plate by the shielding layer covers the first orthographic projection, and a slit used for diffraction is formed between a third orthographic projection formed on the substrate base plate by the metal signal line in the packaging area and the second orthographic projection.
Further, a plurality of equally spaced and equally wide slits are formed between the third orthographic projection and the second orthographic projection in the packaging area.
Furthermore, the number of the hollow-out areas is multiple, and two slits are arranged in the first orthographic projection area corresponding to each hollow-out area.
Further, the metal signal line and the gate layer in the display area are formed on the same layer; the shielding layer and the gate insulating layer or the source/drain electrode layer in the display area are formed in the same layer.
Furthermore, the metal signal line and the source drain electrode layer in the display area are formed in the same layer;
the shielding layer and the grid electrode layer or the grid electrode insulating layer in the display area are formed at the same layer.
On the other hand, the display panel comprises an upper substrate and a lower substrate, wherein the lower substrate is the array substrate.
Further, when the metal signal line is provided with a plurality of hollow areas, the width of the slit is in direct proportion to the wavelength of light for curing, and in direct proportion to the ratio of the thickness between the upper substrate and the lower substrate to the slit interval.
In another aspect, a method for packaging a display panel is also provided, the method including:
forming a lower substrate and an upper substrate, wherein the lower substrate is the array substrate;
coating packaging glue on the packaging area, and arranging the upper substrate and the lower substrate on the box;
and irradiating and curing the packaging adhesive, wherein the light rays for curing are diffracted when passing through the slit, so that the packaging adhesive shielded by the metal signal lines is cured.
Further, the forming the lower substrate includes:
forming a first metal layer on a substrate;
patterning the first metal layer to form the metal signal line and a gate layer of the display area, wherein a hollow area is formed on the metal signal line in the packaging area;
forming a second metal layer or an insulating layer;
patterning the second metal layer to form the shielding layer of the packaging area and a source drain electrode layer of the display area; or patterning the insulating layer to form the shielding layer of the encapsulation region.
Further, the forming the lower substrate includes:
forming a first metal layer or an insulating layer on a substrate;
patterning the first metal layer to form a gate layer of the display region and a shielding layer of the packaging region, or patterning the insulating layer to form a shielding layer of the packaging region;
forming a second metal layer;
and patterning the second metal layer to form the metal signal line and the source drain electrode layer of the display area, wherein a hollow area is formed on the metal signal line in the packaging area.
Compared with the prior art, the invention has the following advantages:
the embodiment of the invention provides an array substrate, a display panel and a packaging method thereof. The array substrate comprises a substrate base plate, and a metal signal line and a shielding layer which are formed on the substrate base plate, wherein a hollow area is formed on the metal signal line in the packaging area, the shielding layer partially covers the hollow area, and a slit for diffraction is formed between the metal signal line and the shielding layer. Because the light is diffracted when passing through the slit, the diffracted light can irradiate the packaging adhesive shielded by the metal signal line, and the requirement of the curing rate of the packaging adhesive can be met only by arranging a small-sized hollow area, so that the resistance of the metal signal line is reduced, the power consumption of the metal signal line is reduced, the heat productivity of the array substrate is reduced, and the performance of a product made of the array substrate is ensured.
Drawings
Fig. 1 is a schematic structural diagram of an array substrate in the prior art;
fig. 2 is a schematic view of a first structure of an array substrate according to an embodiment of the present invention;
fig. 3 is a schematic view of a second structure of the array substrate according to the embodiment of the invention;
fig. 4 is a schematic diagram of a third structure of an array substrate according to an embodiment of the present invention;
fig. 5 is a schematic diagram of a fourth structure of the array substrate according to the embodiment of the invention;
fig. 6 is a flowchart of a packaging method of an array substrate according to an embodiment of the present invention.
Description of the reference numerals
11. Metal signal line 111, hollow area a, display area
b. Packaging area c, binding area d and slit
2. Lower substrate 21, metal signal line 22, shielding layer
211. Hollow area 3, upper substrate
Detailed Description
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in further detail below.
In the description of the present invention, "a plurality" means two or more unless otherwise specified; the terms "upper", "lower", "left", "right", "inner", "outer", and the like, indicate orientations or positional relationships based on those shown in the drawings, and are only for convenience in describing and simplifying the description, but do not indicate or imply that the machine or element being referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus, should not be construed as limiting the present invention.
In the description of the present invention, it should be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; can be mechanically or electrically connected; may be directly connected or indirectly connected through an intermediate. The specific meanings of the above terms in the present invention can be understood in specific cases to those skilled in the art.
The following detailed description of embodiments of the invention is provided in connection with the accompanying drawings and examples. The following examples are intended to illustrate the invention but are not intended to limit the scope of the invention.
The embodiment of the invention provides an array substrate. As shown in fig. 2 to 5, the array substrate provided in the embodiment of the present invention may be sequentially divided into a display area a, a package area b, and a bonding area c from inside to outside, and the array substrate includes a substrate, and a metal signal line 21 and a shielding layer 22 formed on the substrate;
the metal signal line 21 penetrates through the packaging region b from the display region a and extends to the binding region c, a hollow-out region 211 is formed on the metal signal line 21, a first orthographic projection formed by the hollow-out region 211 on the substrate is located in the packaging region, a second orthographic projection formed by the shielding layer 22 on the substrate partially covers the first orthographic projection, and a slit d for diffraction is formed between a third orthographic projection and the second orthographic projection formed by the metal signal line 21 on the substrate in the packaging region b.
The array substrate provided by the embodiment of the invention can be various, for example, an array substrate in a liquid crystal display panel, an array substrate in an organic light emitting diode display panel, and the like.
The metal signal lines 21 are used for transmitting signals, the types of the metal signal lines 21 may be various, a hollow area 211 may be formed on all types of the metal signal lines 21 in the package region b of the array substrate and a corresponding shielding layer 22 is disposed, or a hollow area 211 may be formed on a part of the metal signal lines 21 and a corresponding shielding layer 2 is disposed according to the actual situation. For example, when the display panel is a liquid crystal display panel, the metal signal line 21 may be a signal line electrically connected to a gate layer in the display area a, may be a data line electrically connected to a source/drain electrode layer in the display area a, and the hollow region 211 may be formed on the signal line and the data line in the package area b, respectively.
In the field of optics, a slit d generally refers to a narrow and slender slit hole, and light rays are diffracted when passing through the slit d, deviate from a straight propagation path and irradiate a larger target area. The slit d has various forms, such as a fixed slit, an asymmetric slit with one side adjustable, a symmetric slit with two sides adjustable, and the like.
The slit d in the embodiment of the present invention is formed by the orthographic projection of the shielding layer 22 on the substrate and the orthographic projection of the hollow region 211 of the metal signal line 21 on the substrate. The hollow-out region 211 plays a role in light transmission, and parameters such as the size, the shape and the number of the hollow-out region 211 can be set according to actual conditions. The shielding layer 22 plays a role of shielding light and forming a slit d with the metal signal line 21, and is made of a light-proof material, and parameters such as size, material, shape, number and the like of the shielding layer can be set according to the actual situation.
Based on the arrangement of the metal signal line 21 formed with the hollow area 211 and the arrangement of the shielding layer 22, the array substrate is provided with a slit d in the hollow area 211, when light irradiates on the metal signal line 21 in the packaging area b of the array substrate, the light is diffracted when passing through the slit d, and because the light is diffracted when passing through the slit d, the diffracted light can irradiate on packaging glue shielded by the metal signal line 21, so that the requirement on the curing rate of the packaging glue can be met only by arranging the hollow area 211 with a smaller size, the resistance of the metal signal line 21 is reduced, the power consumption of the metal signal line 21 is reduced, the heat productivity of the array substrate is reduced, and the performance of a product made of the array substrate is ensured.
For example, a plurality of equal-sized and equal-spaced hollow-out regions 211 or a plurality of unequal-spaced hollow-out regions 211 may be formed on the metal signal line 21 in the package region b according to the size and number of the hollow-out regions 211 actually disposed on the metal signal line 21.
Each hollow-out region 211 is provided with a shielding layer 22, and a corresponding slit d can be formed according to the relative position of the shielding layer 22 and the hollow-out region 211. For example, for each hollow-out region 211, the shielding layer 22 is located in the center of the hollow-out region 211, the hollow-out region 211 is formed with two slits d in the first orthographic projection region formed on the substrate, and the two slits d may be located on two sides of the shielding layer 22 and have the same or different sizes.
The formation manner of the shielding layer 22 is various, for example, one of the formation manners is that the shielding layer 22 may be formed in the same layer as other layer structures of the array substrate, specifically, when the array substrate is an array substrate, the shielding layer may be formed in the same layer as the gate insulating layer or the source/drain electrode layer in the display area a, and the metal signal line 21 is formed in the same layer as the gate layer in the display area a, and the structure is as shown in fig. 5, or the shielding layer 22 may be formed in the same layer as the gate layer or the gate insulating layer in the display area a, and the metal signal line 21 is formed in the same layer as the source/drain electrode layer in the display area a, and the structure is as shown in; alternatively, the shielding layer 22 may be generated by a separate process. Regarding the forming manner, material and size of the shielding layer 22, the embodiment of the invention is not limited herein, and all that the shielding layer 22 can shield the light emitted from the hollow area 211 is required. The shielding layer 22 is formed simultaneously with other layer structures of the array substrate, so that the manufacturing process of the array substrate can be reduced, the manufacturing efficiency of the array substrate is improved, and the manufacturing cost of the array substrate is reduced.
The embodiment of the invention also provides a display panel, which comprises an upper substrate and a lower substrate, wherein the lower substrate is the array substrate provided by the embodiment of the invention. The array substrate display panel has the advantages of an array substrate. The types of the lower substrates can be various, and different types of display panels can be manufactured based on different types of the lower substrates. For example, when the lower substrate is an array substrate in a liquid crystal display panel and the upper substrate is a color film substrate, the liquid crystal display panel is manufactured by using the lower substrate.
When the display panel is assembled, firstly, coating packaging glue on a packaging area b of a lower substrate, secondly, aligning a lower substrate and an upper substrate with a box, thirdly, irradiating the packaging glue such as UV packaging glue by using light such as UV curing light, so that the packaging glue is cured, and the lower substrate and the upper substrate are packaged and fixed, wherein the light is emitted from one side of the lower substrate. Based on the arrangement of the hollow-out region 211 on the metal signal line 21 in the packaging region b of the lower substrate and the arrangement of the shielding layer 22 in the packaging region b, light irradiated to the lower substrate is diffracted at the slit d formed according to the hollow-out region 211 and the shielding layer 22, the diffracted light is irradiated to the packaging adhesive shielded by the metal signal line 21, and the shielded packaging adhesive is cured, so that the curing rate requirement of the packaging adhesive is met, and the display panel with a better packaging effect is obtained.
Illustratively, a display panel is provided, and the specific structure is shown with reference to fig. 2 to 5. The display panel shown in fig. 2 to 5 includes a lower substrate 2 and an upper substrate 3, the lower substrate B includes a metal signal line 21 and a shielding layer 22, the metal signal line 21 is provided with a plurality of hollow areas 211, in a line body direction of the metal signal line 21, the size of each hollow area 211 is equal to the distance between two adjacent hollow areas 211, for each hollow area 211, the shielding layer 22 is disposed at the center of the hollow area 211, and an orthogonal projection of the shielding layer 22 on the substrate and an orthogonal projection of the metal signal line 21 on the substrate form two slits d with the same size. The present example assumes that the curing rate of the encapsulation adhesive of the array substrate in the display panel is required to be 60%.
In fig. 2 and 3, reference symbol S denotes the total area of the package adhesive; reference numeral S1 denotes a curing area; reference numeral S2 denotes an uncured area; reference character a denotes 1/2 slot spacing; reference character C denotes a slit width; reference symbol B denotes a thickness between the lower substrate and the upper substrate; reference B1 denotes the uncured zone height; reference number θ 1 denotes a central bright line irradiation angle; reference symbol θ 2 denotes an unirradiated angle; the reference λ denotes the wavelength of the ultraviolet light; reference numeral D denotes a package paste width. In practice, when the upper substrate is a color filter substrate, the reference symbol B indicates the thickness of the liquid crystal layer between the array substrate and the color filter substrate.
In order to meet the requirement of 60% of curing rate of the packaging adhesive, the display panel is designed in size.
1) And obtaining the following components according to the curing rate of the packaging adhesive of 60 percent: S1/S is 0.6, S2/S is 0.4.
2) S2 is calculated using two ways, resulting in: S2-1/2A · B1-0.4A · B, and B1-0.8B.
3) And obtaining the following result according to an angle calculation formula: tan θ 2 ═ B1/a ═ 0.8B/a, θ 2 ═ arctan (0.8B/a), θ 1 ═ 90 ° -arctan (0.8B/a).
4) And the width of the central diffraction bright fringe is the distance between the two first dark fringes and is obtained according to a first dark fringe calculation formula: c · Sin θ 1 ═ K λ ═ λ, where K is the dark fringe order.
5) And substituting the theta 1 obtained in the step 3) into the calculation formula obtained in the step 4) to obtain: c ═ λ/Sin θ 1 ═ λ/Sin [90 ° -arctan (0.8B/a) ].
6) Based on the formula of 5), the slit width C is proportional to the wavelength λ of the ultraviolet light for curing and proportional to the ratio (B/a) of the thickness between the lower and upper substrates and the slit pitch of 1/2, and then the ratio of the thickness between the lower and upper substrates and the slit pitch is derived. When the display panel is fixed, B is fixed and λ is fixed, the relationship between C and A can be derived.
In practice, after the requirement of the curing rate of the packaging adhesive of the display panel, the thickness between the lower substrate and the upper substrate, and the wavelength of the curing light are determined, the slit width and the 1/2 slit distance can be determined through the formula obtained in step 5, that is, the slit width and the slit distance are determined, and then the number of the slits is determined according to the width of the packaging adhesive, so that the specific structure of the metal signal line 21 in the packaging area b is determined, and the design is completed.
For example, in a display panel, a thickness between a lower substrate and an upper substrate is 3.5 μm, a width of an encapsulation adhesive is 1.0mm, a wavelength λ of ultraviolet curing light is 380nm, when a slit is provided in a size of 2A to 5 μm, a slit width C is 0.38/Sin [90 ° -arctan (0.8 × 3.5/2.5) ] is 0.6 μm, that is, in a line direction of a metal signal line, a size of a hollow area is 5 μm, a distance between two adjacent hollow areas is 5 μm, two slits having a slit width of 0.6 μm are provided in each hollow area, and a size of a shielding layer corresponding to the hollow area is calculated to be 3.8mm, where a hollow area proportion of an encapsulation area metal signal line is 50%, a conduction area proportion of the metal signal line is 50%, and a curing rate of the encapsulation adhesive of the display panel can reach 60%.
In the prior art, the curing light is linearly transmitted to the packaging adhesive, and in order to meet the requirement of 60% of the curing rate of the packaging adhesive of the display panel, a hollow area with a larger size is formed on the metal signal line, the hollow area accounts for 60%, and the conducting area accounts for 40%.
The comparison shows that, under the same requirement of the packaging curing rate, in the display panel provided by the application, only a small-sized hollow area needs to be arranged on the metal signal line, the conducting area occupation ratio of the metal signal line is higher than that in the prior art, the resistance of the metal signal line is smaller, the power consumption is lower, the heat productivity of the product is less, and the product performance is better.
The embodiment of the invention also provides a packaging method of the display panel. As shown in fig. 6, the method for packaging a display panel according to an embodiment of the present invention includes:
And 103, irradiating and curing the packaging adhesive, wherein the light rays for curing are diffracted when passing through the slit, so that the packaging adhesive shielded by the metal signal lines is cured.
By using the packaging method provided by the embodiment of the invention, the lower substrate and the upper substrate can be packaged, the array substrate with better packaging effect is obtained, and the display panel with excellent performance is obtained.
When the lower substrate of the package is an array substrate, the forming of the lower substrate may include:
forming a first metal layer on a substrate;
patterning the first metal layer to form a metal signal line and a gate layer of the display area, wherein a hollow area is formed on the metal signal line in the packaging area;
forming a second metal layer or an insulating layer;
patterning the second metal layer to form a shielding layer of the packaging area and a source drain electrode layer of the display area; or patterning the insulating layer to form a shielding layer of the encapsulation region.
When the lower substrate of the package is an array substrate, the step of forming the array substrate may include:
forming a first metal layer or an insulating layer on a substrate;
patterning the first metal layer to form a gate layer of the display region and a shielding layer of the packaging region, or patterning the insulating layer to form a shielding layer of the packaging region;
forming a second metal layer;
and patterning the second metal layer to form a metal signal line and a source drain electrode layer of the display area, wherein a hollow area is formed on the metal signal line in the packaging area.
In order to make the manufacturing process of the display panel provided by the embodiment of the present invention more clearly understood by those skilled in the art, the manufacturing process of the display panel will now be described with reference to the exemplary embodiments in the above examples.
It should be noted that, in the present embodiment, a gate line in a display panel is taken as an example for manufacturing and description, and other metal signal lines such as a source drain line, a common electrode line, and the like are also applicable.
The manufacturing method of the display panel provided by the example comprises the following steps:
the method comprises the steps of firstly, forming a first metal layer on a substrate, simultaneously forming a grid layer and a metal signal line of a display area through a composition process, wherein hollow-out areas are formed on the metal signal line, the width of each hollow-out area is 5 micrometers, and the distance between every two adjacent hollow-out areas is 5 micrometers.
And secondly, manufacturing a grid line or a source drain electrode line with the width of 3.8 mu m at the hollow area, overlapping the center of the Grid (GI) line or the source drain electrode (SD) line with the center of the hollow area, forming two slits with the width of 0.6 mu m by the projection of the GI line or the SD line on the substrate and the projection of the grid layer on the substrate, and finishing the preparation of the lower substrate through other operations.
And thirdly, irradiating the packaging area of the lower substrate and the upper substrate by using UV light, wherein the UV light is diffracted when being irradiated to the slit in the packaging area, the amount of packaging glue irradiated by the diffracted light is 60 percent of the total amount of the packaging glue, the packaging glue is equivalent to the existing product, and the conducting area of the gate line in the packaging area accounts for 50 percent and is higher than 40 percent of the existing product.
The embodiments in the present specification are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other.
The array substrate, the display panel and the packaging method of the display panel provided by the invention are described in detail, and the principle and the implementation mode of the invention are explained by applying specific examples, and the description of the examples is only used for helping to understand the method and the core idea of the invention; meanwhile, for a person skilled in the art, according to the idea of the present invention, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present invention.
Claims (10)
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| JP4342428B2 (en) * | 2004-07-15 | 2009-10-14 | シャープ株式会社 | Liquid crystal display panel and manufacturing method thereof |
| KR101326594B1 (en) * | 2006-12-15 | 2013-11-07 | 삼성디스플레이 주식회사 | Display apparatus |
| JP2013257475A (en) * | 2012-06-14 | 2013-12-26 | Japan Display Inc | Liquid crystal display device |
| CN103048828A (en) * | 2012-12-31 | 2013-04-17 | 友达光电股份有限公司 | Liquid crystal display device |
| CN104298016A (en) * | 2014-10-28 | 2015-01-21 | 合肥鑫晟光电科技有限公司 | Array substrate, preparing method of array substrate, display panel and display device |
| KR102348373B1 (en) * | 2015-06-25 | 2022-01-06 | 엘지디스플레이 주식회사 | Liquid crystal display device |
| CN105097843B (en) * | 2015-08-18 | 2018-10-19 | 京东方科技集团股份有限公司 | Array substrate and preparation method thereof, display device |
| CN106019728A (en) * | 2016-07-29 | 2016-10-12 | 京东方科技集团股份有限公司 | Display substrate, display panel and preparation method thereof and display device |
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| CN107357092A (en) * | 2017-07-25 | 2017-11-17 | 深圳市华星光电技术有限公司 | A kind of display panel and its manufacture method |
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