CN108352355B - 具有预模制双引线框的半导体系统 - Google Patents
具有预模制双引线框的半导体系统 Download PDFInfo
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- CN108352355B CN108352355B CN201680062703.4A CN201680062703A CN108352355B CN 108352355 B CN108352355 B CN 108352355B CN 201680062703 A CN201680062703 A CN 201680062703A CN 108352355 B CN108352355 B CN 108352355B
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Abstract
在所描述实例中,一种用于半导体系统的双引线框(100)包含:具有由第一间隙分离的第一金属区域的第一引线框(110),所述第一金属区域包含具有减小的厚度和选定第一位置中的接合供应品的部分;以及具有由第二间隙分离的第二金属区域的第二引线框(120),所述第二金属区域包含具有减小的厚度和与所述第一位置匹配的选定第二位置中的接合供应品(150)的部分。所述第二引线框(120)堆叠于所述第一引线框(110)的顶部上,且匹配的所述第二位置与所述第一位置的接合供应品被链接在一起。所得双引线框(100)能够进一步包含绝缘材料(140),绝缘材料(140)填充所述第一间隙和所述第二间隙和具有减小的厚度的所述区域部分,并具有与顶部和底部金属表面共面的绝缘表面。
Description
技术领域
本文大体上涉及半导体装置和工艺,且更具体地说,涉及具有预模制堆叠且配对的双引线框的半导体系统的结构和工艺。
背景技术
电子产品在其核心处具有印刷电路板,印刷电路板装配并互连特定产品中所需的半导体装置、无源组件、控制装置、电力供应器与显示装置。当今,数目增大的这些电子产品,例如手持式无线电话、智能电话、电子相机、光源、电力供应器、携带型计算机和汽车和飞机中的控制和传感器,正经受市场趋势,市场趋势需要持续地缩小产品轮廓和重量,且因此,由板需要的大小、空间和重量非常需要。同时,对更高的速度和更大的功率的电气产品需要正变得越来越苛刻。
为了缩小板轮廓,当前技术聚焦于减小由板上装配的每个个别部件消耗的板面积;举例来说,人们正共同努力缩小半导体装置和无源组件的封装。而且,广泛地实践对集成电路芯片和无源组件的堆叠。但是,越来越难以提供足够的热导体来耗散所产生热,并提供高密度的迹线来路由信号并传导高电流。冲突性要求也对于金属引线框变得越来越严格:一个产品要求针对信号引线的不断更紧密的密度,另一产品要求针对更强的功率引线和面积以进行热耗散。作为实例,对半蚀刻引线的路由受到框厚度限制。通过薄的半蚀刻引线框,细线和密集间隔在技术上是可能的,但引线框会变得过于脆弱而无法处置。
对于内插物,除具有导线键合和倒装芯片组合件的塑料和陶瓷衬底以外,还已使用了嵌入式结构。在这些结构中,芯片已插入并电连接到多金属层衬底中,多金属层衬底可充当整个结构或充当内插物。虽然这些嵌入式结构可满足电气和热要求并不需要镀敷厚金属层,但是它们经受翘曲并需要昂贵的制造序列。
发明内容
在所描述实例中,一种用于半导体系统的双引线框包含在匹配接点处链接在一起的第一引线框与第二引线框。一个或两个引线框可包含半蚀刻部分,以使得一或多个半导体芯片和无源电子组件可嵌入于由所述半蚀刻部分提供的空间中。另一实施例是一种用于通过对准并链接引线框来制造双引线框的方法。
另一实施例是一种由绝缘材料囊封的双引线框,所述绝缘材料例如模制化合物。所述绝缘材料填充所述引线框内和所述引线框之间的任何开放空间,并形成与金属引线框表面共面和交替的绝缘表面。
另外的其它实施例是基于双引线框的半导体模块或系统。在一个系统中,一种预模制双引线框具有附接到表面的一或多个无源组件,例如电感器。在另一系统中,在所装配模块囊封于模制化合物中之前,在顶部引线框的表面上附接一或多个半导体芯片。在又一系统中,在所装配模块囊封于模制化合物中之前,一或多个半导体芯片和无源组件嵌入于所述双引线框之间的空间中,且额外的无源组件附接到模块表面。
附图说明
图1展示双引线框的透视图作为实例实施例;顶部引线框中的用于链接对准的引线框的接点供应品可见。
图2是已通过图案化、部分薄化、并以共面表面的绝缘材料填充金属迹线之间的间隙来处理平片金属之后的引线框的部分的横截面。
图3展示在具有共面表面的绝缘材料中囊封双引线框之后的图1的双引线框的顶部表面的透视图。
图4展示在具有共面表面的绝缘材料中囊封双引线框之后的图1的双引线框的底部表面的透视图。
图5说明穿过双引线框的部分的横截面,其展示穿过具有金属镀敷壁以链接对准的顶部与底部引线框的顶部引线框的通孔。
图6A展示在对准之后但在链接之前的穿过双引线框的顶部和底部引线框的部分的横截面,底部引线框的接点供应品提供空腔,且顶部引线框的接点供应品提供可在压力下变形的突出物。
图6B展示链接之后的穿过双引线框的顶部和底部引线框的部分的横截面,链接的接点展示在空腔中对准且在压力下变形的突出物。
图7A展示在对准之后但在链接之前的穿过双引线框的顶部和底部引线框的部分的横截面,底部引线框的接点供应品提供具有一层可焊金属的空腔,且顶部引线框的接点供应品提供具有可焊表面且可在压力下变形的突出物。
图7B展示链接之后的穿过双引线框的顶部和底部引线框的部分的横截面,链接的接点展示变形且与空腔中的金属层焊接的突出物。
图8A展示在对准之后但在链接之前的穿过双引线框的顶部和底部引线框的部分的横截面,底部引线框的接点供应品提供具有一层焊膏的空腔,且顶部引线框的接点供应品提供具有可焊表面且可在压力下变形的突出物。
图8B展示链接之后的穿过双引线框的顶部和底部引线框的部分的横截面,链接的接点展示浸没于焊膏中、变形、浸没于膏中且与膏焊接的突出物。
图9说明穿过双引线框的顶部和底部引线框的部分的横截面,其概述图6A到8B中描述的链接方法。
图10A展示包含预模制双引线框的模块的透视图,其中半导体芯片附接到顶部模块表面。
图10B描绘图10A的模块的透视图,其中额外电感器附接到顶部模块表面。
图11A描绘对于半导体系统自定义的双引线框的透视图。
图11B说明包含图11A的双引线框和附接到双引线框的顶部表面的半导体芯片的系统的透视图;塑料材料的封装可囊封所述系统并填充配对的引线框的间隙。
图12展示双引线框的部分的横截面,以说明在使引线框配对并在绝缘复合物中囊封配对的框之前在由半蚀刻引线提供的空间中嵌入半导体芯片或无源组件的技术。
图13展示双引线框的部分的横截面,以说明在使引线框配对并在绝缘复合物中囊封配对的框之前在由半蚀刻引线提供的空间中嵌入半导体芯片或无源组件的另一技术。
图14A展示双引线框的部分的横截面,以说明在使引线框配对之前在由半蚀刻引线提供的空间中嵌入半导体芯片或无源组件的又一技术。
图14B展示在使引线框配对并在塑料封装中囊封系统之后的图14A的双引线框部分的横截面。
图15A描绘对于半导体系统自定义包含嵌入式芯片的另一双引线框的透视图。
图15B说明包含图15A的双引线框和附接到双引线框的顶部表面的无源组件的系统的透视图;塑料材料的封装可囊封所述系统并填充配对的引线框的间隙。
具体实施方式
为了通过分布功能来克服技术瓶颈,通过使专用于信号路由的第一引线框与专用于配电和热耗散的第二引线框配对,可解决在不断密集的引线中路由更高信号(同时又在不断更稳固的引线中传导更多功率)的当今的冲突的引线框要求,只要这两个引线框具有链接两个引线框的接点即可。
通过半蚀刻某些匹配引线,可产生充足的空间,充足的空间允许:嵌入半导体芯片和电子组件;并因此去除例如夹片和导线等元件而不牺牲其功能。此方法显著地减小系统高度,且此方法增强整个模块的稳固性和可靠性。而且,通过制造具有分布功能的组合的模块并去除元件而不牺牲其功能,可实现降低的产品成本。
图1说明本发明的包含双引线框的一般表示为100的半导体模块的实施例。模块100的双引线框包含堆叠在第二引线框120的顶部上的第一引线框110;第一引线框110还被称作顶部引线框,且第二引线框120还被称作底部引线框。引线框包含金属区域和间隙的图案,所述图案表示引线框的引线和衬垫。通常从具有给定厚度的金属平片冲压或蚀刻引线框图案。优选地,平片具有高电导率,并且是选自包含以下各项的群组的金属:铜、铜合金、铝、铁镍合金和KovarTM。当薄片由铜制成时,金属薄片的优选给定或起始厚度可介于100μm与300μm之间。对于图1的实例实施例,第一引线框的图案主要提供组合件衬垫、功率路由和热能耗散,而第二引线框的图案主要提供电信号路由。
在图1中,第一引线框110展示为具有被称作第一厚度的起始厚度111。为了清晰起见,在图2中放大了引线框110的部分以更详细地描绘一些金属区域和间隙(在图2中,间隙装填有绝缘材料200,而在图1中间隙仍未填充)。虽然一些金属区域始终展现第一厚度111,但是其它区域包含第一厚度111的部分和第二厚度112的部分,第二厚度112小于第一厚度。具有减小厚度的这些部分优选地通过起始金属的蚀刻工艺制成,并因此常常被称作半蚀刻引线框部分。
应指出,具有第二厚度的金属区域可与具有第四厚度的匹配金属区域对准,以使得可产生适合于嵌入电子组件或无源组件的空间,电子组件例如半导体芯片、半导体装置,例如微机电系统(micro electro mechanical system,MEMS)。
在被称作第一位置的位置中,第一厚度111的引线框部分可包含用于接点的供应品,需要接点以使第一引线框110与第二引线框120配对(见下文描述的接点)。
参考图1,第二引线框120包含由第二间隙分离的第二金属区域的图案。一些第二区域包含第三厚度121(第二引线框的原始厚度)的部分和小于第三厚度121的第四厚度122的部分。对于一些模块,第三厚度121可与第一厚度111相同,在其它模块中,第一厚度可大于第三厚度。第三厚度部分包含用于选定第二位置中的接点的供应品,第二位置与第一位置匹配。
如图1展示,第二引线框120与第一引线框110对准且堆叠在第一引线框110的顶部上。如下文所描述,两个引线框的接点供应品通过使被链接在一起的第二位置与第一位置的接点匹配来允许使引线框配对。所得双引线框具有顶部表面120a、底部表面110a和等于第一厚度与第三厚度的总和的厚度131。
图1指示双引线框可囊封于绝缘材料的封装140中。优选的囊封材料是聚合性模制化合物,例如热固性环氧树脂调配物。在囊封工艺期间,绝缘材料填充间隙和小于第一和第三厚度的区域部分。所得复合引线框具有与双引线框的底部和顶部金属表面(分别是110a和120a)共面的绝缘表面。因此,复合引线框展现具有交替的金属区域与绝缘区域的表面。
图3和4描绘已囊封双引线框的顶部表面(图3)和底部表面(图4)的透视图。标示了金属区域(分别是120a和110a);绝缘区域与相应金属区域共面。图3表明顶部引线框的信号路由的功能,且图4表明底部引线框的功率路由和热能耗散的功能。
图1展示双引线框的顶部表面上可见的位置150,其中设置了用于链接顶部与底部引线框的稳固接点。图5说明这种具体种类的接点的横截面。第一(底部)引线框被指定为110,第二(顶部)引线框被指定为120。引线框110包含第一位置113,第一位置113优选地具有对金属具有高亲和性的表面,金属可镀敷到通孔123的壁上。引线框120包含由通孔123表示的第二位置。通孔123的第二位置与第一位置113匹配。通孔123延伸穿过第二(顶部)引线框的完全(第三)厚度121;通孔的侧壁123a对那些金属151具有亲和性,金属151可作为层镀敷到通孔123的壁上。
在制造已囊封双引线框的流程中,工艺的序列包含:将通孔蚀刻到第二引线框中;使第二引线框与第一引线框对准以使第一位置与第二位置匹配;将双引线框放置于模具中以使得模具盖板平躺于顶部表面上以使通孔保持打开;在绝缘复合物中囊封双引线框,同时填充引线框间隙和薄化区域部分;以及将金属层151镀敷到通孔123的壁上,由此以导电方式使第二引线框与第一引线框配对。
在图6A和6B中说明使第二引线框120与第一引线框110配对的另一种类的接点。视情况,被称作第一或底部引线框的引线框110可能已在引线框表面的面朝引线框120的第一位置中收纳空腔或凹痕或凹槽610。用于产生空腔610的优选技术是冲压;替代地,可应用模压或蚀刻技术。被称作第二或顶部引线框的引线框120已收纳金属突出物620,当在正交于引线框120的方向630上施加机械压力时,金属突出物620可变形;突出物620在与第一位置匹配的第二位置中。还被称作凹坑或凹口的突出物620优选地通过模压形成;替代地,可使用冲压技术。
在已囊封双引线框的制造流程中,工艺的序列包含:在第一引线框的第一位置中形成空腔,并在第二引线框的第二位置中形成突出物;使第二引线框与第一引线框对准以匹配第一位置与第二位置(见图6A);将压力施加到第二引线框上以触摸第一引线框并使突出物变形,并将突出物按压到空腔中(见图6B中的变形突出物620a);视情况,可在高温下施加压力;以及将双引线框放置于模具中以来在绝缘复合物中囊封配对的引线框,同时填充引线框间隙和薄化区域部分。
在图7A和7B中说明了用于使第二引线框120与第一引线框110配对的相关种类的接点和方法。被称作第一或底部引线框的引线框110已在引线框表面的面朝引线框120的第一位置中收纳空腔或凹痕或凹槽710。用于产生空腔710的优选技术是冲压;替代地,可应用模压或蚀刻技术。锡或另一种焊料合金的层711选择性地镀敷到空腔710的底部上。被称作第二或顶部引线框的引线框120已收纳金属突出物720,当在正交于引线框120的方向730上施加机械压力时,金属突出物720可变形;突出物720在与第一位置匹配的第二位置中。也被称作凹坑或凹口的突出物720优选地通过模压形成;替代地,可使用冲压技术。突出物720的凸表面720a优选地具有有利于焊接的冶金配置。
在已囊封双引线框的制造流程中,工艺的序列包含:在第一引线框110的第一位置中形成空腔710,并在第二引线框120的第二位置中形成突出物720;使第二引线框与第一引线框对准以匹配第一位置与第二位置(见图7A);将压力施加到第二引线框上,直到其触摸第一引线框并使突出物变形为止,并将突出物按压到空腔的锡层711上(见图7B);使温度升高以回焊锡或焊料合金;以及将双引线框放置于模具中以来在绝缘复合物中囊封配对的引线框,同时填充引线框间隙和薄化区域部分。
在图8A和8B中说明了用于使第二引线框120与第一引线框110配对的另一相关种类的接点和方法。在引线框110的空腔810中选择性地印刷的材料是焊膏811。顶部引线框120已收纳金属突出物820,当在正交于引线框120的方向830上施加机械压力时,金属突出物820可变形;突出物820的位置与空腔810的位置匹配。突出物820的凸表面820a可具有有利于焊接的冶金配置。
在已囊封双引线框的制造流程中,工艺的序列包含:在第一引线框110的第一位置中形成空腔810,并在第二引线框120的第二位置中形成突出物820;使第二引线框与第一引线框对准以匹配第一位置与第二位置(见图8A);将压力施加到第二引线框上,直到其触摸第一引线框并使突出物变形为止,并将突出物按压到空腔的焊膏层811上(见图8B);使温度升高以回焊焊膏;以及将双引线框放置于模具中以来在绝缘复合物中囊封配对的引线框,同时填充引线框间隙和薄化区域部分。
图9描绘配对并囊封的第一引线框(110)与第二引线框(120)的部分900。配对且预模制的引线框的部分900组合上文所描述的所有四个接点设计和方法。此外,两个引线框110和120分别展现半蚀刻区域112和122。由半蚀刻工艺产生的间隙已装填有分别指定为912和922的囊封复合物。第二(顶部)引线框120包含由通孔123形成的接点,通孔123展现以金属层151镀敷的通路壁。顶部引线框120进一步包含突出物920;已通过在配对工艺期间施加的机械压力来扁平化其凸面侧,以触摸引线框。底部引线框110在与突出物920的位置匹配的位置中展现凹槽910。
有利地,预模制双引线框同时提供顶部引线框中赋予的对于信号的精密路由,以及底部引线框中赋予的功率路由和热耗散。另一技术优点是预模制双引线框在操作期间提供更高的可靠性,并相比于多级层压衬底提供加速测试;更高的可靠性是基于消除由高湿度和频繁的温度循环产生的分层。额外优点是预模制双引线框可针对多种多芯片产品自定义,包含电力转换器,同时需要更少的空间并提供大体上更低的成本。
图10A到15B展示使用预模制双引线框的半导体模块的实例实施例。在图10A中,可包含装置的半导体芯片1010倒装装配在预模制双引线框1000的顶部表面上,所述装置例如二极管、晶体管或集成电路。如图10B中所说明,可使用高支座插座1030来在芯片1010上方直接安装电感器1020(在此实例中,用于安装的顶部引线框引脚服务装置的交换节点终端)。有利地,回焊附接焊料必需的多个工艺可组合成单个工艺步骤。
图11A和11B以及图15A和15B说明以下实施例:在整个模块囊封于封装中之前在双引线框上装配有源半导体芯片和无源组件,因此组合双引线框的模制工艺与模块的模制工艺。在图11A中,顶部引线框1120与底部引线框1110对准且配对。在此实例中,优选的配对技术使用如上文所描述的压力感生接点。如图11B中所描绘,半导体芯片1131、1132和1133倒装附接到双引线框的顶部表面上的组合件衬垫上。最后,组合件囊封于模制封装1140中。如上文所陈述,在模制工艺期间,间隙和薄化的引线框部分装填有模制化合物。
有利地,通过双引线框,芯片和组件可装配在双引线框的表面上,且芯片和组件可嵌入于双引线框内部。在示意图12到14B中表明在囊封的工艺之前在由半蚀刻且对准的双引线框提供的空间中嵌入芯片和组件的技术。
图12、13、14A和14B说明在由双引线框中的一个或咯昂个引线框的对准的半蚀刻部分提供的空间中嵌入半导体芯片的技术。在图13中,第一(底部)引线框和第二(顶部)引线框由具有相等厚度的金属片制成,在图12中,引线框中的一个(第一(底部)引线框)由比第二(顶部)引线框更厚的薄片制成。
在图12中,第一(底部)引线框以金属薄片的更大厚度1211开始,以允许通过半蚀刻薄化片段1210的部分1210a,以使得具有高度1211a的空间释放得足够宽以容纳半导体芯片或组件1230。芯片(或组件)1230自身倒装装配在第二(顶部)引线框上。在装配之后,第二引线框在将第一和第二引线框配对到双引线框中的工艺期间与第一引线框对准。操作为用于配对工艺的接点的镀敷通孔被指定为1223。在对准之后,芯片或组件1230最终位于双引线框的中心内部。在后续模制工艺中,双引线框的所有留下且未填充的空间装填有绝缘材料1222,且芯片/组件1230嵌入于已模制双引线框的保护好的中心中。
在图13的实例中,顶部与底部引线框具有相等的厚度(分别是1311和1312),且使用顶部引线框来执行半蚀刻的工艺。具有高度1312a的释放空间必须充足以在顶部引线框的片段1320的薄化部分1320a上倒装装配芯片/组件1330。在后续模制工艺中,双引线框的所有留下且未填充的空间装填有绝缘材料1222,且芯片/组件1330嵌入于绝缘材料中。图13的实施例与图12的实施例的比较展示图13的嵌入技术可相比于芯片或组件1230需要芯片或组件1330的厚度略减小。
图14A和14B展示用于在模制双引线框中嵌入芯片和组件的另一技术,其中晶粒或组件同时附接到两个引线框,但不是通过倒装芯片工艺,而是替代地通过涉及焊料、锡层或导电粘合材料的工艺。在图14A中,第一引线框1410和第二引线框1420都具有半蚀刻部分,以产生附接芯片或组件1430所需的空间。第二引线框1420进一步包含通孔蚀刻1423作为接点来准备配对引线框,并包含蚀刻1424作为应力消除特征,作为用以在配对工艺期间允许引线框夹持的芯片保护技术。芯片或组件1430使用锡、焊料(需要回焊工艺)或导电粘合剂的层1450来附接到两个引线框。
在芯片附接之后,执行模制工艺,如在图14B上所说明。在模制绝缘材料1422之后,通孔获得镀敷金属层1423a。
图15B描绘与附接的电容器和电感器一体化的模制电源开关模块1500,模制电源开关模块1500是基于图15A的双引线框1501。引线框1501包含装配在引线框之间的空间中的一或多个芯片1530,并可将一或多个芯片附接到顶部表面。图15B展示附接到双引线框的顶部表面的已封装无源组件1520和1521,随后完整组合件囊封于绝缘复合物1540中。
有利地,通过消除分层,相比于多级层压物,通过双引线框的更高可靠性实现更高的可靠性的产品(例如图15B的功率转换器)。额外的技术优点是例如功率转换器等产品可基于双引线框中可用的更细路由、在由半蚀刻双引线框提供的空间中嵌入芯片的能力和并入有无源组件的能力而利用几何缩放。
实例实施例适用于包含场效应晶体管、双极晶体管、功率晶体管和集成电路的半导体芯片。其它实例实施例适用于由硅、锗化硅、砷化镓、氮化镓、产品制造中使用的任何其它III-V和II-VI复合物制成的芯片。
作为另一实例,第一引线框的底部表面,其也是双引线框的底部表面,可优选地通过焊接附接到散热器。以此方式,可进一步扩展模块的高电流和散热能力,并进一步增强的效率。
作为又一实例,例如电感器等无源组件可用于广泛多种形状(平坦形状、高形状等等)中且直接现成,从而缩短上市时间并节约成本。在所描述的实施例中可能进行修改,且其它实施例在权利要求的范围内是可能的。
Claims (25)
1.一种半导体系统,其包括:
模制双引线框,其具有表面,所述表面具有共面的金属与绝缘区域,所述双引线框包含形成于下方且与第二引线框链接的第一引线框,所述第一引线框包含具有第一金属厚度的区域和具有小于所述第一金属厚度的第二金属厚度的区域,且所述第二引线框包含具有第三金属厚度的区域和具有小于所述第三金属厚度的第四金属厚度的区域,其中所述第一引线框具有至少一个第一接合位置,且所述第二引线框具有至少一个第二接合位置;
第一有源半导体芯片,其倒装附接到所述表面的金属区域;
无源电子组件,其以导电方式附接到所述表面的金属区域;以及
电气连接件,其由所述至少一个第一接合位置接触所述至少一个第二接合位置形成。
2.根据权利要求1所述的系统,其中所述双引线框包含在具有第二厚度的金属区域与对准的具有第四厚度的金属区域之间形成空间体积的位置,所述空间体积适合于容纳第二有源半导体芯片。
3.根据权利要求2所述的系统,其中所述第一有源半导体芯片和所述第二有源半导体芯片是电源供应器转换器的晶体管和集成电路,且所述无源电子组件是所述第一芯片上方的电感器顶面。
4.根据权利要求3所述的系统,其中所述半导体芯片由选自包含以下各项的群组的材料制成:硅、锗化硅、氮化镓和砷化镓。
5.根据权利要求1所述的系统,其中所述第一接合位置是空腔且所述第二接合位置是突出物。
6.一种半导体系统,其包括:
双引线框,其包含形成于下方且与第二引线框链接的第一引线框,所述第一引线框包含具有第一金属厚度的区域和具有小于所述第一金属厚度的第二金属厚度的区域,且所述第二引线框包含具有第三金属厚度和小于所述第三金属厚度的第四金属厚度的区域;所述双引线框在所述第一引线框与所述第二引线框之间没有电子器件,其中所述第一引线框具有至少一个第一接合位置,且所述第二引线框具有至少一个第二接合位置;
至少一个半导体芯片,其附接到所述双引线框的顶部表面;以及
电气连接件,其由所述至少一个第一接合位置接触所述至少一个第二接合位置形成。
7.根据权利要求6所述的系统,其进一步包括附接到所述双引线框的顶部表面的至少一个无源电子组件。
8.根据权利要求7所述的系统,其进一步包括模制封装,所述模制封装囊封所述双引线框,同时附接至少一个半导体芯片。
9.根据权利要求6所述的系统,其中所述半导体芯片由选自包含以下各项的群组的材料制成:硅、锗化硅、氮化镓和砷化镓。
10.根据权利要求6所述的系统,其中所述第一接合位置是空腔且所述第二接合位置是突出物。
11.一种半导体系统,其包括:
双引线框,其包含形成于下方且与第二引线框链接的第一引线框,所述第一引线框包含具有第一金属厚度的区域和具有小于所述第一金属厚度的第二金属厚度的区域,且所述第二引线框包含具有第三金属厚度和小于所述第三金属厚度的第四金属厚度的区域,其中所述第一引线框具有至少一个第一接合位置,且所述第二引线框具有至少一个第二接合位置;
至少一个半导体芯片,其附接到所述双引线框的顶部表面;
所述双引线框的具有第二厚度的金属区域与具有第四厚度的金属区域对准的位置,所述位置形成适合于容纳电子组件的空间;以及
电气连接件,其由所述至少一个第一接合位置接触所述至少一个第二接合位置形成。
12.根据权利要求11所述的系统,其中所述空间中的至少一者具有附接到所述双引线框的半导体芯片,同时在囊封所述双引线框之前将所述芯片嵌入于所述双引线框内部。
13.根据权利要求11所述的系统,其中所述半导体芯片由选自包含以下各项的群组的材料制成:硅、锗化硅、氮化镓和砷化镓。
14.根据权利要求11所述的系统,其中所述第一接合位置是空腔且所述第二接合位置是突出物。
15.一种半导体系统,其包括:
第一引线框,其具有第一厚度区域和第二厚度区域且具有至少一个第一接合位置;
第二引线框,其形成于所述第一引线框上方,所述第二引线框具有第三厚度区域和第四厚度区域且具有至少一个第二接合位置;
电气连接件,其由所述至少一个第一接合位置接触所述至少一个第二接合位置形成;及
半导体器件,其电连接到所述第一引线框和所述第二引线框中的至少一者。
16.根据权利要求15所述的系统,其包括电连接到所述第一引线框和所述第二引线框中的至少一者的至少一无源电子组件。
17.根据权利要求15所述的系统,其包括模制封装,所述模制封装囊封所述第一引线框和所述第二引线框。
18.根据权利要求15所述的系统,其中所述第二厚度区域与所述第四厚度区域对准以形成所述半导体器件的空间。
19.根据权利要求18所述的系统,其中所述半导体器件位于所述第一引线框的下表面与所述第二引线框的上表面之间而电连接到所述第一引线框和所述第二引线框中的至少一者。
20.根据权利要求15所述的系统,其中所述半导体器件电连接到所述第二引线框的上表面。
21.根据权利要求15所述的系统,其中形成于所述至少一个第一接合位置与所述至少一个第二接合位置之间的所述电气连接件包括焊料合金。
22.根据权利要求15所述的系统,其中形成于所述至少一个第一接合位置与所述至少一个第二接合位置之间的所述电气连接件包括金属镀覆。
23.根据权利要求15所述的系统,其中形成于所述半导体器件与所述第一引线框和所述第二引线框中的所述至少一者的所述电气连接件包括倒装芯片键合。
24.根据权利要求15所述的系统,其中所述第二厚度小于所述第一厚度,且其中所述第四厚度小于所述第三厚度,且其中所述第二厚度以及所述第四厚度由半刻蚀工艺形成。
25.根据权利要求15所述的系统,其中所述第一接合位置是空腔且所述第二接合位置是突出物。
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