CN108350599A - The method of electrochemical polish under constant voltage mode - Google Patents

Abstract

Present invention is disclosed a kind of methods of the electrochemical polish under constant voltage mode, including：The default one constant current formula with current distribution, including multiple positions on wafer with different radii and be the preset electric current in each position；It is formulated the first wafer of polishing using constant current；The voltage of each position is detected and recorded in polishing process；Generate the constant pressure formula with voltage's distribiuting, including the voltage of multiple positions and corresponding each position record；The second wafer is polished using constant pressure formula.

Description

Method for Electrochemical Polishing in Constant Voltage Mode

technical field

The invention relates to electrochemical polishing, in particular to a method for electrochemical polishing under constant voltage mode.

Background technique

Due to the high speed and good effect of electrochemical polishing, it has been widely used in the semiconductor industry, and the constant current mode is selected in the electrochemical polishing reaction. In constant current mode, the current is constant and steady, which indicates that a constant amount of hydrogen ions reacts with the surface of the patterned wafer metal layer. When a large copper layer completely covers the patterned wafer surface, hydrogen ions will react uniformly with the copper layer on the entire wafer until the large copper layer is removed. Since the copper remaining in the patterned trenches and the barrier material (tantalum, tantalum nitride, titanium, titanium nitride, cobalt, ruthenium, etc.) do not react with the electrolyte, the concentration of hydrogen ions around the copper remaining area increases substantially , leading to depressions and the surface characteristics of copper wires are different due to different wire densities and distributions.

In constant current mode, the number of charged ions is constant independent of the patterned wafer surface features and structures. At microscale, the removal rate is uniform across the area, so the constant-current mode will cause differences in recess between features due to the non-uniform distribution of copper lines.

Contents of the invention

The invention proposes a method for improving wafer-level global depression and chip-scale microscopic depression after a semiconductor metal layer planarization process, and the method is based on the principle of electrochemical polishing.

In a specific embodiment, a method for electrochemical polishing in a constant voltage mode is proposed, including: preset a constant current recipe with a current distribution, including multiple locations with different radii on the wafer and preset for each location Polish the first wafer using a constant current recipe; detect and record the voltage at each location during polishing; generate a constant voltage recipe with a voltage distribution, including multiple locations and the voltage recorded for each location; Press the recipe to polish the second wafer.

In one specific embodiment, the current preset for the location is proportional to the radius of the location.

In a specific implementation manner, the first wafer includes a bare wafer and a metal layer on the bare wafer.

In a specific embodiment, the second wafer includes a wafer having a plurality of patterned trenches or vias and a metal layer on the wafer, and the patterned trenches or vias are filled with the metal layer.

The invention proposes an electrochemical polishing method under constant pressure mode, which overcomes the bottleneck of the prior art by introducing the automatic stop effect of constant pressure polishing.

Description of drawings

Fig. 1 is a typical device diagram of electrochemical polishing;

Figure 2 is a top view of the polished area and chip scale on the wafer;

3 is a top view of the chip scale and the area scale of the pattern structure on the wafer;

Fig. 4 is the top view of delimiting unit;

Fig. 5 is a cross-sectional view of the unit in Fig. 4 along A-A;

Fig. 6 is another cross-sectional view of the unit in Fig. 4 along A-A;

Fig. 7 is a cross-sectional view of the unit in Fig. 4 along B-B;

Fig. 8 is the depression after the electrochemical polishing treatment in the constant voltage mode;

Fig. 9 is a flowchart of the method of the present invention;

Fig. 10 is the ammeter used in the method of the present invention;

Fig. 11 is the voltmeter used in the method of the present invention

Detailed ways

The present invention will be described in detail below in conjunction with the accompanying drawings.

As shown in FIG. 1 , a typical device for electrochemical polishing includes a chuck 101 , a shower head 103 and a power source 104 , and both the chuck 101 and the shower head 103 are electrically connected to the power source 104 . The chuck 101 supports and rotates the wafer 102 during the polishing process and is used as an anode, and the shower head 103 sprays a charged electrolyte 105 on the surface of the wafer 102 and is used as a cathode, so that metal ions react with the charged electrolyte 105 and transfer to sprinkler 103. In the prior art, the power supply 104 is a constant current power supply, so the electrochemical polishing can be performed in a constant current mode. However, in the present invention, the constant current power supply is replaced by a constant voltage power supply, and the electrochemical polishing is performed in a constant voltage mode.

In the constant voltage mode of the present invention, the number of charged ions is variable, depending on the resistance of the overall polishing system. In order to explain the function of the constant pressure mode, the polishing area model is first introduced. The polishing area is located directly above the shower head 103 , and the charged electrolyte is sprayed upward from the shower head 103 .

FIG. 2 shows a top view of the polished area and chip scale on the wafer 102 . In this model, the polishing area is divided into multiple chip scales 201, each chip scale 201 includes multiple cells 202, and the size of the cells depends on the model definition, which may tend to be nanoscale. Since the charged particles are shared by these cells 202, the total amount of charged ions is equal to the sum of the charged ion amounts of each cell. Therefore, all these cells 202 can be considered to be connected in parallel, meaning that the current is shared by all cells 202 .

FIG. 3 shows a top view of a chip scale and a pattern structure area scale on a wafer. There are multiple graphic structure area scales 203 on each chip scale 201, and the unit 202 is located in the graphic structure area scale 203, and the unit 202 is enlarged as shown in FIG. 3 . Further, as shown in FIG. 4 to FIG. 7 , a top view and a cross-sectional view of the delimiting unit 202 are given.

Generally, the resistance of the electrochemical polishing system includes the resistance of the device and the resistance of the charged electrolyte. The resistance of the device can be regarded as a constant value, and the resistance of the charged electrolyte is related to the size of the polishing area.

The polishing area consists of a plurality of units 202, all connected in parallel. In order to simplify the polishing area model, the boundary effect of the charged electrolyte 105 is ignored, and the current (ie, ion concentration) is the same as the liquid resistance of the charged electrolyte 105 and uniformly distributed in the charged electrolyte 105 . In addition, for a specific unit 202, the resistance of the unit 202 is determined by the structure of the unit 202 itself.

A typical structure of the unit 202 is shown in FIGS. 4 to 7 . The unit 202 is composed of lines 401 and spaces 402 buried under the metal before the polishing process, and the lines 401 and spaces 402 are spaced apart from each other. In a specific embodiment, the metal is copper. Referring to the cross-sectional view of cell 202 along A-A, it can be seen that cell 202 includes a first copper layer 403 , a second copper layer 404 , a barrier layer 405 and a dielectric layer 406 from top to bottom. The first copper layer 403 is over the barrier layer 405 and the second copper layer 404 is within the line 401 . FIG. 6 shows another cross-sectional view of cell 202 along line A-A, where first copper layer 403 has been removed during the polishing process.

Based on previous estimates, the resistance of cell 202 can be obtained according to the following equation:

R=ρL/A=ρL/(T*W) (1)

Among them, ρ represents the resistivity of the material; L represents the length, especially the side length of the unit; A represents the cross-sectional area of the first copper layer 403 and the barrier layer 405, which is equal to T multiplied by W; T represents the first copper layer 403 and The thickness of the barrier layer 405; W represents the side width of the cell.

In some cases, if cell 202 is defined as a square with L equal to W, then equation (1) can be transformed into:

R=ρ/T (2)

The resistivity of copper is much smaller than that of the barrier layer, so the resistance of the copper layer is much smaller than that of the barrier layer 405 . In addition, according to equation (1), the resistance of the first copper layer 403 and the barrier layer 405 is inversely proportional to the cross-sectional area A, and also inversely proportional to the thickness T described in equation (2). Therefore, as the first copper layer 403 is gradually removed during the polishing process, the resistance of the polished region will become higher and higher. In this way, if the constant voltage mode is applied to the electrochemical polishing, the current will be automatically reduced, and in this way, the removal rate will be well controlled to achieve a good polishing effect. This phenomenon can be defined as the autostop effect of constant voltage mode.

Figures 8 to 11 show a specific embodiment of the present invention, which proposes a method for electrochemical polishing in constant voltage mode, the method comprising:

Step 901: preset a constant current recipe with current distribution, including multiple locations on the wafer with different radii and a preset current for each location;

Step 902: Polishing the first wafer using a constant current recipe;

Step 903: Detect and record the voltage at each position during the polishing process;

Step 904: Generate a constant voltage recipe with voltage distribution, including multiple locations and the voltage recorded corresponding to each location;

Step 905: Polish the second wafer using a constant pressure recipe.

Since the method uses a constant pressure mode, good polishing results are obtained. Figure 8 shows the depression after electrochemical polishing in constant voltage mode, where 35 μm and 5 μm represent different line widths in the polished area, and C (center), M (middle) and E (edge) represent Different positions of the processed wafer. Due to the automatic stop effect of the constant voltage mode, it can be seen that at the same position, the sags between different line widths are very close; at the same line width, the sags between different positions are also very close. On the contrary, if the constant current mode is adopted in this method, even at the same position, the sag varies greatly between different line widths; at the same line width, the sag varies greatly between different positions.

As shown in Fig. 10, Table 1 is the constant flow formula applied in the method of the present invention. It can be seen that in this constant current formula, each position has a corresponding current value. Further, Figure 11 shows the resulting constant pressure recipe. According to Table 1, Table 2 gives the voltage value corresponding to each position.

Table 2 is only applicable to fixed process conditions, which means that the process conditions must be stable. The process conditions in the constant pressure formulation are the same as those in the constant current formulation. The process conditions include but are not limited to electrolyte flow rate, electrolyte temperature and wafer speed. If the variation of the process condition exceeds the specified range, table 2 should be regenerated according to steps 901 to 903.

In order to obtain a uniform removal profile after the electrochemical polishing of the present invention is completed, the current preset for the position is proportional to the radius of the position. Alternatively, constant current recipes operate in pulsed mode and constant voltage recipes operate in pulsed mode. Combined with the pulsed mode, the removal rate can be reduced without any adverse effect on the metal surface roughness of the wafer. Since the pulse mode can shorten the polishing time, and the metal surface roughness is inversely proportional to the polishing time, the pulse mode helps to improve the metal surface roughness of the wafer.

In a specific implementation manner, the first wafer includes a bare wafer and a metal layer on the bare wafer. The metal layer can be a layer of copper, tin, nickel, silver or gold.

In a specific embodiment, the second wafer includes a wafer having a plurality of patterned trenches or vias and a metal layer on the wafer. The patterned trenches or vias are filled with metal layers. The metal layer is a copper layer, tin layer, nickel layer, silver layer or gold layer.

Relatively uniform copper wires can be produced according to the present invention, so dishing variance can be optimized.

The above descriptions are only preferred embodiments of the present invention, and do not limit the present invention in any form. Any person familiar with the art, without departing from the scope of the technical solution of the present invention, can use the technical content disclosed above to make many possible changes and modifications to the technical solution of the present invention, or modify it into an equivalent embodiment with equivalent changes. Therefore, any simple modifications, equivalent changes and modifications made to the above embodiments according to the technical essence of the present invention, which do not deviate from the technical solution of the present invention, still fall within the protection scope of the technical solution of the present invention.

Claims (10)

1. a kind of method of the electrochemical polish under constant voltage mode, which is characterized in that including：

The default one constant current formula with current distribution, including multiple positions on wafer with different radii and be each The preset electric current in position；

It is formulated the first wafer of polishing using constant current；

The voltage of each position is detected and recorded in polishing process；

Generate the constant pressure formula with voltage's distribiuting, including the voltage of multiple positions and corresponding each position record；And

The second wafer is polished using constant pressure formula.

2. according to the method described in claim 1, it is characterized in that, directly proportional to the radius of position for the preset electric current in position.

3. according to the method described in claim 1, it is characterized in that, the first wafer includes：

Bare silicon wafer；And

Metal layer on bare silicon wafer.

4. according to the method described in claim 3, it is characterized in that, metal layer is layers of copper, tin layers, nickel layer, silver layer or layer gold.

5. according to the method described in claim 1, it is characterized in that, the second wafer includes：

Wafer with multiple patterned trench or through-hole；And

Metal layer on wafer, wherein patterned trench or through-hole are filled up by metal layer.

6. according to the method described in claim 5, it is characterized in that, metal layer is layers of copper, tin layers, nickel layer, silver layer or layer gold.

7. according to the method described in claim 1, it is characterized in that, constant current formula operates in the pulsing mode.

8. according to the method described in claim 1, it is characterized in that, constant pressure formula operates in the pulsing mode.

9. according to the method described in claim 1, it is characterized in that, the technique item of the process conditions of constant pressure formula and constant current formula Part is identical.

10. according to the method described in claim 9, it is characterized in that, process conditions include：Electrolyte flow rate, electrolyte temperature With wafer rotating speed.