CN108347660B - An analog relay access device - Google Patents

Abstract

The invention discloses an analog relay access device, which belongs to the technical field of telephone communication. The device includes an analog relay interface voice module, a main control module and a logic processing module. The analog relay interface voice module includes an analog relay interface circuit unit, a caller ID and dual-tone multi-frequency forwarding unit, and a codec unit. The audio multi-frequency forwarding unit is used to decode the dual-tone multi-frequency signal in the analog four-wire signal into a first digital signal and forward the first digital signal and the frequency shift keying signal in the analog four-wire signal to the logic processing module, and the logic The processing module is used to send the first digital signal and the frequency shift keying signal to the main control module, and the main control module is used to determine the called user according to the first digital signal, and send the frequency shift keying signal to the called user, and the called user is The calling party displays the calling party's calling number according to the frequency shift keying signal.

Description

An analog relay access device

technical field

The present invention relates to the technical field of telephone communication, in particular to an analog relay access device.

Background technique

In the program-controlled switching system, after the telephone signal of the central office is connected through the analog telephone interface device, a small central office communication switching system (hereinafter referred to as the central office) is realized. The information exchange between the central office and the users of the central office needs to be completed by simulating a relay access device.

The current analog relay access device is usually used to access the analog signal processed by the central office of the calling end, and convert the analog signal into a digital signal after a series of sampling, compression and decompression, encoding and decoding, etc. Then, the digital signal processing and exchange are realized through a pulse code modulation (Pulse Code Modulation, PCM) exchange center.

Through the above-mentioned analog trunk access device, when the calling user dials one time, the called user can know the calling number of the calling user, but when the calling user needs to dial a second time, the called user cannot display the calling number. The calling number of the user. For example, when user A needs to make a second call, dials to host B, and enters the user C that he wants to call by pressing the keys, the host B cannot display the calling number of user C input by user A by pressing the keys. Number.

SUMMARY OF THE INVENTION

In order to solve the problem that the analog relay interface device in the prior art cannot detect and display the calling number information, an embodiment of the present invention provides an analog relay access device. The technical solution is as follows:

The present invention provides an analog relay access device, the device includes an analog relay interface voice module, a main control module and a logic processing module, the analog relay interface voice module includes an analog relay interface circuit unit, a caller display and dual-tone multi-frequency forwarding unit and codec unit,

The analog relay interface circuit unit is used to convert the analog two-wire signal connected to the analog relay interface voice module into an analog four-wire signal, and the caller ID and dual-tone multi-frequency forwarding unit is used to convert the analog four-wire signal. The dual-tone multi-frequency signal in the line signal is decoded into a first digital signal and the first digital signal and the frequency shift keying signal in the analog four-line signal are forwarded to the logic processing module, and the logic processing module for sending the first digital signal and the frequency shift keying signal to the main control module;

The codec unit is used to convert the voice signal of the analog four-wire signal output by the analog relay interface circuit unit into a second digital signal, and send the second digital signal to the logic processing module. the main control module;

The main control module is used to determine the called user according to the first digital signal, and send the frequency shift keying signal to the called user, and the called user displays the calling party according to the frequency shift keying signal. The calling number of the user.

Further, the analog relay interface circuit unit includes a protection circuit, a power taking and balancing circuit, a 2/4 line conversion circuit and a subscriber line detection circuit,

The protection circuit is used for high voltage isolation of the analog two-wire signal access terminal of the analog relay interface circuit unit, and the power taking and balancing circuit is used to intercept the feed power of the analog two-wire signal, and connect the analog two-wire signal. The feed power and the power supply of the analog relay access device share the same ground, the 2/4-wire conversion circuit is used to convert the analog two-wire signal into the analog four-wire signal, and the subscriber line detection circuit is used for Under the control of the main control module, ring current detection, simulated on-hook off-hook, polarity reversal detection, and loopback testing are performed on the analog four-wire signal.

Further, the protection circuit is a diode protection circuit.

Further, the main control module includes an Ethernet circuit, which is used for downloading the debugging program, ringing current detection and reporting, and dual-tone multi-frequency signal detection and reporting, and the Ethernet circuit is a physical layer PHY circuit composed of a 100M Ethernet network port. 10M/100M adaptive Ethernet circuit composed of transformer circuit.

Further, the logic processing module includes a field programmable gate array FPGA main chip, an external clock circuit and a configuration circuit, the external clock circuit and the phase-lock circuit inside the FPGA main chip form a clock system, and the clock system uses In order to provide a working clock for the main control module, the FPGA main chip reads the program stored in the configuration circuit.

Further, the main control module is further configured to configure and read the self-defined registers in the FPGA main chip through the bus interface.

Further, the analog relay access device further includes a backplane connector for connecting the analog relay access device with the backplane.

Further, the analog relay access device further includes a buffer and a driving circuit for isolating interference information transmitted to the analog relay access device from the outside through the backplane.

Further, the analog relay access device also includes a station and a board number processing module for acquiring the device number of the equipment to which the backplane belongs after the analog relay access device is connected to the backplane through the backplane connector. and the identifier assigned by the device to the analog relay access device.

Further, the analog relay access device further includes a power supply module, and the power supply module includes a hot-plug circuit.

The beneficial effects brought by the technical solutions provided in the embodiments of the present invention are:

By setting the caller ID and dual-tone multi-frequency forwarding unit, the caller ID and dual-tone multi-frequency forwarding unit are used to decode the dual-tone multi-frequency signal in the analog four-wire signal into the first digital signal and convert the first digital signal to the analog four-wire signal. The frequency shift keying signal in the line signal is forwarded to the logic processing module, and the logic processing module is used to send the first digital signal and the frequency shift keying signal to the main control module, and the main control module is used to determine the called party according to the first digital signal. user, and send the frequency shift keying signal to the called user, and the called user can display the calling number of the calling user according to the frequency shift keying signal.

Description of drawings

In order to illustrate the technical solutions in the embodiments of the present invention more clearly, the following briefly introduces the accompanying drawings used in the description of the embodiments. Obviously, the accompanying drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, other drawings can also be obtained from these drawings without creative effort.

1 is a schematic structural diagram of a communication system provided by an embodiment of the present invention;

FIG. 2 is a schematic structural diagram of an analog relay access device provided by an embodiment of the present invention;

FIG. 3 is a schematic structural diagram of a main control module provided by an embodiment of the present invention.

Detailed ways

In order to make the objectives, technical solutions and advantages of the present invention clearer, the embodiments of the present invention will be further described in detail below with reference to the accompanying drawings.

In order to better understand the present invention, the following briefly introduces an application scenario of an analog relay access device provided by the present invention. FIG. 1 is a schematic structural diagram of a communication system provided by an embodiment of the present invention, as shown in FIG. 1 , The system includes four telephone sets J1, J2, J3 and J4, a first analog trunk interface device C1, a second analog trunk interface device C2 and PCM (PulseCode Modulation, Chinese: Pulse Code Modulation), wherein J1, J2 and The first analog relay interface device C1 forms a small central office A, J3, J4 and the second analog relay interface device C2 form a small central office B, and the central office A and the PCM switching center P are connected through an analog relay. Access device connection, central office B and PCM switching center C are connected through another analog relay access device.

An embodiment of the present invention provides an analog relay access device. FIG. 2 is a schematic structural diagram of an analog relay access device provided by an embodiment of the present invention. As shown in FIG. 2 , the device includes an analog relay interface voice The module 100 , the logic processing module 200 and the main control module 300 .

The analog relay interface voice module 100 includes an analog relay interface circuit unit 110 , a caller ID and DTMF forwarding unit 120 and a codec unit 130 .

The analog relay interface circuit unit 110 is used to convert the analog two-wire signal connected to the analog relay interface voice module 100 into an analog four-wire signal through the analog relay interface circuit unit 110, and the caller ID and dual-tone multi-frequency forwarding unit 120 is used for For decoding the dual-tone multi-frequency signal in the analog four-wire signal into a first digital signal and forwarding the first digital signal and the frequency shift keying signal in the analog four-wire signal to the logic processing module 200, the logic processing module 200 is used for sending the first digital signal and the frequency shift keying signal to the main control module 300 .

The codec unit 130 is used to convert the voice signal of the analog four-wire signal into a second digital signal, and send the second digital signal to the main control module 300 through the logic processing module 200 .

The main control module 300 is used for determining the called user according to the first digital signal, and sending the frequency shift keying signal to the called user, and the called user displays the calling number of the calling user according to the frequency shift keying signal.

In the embodiment of the present invention, a caller ID and dual-tone multi-frequency forwarding unit is provided, and the caller ID and dual-tone multi-frequency forwarding unit is used to decode the dual-tone multi-frequency signal in the analog four-wire signal into a first digital signal and convert the first digital signal to the first digital signal. The frequency shift keying signal in the signal and the analog four-wire signal is forwarded to the logic processing module, and the logic processing module is used for sending the first digital signal and the frequency shift keying signal to the main control module, and the main control module is used for according to the first digital signal. The signal determines the called user, and sends the frequency shift keying signal to the called user, and the called user can display the calling number of the calling user according to the frequency shift keying signal.

The analog relay interface circuit unit 110 can also convert the analog four-wire signal into the analog two-wire signal. The caller ID and dual-tone multi-frequency forwarding unit 120 can use a dedicated chip CMX865A for modulation and demodulation.

Specifically, the analog four-wire signal output interface of the analog relay interface circuit unit 110 is connected to the caller ID and dual-tone multi-frequency forwarding unit 120 and the codec unit 130, and the codec unit 130 uses TDM (Time Division Multiplex, Chinese: Time Division Multiplex) The multiplexing) bus is connected to the logic processing module 200, the logic processing module 200 is connected to the main control module 300 through the TDM bus, the main control module 300 receives the second digital signal through the TDM bus, and the main control module 300 is the smallest system module.

The caller ID and dual-tone multi-frequency forwarding unit 120 and the codec unit 130 are connected to the logic processing module 200 through the SPI (Serial Peripheral Interface, serial peripheral interface) bus, and the logic processing module 200 is connected to the main control module 300 through the SPI bus. In order to make the main control module 300 configure the parameters in the caller ID and DTMF forwarding unit 120 and the codec unit 130 .

Wherein, the codec module 130 can also be used to convert the second digital signal into an analog four-wire signal.

Specifically, the main core chip of the codec module 130 can be LE78D11 produced by Zarlink, which provides the processing capability of two-way codec alone. The chip not only has the function of encoding and decoding, but also can provide an SPI interface for the main control module 300 to provide an exchange information channel between the main control module 300 and the caller ID and dual-tone multi-frequency forwarding unit 120 . And the chip is equipped with a compact digital signal processing core, which can process various signal tones and generate various call progress tones with variable parameters.

Further, the analog relay interface circuit unit 110 includes a protection circuit, a power acquisition and balance circuit, a 2/4 line conversion circuit, and a subscriber line detection circuit.

The protection circuit is used for high-voltage isolation of the analog two-wire signal access terminal of the analog relay interface circuit unit 110 .

The protection circuit is a diode protection circuit. Optional protection diode P3100SC. The protection circuit is applied to the analog two-wire signal access terminal. In order to prevent the user line from being exposed to lightning strikes, the introduction of high-voltage electricity will cause damage to the internal low-voltage circuit. The protection circuit is located in the front-end part of the entire voice processing circuit, isolates the high voltage (up to 3KV) introduced by the line, and has a certain protective effect on the back-end circuit.

The power taking and balancing circuit is used to intercept the feed power of the analog two-wire signal, and share the feed power with the power of the analog relay access device.

Specifically, the power taking and balancing circuit adopts the rectifier bridge circuit S1ZB60 and peripheral circuits to intercept the feed power provided by the analog two-wire signal.

The 2/4-wire conversion circuit is used to convert the analog two-wire signal into an analog four-wire signal, and the main control module 300 is used to control the subscriber line detection circuit to perform ringing current detection, analog on-hook and polarity reversal for the analog four-wire signal. Detection, loopback test.

Alternatively, the 2/4-wire conversion circuit is also used to convert the analog four-wire signal into an analog two-wire signal.

Among them, the 2/4 line conversion circuit and the subscriber line detection circuit are both composed of chips with high integration using capacitive coupling technology. For example, a dedicated chip CPC5622 with a high degree of integration can be used, which uses a capacitive coupling circuit as the pre-coupling circuit, which improves the reliability of the circuit compared to using a transformer circuit as the pre-coupling circuit in the prior art, and The layout area of PCB (Printed Circuit Board, Chinese: Printed Circuit Board) is reduced.

Further, the logic processing module 200 includes an FPGA (Field-Programmable Gate Array, Chinese: Field Programmable Gate Array) main chip, an external clock circuit and a configuration circuit, and the external clock circuit and the phase-lock circuit inside the FPGA main chip form a clock system, The clock system is used to provide the working clock for the main control module, and the FPGA main chip reads the program stored in the configuration circuit.

Specifically, 10M08SCU169I7 can be selected as the main FPGA chip. This chip provides 130 pins externally, with a working voltage of +3.3V. The external clock circuit is a 16.384MHZ crystal oscillator clock circuit, which forms a clock system with the phase-locked loop circuit provided inside the chip. Provide all the working clocks for the logic chip to meet the working requirements.

Further, as shown in FIG. 2 , the main control module 300 is further configured to configure and read the custom registers in the FPGA main chip in the logic processing module 200 through the Local Bus interface.

FIG. 3 is a schematic structural diagram of a main control module provided by an embodiment of the present invention. As shown in FIG. 3 , the main control module 300 includes a central processing unit K1, a RAM random access memory K2, a ROM program read-only memory K3, a buffer circuit K4, Hardware watchdog circuit K5, reset circuit K6, clock circuit K7 and Ethernet circuit K8.

The RAM random access memory K2, the ROM program read-only memory K3 and the buffer circuit K4 are all connected to the central processor K1 through a data bus, an address bus and a control bus, and the data bus and the address bus are in the form of multiplexing. The hardware watchdog circuit K5, the reset circuit K6, the clock circuit K7 and the Ethernet circuit K8 are connected with the central processing unit K1.

Specifically, the buffer circuit K4 is provided on the Local Bus.

Specifically, the central processing unit K1 can select the M82359 chip. RAM random access memory K2 can choose two pieces of 16-bit data width, and the model is MT46V64M8 to form a 32-bit data bus chip. The ROM program read-only memory K3 can select the core chip SST39VF040 with an amount of 4M as the storage space (BOOTROM) of the system startup code. The buffer circuit K4 can choose the chip whose model is 74FCT541 as the main chip, and the main chip of the hardware watchdog circuit K5 can choose the IMP706. The crystal oscillator selected by the clock circuit K7 is 25MHZ.

In this embodiment, a 100M PHY (Physical Layer, Chinese: Physical Layer) chip is connected to the central processing unit K1 through the MILL port of the central processing unit, and a transformer circuit is added to form a 10M/100M adaptive Ethernet circuit K8, The chip selection model of the PHY circuit of 10M Ethernet and 100M Ethernet network port is LXT971ALE and Ethernet transformer.

Among them, the Ethernet circuit K8 is used for downloading the debugging program, detecting and reporting the ringing current, and detecting and reporting the dual-tone multi-frequency signal. And it is used to realize the exchange of IP packet data between the central processor K1 and the outside world.

Further, the analog relay access device further includes a backplane connector 500 for connecting the analog relay access device to the backplane. The backplane connector 500 is connected to the logic processing module 200 .

Specifically, the backplane connector 500 can be a high-density 110-core connector.

Further, as shown in FIG. 2 , the analog relay access device further includes a buffering and driving circuit 400 for isolating interference information transmitted from the outside to the analog relay access device through the backplane. The buffer and driving circuit 400 is located between the backplane connector 500 and the logic processing module 200 .

The buffer and drive circuit 400 can select a chip whose model is 74FCT541 as the main chip.

Further, the analog relay access device further includes a station and board number processing module 700. The station and board number processing module 700 is used to obtain the backplane after the analog relay access device is connected to the backplane through the backplane connector 500. The device number of the device it belongs to and the identifier assigned by the device to the analog relay access device. Wherein, the station number is the device number of the device where the analog relay access device is located (ie, the backplane), and the board number is the identity identifier allocated by the device to the analog relay device.

Further, the analog relay access device further includes a power supply module 600 for supplying power to the analog relay access device. The power module 600 includes a hot-plug circuit, and the hot-plug circuit is used to provide a stable working voltage for the analog relay access device. By setting the hot-swap circuit, it can be realized that the analog relay access device can be inserted and removed without power interruption without affecting the work of the entire analog relay access device. The circuit can also provide a very stable working voltage for the entire analog relay access device.

Specifically, the power supply module 600 can use a main chip with a model of TPS2421, which not only has the function of hot swapping but also has the function of power smoothing, which can protect the back-end circuit to a certain extent. The core chips of the power module 600 are MCP1820D and EN5339QI. The first chip can provide high-power and high-quality power for the entire analog relay access device with simple peripheral circuits. It is mainly used to connect +12V power supply. Convert the output +5V power supply. The second chip has a greater degree of integration, which integrates inductors, PWM (Pulse Width Modulation, Chinese: Pulse Width Modulation), MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor, Chinese: Metal-Oxide Semi-Field Effect Transistor) ) and other devices, it is easy to provide +3.3V, 2.5V, +1.8V, 1.2V working voltage for the entire analog relay access device only by adding precision resistors.

When the system is powered on during operation, the main control module 300 will initialize the analog relay voice module 100 . At this time, all ports are in the normal analog on-hook state, and have the functions of ringing current detection and polarity detection of analog lines. If the central office is sent into the ring current according to the service, the analog trunk access device performs analog off-hook. If there is a second call process, the device needs to use the caller ID and dual-tone multi-frequency transceiver module to send the required second call. a digital signal and the frequency shift keying signal. Then, the voice access of the central office is sent to the PCM switching system after being encoded and decoded by the encoding and decoding module 300 to complete the subsequent communication function.

The above are only preferred embodiments of the present invention and are not intended to limit the present invention. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention. Inside.

Claims (10)

1. An analog relay access device is characterized in that the device comprises an analog relay interface voice module, a main control module and a logic processing module, wherein the analog relay interface voice module comprises an analog relay interface circuit unit, a caller identification and dual-tone multi-frequency forwarding unit and a coding and decoding unit,

the analog relay interface circuit unit is configured to convert an analog two-wire signal accessed to the analog relay interface voice module into an analog four-wire signal, the caller identification and dual-tone multi-frequency forwarding unit is configured to decode a dual-tone multi-frequency signal in the analog four-wire signal into a first digital signal and forward a frequency shift keying signal in the first digital signal and the analog four-wire signal to the logic processing module, and the logic processing module is configured to send the first digital signal and the frequency shift keying signal to the main control module;

the coding and decoding unit is used for converting the voice signal of the analog four-wire signal output by the analog relay interface circuit unit into a second digital signal and sending the second digital signal to the main control module through the logic processing module;

the main control module is used for determining a called user according to the first digital signal and sending the frequency shift keying signal to the called user, and the called user displays the calling number of the calling user according to the frequency shift keying signal.

2. The apparatus of claim 1, wherein the analog relay interface circuit unit includes a protection circuit, a power-taking and balancing circuit, an 2/4 wire conversion circuit, and a subscriber line detection circuit,

the protection circuit is used for right the simulation second-line signal incoming end of simulation relay interface circuit unit carries out high-voltage isolation, it is used for intercepting to get electric and balanced circuit the feed power of simulation second-line signal, and will feed power with the power of simulation relay access device is earthed together, 2/4 line converting circuit be used for with simulation second-line signal converts to simulation four-wire signal, subscriber line detection circuitry is used for right under master control module's control simulation four-wire signal carries out ringing current detection, simulation pick-up and hang-up, polarity reversal detection, loopback test.

3. The apparatus of claim 2, wherein the protection circuit is a diode protection circuit.

4. The apparatus of claim 2, wherein the main control module comprises an ethernet circuit for downloading a debugging program, performing ringing detection and reporting, and performing dual tone multi-frequency signal detection and reporting, and the ethernet circuit is a 10M/100M adaptive ethernet circuit formed by a PHY circuit of a 100M ethernet port and a transformer circuit.

5. The device of claim 1, wherein the logic processing module comprises a Field Programmable Gate Array (FPGA) main chip, an external clock circuit and a configuration circuit, the external clock circuit and a phase-locked circuit inside the FPGA main chip form a clock system, the clock system is used for providing a working clock for the main control module, and the FPGA main chip reads a program stored in the configuration circuit.

6. The device of claim 5, wherein the master control module is further configured to configure and read custom registers in the FPGA master chip through a bus interface.

7. The apparatus of claim 1, wherein the analog relay access device further comprises a backplane connector for connecting the analog relay access device to a backplane.

8. The apparatus of claim 7, wherein the analog trunk access apparatus further comprises a buffer and driving circuit for isolating interference information transmitted to the analog trunk access apparatus through the backplane from the outside.

9. The apparatus according to any one of claims 1 to 8, wherein the analog relay access apparatus further comprises a station and board number processing module, configured to obtain, after the analog relay access apparatus is connected to a backplane through a backplane connector, a device number of a device to which the backplane belongs and an identifier assigned by the device to the analog relay access apparatus.

10. The apparatus of any of claims 1-8, wherein the analog relay access device further comprises a power module, the power module comprising a hot swap circuit.

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