[go: up one dir, main page]

CN108321124A - A kind of millimeter-wave monolithic gold wire bonding impedance discontinuity device and installation method - Google Patents

A kind of millimeter-wave monolithic gold wire bonding impedance discontinuity device and installation method Download PDF

Info

Publication number
CN108321124A
CN108321124A CN201810067322.6A CN201810067322A CN108321124A CN 108321124 A CN108321124 A CN 108321124A CN 201810067322 A CN201810067322 A CN 201810067322A CN 108321124 A CN108321124 A CN 108321124A
Authority
CN
China
Prior art keywords
microstrip circuit
chip
gap
lower chamber
connecting line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201810067322.6A
Other languages
Chinese (zh)
Inventor
张勇
郑权
吴成凯
杜浩
徐锐敏
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
University of Electronic Science and Technology of China
Original Assignee
University of Electronic Science and Technology of China
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by University of Electronic Science and Technology of China filed Critical University of Electronic Science and Technology of China
Priority to CN201810067322.6A priority Critical patent/CN108321124A/en
Publication of CN108321124A publication Critical patent/CN108321124A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/02Containers; Seals
    • H01L23/04Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H01L23/043Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body
    • H01L23/047Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body the other leads being parallel to the base
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
    • H01L21/4814Conductive parts
    • H01L21/4817Conductive parts for containers, e.g. caps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
    • H01L21/4814Conductive parts
    • H01L21/4885Wire-like parts or pins
    • H01L21/4889Connection or disconnection of other leads to or from wire-like parts, e.g. wires
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/02Containers; Seals
    • H01L23/04Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H01L23/043Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/49Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions wire-like arrangements or pins or rods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Waveguides (AREA)

Abstract

The invention discloses a kind of millimeter-wave monolithic gold wire bonding impedance discontinuity device and installation methods, including upper cavity and lower chamber, sequentially connected first microstrip circuit is equipped between upper cavity and lower chamber, first connecting line, chip, second connecting line and the second microstrip circuit, it is stair-stepping groove structure inside lower chamber, chip is located at the bottom inside lower chamber, the first conducting medium is filled between chip and lower chamber, the second conducting medium is filled between first microstrip circuit and lower chamber, third conducting medium is filled between second microstrip circuit and lower chamber, the first gap is formed between chip and the first microstrip circuit, the second gap is formed between chip and the second microstrip circuit, conducting medium is filled between first gap and the second gap;Signal enters after the first microstrip circuit and is coupled to chip by the first connecting line, and signal is coupled to the output of the second microstrip circuit from chip by the second connecting line again.

Description

一种毫米波单片金丝键合阻抗不连续性装置及安装方法A millimeter wave monolithic gold wire bonding impedance discontinuity device and installation method

技术领域technical field

本发明属于电子工程技术领域,具体涉及一种毫米波单片金丝键合阻抗不连续性装置及安装方法。The invention belongs to the technical field of electronic engineering, and in particular relates to a millimeter-wave monolithic gold wire bonding impedance discontinuity device and an installation method.

背景技术Background technique

键合金丝互连是微波毫米波集成电路和单片集成电路的常用技术,在多种毫米波电路和系统中,利用键合金丝互连技术,实现固态器件或单片集成电路与无源电路的连接、无源电路的互连、多芯片的互连.尽管倒装芯片和其他一些无源耦合技术可以在某些应用中替代键合金丝互连,但键合金丝互连具有工艺简单、廉价、热膨胀系数小等优点,因此在毫米波应用系统中具有突出的应用价值。Bonded gold wire interconnection is a common technology for microwave and millimeter wave integrated circuits and monolithic integrated circuits. In various millimeter wave circuits and systems, bonded gold wire interconnection technology is used to realize solid-state devices or monolithic integrated circuits and passive circuits. The connection of passive circuits, the interconnection of multi-chips. Although flip chip and some other passive coupling technologies can replace bonded gold wire interconnection in some applications, bonded gold wire interconnection has the advantages of simple process, It has the advantages of low cost and small thermal expansion coefficient, so it has outstanding application value in millimeter wave application systems.

但是,这种互连方式在毫米波高端的使用却受到一定的限制,这是因为金丝或金带与微带线的连接处,微带线的分布电流受到影响,呈现出电感的特性。尤其是考虑到芯片或器件的尺寸的差异和加工问题,通常在要连接的两种介质之间会有一段小间隙,随着频率的升高,缝隙引起的阻抗不连续性对金丝键合结构微波性能的影响会不断增大。同时由于电路芯片载体的存在,会导致缝隙深度相对较大,引起微波性能的进一步恶化。However, the use of this interconnection method at the high end of the millimeter wave is limited to a certain extent, because the distribution current of the microstrip line is affected at the connection between the gold wire or gold strip and the microstrip line, showing the characteristics of inductance. Especially considering the difference in size of chips or devices and processing problems, there is usually a small gap between the two media to be connected. As the frequency increases, the impedance discontinuity caused by the gap will affect the gold wire bonding. The influence of the microwave performance of the structure will continue to increase. At the same time, due to the existence of the circuit chip carrier, the depth of the gap will be relatively large, causing further deterioration of the microwave performance.

发明内容Contents of the invention

本发明的目的是解决上述问题,提供一种能解决金丝键合阻抗不连续性引起微波性能恶化问题的毫米波单片金丝键合阻抗不连续性装置及安装方法。The purpose of the present invention is to solve the above problems, and provide a millimeter-wave monolithic gold wire bonding impedance discontinuity device and installation method that can solve the problem of microwave performance deterioration caused by the gold wire bonding impedance discontinuity.

为解决上述技术问题,本发明的技术方案是:一种毫米波单片金丝键合阻抗不连续性装置,包括上腔体和下腔体,上腔体和下腔体之间设有依次连接的第一微带电路、第一连接线、芯片、第二连接线和第二微带电路,第一微带电路和第二微带电路结构相同;芯片与下腔体之间填充有第一导电介质,第一微带电路与下腔体之间填充有第二导电介质,第二微带电路与下腔体之间填充有第三导电介质,芯片与第一微带电路之间形成第一间隙,芯片与第二微带电路之间形成第二间隙,第一间隙和第二间隙中均填充有导电介质;信号进入第一微带电路后通过第一连接线耦合到芯片,信号再从芯片通过第二连接线耦合到第二微带电路输出。In order to solve the above technical problems, the technical solution of the present invention is: a millimeter-wave monolithic gold wire bonding impedance discontinuity device, including an upper cavity and a lower cavity, and a sequence of The connected first microstrip circuit, the first connection line, the chip, the second connection line and the second microstrip circuit, the first microstrip circuit and the second microstrip circuit have the same structure; the chip and the lower cavity are filled with the first A conductive medium, a second conductive medium is filled between the first microstrip circuit and the lower cavity, a third conductive medium is filled between the second microstrip circuit and the lower cavity, and a chip is formed between the first microstrip circuit The first gap, the second gap is formed between the chip and the second microstrip circuit, the first gap and the second gap are filled with conductive medium; after the signal enters the first microstrip circuit, it is coupled to the chip through the first connecting line, and the signal Then the chip is coupled to the output of the second microstrip circuit through the second connection line.

优选地,所述第一微带电路、芯片和第二微带电路在下腔体内部的位置齐平。Preferably, the positions of the first microstrip circuit, the chip and the second microstrip circuit in the lower cavity are flush.

优选地,所述第一连接线和第二连接线结构相同,第一连接线的一端与第一微带电路键合,第一连接线的另一端与芯片键合。Preferably, the first connecting wire and the second connecting wire have the same structure, one end of the first connecting wire is bonded to the first microstrip circuit, and the other end of the first connecting wire is bonded to the chip.

优选地,所述第一连接线为金丝制成。Preferably, the first connecting wire is made of gold wire.

优选地,所述第一导电介质、第二导电介质和第三导电介质相同结构,第一导电介质由导电胶制成。Preferably, the first conductive medium, the second conductive medium and the third conductive medium have the same structure, and the first conductive medium is made of conductive glue.

优选地,所述第一间隙中填充的导电介质和第二间隙中填充的导电介质的表面粗糙度均小于5μm。Preferably, the surface roughness of the conductive medium filled in the first gap and the conductive medium filled in the second gap is less than 5 μm.

优选地,所述下腔体由金属铜制成。Preferably, the lower cavity is made of metal copper.

本发明还公开了一种毫米波单片金丝键合阻抗不连续性装置安装方法,包括以下步骤:The invention also discloses a method for installing a millimeter-wave monolithic gold wire bonding impedance discontinuity device, which includes the following steps:

S1、将芯片固定在下腔体的凹槽内;S1, fix the chip in the groove of the lower cavity;

S2、将第一微带电路和第二微带电路固定在下腔体内部的上表面;S2, fixing the first microstrip circuit and the second microstrip circuit on the upper surface inside the lower cavity;

S3、在芯片与第一微带电路和第二微带电路之间形成的间隙中填充导电介质;S3, filling the gap formed between the chip and the first microstrip circuit and the second microstrip circuit with a conductive medium;

S4、将第一连接线的两端键合在第一微带电路和芯片上,第二连接线的两端键合在芯片和第二微带电路上;S4, bonding the two ends of the first connecting wire to the first microstrip circuit and the chip, and bonding the two ends of the second connecting wire to the chip and the second microstrip circuit;

S5、把上腔体和下腔体通过销钉连接为一体。S5. Connect the upper chamber and the lower chamber into one body through pins.

本发明的有益效果是:The beneficial effects of the present invention are:

1、本发明所提供的一种毫米波单片金丝键合阻抗不连续性设备通过在芯片安装的腔体与芯片之间形成的缝隙之间填充导电介质,在不改变传统键合金丝整体结构与体积的前提下,比传统键合金丝结构获得更好的微波性能。1. The millimeter-wave monolithic gold wire bonding impedance discontinuity device provided by the present invention fills the gap formed between the chip mounting cavity and the chip with a conductive medium without changing the whole of the traditional bonding gold wire. Under the premise of structure and volume, better microwave performance is obtained than the traditional bonded gold wire structure.

2、本发明中的采用金丝键合阻抗不连续性补偿的方法具有插入损耗小的特点,在毫米波单片集成电路中具有良好的应用前景。2. The method for compensating the impedance discontinuity of the gold wire bonding in the present invention has the characteristics of small insertion loss, and has a good application prospect in millimeter-wave monolithic integrated circuits.

附图说明Description of drawings

图1是本发明一种毫米波单片金丝键合阻抗不连续性装置的剖视结构示意图;Fig. 1 is a schematic sectional structure diagram of a millimeter wave monolithic gold wire bonding impedance discontinuity device of the present invention;

图2为本发明不含上腔体的结构俯视示意图;Fig. 2 is a schematic top view of the structure of the present invention without an upper cavity;

图3为本发明有缝隙时的仿真对比图;Fig. 3 is the simulation contrast figure when the present invention has gap;

图4为本发明填充缝隙后的仿真图。Fig. 4 is a simulation diagram of the present invention after gap filling.

附图标记说明:1、第一微带电路;2、第一间隙;3、芯片;4、下腔体;5、第一连接线;6、第一导电介质;7、第二导电介质;8、第二间隙;9、第三导电介质;10、第二微带电路;11、第二连接线;12、上腔体。Description of reference signs: 1. First microstrip circuit; 2. First gap; 3. Chip; 4. Lower cavity; 5. First connecting line; 6. First conductive medium; 7. Second conductive medium; 8. The second gap; 9. The third conductive medium; 10. The second microstrip circuit; 11. The second connection line; 12. The upper cavity.

具体实施方式Detailed ways

下面结合附图和具体实施例对本发明做进一步的说明:The present invention will be further described below in conjunction with accompanying drawing and specific embodiment:

如图1到图2所示,本发明提供的一种毫米波单片金丝键合阻抗不连续性装置,包括上腔体12和下腔体4,上腔体12和下腔体4之间设有依次连接的第一微带电路1、第一连接线5、芯片3、第二连接线11和第二微带电路10,第一微带电路1和第二微带电路10结构相同。As shown in Figures 1 to 2, a millimeter wave monolithic gold wire bonding impedance discontinuity device provided by the present invention includes an upper cavity 12 and a lower cavity 4, and the upper cavity 12 and the lower cavity 4 The first microstrip circuit 1, the first connection line 5, the chip 3, the second connection line 11 and the second microstrip circuit 10 are arranged in sequence, and the first microstrip circuit 1 and the second microstrip circuit 10 have the same structure .

上腔体12和下腔体4连接的部分,分别内凹形成凹槽,上腔体12内部凹槽的宽度大于下腔体4相应部位的宽度。上腔体12与下腔体4通过销钉连接,上腔体12和下腔体4 均由金属铜制成。芯片3位于下腔体4内部的底部,第一微带电路1、芯片3和第二微带电路10在下腔体4内部的位置齐平。The connecting parts of the upper cavity 12 and the lower cavity 4 are recessed to form grooves respectively, and the width of the inner groove of the upper cavity 12 is greater than the width of the corresponding part of the lower cavity 4 . The upper chamber 12 and the lower chamber 4 are connected by pins, and both the upper chamber 12 and the lower chamber 4 are made of metal copper. The chip 3 is located at the bottom of the lower cavity 4 , and the first microstrip circuit 1 , the chip 3 and the second microstrip circuit 10 are flush with each other in the lower cavity 4 .

芯片3与下腔体4之间填充有第一导电介质6,第一微带电路1与下腔体4之间填充有第二导电介质7,第二微带电路10与下腔体4之间填充有第三导电介质9,芯片3与第一微带电路1之间形成第一间隙2,芯片3与第二微带电路10之间形成第二间隙8,第一间隙2和第二间隙8之间填充有导电介质,导电介质的表面粗糙度小于5μm。信号进入第一微带电路1后通过第一连接线5耦合到芯片3,信号再从芯片3通过第二连接线11耦合到第二微带电路10输出。Between the chip 3 and the lower cavity 4 is filled with a first conductive medium 6, between the first microstrip circuit 1 and the lower cavity 4 is filled with a second conductive medium 7, between the second microstrip circuit 10 and the lower cavity 4 The gap is filled with a third conductive medium 9, a first gap 2 is formed between the chip 3 and the first microstrip circuit 1, a second gap 8 is formed between the chip 3 and the second microstrip circuit 10, the first gap 2 and the second The gap 8 is filled with a conductive medium, and the surface roughness of the conductive medium is less than 5 μm. After the signal enters the first microstrip circuit 1 , it is coupled to the chip 3 through the first connection line 5 , and then the signal is coupled from the chip 3 to the second microstrip circuit 10 through the second connection line 11 for output.

第一连接线5和第二连接线11结构相同,第一连接线5的一端与第一微带电路1键合,第一连接线5的另一端与芯片3键合。在本实施例中,第一连接线5为金丝制成,在实际使用时,可以根据需要更换为金带。The first connecting wire 5 and the second connecting wire 11 have the same structure, one end of the first connecting wire 5 is bonded to the first microstrip circuit 1 , and the other end of the first connecting wire 5 is bonded to the chip 3 . In this embodiment, the first connecting wire 5 is made of gold wire, which can be replaced with a gold belt as required in actual use.

第一导电介质6、第二导电介质7和第三导电介质9为相同结构且厚度相等,第一导电介质6由导电胶制成。The first conductive medium 6 , the second conductive medium 7 and the third conductive medium 9 have the same structure and equal thickness, and the first conductive medium 6 is made of conductive glue.

第一微带电路1通过第二导电介质7固连在下腔体4的内部,芯片3通过第一导电介质6固连在下腔体4内部的凹槽内,第二微带电路10通过第三导电介质9固定连在下腔体 4上,在使用过程中避免第一微带电路1、第二微带电路10和芯片3的脱落。The first microstrip circuit 1 is fixed in the inside of the lower cavity 4 through the second conductive medium 7, the chip 3 is fixed in the groove inside the lower cavity 4 through the first conductive medium 6, and the second microstrip circuit 10 is connected through the third The conductive medium 9 is fixedly connected to the lower cavity 4 to prevent the first microstrip circuit 1 , the second microstrip circuit 10 and the chip 3 from falling off during use.

本发明还提供了一种毫米波单片金丝键合阻抗不连续性装置安装方法,包括以下步骤:The present invention also provides a millimeter-wave monolithic gold wire bonding impedance discontinuity device installation method, comprising the following steps:

S1、将芯片3固定在下腔体4的凹槽内;S1, fixing the chip 3 in the groove of the lower cavity 4;

S2、将第一微带电路1和第二微带电路10固定在下腔体4内部的上表面;S2, fixing the first microstrip circuit 1 and the second microstrip circuit 10 on the upper surface inside the lower cavity 4;

S3、在芯片3与第一微带电路1和第二微带电路10之间形成的间隙中填充导电介质;S3, filling the gap formed between the chip 3 and the first microstrip circuit 1 and the second microstrip circuit 10 with a conductive medium;

S4、将第一连接线5的两端键合在第一微带电路1和芯片3上,第二连接线11的两端键合在芯片3和第二微带电路10上;S4, bonding the two ends of the first connecting wire 5 on the first microstrip circuit 1 and the chip 3, and bonding the two ends of the second connecting wire 11 on the chip 3 and the second microstrip circuit 10;

S5、把上腔体12和下腔体4通过销钉连接为一体。S5. Connect the upper cavity body 12 and the lower cavity body 4 into one body through pins.

如图3和图4所示,将本发明的结构通过电磁仿真软件HFSS中,对第一间隙2填充导电介质前后的S参数进行仿真,通过图4可以看出,图4有第一间隙2时因为阻抗不连续性引起的谐振在第一间隙2被填充后有明显的补偿,填充第一间隙2后键合第一连接线5 互连回波损耗和插损有明显的改善。As shown in Figures 3 and 4, the structure of the present invention is simulated by the electromagnetic simulation software HFSS to the S parameters before and after the first gap 2 is filled with conductive medium, as can be seen from Figure 4, Figure 4 has the first gap 2 When the resonance caused by the impedance discontinuity is obviously compensated after the first gap 2 is filled, after the first gap 2 is filled, the return loss and insertion loss of the interconnection of the bonding first connecting wire 5 are obviously improved.

本发明能广泛适用于毫米波固态器件或单片集成电路与无源电路的连接、无源电路的互连、多芯片互连的情况等。The invention can be widely applied to the connection of millimeter-wave solid-state devices or monolithic integrated circuits with passive circuits, the interconnection of passive circuits, the interconnection of multi-chips, and the like.

本领域的普通技术人员将会意识到,这里所述的实施例是为了帮助读者理解本发明的原理,应被理解为本发明的保护范围并不局限于这样的特别陈述和实施例。本领域的普通技术人员可以根据本发明公开的这些技术启示做出各种不脱离本发明实质的其它各种具体变形和组合,这些变形和组合仍然在本发明的保护范围内。Those skilled in the art will appreciate that the embodiments described here are to help readers understand the principles of the present invention, and it should be understood that the protection scope of the present invention is not limited to such specific statements and embodiments. Those skilled in the art can make various other specific modifications and combinations based on the technical revelations disclosed in the present invention without departing from the essence of the present invention, and these modifications and combinations are still within the protection scope of the present invention.

Claims (8)

1. a kind of millimeter-wave monolithic gold wire bonding impedance discontinuity device, which is characterized in that including upper cavity (12) and cavity of resorption Body (4) is equipped with sequentially connected first microstrip circuit (1), the first connecting line (5), core between upper cavity (12) and lower chamber (4) Piece (3), the second connecting line (11) and the second microstrip circuit (10), the first microstrip circuit (1) and the second microstrip circuit (10) structure It is identical;Be filled with the first conducting medium (6) between chip (3) and lower chamber (4), the first microstrip circuit (1) and lower chamber (4) it Between be filled with the second conducting medium (7), filled with third conducting medium (9) between the second microstrip circuit (10) and lower chamber (4), The first gap (2) is formed between chip (3) and the first microstrip circuit (1), is formed between chip (3) and the second microstrip circuit (10) Second gap (8) is filled with conducting medium in the first gap (2) and the second gap (8);Signal enters the first microstrip circuit (1) chip (3) is coupled to by the first connecting line (5) after, signal is coupled to from chip (3) by the second connecting line (11) again Two microstrip circuits (10) export.
2. a kind of millimeter-wave monolithic gold wire bonding impedance discontinuity device according to claim 1, which is characterized in that institute The first microstrip circuit (1), chip (3) and the second microstrip circuit (10) is stated to flush in the internal position of lower chamber (4).
3. a kind of millimeter-wave monolithic gold wire bonding impedance discontinuity device according to claim 1, which is characterized in that institute State that the first connecting line (5) is identical with the second connecting line (11) structure, one end and the first microstrip circuit (1) of the first connecting line (5) Bonding, the other end of the first connecting line (5) are bonded with chip (3).
4. a kind of millimeter-wave monolithic gold wire bonding impedance discontinuity device according to claim 3, which is characterized in that institute The first connecting line (5) is stated to be made of spun gold.
5. a kind of millimeter-wave monolithic gold wire bonding impedance discontinuity device according to claim 1, which is characterized in that institute State the first conducting medium (6), the second conducting medium (7) and the identical structure of third conducting medium (9), the first conducting medium (6) by Conducting resinl is made.
6. a kind of millimeter-wave monolithic gold wire bonding impedance discontinuity device according to claim 1, which is characterized in that institute The surface roughness for stating the conducting medium filled in the conducting medium filled in the first gap (2) and the second gap (8) is respectively less than 5 μm。
7. a kind of millimeter-wave monolithic gold wire bonding impedance discontinuity device according to claim 1, which is characterized in that institute Lower chamber (4) is stated to be made of metallic copper.
8. a kind of millimeter-wave monolithic gold wire bonding impedance discontinuity device installation method, which is characterized in that include the following steps:
S1, chip (3) is fixed in the groove of lower chamber (4);
S2, the first microstrip circuit (1) and the second microstrip circuit (10) are fixed on to the internal upper surface of lower chamber (4);
Conductive be situated between is filled in S3, the gap formed between chip (3) and the first microstrip circuit (1) and the second microstrip circuit (10) Matter;
S4, the both ends of the first connecting line (5) are bonded on the first microstrip circuit (1) and chip (3), the second connecting line (11) Both ends are bonded on chip (3) and the second microstrip circuit (10);
S5, upper cavity (12) and lower chamber (4) are connected as one by pin.
CN201810067322.6A 2018-01-24 2018-01-24 A kind of millimeter-wave monolithic gold wire bonding impedance discontinuity device and installation method Pending CN108321124A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201810067322.6A CN108321124A (en) 2018-01-24 2018-01-24 A kind of millimeter-wave monolithic gold wire bonding impedance discontinuity device and installation method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201810067322.6A CN108321124A (en) 2018-01-24 2018-01-24 A kind of millimeter-wave monolithic gold wire bonding impedance discontinuity device and installation method

Publications (1)

Publication Number Publication Date
CN108321124A true CN108321124A (en) 2018-07-24

Family

ID=62886976

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201810067322.6A Pending CN108321124A (en) 2018-01-24 2018-01-24 A kind of millimeter-wave monolithic gold wire bonding impedance discontinuity device and installation method

Country Status (1)

Country Link
CN (1) CN108321124A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110444511A (en) * 2019-07-23 2019-11-12 中国科学技术大学 Improve the Package boxes structure of Superconducting Quantum Processor resonance frequency

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6239669B1 (en) * 1997-04-25 2001-05-29 Kyocera Corporation High frequency package
JP2003209401A (en) * 2002-01-11 2003-07-25 Hitachi Kokusai Electric Inc High frequency circuit
CN101287353A (en) * 2008-05-21 2008-10-15 青岛海信电器股份有限公司 Electronic equipment with electro-magnetic shielding function

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6239669B1 (en) * 1997-04-25 2001-05-29 Kyocera Corporation High frequency package
JP2003209401A (en) * 2002-01-11 2003-07-25 Hitachi Kokusai Electric Inc High frequency circuit
CN101287353A (en) * 2008-05-21 2008-10-15 青岛海信电器股份有限公司 Electronic equipment with electro-magnetic shielding function

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110444511A (en) * 2019-07-23 2019-11-12 中国科学技术大学 Improve the Package boxes structure of Superconducting Quantum Processor resonance frequency

Similar Documents

Publication Publication Date Title
CN107068658B (en) Capacitance compensation of gold wire bonding in three-dimensional packaging circuit and design method thereof
CN109801907B (en) Quasi-coplanar waveguide gold wire bonding interconnection structure for millimeter wave chip packaging
CN106571354B (en) Power converter and method for manufacturing the same
CN111834720A (en) A Gold Wire Bonding Structure and Multi-Chip Microwave Circuit Based on Multi-branch Matching
WO2018014951A1 (en) Antenna package for a millimetre wave integrated circuit
JP2001308222A (en) Mounting board
CN103153001B (en) A kind of PCB board processing method
CN108321124A (en) A kind of millimeter-wave monolithic gold wire bonding impedance discontinuity device and installation method
CN110676548A (en) A microstrip circulator, isolator and T/R component
Kam et al. 40-Gb/s package design using wire-bonded plastic ball grid array
CN208208947U (en) Minimize SIW surface-mount type circulator
US20090085155A1 (en) Method and apparatus for package-to-board impedance matching for high speed integrated circuits
CN102956605B (en) A kind of semiconductor device and preparation method thereof
CN117650352A (en) W-band waveguide port metal-ceramic shell
CN102522962B (en) Power distribution network in high-speed circuit system
CN110491860A (en) It is a kind of to meet Ka wave band TR component package ceramic shell and lossless coating method
CN115101910A (en) Broadband RF Interconnection Structure Based on PIN Pin
CN108631033A (en) Minimize SIW surface-mount type circulators
CN111509346B (en) Circulator/isolator with inverted structure and processing method thereof
Namaki et al. A tunable macro-modeling method for signal transition in mm-wave flip-chip technology
JP4066353B2 (en) Non-reciprocal circuit element
CN103035616A (en) Vertical transition structure among three-dimensional multi-chip component boards
CN202977410U (en) Semiconductor part
Ndip Novel methodologies for efficient and accurate modeling and optimization of system-in-package modules for RF/high-speed applications
Schmuckle et al. W-band flip-chip interconnects on thin-film substrate

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
RJ01 Rejection of invention patent application after publication
RJ01 Rejection of invention patent application after publication

Application publication date: 20180724