CN108282952A - A kind of wiring method across PCB functional areas - Google Patents

Abstract

The present invention provides a wiring method across PCB functional areas, LCD group signal lines are connected to the LCD interface from the FPGA through strip line routing; wherein, each group of signal lines in the LCD group signal lines adopts Differential pairs are routed, and the lengths of each group of LCD signal lines are equal. The wiring method across PCB functional areas in the embodiment of the present invention can reduce the problem of mutual interference of wiring between different functional areas, and make the interface position placement not affected by regional functional factors, and at the same time improve the space of high-density and high-speed PCBs Use capacity.

Description

A Wiring Method Across Functional Areas of PCB

technical field

The invention relates to the technical field of electronic circuits, in particular to a wiring method across PCB functional areas.

Background technique

This section is intended to provide a background or context for implementations of the invention that are recited in the claims. The descriptions herein are not admitted to be prior art by inclusion in this section.

With the development of integration technology, highly integrated chips have higher requirements on PCB design. Different functional routing such as mixed wiring of power lines and signal lines, mixed wiring of digital signal lines and analog wiring, in the design There will be many SI (signal integrity) and PI (power integrity) issues in the computer.

As shown in Figure 1, the PCB layout is divided into a digital area and a power area. The LCD interface is located in the power area. The signal line needs to be connected from the FPGA to the LCD interface through a connection line, which inevitably needs to cross the power area. Because the DC-DC device in the power supply area is a power device, it will generate a lot of noise and affect the surrounding circuits when it works in a high-current switching state, and the signal line is a small current and weak signal, which is easily interfered by other signals, causing The transmission signal is unstable or even wrong results.

Contents of the invention

The present invention proposes a wiring method across PCB functional areas to solve the problem that existing PCB cross-area wiring is easily interfered by other signals, resulting in unstable or even wrong transmission signals.

In order to achieve the above object, the embodiment of the present invention proposes a wiring method across the PCB functional area, and the LCD group signal line is connected to the LCD interface from the FPGA through a strip line routing method; wherein, the LCD group signal line Each group of signal lines adopts differential pair routing, and the lengths of each group of LCD signal lines are equal.

Further, in an embodiment, when passing through the power supply area, avoid the projection area where the closed power loop formed by the power devices is located.

Further, in one embodiment, the length error between each group of LCD signal lines is less than 1mm.

Further, in one embodiment, at least one circle of ground via holes is provided on both sides of the LCD group signal line.

Further, in one embodiment, the LCD group signal lines are wrapped with ground on the upper and lower layers and on both sides.

The wiring method across PCB functional areas in the embodiment of the present invention can reduce the problem of mutual interference of wiring between different functional areas, and make the placement of interfaces not affected by regional functional factors, and at the same time improve the space of high-density and high-speed PCBs Use capacity.

Description of drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings that need to be used in the description of the embodiments or the prior art. Obviously, the accompanying drawings in the following description are only These are some embodiments of the present invention. For those skilled in the art, other drawings can also be obtained according to these drawings on the premise of not paying creative efforts.

FIG. 1 is a schematic diagram of an existing PCB layout;

Figure 2 is a schematic diagram of wiring across PCB functional areas using equal-length signal groups;

3 is a schematic diagram of a wiring method across PCB functional areas according to an embodiment of the present invention;

4 is a schematic diagram of a power loop generated by a DC-DC chip;

FIG. 5 is a schematic circuit diagram of a DC-DC chip on a PCB.

Detailed ways

The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

Those skilled in the art know that the embodiments of the present invention can be implemented as a system, device, device, method or computer program product. Therefore, the present disclosure may be embodied in the form of complete hardware, complete software (including firmware, resident software, microcode, etc.), or a combination of hardware and software.

The principle and spirit of the present invention will be explained in detail below with reference to several representative embodiments of the present invention.

The invention proposes a method for interference shielding in LCD wiring. The signal line uses differential wiring to improve the anti-noise ability of the signal line itself, and uses equal-length lines to ensure correct signal timing, and actively avoids high-noise areas. Ground holes are added on both sides of the signal line to Improve signal line noise immunity.

As shown in FIG. 2 , it is a schematic diagram of wiring across PCB functional areas by using equal-length signal groups. A group of equal-length signal lines needs to be connected from the FPGA to the LCD interface through the group signal bus. Since the FPGA is located in the digital area and the interface is located in the power area, it is inevitable that the signal lines need to be connected across areas. The high noise characteristics of the power area may It causes the LCD signal to introduce noise, and the impact is that the screen display is abnormal or even cannot be displayed.

Fig. 3 is the schematic diagram of the wiring method across PCB functional area of the embodiment of the present invention, as shown in Fig. 3, the LCD group signal line is connected to the LCD interface from FPGA through the routing mode of strip line; Wherein, described LCD group Each group of signal lines in the group of signal lines adopts differential pair routing, and the lengths of each group of LCD signal lines are equal.

In this embodiment, the LCD signal lines come out from the FPGA, and the order of going out is from the outside to the inside layer by layer (the inside and the outside are relative to the center of the FPGA), and the signal lines go through a small section of microstrip line and then through the via hole. Go to the inner layer to run the strip line. When passing through the power supply area, avoid the projection area where the closed power loop composed of power devices (such as MOS tubes, power inductors, and energy storage capacitors) is located, and then reach the LCD interface.

In this embodiment, the signal line adopts a differential pair routing, and the advantage of using the differential pair routing is that the coupling relationship within the signal line is enhanced and external common-mode signal interference is reduced.

In this embodiment, wires of equal length are used between wire groups, and the error of equal length is less than 1mm. Ensure that the signals arrive at the terminals at the same time, so that the signal timing is correct. This is like several water pipes side by side, all of the same length, and the water in the water pipes can flow out at the same time when the faucet is turned on at the same time.

In this embodiment, the routing of the signal lines should avoid the projection area of the DC-DC, which is to avoid the noise area.

DCDC switching power supply is a high-efficiency DC to DC voltage conversion device. The main topology is buck type. The conversion efficiency of this type of power supply is usually above 85%. A better conversion chip can make the power supply efficiency reach above 95%. This power supply uses the MOS tube as a switch to charge the energy storage inductance and capacitor to realize voltage conversion. The switching speed can reach a speed of several hundred thousand to several megahertz. The device is causing interference. Among them, the range around the buck power topology has a serious impact, and its principle is shown in Figure 4 below. And, as shown in FIG. 5 , it is a schematic diagram of a real circuit of a DC-DC chip on a PCB. Corresponding to Figure 4, for the DC-DC chip, the area seriously affected by noise is the closed PCB space surrounded by the inductance, capacitance, and MOS of the two loops of the buck.

In Figure 4 and Figure 5, 101 and 201 are two power loops. During the circuit operation, relatively strong power supply noise will be induced in the loop area of these two parts. In the rectangular frame, the projected area of the loop formed by 101 and 201 shown in Figure 4 and Figure 5 (that is, the projected area of a DCDC) should be avoided, that is to say, in the circuit where 101 and 201 are located and in phase with it Signal lines cannot be routed near the connected area. If necessary, holes need to be drilled to ground the area so that it maintains a relatively independent space on the return flow.

In this embodiment, at least one circle of grounding vias is provided on both sides of the LCD group signal lines. The advantage of this is that the signal lines form an independent space, which is more conducive to shielding external signals and improving anti-interference quality. .

In this embodiment, the upper and lower layers and both sides of the LCD group signal lines are wrapped with ground.

The wiring method across PCB functional areas in the embodiment of the present invention can reduce the problem of mutual interference of wiring between different functional areas, and make the placement of interfaces not affected by regional functional factors, and at the same time improve the space of high-density and high-speed PCBs Use capacity.

In the present invention, specific examples have been applied to explain the principles and implementation methods of the present invention, and the descriptions of the above examples are only used to help understand the method of the present invention and its core idea; meanwhile, for those of ordinary skill in the art, according to this The idea of the invention will have changes in the specific implementation and scope of application. To sum up, the contents of this specification should not be construed as limiting the present invention.

Claims (5)

1. A wiring method across PCB functional areas is characterized in that LCD group signal lines are connected to an LCD interface from an FPGA in a strip line wiring mode; wherein,

each group of signal lines in the LCD group signal lines adopts differential pair routing, and the lengths of the LCD signal lines are equal.

2. The method as claimed in claim 1, wherein a projected area of a closed power loop formed by the power devices is avoided when passing through the power source area.

3. The method of routing across a PCB functional area of claim 1, wherein the length error between each set of LCD signal lines is less than 1 mm.

4. The method of claim 1, wherein at least one turn of ground vias is disposed on both sides of the LCD group signal lines.

5. The method of routing across a PCB functional area of claim 1, wherein the LCD group signal lines are wrapped with ground on both the top and bottom layers and on both sides.