CN108281464B - Display panel and display device - Google Patents
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- CN108281464B CN108281464B CN201810001474.6A CN201810001474A CN108281464B CN 108281464 B CN108281464 B CN 108281464B CN 201810001474 A CN201810001474 A CN 201810001474A CN 108281464 B CN108281464 B CN 108281464B
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- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
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Abstract
The application discloses display panel and display device relates to and shows technical field, includes: the liquid crystal display panel comprises an array substrate, a plurality of sub-pixel regions and a plurality of transparent regions, wherein the sub-pixel regions and the transparent regions are formed on the array substrate; each sub-pixel region comprises 3 pixel elements with the same color, and the 3 pixel elements are adjacent to each other in pairs; any three sub-pixel regions are adjacent to each other in pairs, the colors of any two adjacent three sub-pixel regions are different, and one pixel element in one sub-pixel region is adjacent to one pixel element in the other sub-pixel region; the transparent area is located in the central area of the sub-pixel area, and/or the transparent area is located in the boundary area of any two adjacent three sub-pixel areas. According to the scheme, the problem of interlaced display in the prior art is effectively solved, the display effect of the display panel and the display device is favorably improved, and the visual experience effect of a user is favorably improved.
Description
Technical Field
The present application relates to the field of display technologies, and in particular, to a display panel and a display device.
Background
In recent years, Organic Light-Emitting diodes (OLEDs) have become a very advanced display industry in the sea and abroad, which is known as a "star" display technology of the next generation, mainly because OLEDs have the characteristics of self-luminescence, wide viewing angle, fast response time, high luminous efficiency, thin panel thickness, capability of manufacturing large-sized and bendable panels, simple manufacturing process, low cost, and the like.
With the continuous development of the technology, in order to meet different requirements of people on the organic electroluminescent display device, a transparent organic electroluminescent display device is introduced, people can see objects placed behind the transparent organic electroluminescent display device through the transparent organic electroluminescent display device, and information can be displayed on a panel of the transparent organic electroluminescent display device.
Transparent organic electroluminescent display device is provided with display area and transparent region, display area is used for carrying out information display, transparent region embodies for transparent state, generally, display area includes the sub-pixel region of a plurality of rectangle structures, transparent region includes the transparent pixel region of a plurality of rectangle structures, sub-pixel region and transparent pixel region distribute in the line region of difference, and whole be array arrangement, when lighting display device, display device can produce obvious effect of interlacing the demonstration in the vision, greatly reduced user's visual experience effect.
Disclosure of Invention
In view of this, a technical problem to be solved in the present application is to provide a display panel and a display device, in which a transparent region is located in a central region of a sub-pixel region and/or located in a boundary region of any two adjacent three sub-pixel regions, so as to effectively improve the problem of interlaced display in the prior art, which is beneficial to improving the display effect of the display panel and the display device, and is also beneficial to improving the visual experience effect of a user.
In order to solve the technical problem, the following technical scheme is adopted:
in a first aspect, the present application provides a display panel comprising: the liquid crystal display panel comprises an array substrate, a plurality of sub-pixel regions and a plurality of transparent regions, wherein the sub-pixel regions and the transparent regions are formed on the array substrate;
each sub-pixel region comprises 3 pixel elements with the same color, and the 3 pixel elements are adjacent to each other in pairs;
any three sub-pixel regions are adjacent to each other in pairs, the colors of any two adjacent three sub-pixel regions are different, and one pixel element in one sub-pixel region is adjacent to one pixel element in the other sub-pixel region;
the transparent area is positioned in the central area of the sub-pixel area;
and/or the transparent area is positioned at the junction area of any two adjacent three sub-pixel areas.
Optionally, wherein:
each pixel element comprises 2 sub-pixel elements, and the gravity centers of the 6 sub-pixel elements in each sub-pixel region are sequentially connected to form a convex hexagon;
one sub-pixel element in one of the sub-pixel regions is adjacent to one sub-pixel element in the other sub-pixel region.
Optionally, wherein:
the transparent areas are uniformly distributed on the array substrate.
Optionally, wherein:
the area of the orthographic projection of one transparent region on the plane of the array substrate is 1/9-3/4 of the area of the orthographic projection of one sub-pixel region on the plane of the array substrate.
Optionally, wherein:
the shape of the orthographic projection of the transparent area on the plane of the array substrate is the same as the shape of the orthographic projection of the sub-pixel area on the plane of the array substrate.
Optionally, wherein:
and in the three adjacent sub-pixel regions, each sub-pixel region is provided with a sub-pixel element pair adjacent to the other two sub-pixel regions, and the sub-pixel element pairs of the three sub-pixel regions form at least one pixel unit.
Optionally, wherein:
the three sub-pixel element pairs of the sub-pixel region form two pixel units, and the three sub-pixel elements of the three sub-pixel region pairs with different colors form one pixel unit.
Optionally, wherein:
each sub-pixel region further comprises 6 pixel electrodes, and the 6 pixel electrodes in the same sub-pixel region are electrically connected with the 6 sub-pixel elements in the sub-pixel region in a one-to-one correspondence mode.
Optionally, wherein:
each of the pixel electrodes is insulated from each other.
Optionally, wherein:
the display panel further comprises a plurality of thin film transistors, wherein the thin film transistors are electrically connected with the pixel electrodes in a one-to-one correspondence mode and are used for driving the sub-pixel elements electrically connected with the pixel electrodes to emit light.
Optionally, wherein:
the array substrate comprises a plurality of gate lines and a plurality of data signal lines, the gate lines and the data signal lines are crossed, and each sub-pixel element is arranged in an area defined by two adjacent gate lines and two adjacent data signal lines.
Optionally, wherein:
the display panel further comprises a plurality of retaining wall structures, and each sub-pixel region is formed by one retaining wall structure in a surrounding mode.
In a second aspect, the present application provides a display device comprising the display panel of the present application.
Compared with the prior art, this application display panel and display device, reached following effect:
in the display panel and the display device provided by the embodiment of the application, each sub-pixel region on the array substrate comprises 6 sub-pixel elements with the same graph and the same color, one sub-pixel element in each sub-pixel region is adjacent to only one sub-pixel element in the other sub-pixel region, especially, the transparent region is located in the central region of the sub-pixel region, and/or the transparent region is located in the boundary region of any two adjacent three sub-pixel regions.
Drawings
The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the application and together with the description serve to explain the application and not to limit the application. In the drawings:
fig. 1 is a schematic diagram illustrating a pixel arrangement of a display panel according to an embodiment of the present disclosure;
FIG. 2 is a schematic view of an arrangement of a sub-pixel region in the pixel arrangement of FIG. 1;
fig. 3 is a diagram illustrating a positional relationship between two adjacent three sub-pixel regions and a transparent region according to an embodiment of the present application;
fig. 4 is a schematic layout diagram of 7 sub-pixel regions provided in the embodiment of the present application;
fig. 5 is a schematic view illustrating another pixel arrangement of a display panel according to an embodiment of the present disclosure;
fig. 6 is a schematic diagram illustrating another arrangement of three adjacent two sub-pixel regions according to an embodiment of the present disclosure;
fig. 7 is a schematic view illustrating another arrangement of three adjacent two sub-pixel regions according to an embodiment of the present disclosure;
fig. 8 is a cross-sectional view of a display panel according to an embodiment of the present application;
fig. 9 is another cross-sectional view of a display panel according to an embodiment of the present application;
fig. 10 is a top view of an array substrate in a display panel according to an embodiment of the present disclosure;
fig. 11 is a circuit diagram showing an area defined by two adjacent gate lines and two adjacent data signal lines;
fig. 12 is a schematic structural diagram of a sub-pixel region according to an embodiment of the present disclosure;
fig. 13 is a schematic structural diagram of a display device according to an embodiment of the present disclosure.
Detailed Description
As used in the specification and in the claims, certain terms are used to refer to particular components. As one skilled in the art will appreciate, manufacturers may refer to a component by different names. This specification and claims do not intend to distinguish between components that differ in name but not function. In the following description and in the claims, the terms "include" and "comprise" are used in an open-ended fashion, and thus should be interpreted to mean "include, but not limited to. The description which follows is a preferred embodiment of the present application, but is made for the purpose of illustrating the general principles of the application and not for the purpose of limiting the scope of the application. The protection scope of the present application shall be subject to the definitions of the appended claims.
Referring to fig. 1, a schematic pixel arrangement diagram of a display panel according to an embodiment of the present disclosure is shown, fig. 2 is a positional relationship diagram of a sub-pixel region and a transparent region in the schematic pixel arrangement diagram shown in fig. 1, and fig. 3 is a positional relationship diagram of three sub-pixel regions and transparent regions adjacent to each other in pairs according to an embodiment of the present disclosure. Referring to fig. 1, the present application provides a display panel 100 including: an array substrate 10, and a plurality of sub-pixel regions 20 and a plurality of transparent regions 40 formed on the array substrate 10;
each sub-pixel region 20 comprises 3 pixel elements ( pixel elements 81, 82 and 83, respectively) of the same color, the 3 pixel elements being adjacent two by two, see fig. 1;
any three sub-pixel regions 20 are adjacent to each other two by two, see fig. 3, the colors of any two adjacent three sub-pixel regions 20 are different, and one pixel element in one sub-pixel region 20 is adjacent to one pixel element in the other sub-pixel region 20;
the transparent region 40 is located in the central region of the sub-pixel region 20, and/or the transparent region 40 is located in the boundary region of any two adjacent three sub-pixel regions 20.
Specifically, in the display panel 100 provided in the embodiment of the present application, a plurality of sub-pixel regions 20 and transparent regions 40 shaped as shown in fig. 2 are disposed on the array substrate 10, each sub-pixel region 20 includes 3 pixel elements 81, 82, and 83 with the same color, and 3 pixel elements in the same sub-pixel region 20 are adjacent to each other; any three sub-pixel regions 21, 22 and 23 on the array substrate 10 are adjacent to each other, and referring to fig. 3, the colors of any two adjacent three sub-pixel regions 21, 22 and 23 are different. Pixel element 33 in sub-pixel region 21 is adjacent to pixel element 43 in sub-pixel region 22 and pixel element 53 in sub-pixel region 23, respectively. In particular, in the embodiments shown in fig. 1 to 3, the transparent region 40 is located in a central region of each sub-pixel region, in the embodiment shown in fig. 4, the transparent region 40 is located in a boundary region of any two adjacent three sub-pixel regions (any two adjacent three sub-pixel regions form a three-color hexagon, and the transparent region 40 is located in a central region of the three-color hexagon), in the embodiment shown in fig. 5, the transparent region 40 is located in a central region of each sub-pixel region 20 and a boundary region of any two adjacent three sub-pixel regions 20, where fig. 4 is a schematic layout diagram of 7 sub-pixel regions provided in the embodiment of the present application, and fig. 5 is another schematic layout diagram of pixels of the display panel provided in the embodiment of the present application. Compared with the mode that sets up sub-pixel area 20 and transparent area 40 branch line among the prior art, this application sets up transparent area 40 at the central zone of sub-pixel area 20 or arbitrary two liang of adjacent three sub-pixel area 20's boundary region, has effectively avoided the phenomenon of the display panel 100 at the interlace that shows that the display panel 100 appears in the display process, has effectively promoted display panel 100's display effect, is favorable to promoting user's visual experience effect simultaneously.
Optionally, with continued reference to fig. 4, each pixel element includes 2 sub-pixel elements, and the centers of gravity of the 6 sub-pixel elements in each sub-pixel region are sequentially connected to form a convex hexagon; one sub-pixel element in one sub-pixel region is adjacent to one sub-pixel element in another sub-pixel region.
Specifically, in conjunction with fig. 2 and 4, each pixel element in the sub-pixel region 21 includes two sub-pixel elements, and thus the sub-pixel region 21 includes 6 sub-pixel elements 30, embodied as sub-pixel elements 31, 32, 33, 34, 35 and 36, and centers of the 6 sub-pixel elements are sequentially connected to form a convex hexagon as shown in fig. 2. The center of gravity of the graph as referred to herein is the center of the polygon for a regular polygon, for example, the center of a triangle is the intersection of the three side centerlines, and the center of gravity of a parallelogram is the intersection of the two diagonals thereof. For the remaining figures, it can be obtained by derivation of geometric formulas. As can be seen from the embodiment shown in fig. 4, each sub-pixel element in sub-pixel region 21 is adjacent to only one sub-pixel element in its adjacent sub-pixel region (22, 23, 24, 25, 26, 27), e.g., sub-pixel element 31 in sub-pixel region 21 is adjacent to sub-pixel element 31 'in sub-pixel region 22, sub-pixel element 32 is adjacent to sub-pixel element 32' in sub-pixel region 23, sub-pixel element 33 is adjacent to sub-pixel element 33 'in sub-pixel region 24, sub-pixel element 34 is adjacent to sub-pixel element 34' in sub-pixel region 25, sub-pixel element 35 is adjacent to sub-pixel element 35 'in sub-pixel region 26, and sub-pixel element 36 is adjacent to sub-pixel element 36' in sub-pixel region 27. When the arrangement mode of fig. 4 is adopted by each sub-pixel element, the space of the display panel is fully utilized, and the improvement of the space utilization rate of the display panel is facilitated.
Alternatively, referring to fig. 1 and 5, in the display panel 100 provided in the embodiment of the present application, the transparent regions 40 are uniformly distributed on the array substrate 10. Transparent region 40 evenly distributed in this application is on array substrate 10, when lighting up display panel 100, transparent region and information display's region homoenergetic evenly distributed on display panel 100 for display panel 100's picture shows more evenly, thereby is favorable to further promoting display panel 100's display effect.
Optionally, the area of the orthographic projection of one transparent region 40 on the plane of the array substrate 10 is 1/9 to 3/4 of the area of the orthographic projection of one sub-pixel region 20 on the plane of the array substrate 10, considering that when the area of the orthographic projection of the transparent region 40 on the plane of the array substrate 10 is smaller than 1/9 of the orthographic projection of one sub-pixel region 20 on the plane of the array substrate 10, the transparency of the display panel will be less than 10%, which will affect the transparency of the display panel, and when the area of the orthographic projection of the transparent region 40 on the plane of the array substrate 10 is larger than 3/4 of the area of the orthographic projection of one sub-pixel region 20 on the plane of the array substrate 10, the wiring space on the display panel will become very small, which will affect the normal wiring of the display panel, therefore, the area of the orthographic projection of the transparent region 40 on the plane of the array substrate 10 is designed to be one sub-pixel region 20 on the plane of the array substrate 10 In the range from 1/9 to 3/4 of the planar forward projection area, after the display panel 100 is lighted up, the transparent area and the information display area are perfectly combined and integrated, so that the information display function can be effectively realized, and the transparent effect of the transparent area 40 is not affected. The user can see not only an object located on the back surface of the display panel 100 but also contents displayed in the information display area clearly through the display panel 100.
Optionally, the shape of the orthographic projection of the transparent region 40 on the plane of the array substrate 10 is the same as the shape of the orthographic projection of the sub-pixel region 20 on the plane of the array substrate 10. In the embodiments shown in fig. 1 to 5, the orthographic projection of each sub-pixel region 20 on the plane of the array substrate 10 is a regular hexagon, and similarly, the orthographic projection of the transparent region 40 on the plane of the array substrate 10 is a regular hexagon. The shape of the transparent region 40 is designed to be the same as that of the sub-pixel region 20, the sub-pixel region 20 and the transparent region 40 can be mutually referred to in the process of forming the sub-pixel region 20 and the transparent region 40, and in addition, the transparent region 40 and the sub-pixel region 20 do not have the phenomenon of interlaced display in the display process. Of course, the shape of the transparent region 40 is not limited to be the same as that of the sub-pixel region 20, and may be designed into other feasible shapes, such as a circle, a triangle, a trapezoid, and the like, which is not specifically limited in this application.
Alternatively, of the three sub-pixel regions 20 adjacent to each other two by two, each sub-pixel region 20 has a pair of sub-pixel elements adjacent to the other two sub-pixel regions 20, and the pair of sub-pixel elements of the three sub-pixel regions 20 constitutes at least one pixel unit.
The pixel unit in the embodiment of the present application is the smallest unit capable of performing color display, and at least three sub-pixels with different colors are required to form one pixel unit. In the embodiments provided in the present application, the sub-pixel element pairs in the three sub-pixel regions 20 may form two pixel units, or may form one pixel unit. For example, in the embodiment shown in fig. 3, the sub-pixel regions 21, 22 and 23 are adjacent to each other two by two, the sub-pixel region 21 has the pair of sub-pixel elements 31 and 32 adjacent to the sub-pixel regions 22 and 23, the sub-pixel region 22 has the pair of sub-pixel elements 41 and 42 adjacent to the sub-pixel regions 21 and 23, the sub-pixel region 23 has the pair of sub-pixel elements 51 and 52 adjacent to the sub-pixel regions 21 and 22, and the sub-pixel elements 31, 32, 41, 42, 51 and 52 may collectively form a pixel unit to perform a display function. Each sub-pixel region 20 (for example, the sub-pixel regions 21, 22, and 23 in fig. 3) of the present application includes 6 sub-pixel elements with the same pattern and the same color, and the area occupied by each sub-pixel element is 1/6 of the area of the sub-pixel element in the conventional manner, such that the resolution of the display panel 100 provided by the embodiment of the present application is greatly improved.
Optionally, fig. 6 is a schematic diagram illustrating another arrangement of two adjacent three sub-pixel regions provided in the embodiment of the present application, referring to fig. 6, the sub-pixel element pairs of the three sub-pixel regions 21, 22, and 23 form two pixel units, and the three sub-pixel elements of any color in the sub-pixel element pairs of the three sub-pixel regions 21, 22, and 23 form one pixel unit.
Specifically, in the embodiment shown in fig. 6, sub-pixel elements 31, 41 and 51 may form one pixel unit 61, sub-pixel elements 32, 42 and 52 form another pixel unit (not shown), and the central points P1 and P2 of the two pixel units do not coincide, and the two pixel units can respectively play a display role. When two adjacent pairs of three sub-pixel elements in two adjacent three sub-pixel regions 20 form a pixel unit with two non-coincident central points, 6 sub-pixel elements in each sub-pixel region 20 all play a display role, and the area of each sub-pixel element playing the display role is 1/6 of the area of the sub-pixel element in the conventional manner, at this time, the resolution of the display panel 100 provided by the embodiment of the present application can be improved to 6 times of that in the conventional manner to the maximum. When the resolution of the display panel 100 is improved, it is also advantageous to reduce the difficulty in film formation and patterning of the organic light emitting material.
In addition, fig. 7 is another schematic layout diagram of three adjacent two-by-two sub-pixel regions provided in the present embodiment, in this embodiment, the sub-pixel element 32, the sub-pixel element 41, and the sub-pixel element 51 are spaced from each other to form a pixel unit 62; sub-pixel element 31, sub-pixel element 42, and sub-pixel element 52 are spaced apart from one another to form another pixel unit (not shown). When three sub-pixel elements with different colors and spaced from each other form a pixel unit, the central points P3 of the two pixel units coincide with each other, and are represented as a light emitting point when displaying, and the two pixel units coincide with each other to form a pixel unit to play a role, which is also beneficial to improving the resolution of the display panel 100. In addition, when three mutually spaced sub-pixel elements with different colors form a pixel unit together, two pixel units are superposed to form one pixel unit to play a role, even if one pixel unit fails due to the failure of a certain sub-pixel element, the other pixel unit can play a normal display role, and the corresponding light-emitting point still cannot fail, so that the normal display of the display panel 100 of the application cannot be influenced, and the display panel 100 of the application has a certain fault-tolerant mechanism.
Optionally, with reference to fig. 1, fig. 2 and fig. 8, fig. 8 is a cross-sectional view of a display panel provided in an embodiment of the present application, each sub-pixel region 20 in the present application further includes 6 pixel electrodes 70, and the 6 pixel electrodes 70 in the same sub-pixel region 20 are electrically connected to the 6 sub-pixel elements 30 in the sub-pixel region 20 in a one-to-one correspondence manner.
Specifically, referring to fig. 8, each sub-pixel element 30 in the embodiment of the present application is driven by an independent pixel electrode 70, so that each of the 6 sub-pixel elements 30 in each sub-pixel region 20 in the present application is independently used as one sub-pixel in a pixel unit to perform color mixing with other color sub-pixels to realize display, and the display panel 100 provided in the embodiment of the present application can also realize independent control over the 6 sub-pixel elements 30 in each sub-pixel region 20, thereby improving the display flexibility of the display panel 100 of the present application.
Alternatively, each of the pixel electrodes 70 is insulated from each other. The pixel electrodes 70 insulated from each other are connected to different sub-pixel elements in a one-to-one correspondence, and independent control of each sub-pixel element is realized. The pixel electrodes 70 are insulated from each other, which is more advantageous for realizing independent control of the sub-pixel elements connected to each pixel electrode 70.
Optionally, fig. 9 is another cross-sectional view of the display panel provided in the embodiment of the present application, where the display panel 100 further includes a plurality of thin film transistors 80, and the thin film transistors 80 are electrically connected to the pixel electrodes 70 in a one-to-one correspondence, and are used for driving the sub-pixel elements 30 electrically connected to the pixel electrodes 70 to emit light.
In particular, with continued reference to fig. 9, the display panel 100 in the present application further includes a plurality of organic light emitting units 90. The organic light emitting unit 90 includes a cathode layer 91, an organic light emitting material layer 92, and an anode layer 93 sequentially arranged from top to bottom, where the anode layer 93 is equivalent to the pixel electrode 70 in this application. The drain electrode 84 of the thin film transistor 80 of the present application is electrically connected to the anode layer 93. After the thin film transistor 80 is turned on, holes and electrons are injected into the organic light emitting material layer from the anode layer and the cathode layer, respectively, under the driving of an applied voltage supplied through a power line, and the holes and the electrons meet and recombine in the organic light emitting material layer to release energy, and then the energy is transferred to molecules of an organic light emitting substance in the organic light emitting material to make the molecules of the organic light emitting substance transition from a ground state to an excited state. The excited state is unstable, the excited molecules return to the ground state from the excited state, and radiation transition generates a light-emitting phenomenon, so that the display of a picture can be realized by the organic light-emitting diode based on the light-emitting phenomenon.
Alternatively, fig. 10 is a top view of an array substrate in a display panel provided in an embodiment of the present application, where the array substrate 10 includes a plurality of gate lines 11 and a plurality of data signal lines 12, the gate lines 11 and the data signal lines 12 intersect, and each sub-pixel element 30 is disposed in an area defined by two adjacent gate lines 11 and two adjacent data signal lines 12.
Specifically, fig. 11 shows a circuit diagram of an area defined by two adjacent gate lines and two adjacent data signal lines, and as can be seen from the diagram, the area further includes a power supply line 13 arranged in parallel with the data signal line 12, the power supply line 13 being insulated from the data signal line 12, and the power supply line 13 being used for supplying a supply voltage. Also included in this region are a switching thin film transistor 85, a driving thin film transistor 86, a storage capacitor C1, and an organic light emitting diode L. A gate electrode of the switching thin film transistor 85 is electrically connected to the gate line 11, a source electrode is electrically connected to the data signal line 12, a drain electrode is electrically connected to a gate electrode of the driving thin film transistor 86, and a storage capacitor C1 is further provided between the gate electrode of the driving thin film transistor 86 and the power supply line 13; the source of the driving thin film transistor 86 is electrically connected to the power line 13, and the drain of the driving thin film transistor 86 is electrically connected to the pixel electrode 70 in the organic light emitting diode L. The power line 13 supplies a supply voltage to the organic light emitting diode L.
In the embodiment shown in fig. 11, when the switching thin film transistor 85 is turned on by the gate signal applied through the gate line 11, the data signal from the data signal line 12 is applied to the gate of the driving thin film transistor 86 and the storage capacitor C1. When the data signal turns on the driving thin film transistor 86, a current is supplied from the power line 13 to the organic light emitting diode L, causing the organic light emitting diode L to emit light. In this case, when the driving thin film transistor 86 is turned on, the level of the current applied from the power supply line 13 to the organic light emitting diode L is determined to a level such that the organic light emitting diode L can generate gray scales. The storage capacitor is used to maintain the voltage of the gate of the driving thin film transistor 86 when the switching thin film transistor 85 is turned off. Therefore, even if the switching thin film transistor 85 is turned off, the level of the current applied from the power line 13 to the organic light emitting diode L is maintained until the next frame.
Alternatively, referring to fig. 8 and 12, fig. 12 is a schematic view illustrating another structure of a sub-pixel region according to an embodiment of the present disclosure, and as can be seen from the figure, the display panel 100 further includes a plurality of retaining wall structures 99, and each sub-pixel region 20 is surrounded by one retaining wall structure 99. Thus, the circuit on the array substrate 10 can be disposed in the front projection area of the array substrate 10 by the dam structure 99, which is favorable for increasing the aperture ratio of the display panel 100 of the present application.
Optionally, fig. 13 is a schematic structural diagram of a display device provided in an embodiment of the present application. Based on the same inventive concept, the present application further provides a display device 200, referring to fig. 12, including the display panel 100 provided in the above-described embodiment of the present application. The display device 200 provided in the embodiment of the present application may be any product or component having a transparent display function, for example, a showcase for displaying, through which a customer can see goods located behind the showcase, and information related to the upper skin may be displayed on a panel of the transparent showcase. In the embodiment of the present application, reference may be made to the embodiment of the display panel 100, and repeated descriptions thereof are omitted here.
As can be seen from the above embodiments, the embodiments of the present application have the following beneficial effects:
in the display panel and the display device provided by the embodiment of the application, each sub-pixel region on the array substrate comprises 6 sub-pixel elements with the same graph and the same color, one sub-pixel element in each sub-pixel region is adjacent to only one sub-pixel element in the other sub-pixel region, especially, the transparent region is located in the central region of the sub-pixel region, and/or the transparent region is located in the boundary region of any two adjacent three sub-pixel regions.
The foregoing description shows and describes several preferred embodiments of the present application, but as aforementioned, it is to be understood that the application is not limited to the forms disclosed herein, but is not to be construed as excluding other embodiments and is capable of use in various other combinations, modifications, and environments and is capable of changes within the scope of the inventive concept as expressed herein, commensurate with the above teachings, or the skill or knowledge of the relevant art. And that modifications and variations may be effected by those skilled in the art without departing from the spirit and scope of the application, which is to be protected by the claims appended hereto.
Claims (13)
1. A display panel, comprising: the liquid crystal display panel comprises an array substrate, a plurality of sub-pixel regions and a plurality of transparent regions, wherein the sub-pixel regions and the transparent regions are formed on the array substrate;
each sub-pixel region comprises 3 pixel elements with the same color, and the 3 pixel elements are adjacent to each other in pairs;
any three sub-pixel regions are adjacent to each other in pairs, the colors of any two adjacent three sub-pixel regions are different, and one pixel element in one sub-pixel region is adjacent to one pixel element in the other sub-pixel region;
the transparent area is positioned in the central area of the sub-pixel area;
and/or the transparent area is positioned at the junction area of any two adjacent three sub-pixel areas.
2. The display panel according to claim 1, wherein each of the pixel elements comprises 2 sub-pixel elements, and the centers of gravity of the 6 sub-pixel elements in each of the sub-pixel regions are sequentially connected to form a convex hexagon;
one sub-pixel element in one of the sub-pixel regions is adjacent to one sub-pixel element in the other sub-pixel region.
3. The display panel according to claim 2, wherein each of the transparent regions is uniformly distributed on the array substrate.
4. The display panel of claim 2, wherein an area of an orthogonal projection of one of the transparent regions on a plane of the array substrate is 1/9 through 3/4 of an area of an orthogonal projection of one of the sub-pixel regions on a plane of the array substrate.
5. The display panel according to claim 2, wherein an orthographic projection shape of the transparent region on the plane of the array substrate is the same as an orthographic projection shape of the sub-pixel region on the plane of the array substrate.
6. The display panel according to claim 2, wherein each of the three adjacent sub-pixel regions has a pair of sub-pixel elements adjacent to the other two sub-pixel regions, and the pairs of sub-pixel elements of the three sub-pixel regions constitute at least one pixel unit.
7. The display panel according to claim 6, wherein the three pairs of sub-pixel elements of the sub-pixel regions constitute two pixel units, and the three pairs of sub-pixel elements of the three sub-pixel regions, which have different colors, constitute one pixel unit.
8. The display panel of claim 2, wherein each of the sub-pixel regions further comprises 6 pixel electrodes, and the 6 pixel electrodes in the same sub-pixel region are electrically connected to the 6 sub-pixel elements in the sub-pixel region in a one-to-one correspondence.
9. The display panel according to claim 8, wherein each of the pixel electrodes is insulated from each other.
10. The display panel according to claim 8, further comprising a plurality of thin film transistors electrically connected to the pixel electrodes in a one-to-one correspondence for driving the sub-pixel elements electrically connected to the pixel electrodes to emit light.
11. The display panel of claim 2, wherein the array substrate comprises a plurality of gate lines and a plurality of data signal lines, the gate lines and the data signal lines are crossed, and each of the sub-pixel elements is disposed in an area defined by two adjacent gate lines and two adjacent data signal lines.
12. The display panel according to claim 2, wherein the display panel further comprises a plurality of retaining wall structures, and each of the sub-pixel regions is surrounded by one of the retaining wall structures.
13. A display device comprising the display panel according to any one of claims 1 to 12.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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CN201810001474.6A CN108281464B (en) | 2018-01-02 | 2018-01-02 | Display panel and display device |
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CN111883559B (en) * | 2019-08-29 | 2022-06-10 | 广东聚华印刷显示技术有限公司 | Pixel arrangement structure and display panel |
CN111883560B (en) * | 2019-08-29 | 2022-02-15 | 广东聚华印刷显示技术有限公司 | Pixel arrangement structure and display panel comprising same |
CN114388598A (en) * | 2021-12-16 | 2022-04-22 | Tcl华星光电技术有限公司 | Display panels and display devices |
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