CN108270457A - A kind of front-end circuitry of radio telescope - Google Patents

Abstract

The invention provides a front-end circuit system of a radio telescope. The front-end circuit system is located between the antenna of the radio telescope and the analog-to-digital conversion circuit system of the radio telescope. The front-end circuit system includes: a primary processing module, a secondary processing module and a clock module; The processing module amplifies and mixes the radio frequency signal received by the antenna to generate an intermediate frequency signal that meets the power requirements of the analog-to-digital conversion circuit system; the secondary processing module extracts the passband signal of the corresponding frequency band in the intermediate frequency signal according to the instruction to It is processed by the analog-to-digital conversion circuit system; the clock module provides a local oscillator for the front-end circuit system and a clock for the analog-to-digital conversion circuit system. The system provided by the invention can meet the high-speed, high-quality, stable and reliable acquisition requirements of radio astronomy data, can receive signals of different bands, meet the needs of different scientific tasks, and is suitable for ultra-wideband data applications, with high flexibility and reliability Well, low power consumption and low cost.

Description

A front-end circuit system of a radio telescope

technical field

The present invention relates to the technical field of astronomy, and more specifically, to a front-end circuit system of a radio telescope.

Background technique

The receiver system is an important part of the telescope and a key factor in determining the performance of the telescope. The 500-meter spherical radio telescope FAST under construction is the largest single-aperture radio telescope in the world, with high resolution, which is its own huge advantage. The working frequency band of FAST is 70MHz-3GHz. In order to maximize the advantages of FAST itself and adapt to different astronomical observation targets, it is necessary for the receiver of FAST to flexibly cover the entire frequency band.

Currently, receivers in radio telescopes can only selectively observe certain bandwidths. For some scientific targets, such as spectral lines, if you need to check the bandwidth of 2-3GHz, you can only check 200MHz each time, that is, you can check the bandwidth of 2-2.2GHz, 2.2-2.4GHz, 2.4-2.6GHz, 2.6-2.8GHz bandwidth and 2.8-3GHz bandwidth, resulting in low observation efficiency. For example, some scientific targets hope to search for pulsars, and the frequency range of pulse signals (such as delta signal) is usually wide (especially if it is an ideal time-domain delta signal, because the time domain is limited and the frequency domain is infinite, so the frequency is in a SINC shape, And the bandwidth is infinitely wide, but the intensity will gradually decrease). At this time, without a specific frequency range search, it often requires continuous attempts, collecting more data, and then repeatedly setting algorithms, which makes the observation efficiency lower.

Contents of the invention

The invention provides a front-end circuit system of a radio telescope which overcomes the problems of narrow receiver coverage bandwidth and low flexibility of the existing radio telescope.

The front-end circuit system is located between the antenna of the radio telescope and the analog-to-digital conversion circuit system of the radio telescope, and the front-end circuit system includes:

Primary processing module, secondary processing module and clock module;

The primary processing module is used to amplify and mix the radio frequency signal received by the antenna to generate an intermediate frequency signal that meets the power requirements of the analog-to-digital conversion circuit system;

The secondary processing module is used to extract the passband signal of the corresponding frequency band in the intermediate frequency signal according to the instruction, so as to be processed by the analog-to-digital conversion circuit system;

The clock module is used to provide a local oscillator for the front-end circuit system, and provide a clock for the analog-to-digital conversion circuit system.

Preferably, the front-end circuit system is also electrically connected to the back-end FPGA circuit system, and the clock module is also used to provide clocks for the back-end FPGA circuit system.

Preferably, the front-end circuit system is electrically connected to the back-end FPGA circuit system through a ribbon cable, and the functions of the front-end circuit system are controlled by the back-end FPGA circuit system.

Preferably, the front-end circuit system further includes:

The signal synchronization auxiliary module is used to provide an antenna signal of 1pps, so that the frequency stabilizer bound to the front-end circuit system, the analog-to-digital conversion circuit system, the back-end FPGA circuit system and the signal synchronization auxiliary module is realized Lock sync.

Preferably, the primary processing module includes:

The first low-noise amplifier, the first fixed attenuator, the first broadband radio frequency amplifier, the first digital variable electronic attenuator, the second fixed attenuator, the second broadband radio frequency amplifier, the third fixed attenuator, the first electrically connected sequentially Three broadband RF amplifiers, a second digitally variable electronic attenuator and a mixer.

Preferably, the first low noise amplifier is CMA-5043+; the first fixed attenuator, the second fixed attenuator and the third fixed attenuator are all GAT-5; the first broadband The RF amplifier, the second broadband RF amplifier and the third broadband RF amplifier are all ADL5610; the first digital variable electronic attenuator and the second digital variable electronic attenuator are all HMC624LP4, and the hybrid The inverter is M1-0008.

Preferably, the secondary processing module includes:

A digital switch electrically connected to the mixer, a low-pass filter electrically connected to the digital switch, and a fourth broadband radio frequency amplifier electrically connected to the low-pass filter.

Preferably, the low-pass filter divides the intermediate frequency signal into four frequency bands, and the four frequency bands are: 0-200MHz, 0-400MHz, 0-800MHz and 0-1500MHz.

Preferably, the clock module includes:

a first voltage-controlled oscillator, configured to provide a local oscillator for the mixer;

The second voltage-controlled oscillator is used to provide clocks for the analog-to-digital conversion circuit system and the back-end FPGA circuit system.

Preferably, the clock module also includes:

a fourth fixed attenuator electrically connected to the first voltage-controlled oscillator, and a fifth broadband radio frequency amplifier electrically connected to the fourth fixed attenuator;

A sixth broadband radio frequency amplifier electrically connected to the second voltage-controlled oscillator.

The front-end circuit system of a radio telescope provided by the present invention can meet the high-speed, high-quality, stable and reliable acquisition requirements of radio astronomy data, can receive signals of different bands, meet the needs of different scientific tasks, and is suitable for ultra-wideband data application, high flexibility, good reliability, low power consumption, and low cost.

Description of drawings

FIG. 1 is a structural diagram of a front-end circuit system of a radio telescope provided according to an embodiment of the present invention;

Fig. 2 is a schematic circuit structure diagram of a front-end circuit system of a radio telescope provided according to an embodiment of the present invention.

Detailed ways

The specific implementation manners of the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. The following examples are used to illustrate the present invention, but are not intended to limit the scope of the present invention.

For radio telescopes, astronomical observations have strong uncertainties in the frequency and range of target observations. Therefore, the receiver system in radio telescopes needs to have strong flexibility. The front-end circuit system of a radio telescope provided by the present invention is an indispensable part of the receiver system and plays a vital role in realizing the functions of the receiver system.

Fig. 1 is a structural diagram of a front-end circuit system of a radio telescope provided according to an embodiment of the present invention. As shown in Fig. 1, the front-end circuit system is located between the antenna of the radio telescope and the analog-to-digital conversion circuit of the radio telescope Between systems, the front-end circuitry includes:

Primary processing module, secondary processing module and clock module;

The primary processing module is used to amplify and mix the radio frequency signal received by the antenna to generate an intermediate frequency signal that meets the power requirements of the analog-to-digital conversion circuit system;

The secondary processing module is used to extract the passband signal of the corresponding frequency band in the intermediate frequency signal according to the instruction, so as to be processed by the analog-to-digital conversion circuit system;

The clock module is used to provide a local oscillator for the front-end circuit system, and provide a clock for the analog-to-digital conversion circuit system.

Specifically, the radio frequency signal received by the radio telescope antenna is usually relatively weak, and the function of setting the front-end circuit system is to amplify and mix the weak radio frequency signal to generate an intermediate frequency signal that meets the power requirements of the analog-to-digital conversion circuit system. And according to the instruction, extract the pass-band signal of the corresponding frequency band in the intermediate frequency signal for processing by the analog-to-digital conversion circuit system. The analog-to-digital conversion circuit system can perform analog-to-digital conversion on passband signals of different frequency bands, so as to be applied to different observation needs. It should be noted that the instruction may be generated by a programming language or by a back-end FPGA circuit system.

Another function of the front-end circuit system is to provide a clock for the analog-to-digital conversion circuit system, so that the front-end circuit system and the analog-to-digital conversion circuit system are synchronized.

It should be noted that the functions of the front-end circuit system can be controlled by a programming language, and can also be controlled by a back-end FPGA circuit system.

The front-end circuit system of a radio telescope provided by this embodiment amplifies, mixes and filters the weak radio frequency signal received by the antenna of the radio telescope, so that the analog-to-digital conversion circuit system can cover the entire bandwidth of the radio telescope Under certain circumstances, it can also process passband signals of different frequency bands, with high flexibility. Moreover, another function of the front-end circuit system is to provide a clock for the analog-to-digital conversion circuit system, thereby ensuring the synchronization between the front-end circuit system and the analog-to-digital conversion circuit system, and high accuracy.

The front-end circuit system is also electrically connected to the back-end FPGA circuit system, and the clock module is also used to provide clocks for the back-end FPGA circuit system.

The clock module of the front-end circuit system can not only provide a clock for the analog-to-digital conversion circuit system, but also provide a clock for the back-end FPGA system to ensure that the front-end circuit system, the analog-to-digital conversion system and the back-end FPGA system are synchronized.

Further, the front-end circuit system is electrically connected to the back-end FPGA circuit system through a ribbon cable, and the functions of the front-end circuit system are controlled by the back-end FPGA circuit system.

Specifically, the functions of the front-end circuit system can be controlled by a programming language, and can also be controlled by a back-end FPGA circuit system. The front-end circuit system is connected with the GPIO port of the back-end FPGA circuit system through a ribbon cable.

Based on the above embodiments, the front-end circuit system in this embodiment further includes:

The signal synchronization auxiliary module is used to provide an antenna signal of 1pps, so that the frequency stabilizer bound to the front-end circuit system, the analog-to-digital conversion circuit system, the back-end FPGA circuit system and the signal synchronization auxiliary module is realized Lock sync.

The front-end circuit system of a radio telescope provided by this embodiment provides a 1pps antenna signal through the signal synchronization auxiliary module, so that the front-end circuit system, the analog-to-digital conversion circuit system, the back-end FPGA circuit system and the signal synchronization auxiliary module are bound The frequency stabilizer achieves lock-in synchronization and avoids frequency drift.

Based on the above embodiments, this embodiment will specifically describe the primary processing module of the front-end circuit system in conjunction with the accompanying drawings.

Fig. 2 is a schematic circuit structure diagram of a front-end circuit system of a radio telescope provided according to an embodiment of the present invention. As shown in Fig. 2, the primary processing module includes:

The first low-noise amplifier, the first fixed attenuator, the first broadband radio frequency amplifier, the first digital variable electronic attenuator, the second fixed attenuator, the second broadband radio frequency amplifier, the third fixed attenuator, the first electrically connected sequentially Three broadband RF amplifiers, a second digitally variable electronic attenuator and a mixer.

Specifically, the primary processing module preprocesses the weak radio frequency signal received by the antenna, and through the cooperation of amplifiers and attenuators at all levels in the primary processing module, the power of the final output intermediate frequency signal can be controlled by the analog-to-digital conversion circuit system. within range.

The front-end circuit system of a radio telescope provided in this embodiment preprocesses the weak radio frequency signal received by the antenna, so that the preprocessed signal meets the working requirements of the subsequent analog-to-digital conversion circuit system, which is the function of the receiver. Realization provides feasibility.

The first low noise amplifier is CMA-5043+; the first fixed attenuator, the second fixed attenuator and the third fixed attenuator are all GAT-5; the first broadband radio frequency amplifier, Both the second broadband radio frequency amplifier and the third broadband radio frequency amplifier are ADL5610; the first digital variable electronic attenuator and the second digital variable electronic attenuator are both HMC624LP4, and the mixer is M1-0008.

For example, for the selection of the first low-noise amplifier, the comprehensive antenna operating frequency range, and the existing low-noise amplifier's operating frequency band, amplifier gain, noise figure, third-order intercept point, and P1dB output power and other aspects of device performance, consider Choose the broadband amplifier CMA-5043+ produced by Mini-circuits. Since the first-stage amplifier of the receiver controls the total noise temperature of the entire front-end IF receiving system, a low-noise, high-gain amplifier should be selected. In the frequency band range of 0.05GHz-3GHz, its gain range is 10.2dB-25.2dB, which is relatively high gain. The NoiseFigure range is 0.73-1.1dB, which is about 1dB smaller than other devices in the same frequency band. Higher Output IP3, the range is 31-33.6dBm, and the P1dB output power range is 18.9-21.2dBm.

On the other hand, in order to consider that the gain of each stage amplifier should not be so large that it exceeds the P1dB output power of the next stage amplifier to make it saturated and cannot work normally, it is also necessary to consider that the final noise ratio can be as large as possible, and at the same time ensure that the output to The signal power value of the analog-to-digital conversion circuit system cannot exceed its maximum operating range of 6dBm, so the selection and ingenious combination of all levels of broadband RF amplifiers and digital variable electronic attenuators in the front-end circuit system of the receiver must be considered. Add a 5dB fixed attenuator after the first low noise amplifier to suppress the standing wave between the upper stage and the broadband RF amplifier of this stage, and select the broadband RF amplifier ADL5610 with a working frequency range of 0.03-6GHz and a gain range of 17.5dB to signal Three levels of magnification. There are two digital variable resistance attenuators HMC624LP4 in the entire front-end circuit system, and their adjustment range is 0-31.5dB, and the step is 0.5dB.

Based on the above-mentioned embodiment, this embodiment describes the secondary processing module of the front-end circuit system in conjunction with FIG. 2 , and the secondary processing module includes:

A digital switch electrically connected to the mixer, a low-pass filter electrically connected to the digital switch, and a fourth broadband radio frequency amplifier electrically connected to the low-pass filter.

Specifically, the digital switch is used to divide the intermediate frequency signal satisfying the power requirement of the analog-to-digital conversion circuit system into multiple frequency bands, and for the passband signal of each frequency band, a low-pass filter is connected to filter the clutter deal with. For the passband signal after filtering, the fourth broadband radio frequency amplifier is connected to amplify it. It should be noted that the fourth broadband radio frequency amplifier is ADL5610.

Based on the above embodiment, the low-pass filter in this embodiment divides the intermediate frequency signal into 4 frequency bands, and the 4 frequency bands are respectively: 0-200MHz, 0-400MHz, 0-800MHz and 0-1500MHz . The models of the four low-pass filters are LPCN-200, LPCN-400, LPCN-800 and LPCN-1500.

The front-end circuit system of a radio telescope provided by this embodiment can be applied to different observation needs by filtering the intermediate frequency signal, and the corresponding baseband frequency band is selected for output through a digital switch, so that the system High flexibility.

Based on the above embodiments, this embodiment will describe the clock module in the front-end circuit system with reference to FIG. 2 .

The clock module includes:

a first voltage-controlled oscillator, configured to provide a local oscillator for the mixer;

The second voltage-controlled oscillator is used to provide clocks for the analog-to-digital conversion circuit system and the back-end FPGA circuit system.

Specifically, the clock module includes two voltage-controlled oscillators, and a reliable and adjustable clock output is realized by adjusting the two voltage-controlled oscillators.

Based on the foregoing embodiments, the clock module also includes:

a fourth fixed attenuator electrically connected to the first voltage-controlled oscillator, and a fifth broadband radio frequency amplifier electrically connected to the fourth fixed attenuator;

A sixth broadband radio frequency amplifier electrically connected to the second voltage-controlled oscillator.

It should be noted that the selection of the fourth fixed attenuator is GAT-5, the selection of the fifth broadband RF amplifier and the sixth broadband RF amplifier is ADL5610.

Specifically, as shown in FIG. 2 , the RF IN port directly inputs the radio frequency signal collected by the antenna, and the REF IN port is used to input a 10 MHz signal to provide a reference frequency for two voltage-controlled oscillators. The RF port outputs an amplified signal, that is, an intermediate frequency signal; the IF port outputs an amplified signal after mixing and filtering, that is, a passband signal. The output signals of the two ports can be directly used as the input signal source of the analog-to-digital conversion circuit system. The CLK OUT port outputs a variable clock with a frequency range of 137.5MHz-1100MHz, which can provide a stable external clock input for the analog-to-digital conversion circuit system and the back-end FPGA circuit system. At the same time, the control interface is written in Python language, and finally the digital control of the device is realized.

The invention makes full use of the flexibility of the voltage-controlled oscillator and the numerical control rheostat to complete the selection of the passband, and realizes the complete, flexible and efficient control of each frequency band through the real-time update of the digital frequency conversion coefficients stored on the FPGA. This enables a system to accomplish multiple receiver functions and bands in a variable and cost-free manner. This will not only greatly reduce the cost, but also make full use of the flexibility of the digital system to maximize the noise and frequency properties of the telescope and the low-noise amplifier.

The functions of the front-end circuit system are all controlled by software, including controlling the frequency and power of the voltage-controlled oscillator (10MHz to 3GHz); controlling the resistance of the digital variable electronic attenuator (0.5dB accuracy); controlling digital switches, etc. The devices of these analog circuits are all controlled by the GPIO port of the FPGA. At the same time, develop an interface controlled by C++ language (use C++ language to develop an interface), and control the ports on the IF board through the KATCP communication protocol.

Finally, the method of the present invention is only a preferred embodiment, and is not intended to limit the protection scope of the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present invention shall be included within the protection scope of the present invention.

Claims (10)

1. A front-end circuit system of a radio telescope, characterized in that, the front-end circuit system is located between the antenna of the radio telescope and the analog-to-digital conversion circuit system of the radio telescope, and the front-end circuit system includes: Primary processing module, secondary processing module and clock module; The primary processing module is used to amplify and mix the radio frequency signal received by the antenna to generate an intermediate frequency signal that meets the power requirements of the analog-to-digital conversion circuit system; The secondary processing module is used to extract the passband signal of the corresponding frequency band in the intermediate frequency signal according to the instruction, so as to be processed by the analog-to-digital conversion circuit system; The clock module is used to provide a local oscillator for the front-end circuit system, and provide a clock for the analog-to-digital conversion circuit system. 2. front-end circuit system according to claim 1, is characterized in that, described front-end circuit system is also electrically connected with back-end FPGA circuit system, and described clock module is also used for providing clock for described back-end FPGA circuit system . 3. front-end circuit system according to claim 2, is characterized in that, described front-end circuit system is electrically connected with described back-end FPGA circuit system by ribbon cable, and the function of described front-end circuit system is controlled by described back-end FPGA circuit system Circuit system control. 4. The front-end circuit system according to claim 3, wherein the front-end circuit system further comprises: The signal synchronization auxiliary module is used to provide an antenna signal of 1pps, so that the frequency stabilizer bound to the front-end circuit system, the analog-to-digital conversion circuit system, the back-end FPGA circuit system and the signal synchronization auxiliary module is realized Lock sync. 5. The front-end circuit system according to claim 1, wherein the primary processing module comprises: The first low-noise amplifier, the first fixed attenuator, the first broadband radio frequency amplifier, the first digital variable electronic attenuator, the second fixed attenuator, the second broadband radio frequency amplifier, the third fixed attenuator, the first electrically connected sequentially Three broadband RF amplifiers, a second digitally variable electronic attenuator and a mixer. 6. The front-end circuit system according to claim 5, wherein the first low-noise amplifier is a CMA-5043+; the first fixed attenuator, the second fixed attenuator and the third The fixed attenuators are all GAT-5; the first broadband radio frequency amplifier, the second broadband radio frequency amplifier and the third broadband radio frequency amplifier are all ADL5610; the first digital variable electronic attenuator and the second broadband radio frequency amplifier are ADL5610; Both digital variable electronic attenuators are HMC624LP4, and the mixer is M1-0008. 7. The front-end circuit system according to claim 6, wherein the secondary processing module comprises: A digital switch electrically connected to the mixer, a low-pass filter electrically connected to the digital switch, and a fourth broadband radio frequency amplifier electrically connected to the low-pass filter. 8. The front-end circuit system according to claim 7, wherein the low-pass filter divides the intermediate frequency signal into 4 frequency bands, and the 4 frequency bands are respectively: 0-200MHz, 0-400MHz, 0-800MHz and 0-1500MHz. 9. The front-end circuit system according to claim 6, wherein the clock module comprises: a first voltage-controlled oscillator, configured to provide a local oscillator for the mixer; The second voltage-controlled oscillator is used to provide clocks for the analog-to-digital conversion circuit system and the back-end FPGA circuit system. 10. The front-end circuit system according to claim 9, wherein the clock module further comprises: a fourth fixed attenuator electrically connected to the first voltage-controlled oscillator, and a fifth broadband radio frequency amplifier electrically connected to the fourth fixed attenuator; A sixth broadband radio frequency amplifier electrically connected to the second voltage-controlled oscillator.