CN108242582B - A kind of DGS filter, printed circuit board and filter - Google Patents

Abstract

Embodiments of the present invention provide a DGS filter, a printed circuit board and a filtering device, which relate to the field of communication technology and can improve the filtering capability of the DGS filter on the multilayer printed circuit board. The DGS filter is used to filter the signal transmitted on the target wiring in the first wiring layer in the printed circuit board; the DGS filter includes: a first reference layer and a target layer set relatively, and the target layer is printed A reference layer that is different from the first reference layer in the circuit board, or a wiring layer that is different from the first wiring layer in the printed circuit board; wherein, the first reference layer is provided with a DGS pattern, and the DGS pattern is routed in the target The vertical projection of the line in the first reference layer is symmetrically distributed; on the periphery of the DGS graphic, N ground vias are set through the first reference layer and the target layer, and the first reference layer passes through these N ground vias Connected to the reference ground area within the target layer.

Description

A kind of DGS filter, printed circuit board and filtering device

technical field

The embodiments of the present invention relate to the technical field of communication, and in particular to a DGS filter, a printed circuit board and a filter device.

Background technique

At present, the DGS (Defected Ground Structure) filter in the printed circuit board usually etches a ground defect (Defected Ground) with a certain shape on the ground substrate of the wiring layer in the printed circuit board, such as double The structure of C-shaped defects and the structure of U-shaped dumbbell defects can form LC resonance structures by using these defect structures, so as to filter the electrical signals transmitted in the printed circuit board within a certain frequency band.

However, for a communication substrate formed by a multilayer printed circuit board (that is, a printed circuit board including multiple wiring layers and multiple ground substrates), if the above-mentioned defective ground structure is only provided on one ground substrate, it may cause If resonance occurs between different grounded substrates, the filtering ability of the DGS filter will be significantly reduced, that is to say, the current DGS filter is not suitable for multilayer printed circuit boards.

Contents of the invention

Embodiments of the present invention provide a DGS filter, a printed circuit board and a filter device, which can improve the filtering capability of the DGS filter on the multilayer printed circuit board.

In order to achieve the above object, embodiments of the present invention adopt the following technical solutions:

In the first aspect, the embodiment of the present invention provides a DGS filter, the DGS filter is applied to a printed circuit board, and the printed circuit board includes: a first wiring layer, a first reference layer and a target layer, the first The reference layer is located between the first wiring layer and the target layer, and the target layer is a wiring layer different from the first wiring layer (or, the target layer is a reference layer different from the first reference layer); at this time, The first reference layer and the target layer form a DGS filter, and the DGS filter is used to filter the signal transmitted on the target trace in the first trace layer; wherein, the first reference layer is provided with a DGS pattern, and the DGS pattern is in the form of The vertical projection of the target traces in the first reference layer is symmetrically distributed; on the periphery of the DGS graph, N (N>1) ground vias are provided through the first reference layer and the target layer, and the first reference layer The N ground vias are connected to the reference ground area in the target layer.

It can be seen that, for a multi-layer printed circuit board, in the DGS filter provided by the embodiment of the present invention, N ground vias can be set on the periphery of the DGS pattern, and then the first The reference ground area between the reference layer and the target layer is connected, so that the reference potential between the first reference layer and the target layer is the same, thereby reducing the resonance between different reference layers or wiring layers to ensure multilayer printed circuit boards The filtering capability of the internal DGS filter.

In a possible design manner, the distance between any two adjacent ground via holes is not greater than 1/4 of the maximum working wavelength of the DGS filter. When the distance between two adjacent ground vias is small enough, the N ground vias are equivalent to forming a grid of holes in the multilayer printed circuit board, because the N ground vias are arranged on the periphery of the DGS pattern Therefore, the DGS pattern 22 in the printed circuit board is equivalent to being wrapped by the hole grid formed by the N ground vias, which can shield the electromagnetic waves generated by the DGS filter, thereby effectively suppressing the electromagnetic radiation generated by the DGS filter.

In a possible design manner, on the first reference layer, the N ground vias form a closed pattern around the periphery of the DGS pattern. In this way, the DGS pattern can be more completely wrapped by its adjacent reference ground area and the surrounding N ground via holes, which can further suppress the electromagnetic radiation generated by the DGS filter.

In a possible design manner, the ground via is a through hole, a blind hole or a buried hole.

In a possible design manner, a hollowed-out layer is arranged between the first reference layer and the target layer, and the vertical projection of the hollowed-out layer on the target layer overlaps with the reference ground area in the target layer. When the depth of the hollowed-out layer is greater, the suppression effect on the common mode noise is more obvious, and the working bandwidth of the DGS filter also increases accordingly. At this time, the reference ground area, the hollowed-out layer, and the N ground vias around the DGS pattern jointly form an inclusion, which is used to suppress electromagnetic radiation generated by the DGS filter.

In a possible design manner, the DGS pattern includes a first U-shaped structure and a second U-shaped structure, and the first U-shaped structure and the second U-shaped structure are respectively connected to the first reference layer with the target routing The vertical projection of is distributed symmetrically about the axis of symmetry; wherein, the opening of the first U-shaped structure is opposite to the opening of the second U-shaped structure.

In a possible design manner, the DGS pattern includes: a first C-shaped structure and a second C-shaped structure distributed symmetrically with respect to the vertical projection of the target trace on the first reference layer, wherein the first The opening of a C-shaped structure is arranged opposite to the opening of the second C-shaped structure, and the first C-shaped structure is connected to the second C-shaped structure through a connecting line, and the connecting line is perpendicular to the target trace on the first reference layer The projection is vertical.

In a possible design manner, the DGS pattern includes a first G-type structure and a second G-type structure, and the first G-type structure and the second G-type structure are respectively connected to the first reference layer with the target routing The vertical projection of is distributed symmetrically about the axis of symmetry; wherein, the opening of the first G-shaped structure is opposite to the opening of the second G-shaped structure.

It can be seen that the embodiment of the present invention also provides three different shapes of DGS patterns, that is, a symmetrical double-deformed G-shaped DGS structure, a symmetrical C-shaped dumbbell-shaped DGS structure, and a symmetrical double U-shaped DGS structure.

In a possible design manner, the target trace is a differential line or a single trace.

In a second aspect, an embodiment of the present invention provides a printed circuit board, which includes the DGS filter according to any one of the first aspect above.

In a third aspect, an embodiment of the present invention provides a filter device, which includes the printed circuit board in the second aspect above.

Wherein, the technical effects brought about by any one of the design methods in the second aspect or the third aspect can refer to the technical effects brought about by different design methods in the first aspect, and will not be repeated here.

These or other aspects of the present invention will be more clearly understood in the description of the following embodiments.

Description of drawings

FIG. 1 is a structural schematic diagram 1 of a printed circuit board provided by an embodiment of the present invention;

FIG. 2 is a structural schematic diagram 1 of a printed circuit board provided with a DGS filter provided by an embodiment of the present invention;

FIG. 3 is a schematic structural diagram of a DGS graphic provided by an embodiment of the present invention;

FIG. 4 is a structural schematic diagram II of a printed circuit board provided with a DGS filter provided by an embodiment of the present invention;

Fig. 5 is a schematic structural diagram II of a DGS graph provided by an embodiment of the present invention;

FIG. 6 is a structural schematic diagram 3 of a printed circuit board provided with a DGS filter according to an embodiment of the present invention;

Fig. 7 is a schematic structural diagram III of a DGS graph provided by an embodiment of the present invention;

Fig. 8 is a structural schematic diagram 4 of a DGS graph provided by an embodiment of the present invention;

Fig. 9 is a schematic structural diagram five of a DGS graph provided by an embodiment of the present invention;

FIG. 10 is a structural schematic diagram 4 of a printed circuit board provided with a DGS filter provided by an embodiment of the present invention;

Fig. 11 is a schematic diagram 1 of simulation results of a printed circuit board provided with a DGS filter provided by an embodiment of the present invention;

FIG. 12 is a structural schematic diagram V of a printed circuit board provided with a DGS filter according to an embodiment of the present invention;

FIG. 13 is a second schematic diagram of the simulation results of a printed circuit board provided with a DGS filter provided by an embodiment of the present invention;

FIG. 14 is a schematic structural diagram six of a printed circuit board provided with a DGS filter provided by an embodiment of the present invention;

Fig. 15 is a schematic diagram 3 of simulation results of a printed circuit board provided with a DGS filter provided by an embodiment of the present invention;

Fig. 16 is a schematic diagram 4 of the simulation results of the printed circuit board provided with the DGS filter provided by the embodiment of the present invention;

FIG. 17 is a fifth schematic diagram of simulation results of a printed circuit board provided with a DGS filter provided by an embodiment of the present invention.

Detailed ways

The technical solutions in the embodiments of the present invention will be described in detail below with reference to the drawings in the embodiments of the present invention.

In addition, the terms "first" and "second" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance or implicitly specifying the quantity of indicated technical features. Thus, a feature defined as "first" and "second" may explicitly or implicitly include one or more of these features. In the description of the present invention, unless otherwise specified, "plurality" means two or more.

The DGS filter provided by the embodiments of the present invention can be applied to a multilayer printed circuit board, and the multilayer printed circuit board includes at least two reference layers and at least two wiring layers, and each wiring layer corresponds to a A reference layer (or multiple wiring layers may correspond to the same reference layer), and the reference layer provides a reference ground signal for the wiring layer.

Exemplarily, when each wiring layer uniquely corresponds to a reference layer, as shown in FIG. 1 , the wiring layers 11 and the reference layers 12 in the multilayer printed circuit board 100 are arranged alternately in sequence. That is to say, the multilayer printed circuit board 100 includes multiple wiring layers 11 , and each wiring layer 11 is correspondingly provided with a reference layer 12 . Moreover, the space between any adjacent wiring layer 11 and the reference layer 12 can be filled with an insulating dielectric layer 13 . In order to facilitate the description of the DGS filter provided by the embodiment of the present invention, in the subsequent embodiments, the wiring layer 11 and the reference layer 12 arranged alternately in sequence as shown in FIG. 1 are taken as an example for illustration.

Wherein, the routing layer 11 is generally provided with routings for carrying electrical signals, which may specifically be composed of one or more metal routings, while the reference layer 12 is generally used to carry power or reference ground signals, and each metal routing in the routing layer 11 The electrical signals carried by the wires are finally led out to various input/output (I/O, in/out) interfaces of the printed circuit board 100 .

As shown in FIG. 2 , the DGS filter 100 provided by the embodiment of the present invention is used to filter the signal transmitted on the target wiring in the first wiring layer 11a. Wherein, the wiring may be a differential line 21 or a single wiring, which is not limited in this embodiment of the present invention.

Taking the above-mentioned target routing as the differential line 21 as an example, as shown in FIG. 2 , the DGS filter 100 includes: a first reference layer 12a and a target layer 11b oppositely arranged, and the target layer 11b can be a printed circuit board except the first Any reference layer other than the reference layer 12a may also be any wiring layer in the printed circuit board except the first wiring layer 11a (the wiring layer 11b is used as the above-mentioned target layer in FIG. 2 ).

Specifically, a DGS pattern 22 is arranged in the first reference layer 12a. As shown in FIG. 3, the DGS pattern 22 is symmetrically distributed with respect to the vertical projection of the differential line 21 in the first reference layer 12a. The shape of the DGS pattern 22 can specifically be a double C-shaped defect structure or a U-shaped dumbbell-shaped defect structure in the prior art, or other defect structures, which will be described in detail in subsequent embodiments of the present invention.

Wherein, as shown in FIG. 2 and FIG. 3 , on the periphery of the DGS pattern 22, along the direction perpendicular to the first reference layer 12a, N (N>1) grounds are arranged through the first reference layer 12a and the target layer 11b Vias 23 , as shown in FIG. 2 , the first reference layer 12 a communicates with the reference ground area 24 provided in the target layer 11 b through the ground vias 23 . Although each area in each reference layer 12 can provide a reference ground signal, in the embodiment of the present invention, the area where the DGS graphic 22 is projected in any reference layer can be used as the reference ground area, and in any wiring layer In , you can also set the area where the DGS graphic projection is located as the reference area.

It should be noted that, in the DGS filter 100 shown in FIG. 2 , the ground via 23 connects the first reference layer 12a and the wiring layer 11b adjacent to the first reference layer 12a (that is, the target layer). The reference ground area 24 is connected.

It can be understood that, as shown in FIG. 4 , the ground via hole 23 can also communicate with the reference ground area in the multi-layer wiring layer 11 and the multi-layer reference layer 12 . For example, in (a) in FIG. 4 , the ground via hole 23 runs through all the wiring layers 11 of the printed circuit board (that is, the wiring layer 11a, the wiring layer 11b and the wiring layer 11c) 11 and all the reference layers. 12 (that is, reference layer 12a, reference layer 12b, and reference layer 12c); in (b) in FIG. Reference layer 12b between reference layer 12a and target layer 11b.

That is to say, the above-mentioned ground via hole 23 may be a through hole, a blind hole or a buried hole, which is not limited in the embodiment of the present invention.

Taking (b) in FIG. 4 as an example, when the ground via hole 23 is a buried hole, since the ground via hole 23 only penetrates the first reference layer 12a, the target layer 11b, and the reference layer 12b, then no ground via hole is provided. 23 in the wiring layer 11c can also be normally wired, thereby reducing the impact on the wiring in the multilayer printed circuit board.

It can be seen that, for a multi-layer printed circuit board, in the DGS filter provided by the embodiment of the present invention, N ground vias can be set on the periphery of the DGS pattern, and then, through these N ground vias, different reference The reference ground area between layers or wiring layers is connected, so that the reference potential of the reference ground area between different reference layers or wiring layers is the same, thereby reducing the resonance between different reference layers or wiring layers to ensure multi-layer The filtering capability of the DGS filter on the printed circuit board.

Optionally, the distance between any two adjacent ground vias 23 is no greater than 1/4 of the maximum operating wavelength of the DGS filter 100 . For example, the working frequency band of DGS figure 22 is 25GHz-30GHz, that is to say the maximum working frequency of DGS figure 22 is 30GHz, when DGS figure 22 works on 30GHz, the wavelength of the electromagnetic wave of its radiation is λ (λ>0), Then, the distance p between any two adjacent ground vias 23 should be less than or equal to λ/4.

When the distance between two adjacent ground vias is not greater than 1/4 of the maximum operating wavelength of the DGS filter, the N ground vias are equivalent to forming a grid of holes in the multilayer printed circuit board, because The N ground vias are arranged on the periphery of the DGS pattern. Therefore, the DGS pattern in the printed circuit board is equivalent to being wrapped by the hole grid formed by the N ground vias, which can shield the electromagnetic waves generated by the DGS filter. Thereby effectively suppressing the electromagnetic radiation generated by the DGS filter.

Optionally, as shown in FIG. 2, in the first reference layer 12a, the above-mentioned N ground via holes 23 can be set to form a closed figure around the periphery of the DGS pattern 22, that is, N number of vias as shown in FIG. 5 are formed. In this way, the DGS pattern 22 can be more completely wrapped by the adjacent reference ground area 24 and the surrounding N ground vias 23, which can further suppress the electromagnetic radiation generated by the DGS filter.

Further, a hollow layer can also be set between the above-mentioned first reference layer and the target layer. At this time, the hollow layer 31 can be filled with an insulating medium. Exemplarily, as shown in (a) in FIG. 6 , the first The reference layer is 12a, and the routing layer 11b can be hollowed out to form a hollowed out layer 31a. The size of the vertical projection of the hollowed out layer 31 on the first reference layer 12a is the same as the via hole 23 on the first reference layer 12a. The sizes of the formed graphics are the same, and at this time, the target layer is the reference layer 12b; or, as shown in (b) in Figure 6, the first reference layer is 12a, and the wiring layer 11b and the reference layer 12b can be dug out. Empty processing to form a hollowed-out layer 31b. At this time, the target layer is the wiring layer 11c, and the vertical projection of the hollowed-out layer 31 on the target layer 11c overlaps with the reference ground area 24 in the target layer 11c; or, as shown in FIG. As shown in (c) in 6, the first reference layer is 12a, and the wiring layer 11b, reference layer 12b, and wiring layer 11c can be hollowed out to form a hollowed-out layer 31c. At this time, the target layer is the reference layer 12c. When the depth of the hollowed-out layer is greater, the suppression effect on the common mode noise is more obvious, and the working bandwidth of the DGS filter also increases accordingly.

It can be seen that no matter how many reference layers or routing layers are hollowed out, the reference ground area in the target layer, the hollowed out layer, and the N ground vias around the DGS pattern together form an inclusion to suppress the noise generated by the DGS filter. Electromagnetic radiation.

Optionally, the above-mentioned first wiring layer may specifically be the wiring layer located on the surface layer in the above-mentioned DGS filter (such as the first wiring layer 11a shown in Figure 2, Figure 4 or Figure 6), or it may be the above-mentioned multiple The wiring layer located at the bottom layer in the multi-layer printed circuit board may also be any wiring layer located at the middle layer in the above-mentioned multilayer printed circuit board, which is not limited in this embodiment of the present invention.

It should be noted that the DGS filter 100 shown in FIG. 2, FIG. 4 and FIG. 6 can be used as a part of the printed circuit board, and the reference layer 12 of the DGS filter 100 shown in FIG. 2, FIG. It does not necessarily serve as the reference layer of the printed circuit board. Similarly, the wiring layer 11 of the DGS filter shown in FIG. 2 , FIG. 4 and FIG. 6 does not necessarily serve as the wiring layer of the printed circuit board. Taking Fig. 2 as an example, the reference layer 12b can be used as a reference layer in the above-mentioned DGS filter 100, but, for the entire printed circuit board where the DGS filter 100 is located, the reference layer 12b is not included in the reference layer 12b. Outside some areas, traces can also be provided, that is, the layer of the reference layer 12b can also be used as a trace layer of the entire printed circuit board.

Further, based on the DGS filter provided in FIGS. 1-6 , the embodiment of the present invention also provides a variety of DGS patterns 22 of different shapes, for example, the symmetrical double-deformed G-type DGS structure shown in FIG. 7 , the DGS structure shown in FIG. 8 The symmetrical C-shaped dumbbell-shaped DGS structure shown in FIG. 9 and the symmetrical double-U-shaped DGS structure shown in FIG. The DGS graphic 22 set in the DGS filter can also be in any other shape, which is not limited in this embodiment of the present invention.

In a possible design mode, the shape of the above-mentioned DGS pattern 22 is as shown in FIG. The structures 62 are arranged symmetrically with respect to the vertical projection of the differential line 21 on the first reference layer. Wherein, the opening of the first G-shaped structure 61 is opposite to the opening of the second G-shaped structure 62 .

Exemplarily, as shown in FIG. 7 , the line width w _m of the differential lines 21 =0.167 mm, the spacing s _m between the differential lines 21 =0.254 mm, and the thickness of the differential lines 21 (not shown in FIG. 7 ) is 0.0347 mm. mm.

Still as shown in FIG. 7 , the specific dimensions of the DGS pattern 22 are as follows: in the direction perpendicular to the differential line 21, the first side length s ₁ of the first G-shaped structure 61 (or the second G-shaped structure 62 ) is 2.1mm, parallel In the direction of the differential line 21, the second side length s ₂ of the first G-shaped structure 61 (or the second G-shaped structure 62) = 0.9412mm, the line of the first G-shaped structure 61 (or the second G-shaped structure 62) Width s ₃ =0.18mm (the line width at any position of the DGS graph 22 can be set to be equal), the distance between the opening position of the first G-shaped structure 61 (or the second G-shaped structure 62 ) s ₄ =0.842mm, from the opening position to the second G-shaped structure 62 The distance s ₅ of the two side lengths = 0.269mm; the distance s ₆ = 0.18mm extending from the opening position to the first side length, and the distance s ₇ between the first G-shaped structure 61 and the second G-shaped structure 62 = 0.4572mm , the thickness of the reference layer (not shown in FIG. 6 ) where the DGS pattern 22 is located is about 0.0347mm; in addition, the interval p between adjacent via holes 23 is about 0.4mm, and the distance p between the via holes 23 and the DGS pattern 22 is arbitrarily The spacing j between the nearest side lengths is about 0.127 mm.

Further, the DGS pattern 22 shown in FIG. 7 can be applied to the multilayer printed circuit board 200 shown in FIG. 10 . Wherein, the multilayer printed circuit board 200 includes 3 layers of wiring layers (routing layers A, B and C) and 3 layers of reference layers (reference layers D, E and F), and the above-mentioned differential line 21 is arranged on the wiring layer A , the above-mentioned DGS pattern 22 is set on the reference layer D, and the ground vias 23 are connected to the reference layer D, the routing layer B, the reference layer E, the routing layer C and the reference layer F in sequence. At this time, the wiring layer B is used as the target layer in the above-mentioned DGS filter 100, the reference layer D is used as the first wiring layer in the above-mentioned DGS filter 100, and the ground via hole 23 runs through the reference ground area 24 and the Reference layer D.

After simulating the common mode insertion loss generated by the multilayer printed circuit board 200 shown in FIG. 10, the obtained simulation results are shown in FIG. Board, the printed circuit board 200 provided by the embodiment of the present invention can suppress the common-mode insertion loss below -10dB in the 6GHz bandwidth of about 25GHz-31GHz, thereby reducing the common-mode noise generated during differential signal transmission on the differential line 21 , to ensure the filtering capability of the DGS pattern 22 on the multilayer printed circuit board.

In another possible design mode, the shape of the above-mentioned DGS pattern 22 is as shown in FIG. 8 , and the DGS pattern 22 includes a first C-shaped structure 71 arranged symmetrically with respect to the vertical projection of the differential line 21 on the first reference layer. and the second C-shaped structure 72, wherein the opening of the first C-shaped structure 71 is opposite to the opening of the second C-shaped structure 72, and the first C-shaped structure 71 and the second C-shaped structure 72 are connected by a connecting line 73, The connection line 73 is perpendicular to the vertical projection of the differential line 21 on the first reference layer. For example, as shown in FIG. 8 , the connection line 73 is a perpendicular line of the vertical projection of the differential line 21 on the first reference layer.

Similar to the _DGS graph 22 shown in FIG. 7, in the _DGS graph 22 shown in FIG. The thickness of 21 (not shown in Figure 8) is 0.0347 mm.

Still as shown in FIG. 8, the specific dimensions of the DGS pattern 22 are as follows: in the direction parallel to the differential line 21, the first side length z ₁ of the first C-shaped structure 71 (or the second C-shaped structure 72) = 1.8mm, vertical In the direction of the differential line 21, the second side length z ₂ of the first C-shaped structure 71 (or the second C-shaped structure 72) = 0.54mm, and the third side length extending perpendicular to the second side length toward the connection line 73 z ₃ =0.43mm, the distance between the third side length and the connecting line 73 z ₄ =0.18mm, the distance between the third side length and the first side length z ₅ =0.18mm, the first C-shaped structure 71 ( Or the line width z ₆ of the second C-shaped structure 72 ) = 0.18 mm, and the distance z ₇ = 0.8596 mm between the opening position of the first C-shaped structure 71 and the opening position of the second C-shaped structure 72 .

In addition, in the direction parallel to the differential line 21, the interval p _x between adjacent via holes 23 is about 0.3762 mm, and in the direction perpendicular to the differential line 21, the interval p _y between adjacent via holes 23 is about 0.3995 mm. mm, and the distance j between the length of the nearest side of the via hole 23 to the DGS pattern 22 is about 0.2286 mm.

Further, the DGS pattern 22 shown in FIG. 8 can be applied to the multilayer printed circuit board 300 shown in FIG. 12 . Wherein, the multilayer printed circuit board 300 includes 3 layers of wiring layers (routing layers A, B and C) and 3 layers of reference layers (reference layers D, E and F), and the above-mentioned differential line 21 is arranged on the wiring layer A , the above-mentioned DGS pattern 22 is set on the reference layer D, and the ground vias 23 are connected to the reference layer D, the routing layer B, the reference layer E, the routing layer C and the reference layer F in sequence. At this time, the wiring layer B is used as the target layer in the above-mentioned DGS filter 100, the reference layer D is used as the first wiring layer in the above-mentioned DGS filter 100, and the ground via hole 23 runs through the reference ground area 24 and the Reference layer D.

After simulating the common mode insertion loss generated by the multilayer printed circuit board 300 shown in FIG. 12, the obtained simulation results are shown in FIG. Board, the printed circuit board 300 provided by the embodiment of the present invention can suppress the common-mode insertion loss below -10dB in the 4.5GHz bandwidth of about 24GHz-28.5GHz, thereby reducing the common-mode insertion loss generated during differential signal transmission on the differential line 21. noise to ensure the filtering capability of the DGS pattern 22 on the multilayer printed circuit board.

In another possible design mode, the shape of the above-mentioned DGS figure 22 is as shown in FIG. The type structures 82 are respectively distributed symmetrically with respect to the vertical projection of the differential line 21 on the first reference layer as the axis of symmetry. Wherein, the opening of the first U-shaped structure 81 is opposite to the opening of the second U-shaped structure 82 .

In the DGS graph 22 shown in FIG. 9, the line width w _m of the differential lines 21=0.244m, the spacing s _m between the differential lines 21=0.264mm, and the thickness of the differential lines 21 (not shown in FIG. 9 ) is 0.0512mm.

Still as shown in Figure 9, the specific dimensions of the DGS pattern 22 are as follows: in the direction parallel to the differential line 21, the first side length u ₁ of the first U-shaped structure 81 (or the second U-shaped structure 82) = 0.397mm, the line Width u ₂ =0.476mm; in the direction perpendicular to the differential line 21, the second side length u 3 of the first U-shaped structure 81 (or the second U-shaped structure 82) is u ₃ =2.183mm, and the line width u ₄ =0.18mm; The distance u ₅ =0.192 mm between the opening position of the first U-shaped structure 81 and the opening position of the second U-shaped structure 82 .

In addition, the interval p between adjacent ground via holes 23 is about 0.4 mm, and the ground via holes 23 are arranged along the periphery of the DGS pattern 22 .

Further, the DGS pattern 22 shown in FIG. 9 can be applied to the multilayer printed circuit board 400 shown in FIG. 14 . Wherein, the multilayer printed circuit board 400 includes 3 wiring layers (wiring layers A, B and C) and 3 reference layers (reference layers D, E and F), and the above-mentioned differential line 21 is arranged on the wiring layer A , the above-mentioned DGS pattern 22 is set on the reference layer D, and the ground vias 23 are connected to the reference layer D, the routing layer B, the reference layer E, the routing layer C and the reference layer F in sequence. At this time, the reference layer E is used as the target layer in the above-mentioned DGS filter 100, the reference layer D is used as the first wiring layer in the above-mentioned DGS filter 100, and the wiring layer B between the reference layer D and the reference layer E is hollowed out, A hollowed-out layer 31 is formed, and the ground via 23 penetrates the reference layer E, the hollowed-out layer 31 and the reference layer D.

After simulating the common mode insertion loss generated by the multilayer printed circuit board 400 shown in FIG. 14, the obtained simulation results are shown in FIG. Board, the printed circuit board 400 provided by the embodiment of the present invention can suppress the common-mode insertion loss below -10dB in the 2GHz bandwidth of about 20GHz-22GHz, thereby reducing the common-mode noise generated during differential signal transmission on the differential line 21 , to ensure the filtering capability of the DGS pattern 22 on the multilayer printed circuit board.

Further, after simulating the electromagnetic radiation generated by the multilayer printed circuit board 400 shown in FIG. 14 , the obtained simulation results are shown in FIG. 16 . It can be seen that compared with the printed circuit board provided with the traditional DGS filter in the prior art, the printed circuit board 400 provided by the embodiment of the present invention can reduce the electromagnetic radiation by 6dB- 10dB. Among them, the schematic diagram of the simulation results of the electromagnetic radiation changing with the frequency shown in Figure 16 is the printed circuit board 400 provided by the embodiment of the present invention at a position ten meters away from the printed circuit board, and the prior art is provided with The printed circuit board of the traditional DGS filter is simulated.

In addition, after simulating the differential mode insertion loss generated by the multilayer printed circuit provided with the DGS filter provided by the embodiment of the present invention (for example, the DGS filter shown in FIG. 7, FIG. 8 or FIG. 9), as shown in FIG. As shown in 17, it can be seen that the differential mode insertion loss generated by using the DGS filter provided by the embodiment of the present invention is basically the same as the differential mode insertion loss generated within the filter bandwidth of 10GHz-35GHz when the above-mentioned DGS filter is not set, All within 0dB to -2dB.

That is to say, the DGS filter provided by the embodiment of the present invention can ensure that the differential-mode insertion loss generated within the filtering bandwidth does not increase, and at the same time suppress the generated common-mode insertion loss below -10dB, and reduce the generation of the DGS filter. Electromagnetic radiation, thereby improving the filtering performance of the DGS filter.

Further, the embodiment of the present invention also provides a printed circuit board, which can include any of the above-mentioned DGS filters, and the printed circuit board can be applied to various physical devices. The embodiment of the present invention There is no limit to this.

Further, an embodiment of the present invention also provides a filtering device, such as a communication device, etc., and the filtering device may include the above-mentioned printed circuit board, which is not limited in the embodiment of the present invention.

The specific embodiments described above have further described the purpose, technical solutions and beneficial effects of the present invention in detail. It should be understood that the above descriptions are only specific embodiments of the present invention and are not intended to limit the scope of the present invention. Protection scope, any modification, equivalent replacement, improvement, etc. made on the basis of the technical solution of the present invention shall be included in the protection scope of the present invention.

Claims (11)

1. a kind of defect ground structure DGS filter, which is characterized in that the DGS filter is applied to printed circuit board, the print Circuit board processed includes: the first routing layer, the first reference layer and destination layer, and first reference layer is located at first routing layer Between the destination layer, the destination layer are as follows: the routing layer different from first routing layer, alternatively, with first ginseng Examine the different reference layer of layer；

First reference layer and the destination layer form the DGS filter, and the DGS filter to described first for walking The signal transmitted on target cabling in line layer is filtered；

Wherein, DGS plot shape is provided in first reference layer, the DGS plot shape is with the target cabling in first ginseng Examining the upright projection in layer is that symmetry axis is symmetrical；In the periphery of the DGS plot shape, through first reference layer and institute It states destination layer and is provided with N number of ground via hole, first reference layer passes through the reference ground in N number of ground via hole and the destination layer Regional connectivity, N > 1.

2. DGS filter according to claim 1, which is characterized in that adjacent the distance between the ground via hole of any two No more than the 1/4 of the maximum functional wavelength of the DGS filter.

3. DGS filter according to claim 1, which is characterized in that on first reference layer, N number of ground mistake Hole forms closed figure around the periphery of the DGS plot shape.

4. DGS filter according to claim 1, which is characterized in that described ground via hole is through-hole, blind hole or buried via hole.

5. DGS filter according to claim 1, which is characterized in that between first reference layer and the destination layer It is provided with and hollows out layer, the layer that hollows out is in the upright projection on the destination layer and the reference locality domain weight in the destination layer It is folded.

6. DGS filter according to any one of claims 1-5, which is characterized in that the DGS plot shape includes the first U Type structure and the second U-shaped structure, upright projection of first U-shaped structure with the target cabling in first reference layer are Symmetry axis is symmetrical, and second U-shaped structure is pair in the upright projection of first reference layer with the target cabling Claim axial symmetry distribution；

Wherein, the opening of first U-shaped structure and the opening of second U-shaped structure are oppositely arranged.

7. DGS filter according to any one of claims 1-5, which is characterized in that the DGS plot shape includes: with institute It is symmetrical the first c-type structure and the second c-type knot of symmetry axis that target cabling, which is stated, in the upright projection of first reference layer Structure,

Wherein, the opening of the opening and the second c-type structure of the first c-type structure is oppositely arranged, the first c-type structure It is connected with the second c-type structure by connecting line, the connecting line and the target cabling hanging down in first reference layer It is vertical to deliver directly shadow.

8. DGS filter according to any one of claims 1-5, which is characterized in that the DGS plot shape includes the first G Type structure and the 2nd G type structure, upright projection of the first G type structure with the target cabling in first reference layer are Symmetry axis is symmetrical, and the 2nd G type structure is pair in the upright projection of first reference layer with the target cabling Claim axial symmetry distribution；

Wherein, the opening of the opening and the 2nd G type structure of the first G type structure is oppositely arranged.

9. DGS filter according to any one of claims 1-5, which is characterized in that the target cabling is differential lines Or single cabling.

10. a kind of printed circuit board, which is characterized in that the printed circuit board includes as described in any one of claim 1-9 DGS filter.

11. a kind of filter, which is characterized in that the filter includes printed circuit board as claimed in claim 10.