CN108231817A - A kind of low-power consumption charge coupling device based on two-dimensional material/insulating layer/semiconductor structure - Google Patents

Abstract

The invention discloses a low-power charge-coupled device based on a two-dimensional material/insulating layer/semiconductor structure, which includes several pixels forming an array, and the pixels sequentially include a gate, a semiconductor substrate, an insulating layer, and a source from bottom to top. 1. The drain electrode and the two-dimensional material thin film layer; the source electrode and the drain electrode are horizontally arranged on the upper surface of the insulating layer; the two-dimensional material thin film layer covers the upper surface of the source electrode, the drain electrode and the insulating layer between them. Incident light irradiates the surface of the charge-coupled device of the present invention and is absorbed by the semiconductor substrate. Due to the special properties of two-dimensional materials, it can effectively collect carriers through capacitive coupling, and the generated photocurrent signal is directly output from a single pixel structure, realizing local reading and random reading, without using the method of lateral charge transfer between pixels, from Fundamentally change the signal readout method of the charge-coupled device, and improve the overall response speed, linear dynamic range and reliability of the system. The heterojunction of two-dimensional materials can effectively reduce the dark current of devices.

Description

A low-power charge coupling based on two-dimensional material/insulating layer/semiconductor structure device

technical field

The invention belongs to the technical field of image sensors, relates to an image sensor device structure, in particular to a low-power charge-coupled device based on a two-dimensional material/insulating layer/semiconductor structure.

Background technique

Charge-coupled device (CCD) image sensors can directly convert optical signals into analog current signals, and the current signals are amplified and converted from analog to digital to achieve image acquisition, storage, transmission, processing and reproduction. It can generate a corresponding charge signal according to the light irradiated on its surface, and convert it into a digital signal of "0" or "1" through an analog-to-digital converter chip. After this digital signal is compressed and programmed, it can be generated by flash The memory or hard disk card saves the received light signal and converts it into an electronic image signal that can be recognized by the computer, which can accurately measure and analyze the measured object. Compared with CMOS image sensors, the traditional CCD has better imaging quality, but because the CCD uses the way of horizontal charge transfer between pixels to output data, the overall response speed of the system is slow, and as long as one of the pixel transfer fails, it will As a result, a whole row of data cannot be transmitted normally, so it is difficult to control the yield rate of the CCD.

Graphene is a honeycomb two-dimensional planar crystal film composed of a single layer of sp2 hybridized carbon atoms, which has excellent mechanical, thermal, optical, electrical and other properties. Unlike ordinary metals, graphene is a new type of two-dimensional conductive material with transparency and flexibility. Graphene and the semiconductor oxide sheet covered can form a simple field effect structure, the preparation process is simple, and it is easy to transfer to any substrate. Due to the high light transmittance of graphene, it can improve the quantum efficiency of traditional optoelectronic devices.

Two-dimensional semiconductor films refer to materials that electrons can only move freely (planar motion) on the non-nanoscale (1-100nm) in two dimensions, such as nanofilms, superlattices, and quantum wells. The two-dimensional semiconductor film was proposed along with the successful separation of monoatomic layer graphene by the Geim group of the University of Manchester in 2004. At present, dozens of two-dimensional semiconductor films have been successfully separated and prepared, including black phosphorus, transition metal sulfides, etc. The discovery of two-dimensional semiconductor thin films has brought opportunities to break through the limitations of traditional CCDs.

Contents of the invention

In order to solve the above technical problems, the present invention provides a low-power charge-coupled device based on a two-dimensional material/insulating layer/semiconductor structure.

A low-power charge-coupled device based on a two-dimensional material/insulating layer/semiconductor structure of the present invention includes several pixels forming an array, and the pixels sequentially include a gate, a semiconductor substrate, an insulating layer, and a source from bottom to top. pole, drain and two-dimensional material film layer; the source and drain are horizontally arranged on the upper surface of the insulating layer; the two-dimensional material film layer covers the source, drain and its The upper surface of the insulating layer between; the two-dimensional material thin film layer includes two or more two-dimensional materials, and a heterojunction is formed between different two-dimensional materials.

As a preferred technical solution, the two-dimensional material film layer is composed of a graphene film and a two-dimensional semiconductor film to form a heterojunction, and the graphene film is divided into two sections covering the source electrode and the drain electrode respectively, and the two sections of graphite The olefin film is connected by a two-dimensional semiconductor film to form two Schottky junctions.

As a preferred technical solution, the two-dimensional semiconductor film is a black phosphorus film or a transition metal sulfide film, and the transition metal sulfide film includes molybdenum disulfide, tungsten disulfide, or tungsten diselenide.

As a preferred technical solution, the semiconductor substrate is a lightly doped semiconductor.

As a preferred technical solution, the semiconductor substrate is n-type lightly doped silicon, and the insulating layer is silicon dioxide.

As a preferred technical solution, a buried trench layer is provided between the semiconductor substrate and the insulating layer, the buried trench layer is n-type doped, and the semiconductor substrate is p-type doped.

As a preferred technical solution, the semiconductor substrate is a narrow bandgap semiconductor or a wide bandgap semiconductor.

As a preferred technical solution, the insulating layer is a material with a low ultraviolet light absorption coefficient or a medium with a high dielectric constant.

As a preferred technical solution, the light enters the charge-coupled device from below.

The working principle of the two-dimensional material film in this application is: the two-dimensional material forms a MIS structure with the insulating layer and the semiconductor substrate. As the gate voltage gradually increases, the silicon substrate will enter a depletion state from electron accumulation. If the gate voltage is large enough, a hole inversion layer will be formed at the semiconductor-insulator interface. However, if the gate voltage is a pulse signal, since the generation of minority carriers requires a certain life time, the inversion layer will not appear immediately, and it will still remain in a depleted state (the depletion thickness at this time is greater than the maximum depletion layer thickness Even larger); this kind of majority carrier is completely depleted, and the semiconductor surface state that should appear, but does not appear in the inversion layer for a while, is called the deep depletion state. Entering the deep depletion state, the width of the depletion region increases. When the incident light is irradiated on the device area, the silicon depletion region absorbs the incident light and generates electron-hole pairs, and its quantum efficiency is close to 100%. If the semiconductor substrate is n-type, the electron flow is controlled by the two-dimensional material collection, leading to a rise in the Fermi level of 2D materials. Due to the special band structure of 2D materials, their conductance changes proportionally. In this way, after applying a fixed bias voltage to the two-dimensional material, the current passing through the two-dimensional material can synchronously reflect the amount of charge stored in the potential well, and there is no need to transfer and read multiple times.

Charge-coupled device arrays have a wide range of applications, such as imaging and monitoring. The low-power charge-coupled device based on the two-dimensional material/insulating layer/semiconductor structure of the present application can use standard semiconductor processes to fabricate photodetector arrays. By wire bonding, gold wires or metal interconnection wires are used to connect the top electrode of each element in the charge-coupled device array to the electrode of the traditional signal processing circuit, and the photodetector array can be obtained by using the traditional signal processing circuit. Data of all CCD pixels.

Applying a pulsed gate voltage to the charge-coupled device of the present application enables it to enter a deep depletion working state to realize photon absorption. The source and drain are directly applied with a fixed bias to realize the non-destructive readout of charges in the potential well on the two-dimensional material. The negative pole of the gate voltage is connected to the gate of the device, the positive pole of the gate voltage is connected to the source of the charge-coupled device, and a 1V bias is applied between the source and the drain, as shown in Figure 1.

A low-power charge-coupled device based on a two-dimensional material/insulating layer/semiconductor structure of the present invention has the following beneficial effects:

1. The incident light hits the surface of the charge-coupled device of this application and is absorbed by the two-dimensional material and the semiconductor substrate. The pulse bias is applied to the back gate electrode of the device, and the semiconductor substrate enters a deep depletion state. The photogenerated carriers (hole-electron pairs) generated in the depletion layer are separated under the action of the internal electric field of the device, and the electrons are collected by the two-dimensional material. Thus forming a larger photocurrent signal and having a larger linear dynamic range;

2. The raw material cost of two-dimensional materials is low, the device structure is simple, it is easy to manufacture on a large scale, and it is compatible with the CMOS process;

3. The two-dimensional material is used as a transparent electrode to enhance the absorption of incident light. Compared with the traditional polysilicon electrode, it greatly improves the quantum efficiency of the traditional charge-coupled device in the ultraviolet and infrared bands, and broadens the response spectrum of the image sensor;

4. Due to the special properties of two-dimensional materials, it can effectively collect carriers through capacitive coupling, and the generated photocurrent signal is directly output from a single pixel structure, realizing local reading and random reading, without the need for horizontal charge transfer between pixels , fundamentally change the signal readout method of charge-coupled devices, and improve the overall response speed, linear dynamic range and reliability of the system;

5. The heterojunction of two-dimensional materials can reduce the dark current to below 1nA, and correspondingly reduce the power consumption of charge-coupled devices.

Description of drawings

Fig. 1 is the structural representation of the charge-coupled device in embodiment 1-6;

Fig. 2 is a graph of response curves under different power 532nm lasers within a single gate pulse voltage cycle;

Fig. 3 is the optical response curve of a charge-coupled device working at 0-30V, 1kHz pulse gate voltage with a duty ratio of 20%, and the optical response curve of a 532nm laser with a light energy of 0-120mW/cm ² and its light energy at 0-120mW/cm2. 4mW/cm ² curve;

Fig. 4 is a photoresponse curve of the device irradiated with 1550nm lasers of different intensities within a gate voltage pulse period;

FIG. 5 is a schematic structural diagram of a charge-coupled device in Embodiment 6. FIG.

Detailed ways

The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

Example 1

As shown in Figure 1, a low-power charge-coupled device based on a two-dimensional material/insulating layer/semiconductor structure in this embodiment includes a number of pixels forming an array, and the pixels sequentially include gate 1, n-type Lightly doped silicon semiconductor substrate 2, silicon dioxide insulating layer 3, source 4, drain 5 and two-dimensional material thin film layer; source 4 and drain 5 are horizontally arranged on the upper surface of silicon dioxide insulating layer 3 The two-dimensional material film layer is covered on the upper surface of the source electrode 4, the drain electrode 5 and the silicon dioxide insulating layer 3 between them; the two-dimensional material film layer is composed of a graphene film 6 and a molybdenum disulfide film 7, graphite The graphene film 6 is divided into two sections covering the source electrode 4 and the drain electrode 5 respectively, and the two sections of the graphene film 6 are connected by a molybdenum disulfide film 7 to form two Schottky junctions to reduce dark current.

Among them, the material for making the gate 1 is gallium indium alloy, the thickness of the n-type lightly doped silicon semiconductor substrate 2 is 300-500 μm, the resistivity is 1-10 Ω·cm, and the thickness of the silicon dioxide insulating layer 3 is 10-500 μm. 100nm, the source electrode 4 and the drain electrode 5 are made of chromium/gold alloy, the size of the graphene film 6 is 60 μm×60 μm, the size of the molybdenum disulfide film 7 is 40 μm×40 μm, and the size of the overlapping area of the two is 40 μm× 10 μm.

A pulsed gate voltage is applied to the charge-coupled device of this embodiment, so that it can enter a deep depletion working state to realize photon absorption. A fixed bias voltage is directly applied to the source 4 and the drain 5 to realize the non-destructive readout of charges in the potential well on the two-dimensional material. The negative pole of the gate voltage is connected to the gate 1 of the device, the positive pole of the gate voltage is connected to the source 4 of the charge-coupled device, and a 1V bias is applied between the source 4 and the drain 5, as shown in Figure 1.

Since the readout signal depends on the conductance change of the two-dimensional material, the charge-coupled device of this embodiment has higher dark current and power consumption than the traditional CCD device. By replacing graphene with a heterojunction composed of graphene + two-dimensional semiconductor film, the dark current of the device is reduced, and the power consumption of the device is reduced. Due to the size limitation of the lift-off material, the size of the charge-coupled device is usually on the order of 20-80 μm. Since the MSM heterojunction of graphene-semiconductor-transition metal-graphene is formed between the source 4 and the drain 5, its dark current will be suppressed to about 1nA, and the background power consumption can be greatly reduced to 1nW magnitude. When photogenerated carriers are transferred into graphene, the barrier height of the Schottky junction formed by graphene and transition metal sulfides decreases, leading to a sudden increase in photocurrent. Figure 2 shows the response of the charge-coupled device to 532nm lasers with different powers within a single gate pulse voltage cycle.

The method for preparing the above-mentioned charge-coupled device pixel includes the following steps:

(1) On the upper surface of n-type lightly doped silicon semiconductor substrate 2, silicon dioxide insulating layer 3 is oxidized and grown, and the resistivity of n-type lightly doped silicon semiconductor substrate 2 used is 1～10Ω·cm; silicon dioxide The thickness of the insulating layer 3 is 100nm-200nm, and the growth temperature is 900-1200°C;

(2) On the surface of the silicon dioxide insulating layer 3, the top electrode and the top electrode are photoetched, and then electron beam evaporation technology is used to first grow a chromium adhesion layer source 4 with a thickness of about 5 nm, and then grow a gold electrode drain 5 with a thickness of 60 nm. ;

(3) Cover two graphene films 6 respectively on the upper surface of the top electrode (source electrode 4 and drain electrode 5) and the upper surface of the silicon dioxide insulating layer 3; Wherein, the transfer method of the transition metal sulfide film 7 is: Use chemical vapor deposition or physical vapor deposition to generate single-layer or multi-layer transition metal sulfides, and transfer them to silicon oxide wafers, imitate the silicon wafers on a 60°C hot plate, use PDMS as the substrate PC Remove the transition metal sulfide film 7, transfer it to the target device, melt the PC at 80°C, wash off the PC glue with chloroform solution, and transfer a layer of boron nitride film as a protective layer in the same way;

(4) Prepare a metal gate 1 in ohmic contact with the n-type lightly doped silicon semiconductor substrate 2 on the back of the n-type lightly doped silicon semiconductor substrate 2 .

The charge-coupled device of this embodiment uses an n-type lightly doped silicon semiconductor substrate 2, the gate voltage works at 0-30V, the duty cycle is 20% of the 1kHz pulse gate voltage, 532nm, and the light energy is 0-120mW/ The optical response curve of the cm ² laser and its graph when the light energy is 0-4mW/cm ² are shown in Fig. 3 . It can be seen from Figure 3 that the prepared device has good linearity in the range of 0-4mW/cm ² ; and the photocurrent is relatively large, which proves that the device can be applied to an image sensor array.

Based on the above structure, the silicon-silicon oxide interface state is used to generate a larger response in the infrared band, and the responsivity of the charge-coupled device is improved.

The semiconductor substrate 2 used is n-type lightly doped silicon, and the insulating layer 3 is silicon dioxide. The interface state between silicon and silicon dioxide will absorb infrared light and generate electron-hole pairs, and transfer them into graphene to make graphite The conductance of the graphene changes, which eventually leads to a change in the output current on the graphene. Although the quantum efficiency of the interface state to absorb infrared light is extremely low, a large response can still be obtained due to the charge integration effect of the CCD and the gain effect of graphene itself. As shown in Figure 4, within a gate voltage pulse period, the device is irradiated with 1550nm lasers of different intensities. It can be seen that the response is obvious, and the responsivity is about 50mA/W, which is 50 times that of commercial infrared probes. The measured wavelength range of its response is 200-2000nm.

Example 2

As shown in FIG. 1 , a low-power charge-coupled device based on a two-dimensional material/insulating layer/semiconductor structure in this embodiment includes several pixels forming an array, and the pixels sequentially include a gate 1, a narrow barrier from bottom to top. Bandwidth semiconductor 2, insulating layer 3, source 4, drain 5 and two-dimensional material film layer; source 4 and drain 5 are horizontally arranged on the upper surface of insulating layer 3; two-dimensional material film layer covers the source 4. The upper surface of the drain electrode 5 and the insulating layer 3 therebetween; the two-dimensional material film layer includes a graphene film 6 and a black phosphorus film 7, and the graphene film 6 is divided into two sections to cover the source electrode 4 and the drain electrode respectively. On the pole 5, two sections of graphene film 6 are connected through black phosphorus film 7 to form two Schottky junctions to reduce dark current.

Among them, the material for making the gate 1 is gallium indium alloy, and the narrow bandgap semiconductor 2 is made of germanium Ge, indium gallium arsenic InGaAs or III-V compound semiconductor, the thickness of which is 300-500 μm, and the resistivity is 1-10 Ω·cm , the thickness of the insulating layer 3 is 10-100 nm, the material used for the source electrode 4 and the drain electrode 5 is a chromium/gold alloy, the size of the graphene film 6 is 30 μm×30 μm, and the size of the black phosphorus film 7 is 20 μm×20 μm. The size of the overlapping region is 20 μm × 5 μm.

A pulsed gate voltage is applied to the charge-coupled device of this embodiment, so that it can enter a deep depletion working state to realize photon absorption. A fixed bias voltage is directly applied to the source 4 and the drain 5 to realize the lossless readout of charges in the potential well on the graphene. The negative pole of the gate voltage is connected to the gate 1 of the device, the positive pole of the gate voltage is connected to the source 4 of the charge-coupled device, and a 1V bias is applied between the source 4 and the drain 5, as shown in Figure 1.

In the structure of the charge-coupled device in this embodiment, the semiconductor with a narrow bandgap width is replaced to produce a larger response in the infrared band, and the responsivity of the charge-coupled device is improved.

Due to deep depletion this state is achievable in a wide variety of semiconductors. Therefore, the semiconductor substrate 2 is made of narrow-bandgap semiconductors such as germanium Ge, indium antimonide InSb, indium gallium arsenide InGaAs, III-V compound semiconductors, etc. These semiconductors can directly absorb infrared photons, and can produce larger responsivity and quantum efficiency. However, it should be noted that the semiconductor-insulating layer interface should have good interface properties to prevent the heat generation from being too fast to overwhelm the photoresponse signal. The infrared band can be extended to more than 5μm.

Example 3

As shown in FIG. 1, a low-power charge-coupled device based on a two-dimensional material/insulating layer/semiconductor structure in this embodiment includes several pixels forming an array, and the pixels sequentially include a gate 1, a wide Bandwidth semiconductor 2, insulating layer 3, source 4, drain 5 and two-dimensional material film layer; source 4 and drain 5 are horizontally arranged on the upper surface of insulating layer 3; two-dimensional material film layer covers the source 4. The upper surface of the drain electrode 5 and the insulating layer 3 therebetween; the two-dimensional material film layer includes a graphene film 6 and a black phosphorus film 7, and the graphene film 6 is divided into two sections to cover the source electrode 4 and the drain electrode respectively. On the pole 5, two sections of graphene film 6 are connected through black phosphorus film 7 to form two Schottky junctions to reduce dark current.

Among them, the material for making the gate 1 is gallium indium alloy, the wide bandgap semiconductor 2 is gallium nitride GaN or silicon carbide SiC, the thickness is 300-500 μm, the resistivity is 1-10 Ω·cm, and the thickness of the insulating layer 3 is The size of the source electrode 4 and the drain electrode 5 is chromium/gold alloy, the size of the graphene film 6 is 30 μm×30 μm, the size of the black phosphorus film 7 is 20 μm×20 μm, and the size of the overlapping area of the two is 20 μm × 5 μm.

A pulsed gate voltage is applied to the charge-coupled device of this embodiment, so that it can enter a deep depletion working state to realize photon absorption. A fixed bias voltage is directly applied to the source 4 and the drain 5 to realize the lossless readout of charges in the potential well on the graphene. The negative pole of the gate voltage is connected to the gate 1 of the device, the positive pole of the gate voltage is connected to the source 4 of the charge-coupled device, and a 1V bias is applied between the source 4 and the drain 5, as shown in Figure 1.

Based on the above structure, replacing the semiconductor with a wide bandgap width produces a larger response in the ultraviolet band, improving the responsivity of the charge-coupled device, so that the charge-coupled device only absorbs light in the ultraviolet band.

Due to deep depletion this state is achievable in a wide variety of semiconductors. Therefore, the semiconductor substrate 2 is made of wide bandgap semiconductors such as gallium nitride GaN, silicon carbide SiC, etc. These semiconductors can directly absorb ultraviolet photons, and can produce greater responsivity and quantum efficiency. However, it should be noted that the semiconductor-insulating layer interface should have good interface properties to prevent excessive heat generation from flooding the photoresponse signal and reduce the interference of visible light.

Example 4

As shown in FIG. 1 , a low-power charge-coupled device based on a two-dimensional material/insulating layer/semiconductor structure in this embodiment includes several pixels forming an array, and the pixels sequentially include a gate 1, a semiconductor substrate, and a substrate from bottom to top. Bottom 2, insulating layer 3, source electrode 4, drain electrode 5 and two-dimensional material film layer made of materials with low ultraviolet light absorption coefficient; source electrode 4 and drain electrode 5 are horizontally arranged in a material with low ultraviolet light absorption coefficient The upper surface of the insulating layer 3 formed; the upper surface of the insulating layer 3 made of a material with a low ultraviolet absorption coefficient between the source electrode 4, the drain electrode 5 and the two-dimensional material thin film layer; the two-dimensional material thin film layer It consists of a graphene film 6 and a tungsten disulfide film 7. The graphene film 6 is divided into two sections covering the source electrode 4 and the drain electrode 5 respectively. The two sections of graphene film 6 are connected by a tungsten disulfide film 7 to form two A Schottky junction reduces dark current.

Wherein, the material for making the gate 1 is gallium indium alloy, the thickness of the semiconductor substrate 2 is 300-500 μm, the resistivity is 1-10 Ω·cm, and the thickness of the insulating layer 3 made of a material with a low ultraviolet light absorption coefficient is 10 μm. ~100nm, the source electrode 4 and the drain electrode 5 are made of chromium/gold alloy, the size of the graphene film 6 is 60 μm×60 μm, the size of the tungsten disulfide film 7 is 40 μm×40 μm, and the size of the overlapping area between the two is 40 μm ×10 μm.

A pulsed gate voltage is applied to the charge-coupled device of this embodiment, so that it can enter a deep depletion working state to realize photon absorption. A fixed bias voltage is directly applied to the source 4 and the drain 5 to realize the lossless readout of charges in the potential well on the graphene. The negative pole of the gate voltage is connected to the gate 1 of the device, the positive pole of the gate voltage is connected to the source 4 of the charge-coupled device, and a 1V bias is applied between the source 4 and the drain 5, as shown in Figure 1.

Since graphene has good light transmission, improving the ultraviolet response can be considered from the perspective of reducing the reflectivity of ultraviolet light and reducing the absorption of ultraviolet light by the insulating layer, so as to improve the responsivity of the charge-coupled device in the ultraviolet band. Based on the large absorption of ultraviolet light by silicon dioxide, the insulation layer material with a low absorption coefficient for ultraviolet light is selected, such as silicon nitride or high dielectric constant material, which absorbs less light in the ultraviolet band.

Example 5

As shown in FIG. 1 , a low-power charge-coupled device based on a two-dimensional material/insulating layer/semiconductor structure in this embodiment includes several pixels forming an array, and the pixels sequentially include a gate 1, a semiconductor substrate, and a substrate from bottom to top. Bottom 2, insulating layer 3 made of high dielectric constant medium, source 4, drain 5 and two-dimensional material film layer; source 4 and drain 5 are horizontally arranged on the insulating layer made of high dielectric constant medium The upper surface of 3; the two-dimensional material film layer covers the upper surface of the insulating layer 3 made of the source electrode 4, the drain electrode 5 and the high dielectric constant medium between them; the two-dimensional material film layer includes a graphene film 6 and tungsten diselenide film 7, the graphene film 6 is divided into two sections covering the source electrode 4 and the drain electrode 5 respectively, and the middle of the two sections of graphene film 6 is connected by the tungsten diselenide film 7 to form two Schottky junction, reducing dark current.

Among them, the material for making the gate 1 is gallium indium alloy, the thickness of the semiconductor substrate 2 is 300-500 μm, the resistivity is 1-10 Ω·cm, and the thickness of the insulating layer 3 made of high dielectric constant medium is 10-100 nm. , the source electrode 4 and the drain electrode 5 are made of chromium/gold alloy, the size of the graphene film 6 is 30 μm×30 μm, the size of the tungsten diselenide film 7 is 20 μm×20 μm, and the size of the overlapping region of the two is 20 μm× 5 μm.

A pulsed gate voltage is applied to the charge-coupled device of this embodiment, so that it can enter a deep depletion working state to realize photon absorption. A fixed bias voltage is directly applied to the source 4 and the drain 5 to realize the lossless readout of charges in the potential well on the graphene. The negative pole of the gate voltage is connected to the gate 1 of the device, the positive pole of the gate voltage is connected to the source 4 of the charge-coupled device, and a 1V bias is applied between the source 4 and the drain 5, as shown in Figure 1.

The insulating layer made of high dielectric constant medium can enhance the capacitive coupling effect, reduce the gate voltage, and reduce power consumption.

Example 6

As shown in Figure 5, a low-power charge-coupled device based on a two-dimensional material/insulating layer/semiconductor structure in this embodiment includes several pixels forming an array, and the pixels sequentially include gate 1, p-type Doped semiconductor substrate 2, insulating layer 3, source 4, drain 5 and two-dimensional material thin film layer; source electrode 4 and drain electrode 5 are horizontally arranged on the upper surface of insulating layer 3; two-dimensional material thin film layer covers The upper surface of the source electrode 4, the drain electrode 5 and the insulating layer 3 between them; the two-dimensional material film layer includes a graphene film 6 and a molybdenum disulfide film 7, and the graphene film 6 covers the source electrode in two sections 4. On the drain 5, the middle of the two graphene films 6 is connected by a molybdenum disulfide film 7 to form two Schottky junctions to reduce the dark current, between the p-type doped semiconductor substrate 2 and the insulating layer 3 An n-type doped buried channel layer 8 is provided.

Wherein, the material for making the gate 1 is gallium indium alloy, the thickness of the p-type doped semiconductor substrate 2 is 300-500 μm, the resistivity is 1-10 Ω·cm, the thickness of the insulating layer 3 is 10-100 nm, and the source 4 The material used for drain electrode 5 is chromium/gold alloy, the size of graphene film 6 is 30 μm × 30 μm, the size of molybdenum disulfide film 7 is 20 μm × 20 μm, and the size of the overlapping area between the two is 20 μm × 5 μm. The doped buried channel layer 8 has a thickness of 2 μm and a resistivity of 1˜10 Ω·cm.

A pulsed gate voltage is applied to the charge-coupled device of this embodiment, so that it can enter a deep depletion working state to realize photon absorption. A fixed bias voltage is directly applied to the source 4 and the drain 5 to realize the lossless readout of charges in the potential well on the graphene. The negative pole of the gate voltage is connected to the gate 1 of the device, the positive pole of the gate voltage is connected to the source 4 of the charge-coupled device, and a 1V bias is applied between the source 4 and the drain 5, as shown in FIG. 5 .

The surface channel CCD will affect the charge transfer speed due to the existence of the surface state, and the heat generation in the dark field is higher, while the surface of the buried channel CCD has a layer of doping layer opposite to the doping type of the semiconductor substrate. It is completely depleted, and the accumulated photogenerated charges leave the surface, which reduces the dark noise caused by surface heat generation, improves the transfer efficiency, and optimizes the working rate of the charge-coupled device.

In addition, it should be understood that although this specification is described according to implementation modes, not each implementation mode only contains an independent technical solution, and this description in the specification is only for clarity, and those skilled in the art should take the specification as a whole , the technical solutions in the various embodiments can also be properly combined to form other implementations that can be understood by those skilled in the art. The n-type doping and p-type doping of semiconductor substrates or other functional layers involved in this specification are only for convenience of description, and are stated as special cases. Interchange of doping types (n-type to p-type, p-type to n-type) only makes the device carrier type (electron or hole) interchangeable without affecting the working principle of the device, so it does not exceed scope of this manual.

Claims (9)

1. A low-power charge-coupled device based on a two-dimensional material/insulating layer/semiconductor structure, comprising several pixels forming an array, characterized in that, the pixels sequentially include a gate, a semiconductor substrate, an insulating Layer, source, drain and two-dimensional material thin film layer; the source and the drain are horizontally arranged on the upper surface of the insulating layer; the two-dimensional material thin film layer covers the source and drain The upper surface of the pole and the insulating layer between them; the two-dimensional material thin film layer includes two or more two-dimensional materials, and a heterojunction is formed between different two-dimensional materials. 2. A low-power charge-coupled device based on a two-dimensional material/insulating layer/semiconductor structure according to claim 1, wherein the two-dimensional material film layer is composed of a graphene film and a two-dimensional semiconductor film In the heterojunction, the graphene film is divided into two sections covering the source electrode and the drain electrode respectively, and the two sections of the graphene film are connected through a two-dimensional semiconductor film to form two Schottky junctions. 3. A low-power charge-coupled device based on a two-dimensional material/insulating layer/semiconductor structure according to claim 2, wherein the two-dimensional semiconductor film is a black phosphorus film or a transition metal sulfide film. 4. A low-power charge-coupled device based on a two-dimensional material/insulating layer/semiconductor structure according to claim 1, wherein the semiconductor substrate is a lightly doped semiconductor. 5. A low-power charge-coupled device based on a two-dimensional material/insulating layer/semiconductor structure according to claim 4, wherein the semiconductor substrate is n-type lightly doped silicon, and the insulating layer is two silicon oxide. 6. A low-power charge-coupled device based on a two-dimensional material/insulating layer/semiconductor structure according to claim 1, wherein a buried trench layer is arranged between the semiconductor substrate and the insulating layer, The buried channel layer is n-type doped, and the semiconductor substrate is p-type doped. 7. A low-power charge-coupled device based on a two-dimensional material/insulating layer/semiconductor structure according to claim 1, wherein the semiconductor substrate is a narrow bandgap semiconductor or a wide bandgap semiconductor . 8. A low-power charge-coupled device based on a two-dimensional material/insulating layer/semiconductor structure according to claim 1, wherein the insulating layer is a material with a low ultraviolet absorption coefficient or a high dielectric constant medium. 9. A low-power charge-coupled device based on a two-dimensional material/insulating layer/semiconductor structure according to claim 1, wherein light is injected into the charge-coupled device from below.