CN108091740B - A light-emitting diode epitaxial wafer and its manufacturing method - Google Patents
A light-emitting diode epitaxial wafer and its manufacturing method Download PDFInfo
- Publication number
- CN108091740B CN108091740B CN201711089437.7A CN201711089437A CN108091740B CN 108091740 B CN108091740 B CN 108091740B CN 201711089437 A CN201711089437 A CN 201711089437A CN 108091740 B CN108091740 B CN 108091740B
- Authority
- CN
- China
- Prior art keywords
- layer
- type
- temperature
- electron blocking
- thickness
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/81—Bodies
- H10H20/816—Bodies having carrier transport control structures, e.g. highly-doped semiconductor layers or current-blocking structures
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y30/00—Nanotechnology for materials or surface science, e.g. nanocomposites
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y40/00—Manufacture or treatment of nanostructures
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/01—Manufacture or treatment
- H10H20/011—Manufacture or treatment of bodies, e.g. forming semiconductor layers
- H10H20/013—Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials
- H10H20/0133—Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials with a substrate not being Group III-V materials
- H10H20/01335—Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials with a substrate not being Group III-V materials the light-emitting regions comprising nitride materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/81—Bodies
- H10H20/815—Bodies having stress relaxation structures, e.g. buffer layers
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Nanotechnology (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Crystallography & Structural Chemistry (AREA)
- Composite Materials (AREA)
- Materials Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Led Devices (AREA)
Abstract
本发明公开了一种发光二极管外延片及其制造方法，属于半导体技术领域。发光二极管外延片包括衬底、以及依次层叠在所述衬底上的缓冲层、GaN层、N型层、多量子阱层、插入层、低温P型层、电子阻挡层、高温P型层、P型接触层，插入层为AlN层，AlN层的厚度为1～30nm，低温P型层为AlInGaN层，电子阻挡层的厚度为8～40nm。通过AlN层和AlInGaN层相配合，优化P层能带，形成多导带势垒阻挡电子迁移，从而可以减薄电子阻挡层的厚度，防止电子阻挡层较厚会产生一个高的价带带阶阻碍空穴向多量子阱层迁移，进而提高了电子和空穴的复合几率，提高LED的发光效率，且通过P层势垒的优化，可以控制插入层与P型层的厚度，从而改善出光效率，提高器件发光强度。
The invention discloses a light-emitting diode epitaxial wafer and a manufacturing method thereof, belonging to the field of semiconductor technology. The light-emitting diode epitaxial wafer comprises a substrate, and a buffer layer, a GaN layer, an N-type layer, a multi-quantum well layer, an insertion layer, a low-temperature P-type layer, an electron blocking layer, a high-temperature P-type layer, and a P-type contact layer stacked on the substrate in sequence. The insertion layer is an AlN layer, and the thickness of the AlN layer is 1 to 30 nm. The low-temperature P-type layer is an AlInGaN layer, and the thickness of the electron blocking layer is 8 to 40 nm. By cooperating with the AlN layer and the AlInGaN layer, the P-layer energy band is optimized, and a multi-conduction band barrier is formed to block electron migration, thereby reducing the thickness of the electron blocking layer, preventing the thick electron blocking layer from generating a high valence band order to hinder the migration of holes to the multi-quantum well layer, thereby increasing the recombination probability of electrons and holes, and improving the luminous efficiency of the LED. By optimizing the P-layer barrier, the thickness of the insertion layer and the P-type layer can be controlled, thereby improving the light extraction efficiency and the luminous intensity of the device.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to a light-emitting diode epitaxial wafer and a manufacturing method thereof.
Background
An LED (Light Emitting Diode) is a semiconductor electronic component capable of Emitting Light. As a novel high-efficiency, environment-friendly and green solid-state illumination light source, the solid-state illumination light source is rapidly and widely applied, such as traffic signal lamps, automobile interior and exterior lamps, urban landscape illumination, mobile phone backlight sources and the like, and the aim of improving the luminous efficiency of a chip is continuously pursued by LEDs.
The conventional LED comprises a substrate and a GaN-based epitaxial layer arranged on the substrate, wherein the GaN-based epitaxial layer comprises a buffer layer, a GaN layer, an N-type layer, a multi-quantum well layer, an electronic barrier layer and a P-type layer which are sequentially stacked on the substrate.
In the process of implementing the invention, the inventor finds that the prior art has at least the following problems:
because the mobility of electrons in the GaN material is far higher than that of holes, electron overflow is easily caused under high current density, and thus the composite light-emitting probability of current carriers is reduced, the existing LED blocks the migration of electrons by arranging an electron blocking layer with a certain thickness, but in order to block the migration of electrons to a P-type layer, the electron blocking layer is usually designed to be thick (usually reaching 50nm), the thick electron blocking layer can cause the effects of polarization and stress among materials, and simultaneously, a high valence band step can be generated to block the migration of holes to a multi-quantum well layer, so that the composite light-emitting efficiency of current carriers is reduced.
Disclosure of Invention
In order to solve the problem of low composite luminous efficiency of current carriers in the prior art, the embodiment of the invention provides a light emitting diode epitaxial wafer and a manufacturing method thereof. The technical scheme is as follows:
in one aspect, the invention provides a light emitting diode epitaxial wafer, which comprises a substrate, and a buffer layer, a GaN layer, an N-type layer, a multi-quantum well layer, an insertion layer, a low-temperature P-type layer, an electron blocking layer, a high-temperature P-type layer and a P-type contact layer which are sequentially laminated on the substrate,
the inserting layer is an AlN layer, the thickness of the AlN layer is 2nm, the low-temperature P-type layer is an AlInGaN layer, and the thickness of the electron blocking layer is 25 nm.
Furthermore, the total thickness of the insertion layer, the low-temperature P-type layer, the electron blocking layer, the high-temperature P-type layer and the P-type contact layer is 40-150 nm.
Furthermore, the electron blocking layer is one of AlGaN layer or AlGaN/GaN, AlGaN/InGaN, AlInGaN/GaN, AlGaN/InAlN superlattice structure.
In another aspect, the present invention provides a method for manufacturing an epitaxial wafer of a light emitting diode, the method comprising:
providing a substrate;
the method comprises the following steps that a buffer layer, a GaN layer, an N-type layer, a multi-quantum well layer, an insertion layer, a low-temperature P-type layer, an electronic barrier layer, a high-temperature P-type layer and a P-type contact layer are sequentially grown on a substrate, the insertion layer is an AlN layer, the thickness of the AlN layer is 2nm, the low-temperature P-type layer is an AlInGaN layer, and the thickness of the electronic barrier layer is 25 nm.
Further, the growth temperature of the AlN layer is 800-900 ℃.
Further, the growth pressure of the AlN layer is 150-250 torr.
Furthermore, the total thickness of the insertion layer, the low-temperature P-type layer, the electron blocking layer, the high-temperature P-type layer and the P-type contact layer is 40-150 nm.
Furthermore, the electron blocking layer is one of AlGaN layer or AlGaN/GaN, AlGaN/InGaN, AlInGaN/GaN, AlGaN/InAlN superlattice structure.
The technical scheme provided by the embodiment of the invention has the following beneficial effects:
by arranging the AlN layer between the multi-quantum well layer and the P-type layer, on one hand, the AlN layer can form a higher barrier energy level to block the migration of electrons; on the other hand, the AlN layer is 1-30 nm thick, and the stress field generated by the adaptive stress between the crystal lattices is small due to the fact that the AlN layer is thin, and therefore effective injection of holes can be improved. The low-temperature P-type layer is an AlInGaN layer, the AlInGaN layer is matched with the GaN crystal lattices, a stress field generated due to the crystal lattice mismatch can be reduced, and meanwhile, compared with the low-temperature P-type layer made of InGaN materials in the existing LED, the AlInGaN layer is higher in energy level and can further block the migration of electrons. The AlN layer is matched with the AlInGaN layer, the effect of a part of the electron blocking layer can be shared, so that the thickness of the electron blocking layer can be reduced, the thickness of the electron blocking layer is within the range of 8-40 nm, the thickness of the electron blocking layer is greatly reduced compared with that of the electron blocking layer in the existing LED, the phenomenon that the band step of a high-valence band generated by the excessively thick electron blocking layer obstructs the migration of holes to the multi-quantum well layer is avoided, the recombination probability of electrons and holes is further improved, and the luminous efficiency of the LED is improved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic structural diagram of an led epitaxial wafer according to an embodiment of the present invention;
fig. 2 is a flowchart of a method for manufacturing an epitaxial wafer of a light emitting diode according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
Example one
Fig. 1 is a schematic structural diagram of an epitaxial wafer of a light emitting diode according to an embodiment of the present invention, and as shown in fig. 1, the light emitting diode includes a substrate 1, and a buffer layer 2, a GaN layer 3, an N-type layer 4, a multi-quantum well layer 5, an insertion layer 6, a low temperature P-type layer 7, an electron blocking layer 8, a high temperature P-type layer 9, and a P-type contact layer 10, which are sequentially stacked on the substrate 1.
The inserting layer 6 is an AlN layer, the thickness of the AlN layer is 1-30 nm, the low-temperature P-type layer 7 is an AlInGaN layer, and the thickness of the electron blocking layer 8 is 8-40 nm.
Preferably, the AlN layer has a thickness of 2nm and the electron blocking layer 8 has a thickness of 25 nm. The LED then has the best lighting effect.
According to the embodiment of the invention, the AlN layer is arranged between the multiple quantum well layer and the P type layer, so that on one hand, the AlN layer can form a higher barrier energy level to block the migration of electrons; on the other hand, the AlN layer is 1-30 nm thick, and the stress field generated by the adaptive stress between the crystal lattices is small due to the fact that the AlN layer is thin, and therefore effective injection of holes can be improved. The low-temperature P-type layer is an AlInGaN layer, the AlInGaN layer is matched with the GaN crystal lattices, a stress field generated due to the crystal lattice mismatch can be reduced, and meanwhile, compared with the low-temperature P-type layer made of InGaN materials in the existing LED, the AlInGaN layer is higher in energy level and can further block the migration of electrons. The AlN layer is matched with the AlInGaN layer, the effect of a part of the electron blocking layer can be shared, so that the thickness of the electron blocking layer can be reduced, the thickness of the electron blocking layer is within the range of 8-40 nm, the thickness of the electron blocking layer is greatly reduced compared with that of the electron blocking layer in the existing LED, the phenomenon that the band step of a high-valence band generated by the excessively thick electron blocking layer obstructs the migration of holes to the multi-quantum well layer is avoided, the recombination probability of electrons and holes is further improved, and the luminous efficiency of the LED is improved.
Optionally, the total thickness of the insertion layer 6, the low-temperature P-type layer 7, the electron blocking layer 8, the high-temperature P-type layer 9 and the P-type contact layer 10 is 40-150 nm. Due to the fact that the thickness of the electron blocking layer is reduced, the thickness of the whole P-type layer is reduced, and forward light emitting of the light emitting diode can be improved.
For the light emitting diode with the normal structure, when the total thickness of the insertion layer 6, the low-temperature P-type layer 7, the electron blocking layer 8, the high-temperature P-type layer 9 and the P-type contact layer 10 is 90nm, the light emitting effect of the light emitting diode is best.
For the light emitting diode with the flip-chip structure, the light emitting effect of the light emitting diode is best when the total thickness of the insertion layer 6, the low temperature P-type layer 7, the electron blocking layer 8, the high temperature P-type layer 9 and the P-type contact layer 10 is 70 nm.
Optionally, the electron blocking layer 8 is an AlGaN layer or one of AlGaN/GaN, AlGaN/InGaN, AlInGaN/GaN, AlGaN/InAlN superlattice structures.
Preferably, when the electron blocking layer 8 is of a superlattice structure of AlGaN/GaN, AlGaN/InGaN, AlInGaN/GaN, AlGaN/InAlN, it is more favorable to limit the electron overflow.
In the present embodiment, the substrate 1 may be a sapphire substrate, the buffer layer 2 may be an AlN layer, and the N-type layer 4 may be a GaN layer.
Example two
An embodiment of the present invention provides a method for manufacturing a light emitting diode epitaxial wafer, which is suitable for a light emitting diode epitaxial wafer provided in the first embodiment of the present invention, and fig. 2 is a method flowchart of the method for manufacturing the light emitting diode epitaxial wafer provided in the first embodiment of the present invention, as shown in fig. 2, the method includes:
Optionally, the substrate is sapphire and has a thickness of 630-650 um.
In this example, a method of growing an LED was implemented using a Veeco K465i or C4 MOCVD (Metal Organic Chemical vapor deposition) apparatus. By using high-purity H2(Hydrogen) or high purity N2(Nitrogen) or high purity H2And high purity N2The mixed gas of (2) is used as a carrier gas, high-purity NH3As an N source, trimethyl gallium (TMGa) and triethyl gallium (TEGa) as gallium sources, trimethyl indium (TMIn) as indium sources, silane (SiH4) as an N-type dopant, trimethyl aluminum (TMAl) as an aluminum source, and magnesium dicylocene (CP)2Mg) as a P-type dopant. The pressure in the reaction chamber is 100 to 600 torr.
Specifically, the step 201 includes:
and processing the substrate at high temperature for 5-6 min in a hydrogen atmosphere. Wherein the temperature of the reaction chamber is 1000-1100 deg.C, and the pressure of the reaction chamber is controlled at 200-500 torr.
Specifically, the buffer layer is grown on the face of sapphire.
Specifically, a sapphire substrate is sputtered with a 5-40 nm thick ALN buffer layer in a PVD (Physical Vapor Deposition) sputtering furnace.
After the growth of the buffer layer is finished, the substrate sputtered with the ALN buffer layer is placed into MOCVD equipment, the temperature of the reaction chamber is increased to 1040 degrees, and a high-temperature undoped GaN layer with the thickness of 1 mu m is grown.
In this embodiment, the N-type layer is a Si-doped GaN layer with a thickness of 2 um. When growing the N-type layer, the temperature of the reaction chamber is 1000-1100 ℃, and the pressure of the reaction chamber is controlled at 200-300 torr.
In this embodiment, the stress relief layer may be grown prior to growing the multiple quantum well layer.
Specifically, the stress release layer comprises an InGaN well layer and a GaN barrier layer which alternately grow in 3 periods, wherein the thickness of the InGaN well layer is 2nm, the growth temperature is 850-900 ℃, and the growth pressure is 250 torr. The thickness of the GaN barrier layer is 30-50 nm, the growth temperature is 850-900 ℃, and the growth pressure is 250 torr.
The stress release layer further comprises an InGaN well layer and a GaN barrier layer which alternately grow in 6 periods, wherein the thickness of the InGaN well layer is 2nm, the growth temperature is 800-850 ℃, and the growth pressure is 250 torr. The thickness of the GaN barrier layer is 10-20 nm, the growth temperature is 800-850 ℃, and the growth pressure is 250 torr.
Specifically, after the stress release layer is grown, a multi-quantum well layer is grown, wherein the multi-quantum well layer comprises InGaN quantum well layers and GaN quantum barrier layers which alternately grow in 8-10 periods, the thickness of the InGaN quantum well layer is 2.5nm, the growth temperature is 780-820 ℃, and the growth pressure is 250 torr. The thickness of the GaN quantum barrier layer is 12nm, the growth temperature is 780-820 ℃, and the growth pressure is 250 torr.
Because the multi-quantum well layer comprises the InGaN quantum well layer and the GaN quantum barrier layer, the high-composition InGaN quantum well layer grows in the GaN material and can face higher lattice mismatch, so that the crystal quality of the multi-quantum well layer is influenced, and the lattice can be relaxed to a state relatively suitable for growing the high-composition InGaN quantum well layer by growing the stress release layer before the multi-quantum well layer grows.
In this example, the insertion layer was an AlN layer, and the AlN layer had a thickness of 2 nm. The growth temperature is 800-900 ℃, and the growth pressure is 150-250 torr.
Optionally, the low-temperature P-type layer is an AlInGaN layer and has a thickness of 30 nm. The growth temperature is 700-800 ℃, and the growth pressure is 150-250 torr.
Wherein the AlInGaN layer is doped with Mg, and the doping concentration of Mg is 3 x 1020/cm3。
In this embodiment, the electron blocking layer is an AlGaN layer with a thickness of 25 nm. The growth temperature is 900-1000 ℃, and the growth pressure is 100-600 torr.
Step 209 is growing a high temperature P-type layer on the electron blocking layer.
In this embodiment, the high-temperature P-type layer is an AlGaN layer with a thickness of 20 nm. The growth temperature is 980 ℃ and the growth pressure is 100-600 torr.
In this embodiment, the P-type contact layer is a heavily Mg-doped GaN layer with a thickness of 1.5 nm. The growth temperature is 700-800 ℃, and the growth pressure is 300-600 torr.
The P-type contact layer is mainly used for activating Mg doped in the P-type layer, so that more holes are generated after the Mg is activated, and the conditions of low chip brightness and high voltage caused by poor ohmic contact due to non-activation are avoided.
The present invention is not limited to the above preferred embodiments, and any modifications, equivalent replacements, improvements, etc. within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (6)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711089437.7A CN108091740B (en) | 2017-11-08 | 2017-11-08 | A light-emitting diode epitaxial wafer and its manufacturing method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711089437.7A CN108091740B (en) | 2017-11-08 | 2017-11-08 | A light-emitting diode epitaxial wafer and its manufacturing method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN108091740A CN108091740A (en) | 2018-05-29 |
| CN108091740B true CN108091740B (en) | 2020-04-14 |
Family
ID=62171980
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201711089437.7A Active CN108091740B (en) | 2017-11-08 | 2017-11-08 | A light-emitting diode epitaxial wafer and its manufacturing method |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN108091740B (en) |
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109216510A (en) * | 2017-06-29 | 2019-01-15 | 苏州新纳晶光电有限公司 | A kind of epitaxial wafer growth method for delaying LED stress |
| CN109360876A (en) * | 2018-08-31 | 2019-02-19 | 华灿光电（浙江）有限公司 | Epitaxial wafer of light-emitting diode and preparation method thereof |
| CN109301041B (en) * | 2018-09-19 | 2020-06-02 | 华灿光电(苏州）有限公司 | Light emitting diode epitaxial wafer and manufacturing method thereof |
| CN109860351B (en) * | 2018-11-14 | 2021-10-08 | 华灿光电（浙江）有限公司 | GaN-based light emitting diode epitaxial wafer and preparation method thereof |
| CN110707188B (en) * | 2019-11-15 | 2021-05-04 | 芜湖德豪润达光电科技有限公司 | Light-emitting diode and light-emitting diode manufacturing method |
| CN112670378A (en) * | 2020-12-31 | 2021-04-16 | 深圳第三代半导体研究院 | Light emitting diode and manufacturing method thereof |
| CN114335270A (en) * | 2021-12-27 | 2022-04-12 | 江西兆驰半导体有限公司 | Light-emitting diode epitaxial wafer and its manufacturing method and light-emitting diode |
| CN114613889A (en) * | 2022-03-24 | 2022-06-10 | 淮安澳洋顺昌光电技术有限公司 | GaN-based LED epitaxial structure capable of improving antistatic capacity |
| CN115036402B (en) * | 2022-08-12 | 2022-10-25 | 江苏第三代半导体研究院有限公司 | Induction-enhanced Micro-LED homoepitaxial structure and preparation method thereof |
| CN116154059A (en) * | 2023-04-04 | 2023-05-23 | 江西兆驰半导体有限公司 | Gallium nitride light-emitting diode epitaxial structure, LED and preparation method thereof |
| CN116230824B (en) * | 2023-05-08 | 2023-07-18 | 江西兆驰半导体有限公司 | High-efficiency light-emitting diode epitaxial wafer, preparation method thereof, and LED chip |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI307175B (en) * | 2006-01-11 | 2009-03-01 | Ind Tech Res Inst | Non-substrate light emitting diode and fabrication method thereof |
| CN104638074B (en) * | 2015-02-04 | 2017-12-08 | 映瑞光电科技(上海)有限公司 | High brightness GaN base LED epitaxial structures and preparation method thereof |
| CN106784219B (en) * | 2017-01-22 | 2019-04-05 | 厦门乾照光电股份有限公司 | A kind of LED and preparation method thereof |
-
2017
- 2017-11-08 CN CN201711089437.7A patent/CN108091740B/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| CN108091740A (en) | 2018-05-29 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN108091740B (en) | A light-emitting diode epitaxial wafer and its manufacturing method | |
| CN108461592B (en) | A light-emitting diode epitaxial wafer and its manufacturing method | |
| CN110718612B (en) | Light-emitting diode epitaxial wafer and manufacturing method thereof | |
| CN109119515B (en) | A light-emitting diode epitaxial wafer and its manufacturing method | |
| CN108091736B (en) | Light emitting diode epitaxial wafer and manufacturing method thereof | |
| CN109216519B (en) | A light-emitting diode epitaxial wafer and its manufacturing method | |
| CN108336198B (en) | Light emitting diode epitaxial wafer and manufacturing method thereof | |
| CN105405939B (en) | A kind of light emitting diode and its manufacture method | |
| CN109346583B (en) | A kind of light-emitting diode epitaxial wafer and preparation method thereof | |
| CN107731974B (en) | GaN-based light emitting diode epitaxial wafer and growth method thereof | |
| CN104465898B (en) | Growing method of light-emitting diode epitaxial wafer and light emitting diode epitaxial wafer | |
| CN109449264B (en) | A light-emitting diode epitaxial wafer and its manufacturing method | |
| CN107195739B (en) | A light-emitting diode and its manufacturing method | |
| CN106611808A (en) | Growth method of light-emitting diode epitaxial wafer | |
| CN108649109A (en) | A kind of LED epitaxial slice and its manufacturing method | |
| CN109065679B (en) | A light-emitting diode epitaxial wafer and its manufacturing method | |
| CN108831974B (en) | Light emitting diode epitaxial wafer and manufacturing method thereof | |
| CN113690350A (en) | Micro light-emitting diode epitaxial wafer and its manufacturing method | |
| CN112259647B (en) | Preparation method of light-emitting diode epitaxial wafer and light-emitting diode epitaxial wafer | |
| CN108831978A (en) | A light-emitting diode epitaxial wafer and its manufacturing method | |
| CN108682722A (en) | A kind of AlGaN bases ultraviolet LED epitaxial wafer and preparation method thereof | |
| CN111009598B (en) | Growth method of light-emitting diode epitaxial wafer and light-emitting diode epitaxial wafer | |
| CN106876531B (en) | Epitaxial wafer of light emitting diode and preparation method thereof | |
| CN108598222B (en) | Light emitting diode epitaxial wafer and growth method thereof | |
| CN108281519B (en) | A light-emitting diode epitaxial wafer and its manufacturing method |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |