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CN108037627A - The signal lead structure and array base palte of GOA circuits, liquid crystal display panel - Google Patents

The signal lead structure and array base palte of GOA circuits, liquid crystal display panel Download PDF

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Publication number
CN108037627A
CN108037627A CN201711482973.3A CN201711482973A CN108037627A CN 108037627 A CN108037627 A CN 108037627A CN 201711482973 A CN201711482973 A CN 201711482973A CN 108037627 A CN108037627 A CN 108037627A
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CN
China
Prior art keywords
signal
goa circuits
base palte
array base
signal wire
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201711482973.3A
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Chinese (zh)
Inventor
韩约白
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Wuhan China Star Optoelectronics Technology Co Ltd
Original Assignee
Wuhan China Star Optoelectronics Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Wuhan China Star Optoelectronics Technology Co Ltd filed Critical Wuhan China Star Optoelectronics Technology Co Ltd
Priority to CN201711482973.3A priority Critical patent/CN108037627A/en
Publication of CN108037627A publication Critical patent/CN108037627A/en
Pending legal-status Critical Current

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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136286Wiring, e.g. gate line, drain line
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/133345Insulating layers
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1345Conductors connecting electrodes to cell terminals
    • G02F1/13452Conductors connecting driver circuitry and terminals of panels
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1345Conductors connecting electrodes to cell terminals
    • G02F1/13454Drivers integrated on the active matrix substrate

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

The invention discloses a kind of signal lead structure of GOA circuits, including the first signal wire and secondary signal line being connected with GOA circuits, wherein, first signal wire is patterned and formed in the first metal layer, the secondary signal line pattern is formed in second metal layer, the first metal layer and the second metal layer mutually insulated;First signal wire includes and the cross one another Part I of secondary signal line, it is provided with patterned vacancy section on the secondary signal line, the projection of the Part I of first signal wire on the secondary signal line is located in the patterned vacancy section.The invention also discloses the array base palte and liquid crystal display panel of the signal lead structure comprising the GOA circuits.

Description

The signal lead structure and array base palte of GOA circuits, liquid crystal display panel
Technical field
The present invention relates to display technology field, more particularly to a kind of signal lead structure of GOA circuits, further relate to include The array base palte and liquid crystal display panel of the signal lead structure of the GOA circuits.
Background technology
In recent years, the development of liquid crystal display presents high integration, inexpensive development trend.One of which is non- Often important technology is exactly the realization of the technology mass production of GOA (Gate Driver on Array, the driving of array base palte row).Profit Gate switch circuit is integrated on the array base palte of liquid crystal display panel with GOA technologies, so as to save raster data model collection Into circuit part, to reduce product cost in terms of material cost and manufacture craft two.It is this to utilize GOA Integration ofTechnologies in array Gate switch circuit on substrate is also referred to as GOA circuits.
Drive circuit area beyond pixel display area and pixel display area is generally included using the array base palte of GOA technologies. Wherein, pixel display area is provided with multirow pixel unit, and often row pixel unit is connected with a scan line.Drive circuit area is usual Multiple GOA circuits and the signal lead being connected with GOA circuits are disposed with, the signal lead is, for example, to be inputted to GOA circuits The CLK cablings of clock signal, the Vgh cablings for inputting constant pressure high potential, the Vgl cablings for inputting constant pressure low potential and output scanning The Gate cablings of signal.Multiple GOA circuits be arranged on the same side of pixel display area and along the direction vertical with scan line (referred to as Vertical direction) arrange, each GOA circuits are connected by a Gate cabling with the scan line of one-row pixels unit.
For the multiple GOA circuits vertically arranged, some of which signal lead is shared, these are shared Signal lead is also to extend along vertical direction, and is connected respectively to each GOA circuits.Therefore, GOA circuits and scanning are connected to Gate cablings between line would generally intersect with signal lead shared some described.Refering to Fig. 1, with defeated to GOA circuits Exemplified by the Vgl cablings for entering constant pressure low potential, vertically (Y-direction in such as figure) extends Vgl cablings, is connected to each GOA electricity Road (merely exemplary in Fig. 1 to be shown in which one), (X-direction in such as figure) is extended across Vgl and walks Gate cablings in the horizontal direction Line, GOA circuits and corresponding scan line (Scan) are connected.
Normally, Gate cablings and Vgl cablings are provided in different metal layer, therebetween with interlayer insulating film.In GOA In the preparation process of array base palte, be frequently encountered high voltage static discharge (Electro-Static discharge, ESD phenomenon), static discharge easily cause interlayer insulating film to wound to form hole, when hole is formed in Gate cablings The overlapped region with Vgl cablings, then can cause Gate cablings and the short circuit of Vgl cablings, cause display panel display abnormal.Such as Shown in Fig. 1, in the prior art, Gate cablings and Vgl cablings it is overlapped area it is larger, increase occur poor short circuit wind Danger.
The content of the invention
In view of this, the present invention provides a kind of signal lead structure of GOA circuits, walked with the signal for reducing overlapped Because interlayer insulating film be wound the risk of poor short circuit occurs for line, improves product yield.
In order to realize above-mentioned purpose, present invention employs following technical solution:
A kind of signal lead structure of GOA circuits, including the first signal wire and secondary signal line being connected with GOA circuits, Wherein, first signal wire is patterned and formed in the first metal layer, and the secondary signal line pattern is formed in the second gold medal Belong in layer, the first metal layer and the second metal layer mutually insulated;First signal wire includes and the described second letter Number cross one another Part I of line, is provided with patterned vacancy section on the secondary signal line, first signal wire Projection of the Part I on the secondary signal line is located in the patterned vacancy section.
Wherein, the Part I of first signal wire from the first side of the secondary signal line across to described first The second opposite side of side.
Wherein, the Part I of first signal wire linearly extends.
Wherein, the secondary signal line extends in a first direction, and the Part I of first signal wire is along perpendicular to institute First direction is stated across the secondary signal line.
Wherein, a square through hole either spaced side of two or more is provided with the patterned vacancy section Shape through hole.
Wherein, line width of the width of the square through hole not less than the Part I of first signal wire.
Wherein, interlayer insulating film, first metal are provided between the first metal layer and the second metal layer Layer and the material of the second metal layer are selected from combination more than one or both of Cr, W, Ti, Ta, Mo, Al and Cu, described The material of interlayer insulating film is SiOxOr SiNx, or SiOxAnd SiNxCombination.
Wherein, first signal wire is the signal wire of the scanning signal output for the GOA circuits to be produced, described Secondary signal line is the signal wire for inputting constant pressure low potential to the GOA circuits.
Present invention also offers a kind of array base palte, formed with GOA circuits on the array base palte, wherein, the GOA electricity Road is provided with signal lead structure as described above.
Another aspect of the present invention is to provide a kind of liquid crystal display panel, it includes the array base palte being oppositely arranged and optical filtering Substrate, liquid crystal layer is provided between the array base palte and the optical filtering substrate, wherein, the array base palte.
The signal lead structure of the GOA circuits provided in the embodiment of the present invention, for first with overlapping areas Signal wire and secondary signal line, correspond on secondary signal line and are provided with graphically with the cross one another region of the first signal wire Vacancy section, to reduce the facing area between the first signal wire and secondary signal line, so as to considerably reduce overlapped Signal lead the risk of poor short circuit occurs because interlayer insulating film be wound, improve product yield.
Brief description of the drawings
Fig. 1 is the planar structure schematic diagram of the signal lead structure of GOA circuits in the prior art;
Fig. 2 is the structure diagram of the array base palte in the embodiment of the present invention;
Fig. 3 is the planar structure schematic diagram of the signal lead structure of GOA circuits in the embodiment of the present invention;
Fig. 4 is such as the cross-sectional view in Fig. 3 along line A-A;
Fig. 5 is the structure diagram of the patterned vacancy section in another embodiment of the present invention;
Fig. 6 is the structure diagram of the patterned vacancy section in another embodiment of the present invention;
Fig. 7 is the structure diagram of the liquid crystal display panel in the embodiment of the present invention.
Embodiment
To make the object, technical solutions and advantages of the present invention clearer, below in conjunction with the accompanying drawings to the specific reality of the present invention The mode of applying is described in detail.The example of these preferred embodiments is illustrated in the accompanying drawings.Shown in attached drawing and according to What the embodiments of the present invention of attached drawing description were merely exemplary, and the present invention is not limited to these embodiments.
Here, it should also be noted that, in order to avoid having obscured the present invention because of unnecessary details, in the accompanying drawings only Show the structure and/or processing step closely related with scheme according to the present invention, and eliminate little with relation of the present invention Other details.
The present embodiment provide firstly a kind of array base palte, as shown in Fig. 2, the array base palte is including viewing area 1 and outside Line areas 2 is enclosed, the periphery circuit area 2 is surrounded on the side of the viewing area 1.
Wherein, data cable 11, scan line 12 and dot structure Px, 11 He of a plurality of data lines are provided with the viewing area 1 Multi-strip scanning line 12 is criss-cross arranged, and the dot structure Px is located at the intersection region of data cable 11 and scan line 12, multiple Dot structure Px is in matrix array arrangement (merely exemplary in attached drawing 2 to show several dot structure Px), each dot structure Data cable 11 and scan line 12 is electrically connected in Px.
Wherein, source drive unit 3 and drive element of the grid 4 are provided with the periphery circuit area 2.The viewing area 1 In data cable 11 be connected to the source drive unit 3, the source drive unit 3 is by the data cable 11 to the picture Plain structure Px provides data-signal.Scan line 12 in the viewing area 1 is connected to the drive element of the grid 4, the grid Driving unit 4 provides scanning signal by the scan line 12 to the dot structure Px.
In the present embodiment, the source drive unit 3 is using chip on film (Chip on Film, COF).The grid drives Moving cell 4 then uses GOA (Gate driver On Array) circuit, as shown in Fig. 2, being set in the drive element of the grid 4 There are multiple GOA circuits 41, each GOA circuit 41 corresponds to a scan line 12.
Normally, the GOA circuits 41 are connected with various signal leads, and the signal lead is, for example, defeated to GOA circuits Enter the CLK cablings of clock signal, the Vgh cablings of input constant pressure high potential, the Vgl cablings of input constant pressure low potential and output to sweep Retouch Gate cablings of signal etc..It should be noted that in the GOA circuits 41 and its signal lead and the viewing area 1 Data cable 11, scan line 12 and dot structure Px etc., are to be formed in by patterning processes on the underlay substrate of array base palte.
In the various signal leads being connected with the GOA circuits 41, the scanning signal that the GOA circuits 41 are exported connects Gate cablings to the scan line 12 would generally have the part of juxtaposition with some other signal lead, when between the two Interlayer insulating film when wound by static discharge, the risk that poor short circuit occurs for juxtaposition region is high.
Mentioned above in order to solve the problems, such as, the present embodiment additionally provides a kind of signal lead structure of GOA circuits, with drop The risk of poor short circuit occurs for low signal cabling juxtaposition region.Specifically, refering to Fig. 3 and Fig. 4, the signal lead structure Including the first signal wire 42 and secondary signal line 43 being connected with the GOA circuits 41.In the present embodiment, first signal wire 42 refer to Gate cablings that the scan line 12 is connected to for the scanning signal for producing the GOA circuits 41, described second Signal wire 43 refers to the Vgl cablings for inputting constant pressure low potential to the GOA circuits 41.
Wherein, as shown in figure 4, first signal wire 42 and the secondary signal line 43 form substrate by patterning processes On substrate 10, first signal wire 42 is patterned and formed in the first metal layer 20, and the secondary signal line 43 patterns shape Into in second metal layer 30, interlayer insulating film 40 is provided between the first metal layer 10 and the second metal layer 20. Normally, the first metal layer 10 corresponds to grid layer, second metal in the dot structure Px of the viewing area 1 Layer 20 corresponds to source-drain electrode layer, and the interlayer insulating film 40 then corresponds to gate insulator.Wherein, first metal Layer 20 and the material of the second metal layer 30 are selected from combination more than one or both of Cr, W, Ti, Ta, Mo, Al and Cu, The material of the interlayer insulating film 40 is SiOxOr SiNx, or SiOxAnd SiNxCombination.
Wherein, as shown in Figure 3 and Figure 4, first signal wire 42 includes cross one another with the secondary signal line 43 Part I 42a, is provided with patterned vacancy section 44 on the secondary signal line 43, first of first signal wire 42 Projections of the 42a on the secondary signal line 43 is divided to be located in the patterned vacancy section 44.Specifically, first signal The Part I 42a of line 42 is from the first side 43a of the secondary signal line 43 across to opposite with the first side 43a second Side 43b, the patterned vacancy section 44 are right against first of first signal wire 42 on the secondary signal line 43 Divide 42a, the cavernous structure for the removal metal material that is etched is contained in the patterned vacancy section 44, so as to reduce first Facing area between signal wire 42 and secondary signal line 43 is, it is necessary to which explanation, the facing area refer to the first signal wire 42 current-carrying part and the current-carrying part of secondary signal line 43 area facing each other.Therefore, when the interlayer insulating film 40 because When static discharge wound to form hole, since facing area is smaller, the probability that hole is located at facing area position also reduces, Reduce the first signal wire 42 and the risk of poor short circuit occurs for secondary signal line 43.
In the present embodiment, as shown in figure 3, (Y-direction in such as figure) extends the secondary signal line 43 in the first direction, it is described The Part I 42a of first signal wire 42 is along the second direction (X-direction in such as figure) perpendicular to first direction across described second Signal wire 43, and the Part I 42a of first signal wire 42 linearly extends.
Further, as shown in figure 3, in the present embodiment, the patterned vacancy section 44 includes spaced two Square through hole 44a, 44b, the Part I 42a of the length direction of described square through hole 44a, 44b and first signal wire 42 Extending direction it is consistent.Wherein, as shown in figure 4, the width H1 of the first through hole 44a and the second through hole 44b are not less than The line width H2 of the Part I 42a of first signal wire 42.
In other one embodiment, as shown in figure 5, two square through holes in the patterned vacancy section 44 In 44a, 44b, one of through hole 44a extends and described the on the secondary signal line 43 towards the first side 43a Side 43a forms opening, another through hole 44b extends and in institute on the secondary signal line 43 towards the second side 43b State the second side 43b and form opening.
In other one embodiment, as shown in fig. 6, in patterned vacancy section 44 on the secondary signal line 43 Can also be provided only with a square through hole 44c.It can be readily appreciated that the patterned vacancy section 44 can also be set There is greater number of spaced square through hole.
In some other embodiments, the through hole in the patterned vacancy section 44 can also be arranged to other knots The through hole of configuration shape, e.g. circular through hole, or the through hole of other irregular shapes.
The array base palte of example offer is performed as described above, in the signal lead structure of GOA circuits therein, by signal wire phase Mutually overlapping region is provided with through hole, the facing area between signal wire is reduced, so as to considerably reduce overlapped Because interlayer insulating film be wound the risk of poor short circuit occurs for signal lead, improves product yield.
The present embodiment provide firstly a kind of liquid crystal display panel, as shown in fig. 7, the liquid crystal display panel is included relatively The array base palte 100 and optical filtering substrate 200 of setting, liquid crystal is provided between the array base palte 100 and the optical filtering substrate 200 Layer 300.Wherein, the array base palte 100 employs the array base palte provided in above example, in the array base palte 100 Include the signal lead structure that GOA circuits are provided in above example.
It should be noted that herein, relational terms such as first and second and the like are used merely to a reality Body or operation are distinguished with another entity or operation, are deposited without necessarily requiring or implying between these entities or operation In any this actual relation or order.Moreover, term " comprising ", "comprising" or its any other variant are intended to Non-exclusive inclusion, so that process, method, article or equipment including a series of elements not only will including those Element, but also including other elements that are not explicitly listed, or further include as this process, method, article or equipment Intrinsic key element.In the absence of more restrictions, the key element limited by sentence "including a ...", it is not excluded that Also there are other identical element in process, method, article or equipment including the key element.
The above is only the embodiment of the application, it is noted that for the ordinary skill people of the art For member, on the premise of the application principle is not departed from, some improvements and modifications can also be made, these improvements and modifications also should It is considered as the protection domain of the application.

Claims (10)

1. a kind of signal lead structure of GOA circuits, including the first signal wire and secondary signal line being connected with GOA circuits, its It is characterized in that, first signal wire is patterned and formed in the first metal layer, and the secondary signal line pattern is formed in In two metal layers, the first metal layer and the second metal layer mutually insulated;First signal wire includes and described the The cross one another Part I of binary signal line, is provided with patterned vacancy section, first signal on the secondary signal line Projection of the Part I of line on the secondary signal line is located in the patterned vacancy section.
2. signal lead structure according to claim 1, it is characterised in that the Part I of first signal wire is from institute The first side of secondary signal line is stated across extremely second side opposite with first side.
3. signal lead structure according to claim 2, it is characterised in that the Part I of first signal wire is in straight Wire extends.
4. signal lead structure according to claim 2, it is characterised in that the secondary signal line prolongs in the first direction Stretch, the Part I of first signal wire along perpendicular to the first direction across the secondary signal line.
5. signal lead structure according to claim 2, it is characterised in that be provided with one in the patterned vacancy section A square through hole either spaced square through hole of two or more.
6. signal lead structure according to claim 5, it is characterised in that the width of the square through hole is not less than described The line width of the Part I of first signal wire.
7. signal lead structure according to claim 1, it is characterised in that the first metal layer and second metal Be provided with interlayer insulating film between layer, the material of the first metal layer and the second metal layer be selected from Cr, W, Ti, Ta, Mo, Combination more than one or both of Al and Cu, the material of the interlayer insulating film is SiOxOr SiNx, or SiOxWith SiNxCombination.
8. according to any signal lead structures of claim 1-7, it is characterised in that first signal wire is for inciting somebody to action The signal wire for the scanning signal output that the GOA circuits produce, the secondary signal line are permanent for being inputted to the GOA circuits Force down the signal wire of current potential.
9. a kind of array base palte, formed with GOA circuits on the array base palte, it is characterised in that the GOA circuits set just like Any signal lead structures of claim 1-8.
10. a kind of liquid crystal display panel, including the array base palte and optical filtering substrate being oppositely arranged, the array base palte and the filter Liquid crystal layer is provided between photopolymer substrate, it is characterised in that the array base palte is the array base palte described in claim 9.
CN201711482973.3A 2017-12-29 2017-12-29 The signal lead structure and array base palte of GOA circuits, liquid crystal display panel Pending CN108037627A (en)

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CN109147574A (en) * 2018-10-10 2019-01-04 武汉华星光电半导体显示技术有限公司 Display panel
CN109411411A (en) * 2018-12-07 2019-03-01 深圳市华星光电半导体显示技术有限公司 The production method and liquid crystal display of GOA array substrate
CN110928082A (en) * 2019-11-01 2020-03-27 武汉华星光电技术有限公司 Array substrate and display panel
CN112582431A (en) * 2020-12-08 2021-03-30 深圳市华星光电半导体显示技术有限公司 GOA circuit and preparation method thereof
CN114171536A (en) * 2021-11-30 2022-03-11 京东方科技集团股份有限公司 Array substrate, preparation method thereof, display panel and display device
US11508758B2 (en) 2018-10-10 2022-11-22 Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd. Display panel and display

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CN102081271A (en) * 2007-12-07 2011-06-01 北京京东方光电科技有限公司 TFT-LCD (Thin Film Transistor-Liquid Crystal Display) array substrate
CN102393587A (en) * 2011-11-10 2012-03-28 友达光电股份有限公司 Signal routing structure in GOA circuit for liquid crystal display
CN102782742A (en) * 2010-02-25 2012-11-14 夏普株式会社 Display device

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Publication number Priority date Publication date Assignee Title
CN102081271A (en) * 2007-12-07 2011-06-01 北京京东方光电科技有限公司 TFT-LCD (Thin Film Transistor-Liquid Crystal Display) array substrate
CN101983355A (en) * 2008-04-28 2011-03-02 夏普株式会社 Active matrix substrate, liquid crystal display panel equipped with the same, and method of manufacturing active matrix substrate
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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109147574A (en) * 2018-10-10 2019-01-04 武汉华星光电半导体显示技术有限公司 Display panel
US11508758B2 (en) 2018-10-10 2022-11-22 Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd. Display panel and display
CN109411411A (en) * 2018-12-07 2019-03-01 深圳市华星光电半导体显示技术有限公司 The production method and liquid crystal display of GOA array substrate
CN110928082A (en) * 2019-11-01 2020-03-27 武汉华星光电技术有限公司 Array substrate and display panel
CN112582431A (en) * 2020-12-08 2021-03-30 深圳市华星光电半导体显示技术有限公司 GOA circuit and preparation method thereof
CN114171536A (en) * 2021-11-30 2022-03-11 京东方科技集团股份有限公司 Array substrate, preparation method thereof, display panel and display device

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