CN108021392A - Processor and its operation execution method - Google Patents
Processor and its operation execution method Download PDFInfo
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- CN108021392A CN108021392A CN201610942181.9A CN201610942181A CN108021392A CN 108021392 A CN108021392 A CN 108021392A CN 201610942181 A CN201610942181 A CN 201610942181A CN 108021392 A CN108021392 A CN 108021392A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/3012—Organisation of register space, e.g. banked or distributed register file
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/466—Transaction processing
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Program initiating; Program switching, e.g. by interrupt
- G06F9/4806—Task transfer initiation or dispatching
- G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
- G06F9/485—Task life-cycle, e.g. stopping, restarting, resuming execution
- G06F9/4856—Task life-cycle, e.g. stopping, restarting, resuming execution resumption being on a different machine, e.g. task migration, virtual machine migration
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- General Engineering & Computer Science (AREA)
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- Stored Programmes (AREA)
Abstract
Processor and its operation execution method, the described method includes：The corresponding software code of default operation is copied to internal storage from external memory storage；When receiving corresponding operation requests, corresponding current cpu address is generated, the current cpu address is storage address of the software code when the external memory storage stores；The current cpu address is remapped by corresponding internal storage interface controller, obtains storage address of the software code in the internal storage；Storage address corresponding storage location of the obtained software code in the internal storage is remapped from the internal memory controller, obtains software code and the execution of the default operation.Above-mentioned scheme, can improve the execution speed of processor, improve the process performance of system.
Description
Technical field
The present invention relates to technical field of integrated circuits, more particularly to a kind of processor and its operation execution method.
Background technology
System-on-chip (System-on-a-Chip, SoC) refers to the complete system integrated on a single chip,
So-called complete system generally comprises central processing unit (CPU), memory and peripheral circuit etc..System-on-chip and other skills
Art is Parallel Development such as insulating silicon (SOI) etc., it can provide the clock frequency of enhancing, so as to reduce the power consumption of microchip.
For system-on-chip because of unprecedented efficiently integrated performance, processing system is to substitute the primary solutions of integrated circuit, has become and works as
The inexorable trend of preceding microelectronic chip development.
In the prior art, the operation of system-on-chip, such as interrupt operation and reset operation, there is perform speed upon execution
The problem of slow.
The content of the invention
Technical problems to be solved of the embodiment of the present invention are how to improve the execution speed of default operation, improve system
Performance.
To solve the above-mentioned problems, the embodiment of the present invention provides a kind of operation of processor and performs method, the method bag
Include：The corresponding software code of default operation is copied to internal storage from external memory storage；When receiving corresponding operation
During request, corresponding current cpu address is generated, the current cpu address is deposited for the software code in the external memory storage
Storage address during storage；The current cpu address is remapped by corresponding internal storage interface controller, is obtained
Storage address of the software code in the internal storage；Remapped from the internal memory controller obtained
The corresponding storage location of storage address of the software code in the internal storage, obtains the soft of the default operation
Part code simultaneously performs.
Alternatively, it is described that the current cpu address is remapped, including：Pass through corresponding internal storage interface
Controller remaps the current cpu address.
Alternatively, it is described from remapping storage address pair of the obtained software code in the internal storage
The storage location answered obtains the software code of the default operation, including：By the internal storage interface controller from
Remap described in the corresponding storage location acquisition of storage address of the obtained software code in the internal storage
The software code of default operation.
Alternatively, it is described that the current cpu address is remapped, the software code is obtained in the storage inside
Storage address in device, including：The base address of the external memory storage and the base address of the internal storage are obtained, is made respectively
Attach most importance to and map source address and remap destination address；Based on source address and the destination address that remaps of remapping to described
Current cpu address is remapped, and obtains storage address of the software code in the internal storage.
Alternatively, it is described to remap source address and the destination address that remaps to the current cpu address based on described
Remapped, obtain storage address of the software code in the internal storage, including：RA=CA–SA+TA；Its
In, RARepresent storage address of the software code in the internal storage, CARepresent current cpu address, SADescribed in expression
Remap source address, TADestination address is remapped described in expression.
Alternatively, it is described that the corresponding software code of default operation is copied to internal storage from external memory storage, wrap
Include：When performing hardware reset process program during system reboot, the corresponding software code of default operation is deposited from outside
Reservoir is copied to internal storage.
Alternatively, the default operation is reset operation or interrupt operation.
The embodiment of the present invention additionally provides a kind of processor, and the processor includes：Code migration unit, suitable for that will preset
The corresponding software code of operation be copied to internal storage from external memory storage；Scalar/vector, suitable for when receiving pair
During the operation requests answered, corresponding current cpu address is generated, the current cpu address is the software code in the outside
Storage address during memory storage；Execution unit, suitable for by corresponding internal storage Interface Controller to the current CPU
Address is remapped, and obtains storage address of the software code in the internal storage；It is obtained from remapping
The corresponding storage location of storage address of the software code in the internal storage, obtains the soft of the default operation
Part code simultaneously performs.
Alternatively, the execution unit, suitable for by corresponding internal storage interface controller to the current CPU
Location is remapped.
Alternatively, the execution unit, suitable for obtained from remapping by the internal storage interface controller
The corresponding storage location of storage address of the software code in the internal storage obtains the soft of the default operation
Part code.
Alternatively, the execution unit, suitable for obtaining the external memory storage by internal storage interface controller
Base address and the base address of the internal storage, source address and destination address is remapped respectively as remapping, and is based on institute
State and remap source address and the destination address that remaps remaps the current cpu address, obtain the software generation
Storage address of the code in the internal storage.
Alternatively, the internal storage interface controller, suitable for the software generation is calculated using formula below
Storage address of the code in the internal storage, including：RA=CA–SA+TA；Wherein, RARepresent the software code described
Storage address in internal storage, CARepresent current cpu address, SASource address, T are remapped described in expressionARepresent the replay
Penetrate destination address.
Alternatively, the code migration unit, suitable for that when performing hardware replacement process during system reboot, will preset
The corresponding software code of operation be copied to internal storage from external memory storage.
Alternatively, the default operation is reset operation or interrupt operation.
Compared with prior art, technical scheme has the advantages that：
Above-mentioned scheme, CPU are migrated to storage inside by that will operate corresponding software code in advance from external memory storage
Device, and when receiving corresponding operation requests, by the current cpu address of CPU outputs from software code in external memory storage
Storage address map to storage address when software code stores in internal storage, and from the address remapped
Obtain corresponding software code and perform, because the access speed of internal storage is higher than the access speed of external memory storage, thus
The execution speed of processor, the process performance of lifting system can be improved.
Brief description of the drawings
Fig. 1 is the implementation procedure schematic diagram of the operation of processor of the prior art；
Fig. 2 is a kind of flow chart of the operation execution method of processor in the embodiment of the present invention；
Fig. 3 is the component and interacted accordingly that a kind of operation execution method of processor in the embodiment of the present invention is related to
Journey schematic diagram；
Fig. 4 is the mistake that the internal storage interface controller in the embodiment of the present invention remaps current cpu address
Journey schematic diagram；
Fig. 5 is a kind of structure diagram of processor in the embodiment of the present invention.
Embodiment
As described in the background art, when performing replacement or interrupt operation, it is necessary to access the exterior read-only storage of system
(Read-Only Memory, ROM) or flash memory (Flash Memory).But such as ROM's or flash memory etc is non-volatile
Property memory (Non-Volatile Memory, NVM) access speed, with internal storage as (Static Memory,
SRAM)/ROM/ dynamic RAMs (Dynamic Random Access Memory, DRAM) etc. are compared, and there is speed
The problem of slow, have impact on the performance of system.
Referring to Fig. 1, as the reset signal Rs for receiving the transmission of Power Management Unit (PMU) 101, or interrupt control unit
During the interrupt operation request Ints of the higher priority of 102 transmission, CPU103 will produce corresponding current cpu address, and
Send to corresponding address decoder 104.Address decoder 104 generates external storage according to received current cpu address
Device (such as ROM or flash memory) chooses signal DSEL so that CPU103 is by external memory interface controller 105 from corresponding outer
Corresponding software code is obtained in portion's memory 106, and is sent to CPU103.Finally, CPU103 is to external memory interface control
The software code that device 105 processed is sent is performed, so as to complete corresponding operation.
But since the access speed of external memory storage is slower, causing corresponding operation, there is perform slow-footed ask
Topic, have impact on the operating characteristics of system.
To solve the above problems, the technical solution of the embodiment of the present invention is corresponding soft by default operation in advance by CPU
Part code is copied to internal storage from external memory storage, and when receiving corresponding operation requests, by the current of CPU outputs
Storage address of the cpu address from software code in external memory storage is mapped to when software code stores in internal storage
Storage address, and obtain corresponding software code from the address remapped and perform, default operation can be improved
Perform speed, the performance of lifting system.
It is understandable to enable above-mentioned purpose, feature and the beneficial effect of the present invention to become apparent, below in conjunction with the accompanying drawings to this
The specific embodiment of invention is described in detail.
Fig. 2 is a kind of flow chart of the operation execution method of processor in the embodiment of the present invention.Referring to Fig. 2, the present invention
A kind of operation of processor in embodiment performs method, performs corresponding operation for processor, can specifically include as follows
The step of：
Step S201：The corresponding software code of default operation is copied to internal storage from external memory storage.
In an embodiment of the present invention, CPU can be in system electrification and when performing hardware reset process routine, will be pre-
If the corresponding software code of operation from external memory storage, such as ROM or flash memory, copy to such as static RAM
Stored in internal storage.
Wherein, storage location of the corresponding software code in internal storage, can be by user according to the actual needs
Set, the present invention is not limited herein.
Step S202：When receiving corresponding operation requests, corresponding current cpu address is generated.
In specific implementation, CPU is receiving corresponding operation requests, such as reset operation request or during interrupt requests,
Generate corresponding current cpu address, namely the corresponding software code of default operation is corresponding in exterior memory storage deposits
Store up address.
Step S203：The current cpu address is remapped, obtains the software code in the internal storage
In storage address.
In specific implementation, CPU in advance copies to the corresponding software code of default operation from external memory storage
In internal storage, and the current cpu address of CPU generations at this time is still that corresponding software code stores in external memory storage
When corresponding storage address.In order to obtain corresponding software code exactly, at this time can generate CPU is corresponding current
Cpu address is remapping to storage address of the software code in internal storage, namely is obtained by remapping operation corresponding
The information of storage address of the software code in internal storage.
In an embodiment of the present invention, CPU can be generated using corresponding internal storage interface controller current
Cpu address is remapping to storage address when corresponding software code stores in internal storage.
In an embodiment of the present invention, corresponding internal storage interface controller can use formula below to described
Current cpu address is remapped, and obtains storage address of the corresponding software code in internal storage：
RA=CA–SA+TA (1)
Wherein, RARepresent storage address of the software code in the internal storage, CARepresent current cpu address,
SASource address, T are remapped described in expressionADestination address is remapped described in expression.
Step S204：Corresponded to from storage address of the obtained software code in the internal storage is remapped
Storage location, obtain software code and the execution of the default operation.
In an embodiment of the present invention, corresponding internal storage interface controller is corresponding soft by remapping to obtain
During storage address of the part code in internal storage, it can be read from the corresponding storage location of storage location remapped
Corresponding software code is simultaneously sent to CPU, so that CPU can obtain corresponding software code and perform, so as to complete to correspond to
Operation.
Method, which is performed, below in conjunction with operation of the specific example to the processor in the embodiment of the present invention is further Jie
Continue.
Referring to Fig. 3, three are provided with Power Management Unit 301 and remaps control register, is respectively remapped enabled
Register, remap size register and remap source address register.Wherein, remap enabled register be used for it is enabled or
It is invalid to remap function；Remap size register and be used to be the corresponding internal storage areas of remapping operation setting；Remap
Source address register is used to indicate the information for remapping source address.Wherein, user can be according to the actual needs using above-mentioned
Three remap control register and set storage region of the corresponding software code in internal storage.
During system electrification, the enabled register that remaps in Power Management Unit 301 enables remapping operation, and CPU302 exists
Detect and remap when remapping enable signal Enable of enabled register transmission, will in hardware reset process routine
Reset the either corresponding software code of interrupt operation or the corresponding software code of other kinds of operation from exterior ROM or
Flash memory is copied to internal storage 303, as static RAM (Static Random Access Memory,
SRAM stored in) by the storage location for remapping size register setting.
When CPU302 receive Power Management Unit 301 either reset process unit produce reset operation signal Rs or
During the interrupt operation request Ints for the higher priority that interrupt control unit 304 produces, CPU302 generations for reset operation or
The current cpu address C of interrupt operationA, namely reset the either corresponding software code of interrupt operation and stored in ROM or flash memory
When storage address.Under normal conditions, replacement or the corresponding software code of interrupt operation are stored in the zero-address in system address
Region, therefore, the current cpu address C of CPU generationsAFor zero-address.
Then, CPU302 is by the current cpu address C of generationASend to address decoder 305, address decoder 305 and be based on
The current cpu address C receivedAGenerate corresponding ROM or flash memory and choose signal DSEL, address decoder 305 generates outside
ROM or flash memories read signal and send to corresponding internal storage interface controller 306, as SRAM interface controls
Device.
Referring to Fig. 4 and Fig. 3 is combined, corresponding internal storage interface controller 306 remaps source according to what is obtained
Address SAWith remap destination address TA, to address decoder 303 produce ROM either flash controller generation external ROM or
Flash memories read signal and carry out remapping operation, namely from current cpu address CASubtract and remap source address SA, add
Remap destination address TA, so as to obtain corresponding storage address R in internal storageA, from pair of obtained internal storage
The storage address R answeredARead replacement or the corresponding software code of interrupt operation and send to CPU in place.
Finally, CPU is corresponding soft in the replacement or interrupt operation for receiving the transmission of internal storage interface controller 306
During part code, the replacement received or the corresponding software code of interrupt operation are performed, so as to complete corresponding operation.
From the above description it can be seen that CPU is only needed to read corresponding software code from internal storage and performed i.e.
Can.In other words, CPU only needs the access time of corresponding internal storage when performing corresponding operate, thus can be significantly
The operation for improving processor performs speed, so as to the process performance of system.
Meanwhile CPU and extra operation is not required, but completed by internal storage interface controller to current
The remapping operation of cpu address so that CPU can obtain corresponding software code and perform, because without performing volume to CPU
Outer modification or renewal operation, can improve the compatibility of system.
The operation of the above-mentioned processor in the embodiment of the present invention performs method and is described in detail, below will be to upper
The corresponding device of method stated is introduced.
Fig. 5 shows a kind of structure of processor in the embodiment of the present invention.Referring to Fig. 5, one in the embodiment of the present invention
Kind processor 500 can include code migration unit 501, scalar/vector 502, execution unit 503, wherein：
The code migration unit 501, suitable for the corresponding software code of default operation is copied to from external memory storage
Internal storage.In an embodiment of the present invention, the code migration unit 501 is hard suitable for being performed during system reboot
During part replacement process, the corresponding software code of default operation is copied to internal storage from external memory storage.
In specific implementation, the default operation can be reset operation either interrupt operation or can also be it
The operation of his type, those skilled in the art can be configured according to the actual needs.
Described address generation unit 502, suitable for when receiving corresponding operation requests, generating corresponding current CPU
Location, the current cpu address is storage address of the software code when the external memory storage stores.
The execution unit 503, suitable for being carried out by corresponding internal storage Interface Controller to the current cpu address
Remap, obtain storage address of the software code in the internal storage；From remapping the obtained software
The corresponding storage location of storage address of the code in the internal storage, obtains the software code of the default operation simultaneously
Perform.
In an embodiment of the present invention, the execution unit 503, suitable for passing through corresponding internal storage interface controller
The current cpu address is remapped.
In an embodiment of the present invention, the execution unit 503, suitable for by the internal storage interface controller from
Remap described in the corresponding storage location acquisition of storage address of the obtained software code in the internal storage
The software code of default operation.
In an embodiment of the present invention, the execution unit 503, suitable for obtaining institute by internal storage interface controller
The base address of external memory storage and the base address of the internal storage are stated, source address and target is remapped respectively as remapping
Address, and remap source address and the destination address that remaps remaps the current cpu address based on described, obtain
To storage address of the software code in the internal storage.
In an embodiment of the present invention, the internal storage interface controller, suitable for being calculated using formula below
To storage address of the software code in the internal storage, including：RA=CA–SA+TA；Wherein, RARepresent described soft
Storage address of the part code in the internal storage, CARepresent current cpu address, SASource address, T are remapped described in expressionA
Destination address is remapped described in expression.
Using the such scheme in the embodiment of the present invention, CPU will be by that will operate corresponding software code from external memory storage
Migrate to internal storage, and when receiving corresponding operation requests, will by corresponding internal storage interface controller
Storage address of the current address of CPU outputs from software code in external memory storage maps to software code in internal storage
Storage address during middle storage, so as to obtain corresponding software code and perform, since the access speed of internal storage is higher than
The access speed of external memory storage, thus the execution speed of processor can be improved, improve the process performance of system.
One of ordinary skill in the art will appreciate that all or part of step in the various methods of above-described embodiment is can
To instruct relevant hardware to complete by program, which can be stored in a computer-readable recording medium, storage
Medium can include：ROM, RAM, disk or CD etc..
Although present disclosure is as above, the present invention is not limited to this.Any those skilled in the art, are not departing from this
In the spirit and scope of invention, it can make various changes or modifications, therefore protection scope of the present invention should be with claim institute
Subject to the scope of restriction.
Claims (14)
1. a kind of operation of processor performs method, it is characterised in that including：
The corresponding software code of default operation is copied to internal storage from external memory storage；
When receiving corresponding operation requests, corresponding current cpu address is generated, the current cpu address is the software
Storage address of the code when the external memory storage stores；
The current cpu address is remapped, obtains storage address of the software code in the internal storage；
From storage address corresponding storage location of the obtained software code in the internal storage is remapped, obtain
Take the software code of the default operation and execution.
2. the operation of processor according to claim 1 performs method, it is characterised in that it is described to the current CPU
Location is remapped, including：The current cpu address is remapped by corresponding internal storage interface controller.
3. the operation of processor according to claim 2 performs method, it is characterised in that described obtained from remapping
The corresponding storage location of storage address of the software code in the internal storage obtains the soft of the default operation
Part code, including：By the internal storage interface controller from the obtained software code is remapped described interior
The corresponding storage location of storage address in portion's memory obtains the software code of the default operation.
4. the operation of processor according to claim 3 performs method, it is characterised in that it is described to the current CPU
Location is remapped, and obtains storage address of the software code in the internal storage, including：
Obtain the base address of the external memory storage and the base address of the internal storage, respectively as remap source address and
Remap destination address；
Source address is remapped based on described and the destination address that remaps remaps the current cpu address, is obtained
Storage address of the software code in the internal storage.
5. the operation of processor according to claim 4 performs method, it is characterised in that described to remap source based on described
Address and the destination address that remaps remap the current cpu address, obtain the software code described interior
Storage address in portion's memory, including：
RA=CA–SA+TA；
Wherein, RARepresent storage address of the software code in the internal storage, CARepresent current cpu address, SATable
Source address, T are remapped described in showingADestination address is remapped described in expression.
6. the operation of processor according to claim 1 performs method, it is characterised in that described to correspond to default operation
Software code be copied to internal storage from external memory storage, including：
When performing hardware reset process program during system reboot, the corresponding software code of default operation is deposited from outside
Reservoir is copied to internal storage.
7. the operation of processor according to claim 1 performs method, it is characterised in that the default operation is replacement
Operation or interrupt operation.
A kind of 8. processor, it is characterised in that including：
Code migration unit, suitable for the corresponding software code of default operation is copied to internal storage from external memory storage；
Scalar/vector, it is described current suitable for when receiving corresponding operation requests, generating corresponding current cpu address
Cpu address is storage address of the software code when the external memory storage stores；
Execution unit, suitable for being remapped to the current cpu address, obtains the software code in the internal storage
In storage address；From remapping, storage address of the obtained software code in the internal storage is corresponding to deposit
Storage space is put, and obtains software code and the execution of the default operation.
9. processor according to claim 8, it is characterised in that the execution unit, suitable for being deposited by corresponding inside
Memory interface controller remaps the current cpu address.
10. processor according to claim 9, it is characterised in that the execution unit, suitable for passing through the storage inside
From remapping, storage address of the obtained software code in the internal storage is corresponding to deposit device interface controller
Store up the software code of default operation described in position acquisition.
11. processor according to claim 10, it is characterised in that the execution unit, suitable for passing through memory interface control
Device processed obtains the base address of the external memory storage and the base address of the internal storage, respectively as remap source address and
Remap destination address, and based on it is described remap source address and it is described remap destination address to the current cpu address into
Row remaps, and obtains storage address of the software code in the internal storage.
12. processor according to claim 11, it is characterised in that the internal storage interface controller, suitable for adopting
Storage address of the software code in the internal storage is calculated with formula below, including：
RA=CA–SA+TA；
Wherein, RARepresent storage address of the software code in the internal storage, CARepresent current cpu address, SATable
Source address, T are remapped described in showingADestination address is remapped described in expression.
13. processor according to claim 8, it is characterised in that the code migration unit, suitable in system reboot mistake
When hardware replacement process is performed in journey, the corresponding software code of default operation is copied to storage inside from external memory storage
Device.
14. processor according to claim 8, it is characterised in that the default operation is reset operation or interruption
Operation.
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| CN111857594A (en) * | 2020-07-22 | 2020-10-30 | 苏州元璟半导体技术有限公司 | A kind of external memory interface based on software service and using method thereof |
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