The content of the invention
In order to solve the above technical problems, the invention discloses a kind of OLED driver circuit, the organic light emission
Diode drive circuit is reached using the externally input triggering drive signal control bright dark time scale of Organic Light Emitting Diode
Under same current driving, show the purposes of different grey menus, can to avoid when showing low grayscale, due to driving current compared with
Low, the unstable caused picture inequality problem of electric current.The invention also discloses apply the OLED driver circuit
Display device.
Technical solution provided by the invention is as follows:
The invention discloses a kind of OLED driver circuit, which includes:
11st thin film transistor (TFT), the 12nd thin film transistor (TFT), the 13rd thin film transistor (TFT) and Organic Light Emitting Diode;
11st thin film transistor (TFT), opens or closes according to scanning voltage, and data voltage is transferred to the tenth when opening
Two thin film transistor (TFT)s, the 12nd thin film transistor (TFT) of control open or close;
12nd thin film transistor (TFT), when opening, generation drive circuit is transferred to the 13rd thin film transistor (TFT);
13rd thin film transistor (TFT), opens or closes according to externally input triggering drive signal, controls the 12nd film
Whether drive circuit caused by transistor is transferred to Organic Light Emitting Diode;
Organic Light Emitting Diode, light is produced after receiving the drive circuit of the 13rd thin film transistor (TFT) transmission.
Preferably, the grid connection scan line of the 11st thin film transistor (TFT), the drain electrode connection number of the 11st thin film transistor (TFT)
According to line, the source electrode of the 11st thin film transistor (TFT) connects the grid of the 12nd thin film transistor (TFT);
The drain electrode input supply voltage of 12nd thin film transistor (TFT), the source electrode connection the 13rd of the 12nd thin film transistor (TFT) are thin
The drain electrode of film transistor;
The grid of 13rd thin film transistor (TFT) inputs the triggering drive signal, the source electrode connection of the 13rd thin film transistor (TFT)
Organic Light Emitting Diode;
Organic Light Emitting Diode includes anode and cathode, and anode connects the source electrode of the 13rd thin film transistor (TFT), cathode input
Power supply negative pressure.
The invention also discloses a kind of organic light-emitting display device, which includes:Crisscross
Scan line and data cable and the multiple pixel regions limited by scan line and data cable intersection, per horizontal scanning line by scanning voltage
Its corresponding pixel region is inputted, data voltage is inputted its corresponding pixel region by each row of data line;
Each pixel region is equipped with the OLED driver circuit described in above-mentioned any one, the organic light emission
Display device further includes the triggering drive circuit being made of N (N >=2, and N is integer) level triggering drive circuit unit;Every grade institute
State triggering drive circuit unit and correspond to a horizontal scanning line, every grade of triggering drive circuit unit will triggering drive signal to input its right
The OLED driver circuit in multiple pixel regions that the scan line answered is limited.
Preferably, n-th (1≤n≤N, and n is integer) described triggering drive circuit unit of level include pull-up control module,
Pull up module, signal control module and drop-down module;Pull-up control module, pull-up module and drop-down module are connected to pull-up
Control node, signal control module and drop-down module are connected to output node, and drop-down module inputs the first clock signal, signal control
Molding block inputs n-th grade of pulse width modulating signal and second clock signal, and the output node exports n-th grade of triggering driving letter
Number.
Preferably, the first clock signal and second clock signal have the identical period 1, within the period 1, including the
One clock signal is in high level, second clock signal is in low level first time period, further includes at the first clock signal
The second time period of high level is in low level, second clock signal.
Preferably, n-th grade of triggering of n-th (1≤n≤N-1, and n is integer) level triggering drive circuit unit output is driven
Dynamic signal inputs (n+1)th grade of triggering drive circuit unit as (n+1)th grade of pulse width modulating signal.
Preferably, pull-up control module includes first film transistor, the second thin film transistor (TFT) and the first capacitance;First
The grid of thin film transistor (TFT) and the equal input high level that drains, the source electrode of first film transistor connect the grid of the second thin film transistor (TFT)
Pole;The drain electrode input high level of second thin film transistor (TFT), the source electrode connection pull-up control node of the second thin film transistor (TFT);First electricity
Appearance includes the first pole plate and the second pole plate, the source electrode of the first pole plate connection first film transistor and the grid of the second thin film transistor (TFT)
Pole, the second pole plate connection pull-up control node;
Pull-up module includes the 3rd thin film transistor (TFT), the 4th thin film transistor (TFT) and the second capacitance;3rd thin film transistor (TFT)
Grid and the equal input high level of draining, the source electrode of three thin film transistor (TFT)s connect the grid of the 4th thin film transistor (TFT);4th film
The drain electrode input high level of transistor, the source electrode connection output node of the 4th thin film transistor (TFT) simultaneously export n-th grade of triggering driving letter
Number;
Signal control module includes the 5th thin film transistor (TFT) and the 7th thin film transistor (TFT);The grid of 5th thin film transistor (TFT) connects
The source electrode of the 7th thin film transistor (TFT) is connect, the drain electrode connection of the 5th thin film transistor (TFT) pulls up control node, the 5th thin film transistor (TFT)
Source electrode input power negative pressure;The grid input second clock signal of 7th thin film transistor (TFT), the drain electrode of the 7th thin film transistor (TFT) are defeated
Enter n-th grade of pulse width modulating signal;
Drop-down module includes the 6th thin film transistor (TFT) and the 8th thin film transistor (TFT);The grid connection the of 6th thin film transistor (TFT)
The source electrode of eight thin film transistor (TFT)s, the 6th thin film transistor (TFT) and drain electrode connection output node, source electrode input power negative pressure;8th film
The grid of transistor connects the first clock signal, the drain electrode connection pull-up control node of the 8th thin film transistor (TFT).
Preferably, n-th grade of triggering drive circuit unit further includes the second supporting film transistor;
The grid input clear signal of second supporting film transistor, the drain electrode connection output of the second supporting film transistor
Node, the source electrode input power negative pressure of the second supporting film transistor.
Preferably, n-th grade of triggering drive circuit unit further includes the first supporting film transistor;
First supporting film transistor grid input clear signal, the first supporting film transistor drain electrode connection described in
The source electrode of 7th thin film transistor (TFT) and the grid of the 5th thin film transistor (TFT), the source electrode input power of the first supporting film transistor are born
Pressure.
Preferably, n-th grade of triggering drive circuit unit further includes the 3rd supporting film transistor;
The grid input clear signal of 3rd supporting film transistor, the drain electrode connection the 8th of the 3rd supporting film transistor
The grid of the source electrode of thin film transistor (TFT) and the 6th thin film transistor (TFT), the source electrode input high level of the 3rd supporting film transistor.
Compared with prior art, the present invention can bring at least one of following beneficial effect:
1st, it can reach under the driving of Organic Light Emitting Diode same current, show the function of different grey menus;
2nd, avoid when showing low grey menu, since driving current is relatively low, the picture caused by electric current is unstable is uneven
Problem;
3rd, organic light-emitting display device is believed by adjusting the first clock signal, second clock signal and pulse width modulation
Number, can the flexible modulation duty cycles and sequential at different levels for triggering drive signals;
4th, organic light-emitting display device can reach (n+1)th grade of triggering drive signal sequential and lag behind n-th grade of triggering driving letter
The effect of number sequential, sweeping for line n scan line input is lagged behind corresponding to the sequential of the scanning voltage of the (n+1)th horizontal scanning line input
The sequential of voltage is retouched, can more effectively and meticulously control the OLED driver circuit do not gone together in pixel region.
Embodiment
In order to illustrate more clearly about the embodiment of the present invention or technical scheme of the prior art, control is illustrated below
The embodiment of the present invention.It should be evident that drawings in the following description are only some embodiments of the present invention, for
For those of ordinary skill in the art, without creative efforts, other can also be obtained according to these attached drawings
Attached drawing, and obtain other embodiments.
To make simplified form, part related to the present invention is only schematically show in each figure, they are not represented
Its practical structures as product.In addition, so that simplified form readily appreciates, there is identical structure or function in some figures
Component, only symbolically depicts one of those, or has only marked one of those.Herein, "one" is not only represented
" only this ", can also represent the situation of " more than one ".
The organic light-emitting display device of the present invention includes:Crisscross scan line and data cable, by scan line and data
Line intersects the pixel region limited and triggering drive circuit, and scanning voltage is inputted pixel region data cable by data by scan line
Control source pixel region triggering drive circuit will trigger drive signal Emission input pixel regions, and each pixel region is equal
Equipped with OLED driver circuit.
The circuit diagram of OLED driver circuit is as shown in Fig. 2, the OLED driver circuit
Including positioned at the 11st thin film transistor (TFT) T11 of scan line and data cable infall, the 12nd thin film transistor (TFT) T12, the 13rd
Thin film transistor (TFT) T13 and Organic Light Emitting Diode OLED.
Wherein, the 11st thin film transistor (TFT) T11 is opened or closed according to scanning voltage, when opening by data voltage the tenth
Two thin film transistor (TFT) T12, the 12nd thin film transistor (TFT) T12's of control opens or closes;12nd thin film transistor (TFT) T12 is being opened
When produce driving current be transferred to the 13rd thin film transistor (TFT) T13;13rd thin film transistor (TFT) T13 is defeated according to triggering drive circuit
The triggering drive signal Emission entered is opened or closed, and controls driving current caused by the 12nd thin film transistor (TFT) T12 to be
It is no to be transferred to Organic Light Emitting Diode OLED;Organic Light Emitting Diode OLED receives the 13rd thin film transistor (TFT) T13 transmission
Light is produced after driving current.
Therefore in the case where driving current size is identical, the time ratio of the 13rd thin film transistor (TFT) T13 opening and closing
Example is different, and due to the visual persistence effect of human eye, pixel region can show the picture of different grayscale.Avoid and showing low ash
During rank, the picture inequality problem caused by driving current is relatively low and electric current is unstable.
The concrete structure of OLED driver circuit is as follows:
The grid connection scan line of 11st thin film transistor (TFT) T11, the drain electrode connection data of the 11st thin film transistor (TFT) T11
Line, the source electrode of the 11st thin film transistor (TFT) T11 connect the grid of the 12nd thin film transistor (TFT) T12;
The grid of 12nd thin film transistor (TFT) T12 connects the source electrode of the 11st thin film transistor (TFT) T11, the 12nd film crystal
The source electrode of drain electrode the input supply voltage VDD, the 12nd thin film transistor (TFT) T12 of pipe T12 connect the 13rd thin film transistor (TFT) T13's
Drain electrode;
Grid input triggering the drive signal Emission, the 13rd thin film transistor (TFT) T13 of 13rd thin film transistor (TFT) T13
Drain electrode connection the 12nd thin film transistor (TFT) T12 source electrode, the 13rd thin film transistor (TFT) T13 source electrode connection organic light-emitting diodes
The anode of pipe;
Organic Light Emitting Diode includes anode and cathode, and anode connects the source electrode of the 13rd thin film transistor (TFT) T13, and cathode is defeated
Enter power supply negative pressure VSS.
The source electrode of 11 thin film transistor (TFT) T11 and the grid of the 12nd thin film transistor (TFT) T12 are electrically connected to pixel electrode, pass
The drive voltage line of power transmission source voltage VDD has overlapping region with pixel electrode, and is separated by interlayer dielectric, drive voltage line
Storage capacitance Cst is formed by the use of interlayer dielectric as dielectric material with pixel electrode.One end connection the of storage capacitance Cst
The source electrode of 11 thin film transistor (TFT) T11 and the grid of the 12nd thin film transistor (TFT) T12, the other end connection electricity of storage capacitance Cst
The drain electrode of source voltage VDD and the 12nd thin film transistor (TFT) T12.
For convenience of description, by the friendship of the source electrode of the 11st thin film transistor (TFT) T11 and the grid of the 12nd thin film transistor (TFT) T12
Contact is denoted as node P.
Fig. 3 is the main signal sequence diagram of OLED driver circuit.Under normal display state, supply voltage
VDD keeps high potential, and power supply negative pressure VSS keeps low potential.When scanning voltage is passed to the 11st film by the scan line of the row
During transistor T11, the 11st thin film transistor (TFT) T11 is opened, and the data voltage to be drained is sent to storage capacitance Cst, and gives
12nd thin film transistor (TFT) T12 assigns opening order.Scanning voltage and data voltage are down to low level afterwards, due to the 11st
Thin film transistor (TFT) T11 is closed, and node P keeps high potential.12nd thin film transistor (TFT) T12 open after, produce driving current from its
Drain electrode is delivered to the drain electrode of the 13rd thin film transistor (TFT) T13.Triggering drive signal Emission at the same time controls the 13rd film brilliant
The opening of body pipe T13 and closing, triggering drive signal Emission is the adjustable pulse signal of duty cycle, therefore thin the 12nd
Under the situation that film transistor T12 is opened, the sequential for triggering drive signal is the bright dark control sequential of Organic Light Emitting Diode.I.e.
When triggering drive signal Emission is located at low level, the 13rd thin film transistor (TFT) T13 is closed, Organic Light Emitting Diode anode
There is no electric current input, Organic Light Emitting Diode does not shine;When triggering drive signal Emission is located at high level, the 12nd is thin
Film transistor T12 and the 13rd thin film transistor (TFT) T13 is opened, and organic hair is inputted via the electric current of the 13rd thin film transistor (TFT) T13
Optical diode anode, organic light-emitting diode.Therefore, the bright dark sequential of Organic Light Emitting Diode is driven for duty cycle and triggering
Pulse sequence consistent dynamic signal Emission.
The organic light-emitting display device of the present invention further includes the triggering drive circuit of output triggering drive signal Emission,
Its structure is as shown in Figure 4.Triggering drive circuit includes N (N >=2, and N is integer) level triggering drive circuit unit (Emission
), n-th Circuit the circuit diagram of (1≤n≤N, and n is integer) level triggering drive circuit unit is as shown in figure 5, every grade of triggering
Drive circuit unit corresponds to a horizontal scanning line, and n-th grade (1≤n≤N, and n is integer) triggers drive circuit by n-th grade of triggering
Drive signal En inputs multiple pixel regions that its corresponding scan line is limited.
N-th grade triggering drive circuit unit include pull-up control module 01, pull-up module 02, signal control module 03 and
Pull down module 04.Pull up control module 01 and the pull-up equal input high level VGH of module 02, signal control module 03 and drop-down module
04 equal input power negative pressure VSS;Pull-up control module 01, signal control module 03 and drop-down module 04 are connected to pull-up control section
Point netAn, pull-up module 02 and drop-down module 04 are connected to output node netBn.Output node netBn output triggering driving letters
Number Emission, n-th grade of triggering drive signal are denoted as En.
Pull up control module 01 and receive high level VGH, charge to pull-up control node netAn.
Pull up module 02 and receive high level VGH, charge to output node netBn, and controlled by output node netBn
System, output triggering drive signal En.
Signal control module 03 receives n-th grade of pulse width modulating signal PWMn and second clock signal CK2, and pull-up is controlled
Node netAn processed carries out drop-down and empties.
Pull down module 04 and receive the first clock signal CK1, and by pull-up control node netAn controls, to output node
NetBn carries out drop-down and empties.
Specifically, pulling up control module 01 includes first film transistor T1, the second thin film transistor (TFT) T2 and the first electricity
Hold C1.The grid of first film transistor T1 and drain electrode are all connected with high level VGH, the source electrode connection of first film transistor T1 the
The grid of two thin film transistor (TFT) T2;The drain electrode connection high level VGH of second thin film transistor (TFT) T2, the source of the second thin film transistor (TFT) T2
Pole connection pull-up control node netAn;First capacitance C1 includes the first pole plate and the second pole plate, the first pole plate connection the first film
The grid of the source electrode of transistor T1 and the second thin film transistor (TFT) T2, the second pole plate connection pull-up control node netAn.
Pull-up module 02 includes the 3rd thin film transistor (TFT) T3, the 4th thin film transistor (TFT) T4 and the second capacitance C2.3rd is thin
The source electrode that the grid of film transistor T3 and drain electrode are all connected with high level VGH, the 3rd thin film transistor (TFT) T3 connects the 4th film crystal
The grid of pipe T4;The source electrode connection output of drain electrode connection the high level VGH, the 4th thin film transistor (TFT) T4 of 4th thin film transistor (TFT) T4
Node netBn simultaneously exports triggering drive signal En.
Signal control module 03 includes the 5th thin film transistor (TFT) T5 and the 7th thin film transistor (TFT) T7.5th thin film transistor (TFT) T5
Grid connect the 7th thin film transistor (TFT) T7 source electrode, the 5th thin film transistor (TFT) T5 drain electrode connection pull-up control node netAn,
The source electrode input power negative pressure VSS of 5th thin film transistor (TFT) T5;The grid connection second clock signal of 7th thin film transistor (TFT) T7
The drain electrode of CK2, the 7th thin film transistor (TFT) T7 connect n-th grade of pulse width modulating signal PWMn.For convenience of description, by the 7th film
The tie point of transistor T7 source electrodes and the 5th thin film transistor (TFT) T5 grids is denoted as first node netCn.
Drop-down module 04 includes the 6th thin film transistor (TFT) T6 and the 8th thin film transistor (TFT) T8.The grid of 6th thin film transistor (TFT) T6
Pole connects the source electrode of the 8th thin film transistor (TFT) T8, the drain electrode connection output node netBn of the 6th thin film transistor (TFT) T6, the 6th film
The source electrode input power negative pressure VSS of transistor T6;The grid of 8th thin film transistor (TFT) T8 connects the first clock signal CK1, and the 8th
The drain electrode connection pull-up control node netAn of thin film transistor (TFT) T8.For convenience of description, by the 8th thin film transistor (TFT) T8 source electrodes and
The tie point of six thin film transistor (TFT) T6 grids is denoted as section point netDn.
For five input signals:Under normal display state, high level VGH keeps high potential, and power supply negative pressure VSS is kept
Low potential.N-th grade of pulse width modulating signal PWMn is the adjustable pulse signal of duty cycle, the first clock signal CK1 and second
Clock signal CK2 has the identical cycle to be denoted as period 1 τ 1, within 1 times of period 1 τ, including the first clock signal CK1
Low level first time period is in high level, second clock signal CK2, the first clock signal CK1 is further included and is in low
Level, second clock signal CK2 are in the second time period of high level, such as:First clock signal CK1 and second clock signal
CK2 can be the cyclic pulse signal that duty cycle as shown in Figure 6 is 50%, or duty cycle as shown in Figure 7 is not
For 50% cyclic pulse signal.The cycle of pulse width modulating signal PWMn is second round τ 2.
Each frame that display device shows image is divided into multiple subframes, the cycle of each signal is son in display device
The integral multiple of frame time.
The operation principle for triggering drive circuit is as follows:
Under normal display state, high level VGH is located at high potential, first film transistor T1 and the 3rd thin film transistor (TFT)
The constant openings of T3, drive high level VGH to be sent to the first capacitance C1 and the second capacitance C2, at this time the second thin film transistor (TFT) T2 and
The grid of four thin film transistor (TFT) T4 also receives the high potential and opening of VGH, therefore the high potential of VGH is via the second film crystal
Pipe T2 is transferred to pull-up control node netAn;High level VGH is transferred to the of the second capacitance C2 via the 4th thin film transistor (TFT) T4
The drain electrode of quadripolar plate and the 6th thin film transistor (TFT) T6.
When pulse width modulating signal PWMn is located at high potential:
When second clock signal CK2 is high potential, the 7th thin film transistor (TFT) T7 is opened, while high level is transferred to the
The grid of five thin film transistor (TFT) T5 opens T5, and the electric charge of pull-up control node netAn is discharged via the 5th thin film transistor (TFT) T5
To low potential VSS.
Next subframe, second clock signal CK2 are changed into low potential, and correspondingly the first clock signal CK1 is changed into high potential, the
Eight thin film transistor (TFT) T8 are opened, and the low potential for being drained and (pulling up control node netAn) is sent to its source electrode, drives the 6th
Thin film transistor (TFT) T6 is closed;4th thin film transistor (TFT) T4 is opened, and high level VGH is sent to its source electrode, therefore output node
NetBn exports the triggering drive signal En of high potential.
When pulse width modulating signal PWMn is located at low potential:
When second clock signal CK2 is high potential, the 5th thin film transistor (TFT) T5 is closed, via the second thin film transistor (TFT) T2
Being transferred to the electric charge of pull-up control node netAn can not effectively discharge, therefore pulls up control node netAn and still keep high potential.
Next subframe, second clock signal CK2 are changed into low potential, and correspondingly the first clock signal CK1 is changed into high potential, the
Eight thin film transistor (TFT) T8 are opened, and the high potential for being drained and (pulling up control node netAn) is sent to its source electrode, drives the 6th
Thin film transistor (TFT) T6 is opened;6th thin film transistor (TFT) T6 is opened, and the power supply negative pressure VSS of low potential is sent to its drain electrode, therefore
Output node netBn exports the triggering drive signal En of low potential.
Frame stabilization when starting shooting in view of display device and electric charge release problem during shutdown, can touch at n-th grade
Sending out increases one or more supporting film transistors in drive circuit unit, including:Drain electrode as shown in Figure 8 is connected to first segment
Point netCn, source electrode are connected to the first supporting film transistor T21 of power supply negative pressure VSS;Drain electrode as shown in Figure 9 is connected to defeated
Egress netBn, source electrode are connected to the second supporting film transistor T22 of power supply negative pressure VSS;Drain electrode connection as shown in Figure 10
To section point netDn, source electrode is connected to the 3rd supporting film transistor T23 of high level VGH.These three thin film transistor (TFT)s
Grid is all connected with clear signal CLR.When display device is started shooting or is shut down, clear signal CLR can be in a subframe or more subframes
High potential is in time.Three listed supporting film transistors can be added individually to triggering drive circuit unit, also may be used
Add two of which or three at the same time.
When display device is started shooting, the clear signal CLR of high potential inputs the grid of the 3rd supporting film transistor T23,
3rd supporting film transistor T23 is opened, and the high level VGH in high potential is transmitted via the 3rd supporting film transistor T23
To section point netDn, the 6th thin film transistor (TFT) T6 is driven to open, the power supply negative pressure VSS in low potential is via the 6th film
The source electrode of transistor T6 is sent to its drain electrode, so n-th grade of triggering drive signal En output is low potential, display device is shown at this time
Show black picture.The 3rd newly-increased supporting film transistor T23 can prevent that display device from starting shooting but data voltage is not yet sent to
During pixel region, there is exception in the picture of display.
When display device is shut down, high level VGH is changed into low potential, if there is residual charge at first node netCn, the
One supporting film transistor T21 is opened, and residual charge is discharged;If output node netBn has residual charge, the second auxiliary is thin
Film transistor T22 is opened, and residual charge is discharged;If there is residual charge at section point netDn, the 3rd supporting film crystal
Pipe T23 is opened, and residual charge is discharged.Residual charge is discharged after shutdown can be effectively increased each film crystal in triggering drive circuit
The bulk life time of pipe.
In the organic light-emitting display device of the present invention, n-th grade of triggering drive signal En controls its corresponding scan line institute
The 13rd thin film transistor (TFT) opens or closes in the pixel region of restriction, since (n+1)th (1≤n≤N-1, and n is integer) rows are swept
Retouch the scanning voltage of line input sequential lag behind the input of line n scan line scanning voltage sequential, it is preferable that when the
, can during the sequential hysteresis one or more subframe of than n-th grade triggering drive signal En of the sequential of n+1 grades of triggering drive signal En+1
Control more effectively and meticulously the OLED driver circuit for pixel region of not going together.
Therefore in the present embodiment, the n-th of n-th (1≤n≤N-1, and n is integer) level triggering drive circuit unit output
Level triggering drive signal En inputs (n+1)th grade of triggering drive circuit unit as (n+1)th grade of pulse width modulating signal PWMn+1.
The first order pulse width modulating signal PWM1 that 1st grade of pulse width modulating signal is then an externally input.
Such as:Fig. 6 is the sequence diagram of main signal in triggering drive circuit.Externally input 1st grade of pulse width in figure
The second round τ 2 of modulated signal PWM1 is 11 subframes, the first clock signal CK1 and second clock signal CK2 common cycles
One period tau 1 is 2 subframes.It illustrate only the sequence diagram of E1, E2, E3 in Fig. 6, triggering drive signal Emission afterwards can
And so on.
In fact, pixel makes one the other grayscale of outlook by the bright dark time scale of Organic Light Emitting Diode, that is, input n-th grade
The duty cycle of n-th grade of triggering drive signal En of Organic Light Emitting Diode circuit determines.Therefore in other embodiments, arteries and veins is adjusted
Rush bandwidth modulation signals PWMn, the cycle of the first clock signal CK1 and second clock signal CK2 and sequential relationship can have it is cleverer
Selection living.Correspondingly, the connection relation triggered between the structure of drive circuit unit and each triggering drive circuit unit also may be used
To make modification and simplification.
Such as:The sequential of pulse width modulating signal PWMn can be divided into multiple stages, and the duty cycle in each stage is different, because
This input do not go together OLED driver circuit triggering drive signal duty cycle difference, have due to existing
Machine luminous display unit generally existing causes panel top and the bottom luminance difference since panel top and the bottom drive circuit is of different sizes
The problem of different, therefore the triggering drive circuit of this embodiment can effectively make up this difference;Or n-th grade of triggering drive circuit list
Member receives externally input n-th grade of pulse width modulating signal PWMn, n-th grade of pulse width modulating signal PWMn duty cycle respectively
It is corresponding with the average grayscale that the row pixel need to be shown, the power consumption of display device can be reduced;Or by identical pulse width tune
Signal PWMn processed inputs triggering drive circuit units at different levels, while controls what each OLED driver circuit was received
Drive signal En is triggered, the structure of triggering drive circuit can be simplified.
Since the OLED driver circuit of the present invention overcomes, electric current under low grayscale is smaller and unstable to ask
Topic, therefore on this basis, low grayscale can be carried out further by regulating and controlling the duty cycle of pulse width modulating signal PWMn
Subdivision.Human eye is higher to the susceptibility of low grayscale, therefore the present invention can effectively optimize picture quality.
The invention also discloses the circuit distributed architecture of organic light-emitting display device.The display device not only includes above-mentioned touch
Hair drive circuit 13, crisscross scan line and data cable and the multiple pixel regions limited by scan line and data cable intersection
Domain, each pixel region are equipped with OLED driver circuit;Further include the turntable driving that signal is provided for scan line
Circuit 11, the data drive circuit and other drive circuit (such as sequential control circuits, gamma voltage that signal is provided for data cable
Generator etc.), data drive circuit and other drive circuits are collectively referred to as data and other drive circuits 12.Display device periphery
Top circuit area, bottom circuit region, left side circuit region and right side circuit region may be equipped with, wherein, data and other driving electricity
Road 12 is usually located at bottom circuit region, and usually single chip form;Top circuit area, left side circuit region and right side
Circuit region can be used as single chip, and the devices such as thin film transistor (TFT) can also be used to be integrated in the display surface of display device
On plate.
Therefore scan drive circuit 11 and triggering drive circuit 13 can have various arrangement mode in display device, wrap
Include:
Arrangement mode 1:As shown in figure 11, scan drive circuit 11 is located at left side circuit region, triggering drive circuit 13 is located at
Right side circuit region.
This arrangement mode is by scan drive circuit 11 and triggering 13 circuit of the drive circuit circuit that to be respectively placed in two different
Region, convenient design and production.
Arrangement mode 2:As shown in figure 12, partial scan drive circuit 11 and part triggering drive circuit 13 are located at left side electricity
Road area, partial scan drive circuit 11 and part triggering drive circuit 13 are located at right side circuit region.
This arrangement mode is equipped with scan drive circuit 11 and triggering drive circuit 13 in panel both sides so that scanning voltage
Each pixel region of display panel can be reached within the shorter time with triggering driving voltage, reduces signal delay.
Arrangement mode 3:As shown in figure 13, scan drive circuit 11 and triggering drive circuit 13 are respectively positioned on left side circuit region.
Arrangement mode 4:As shown in figure 14, scan drive circuit 11 and triggering drive circuit 13 are respectively positioned on right side circuit region.
This two kinds of arrangement modes reduce the circuit region of left or right side, are conducive to make the display device of narrow frame.
Arrangement mode 5:As shown in figure 15, scan drive circuit 11 is located at left side circuit region and right side circuit region, and triggering is driven
Dynamic circuit 13 is located at top circuit area.
Scan drive circuit 11 in this arrangement mode positioned at both sides provides stronger driving force, reduces signal and prolongs
Late;The circuit that left or right side circuit region need to be set is reduced, and is conducive to make the display device of narrow frame;And it is individually placed in
Change of the triggering drive circuit 13 of one circuit region to existing design is smaller, convenient design and production.
Arrangement mode 6:As shown in figure 16, partial scan drive circuit 11 and part triggering drive circuit 13 are located at left side electricity
Road area, partial scan drive circuit 11 and part triggering drive circuit 13 are located at right side circuit region, partial scan drive circuit 11
Positioned at top circuit area.
This arrangement mode compares arrangement mode 2 and adds partial scan drive circuit 11 positioned at top circuit area, therefore
In addition to the advantages of arrangement mode 2, the driving force of scan drive circuit is enhanced.
Arrangement mode 7:As shown in figure 17, scan drive circuit 11 is located at left side circuit region and right side circuit region, and triggering is driven
Dynamic circuit 13 is located at bottom circuit region, and triggering drive circuit 13 can be integrated with data drive circuit module and other drive circuits
It is integrated in the aobvious of display device on a single die or separately as a chip or using devices such as thin film transistor (TFT), capacitances
Show panel bottom.
This arrangement mode, which compares arrangement mode 5, to be changed positioned at the triggering drive circuit 13 in top circuit area to bottom circuit
Area, since the bottom of the display devices such as mobile phone, TV is usually constructed with key area etc. as blocking, this arrangement mode is except row
Outside the advantages of row mode 5, top circuit region is reduced, increases display area.
OLED driver circuit disclosed by the invention is organic using externally input triggering drive signal control
The bright dark time scales of light emitting diode OLED, reach under same current driving, show the functions of different grey menus, can be with
Avoid when showing low grey menu, since driving current is relatively low, the picture inequality problem caused by electric current is unstable.The present invention
Also disclose the display device using the OLED driver circuit.
It should be noted that above-described embodiment can be freely combined as needed.The above is only the preferred of the present invention
Embodiment, it is noted that for those skilled in the art, do not departing from the premise of the principle of the invention
Under, multiple improvements and modifications can also be made, these improvements and modifications also should be regarded as protection scope of the present invention.