CN107992437A - A kind of hard disk backboard connection method, system and connection cables for supporting pattern of double controlling - Google Patents

Abstract

The embodiment of the present invention discloses a hard disk backplane connection method, system and connection cable supporting dual-control mode. The method includes allocating one clk buffer for each PCIE interface on the host side, and each clk buffer divides the clock signal into two 2. The clock signal is respectively transmitted to 2N PCIE interfaces at one end of the cable connected to the PCIE SWITCH; the data channel of each PCIE interface at one end of the cable is divided into two groups, one group is connected to host 1, and the other group is connected to Host 2, the other end of the cable is connected to the corresponding PCIE interface on the hard disk backplane; the two clock signals on each PCIE interface on the host side are transmitted to the PCIE interface on the hard disk backplane side through the cable. The invention utilizes the universal hard disk backboard to realize dual control, thereby reducing the workload and design cost of designers.

Description

A hard disk backplane connection method, system and connection cable supporting dual-control mode

technical field

The invention relates to the technical field of computers, in particular to a hard disk backboard connection method, system and connection cable supporting dual-control mode.

Background technique

NVME (Non-Volatile Memory express, which is a protocol similar to AHCI based on the M.2 interface, is a protocol specially designed for flash memory storage) SSD (Solid State Drives, solid state drive) due to its high performance It is widely used in storage systems, and most manufacturers' servers currently support NVME SSD. With the improvement of storage capacity, more and more disks need to be supported. In addition, other PCIE (peripheral component interconnect express, which is a high-speed serial computer expansion bus standard) equipment, such as network card, GPU (Graphics Processing Unit, graphics Processor), SOC (System on Chip, system-on-chip) card, etc., the original number of PCIE channels of the CPU is far from meeting the existing needs, so it is necessary to use PCIE SWITCH to expand the PCIE channel to connect more Multiple SSDs and other PCIE devices.

The interconnection between PCIE SWITCH and NVME SSD is realized through cables. If two hosts control NVME SSD through PCIE SWITCH, it is necessary to connect the PCIE interface on the SWITCH with the PCIE interface on the hard disk backboard through ordinary cables. One-to-one connection, the host can control the hard disk. By interconnecting different hard disk backplanes (supporting single control or dual control) to realize the single control or dual control function of two hosts for all hard drives.

Since the above-mentioned interconnection method realizes the single control or dual control function of the hard disk by interconnecting different hard disk backplanes, it is necessary for LOGIC engineers and LAYOUT engineers to design two different hard disk backplanes that support single and dual control functions during the research and development process. board, the workload is heavy and the design cost is high.

Contents of the invention

Embodiments of the present invention provide a hard disk backplane connection method, system and connection cables supporting dual-control mode, so as to solve the problems in the prior art that it is necessary to design hard disk backplanes with different functions, resulting in heavy workload and high cost.

In order to solve the above technical problems, the embodiment of the present invention discloses the following technical solutions:

The first aspect of the present invention provides a hard disk backplane connection method supporting dual-control mode, including the following steps:

Allocate one clk buffer for each PCIE interface on the host side, and each clk buffer divides the clock signal into two;

The clock signals are respectively transmitted to 2N PCIE interfaces at one end of the cable connected to the PCIE SWITCH;

The data channels of each PCIE interface at one end of the cable are divided into two groups, one group is connected to the host 1, the other group is connected to the host 2, and the other end of the cable is connected to the corresponding PCIE interface on the hard disk backboard;

The two clock signals on each PCIE interface on the host side are transmitted to the PCIE interface on the hard disk backplane side through cables.

With reference to the first aspect, in a first possible implementation manner of the first aspect, before the step, the method further includes: adding a clk buffer to a circuit of the PCIE SWITCH board.

With reference to the first aspect, in a second possible implementation manner of the first aspect, before the step, the method further includes: designing a hard disk backplane with 2N interfaces.

With reference to the first aspect, in the first or second possible implementation manner of the first aspect, there are four data channels, and each group includes two data channels.

The second aspect of the present invention provides a hard disk backplane connection cable supporting dual-control mode, both ends of the cable have 2N PCIE interfaces, one end of the cable is connected to the PCIE SWITCH, and the other end is connected to the hard disk backplane, Each PCIE interface at one end of the cable includes 4 data channels, and the signal lines of the 4 channels are divided into two groups, each group includes 2 data channels, one of which is connected to host 1, and the other is connected to host 2, The other side of the cable is connected to the corresponding 2N PCIE ports on the hard disk backplane.

The third aspect of the present invention provides a hard disk backplane connection system supporting a dual-control mode, which is characterized in that it includes a hard disk backplane, a PCIE SWITCH, a cable connecting the hard disk backplane and the PCIE SWITCH, and two hosts, the hard disk The backplane includes 2N interfaces, both ends of the cable have 2N PCIE interfaces, one end of the cable is connected to two hosts through PCIE SWITCH, and the other end is connected to the hard disk backplane;

Each PCIE interface at one end of the cable includes 4 data channels, the signal lines of the 4 data channels are divided into two groups, each group includes 2 data channels, one group is connected to the host 1, and the other group is connected to Host 2, the other side of the cable is connected to the corresponding 2N PCIE ports on the hard disk backboard.

With reference to the third aspect, in a first possible implementation manner of the third aspect, each host is connected to N clk buffers through PCIESWITCH, and each clk buffer divides the clock signal into two.

The connection cable of the second aspect and the connection system of the third aspect of the present invention can realize the methods in the first aspect and each implementation manner of the first aspect, and achieve the same effect.

The effects provided in the summary of the invention are only the effects of the embodiments, rather than all the effects of the invention. One of the above technical solutions has the following advantages or beneficial effects:

N clk buffers are connected to the host, and each clk buffer divides the clock signal of the host into two, and the signal of each host is transmitted to each interface of the hard disk backplane through cables, and the hard disk backplane is a general single control The hard disk backplane, so as to realize the dual control mode by using the general hard disk backplane, and realize the dual control mode without resetting the hard disk backplane, reducing the workload of the designer and reducing the design cost.

Description of drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings that need to be used in the description of the embodiments or the prior art. Obviously, for those of ordinary skill in the art, In other words, other drawings can also be obtained from these drawings under the premise of not paying creative work.

Fig. 1 is a schematic flow chart of Embodiment 1 of a hard disk backplane connection method supporting dual-control mode;

FIG. 2 is a schematic flow diagram of Embodiment 2 of a hard disk backplane connection method supporting dual-control mode;

FIG. 3 is a schematic structural diagram of an implementation manner of a hard disk backplane connection system supporting a dual-control mode.

Detailed ways

In order to clearly illustrate the technical features of this solution, the present invention will be described in detail below through specific implementation modes and in conjunction with the accompanying drawings. The following disclosure provides many different embodiments or examples for implementing different structures of the present invention. To simplify the disclosure of the present invention, components and arrangements of specific examples are described below. Furthermore, the present invention may repeat reference numerals and/or letters in different instances. This repetition is for the purpose of simplicity and clarity and does not in itself indicate a relationship between the various embodiments and/or arrangements discussed. It should be noted that components illustrated in the figures are not necessarily drawn to scale. Descriptions of well-known components and processing techniques and processes are omitted herein to avoid unnecessarily limiting the present invention.

As shown in Figure 1, an embodiment of a hard disk backplane connection method supporting a dual-control mode of the present invention includes the following steps:

S11, assigning one clk buffer to each PCIE interface on the host side, and each clk buffer divides the clock signal into two;

S12, the clock signal is respectively transmitted to 2N PCIE interfaces at one end of the cable connected to the PCIE SWITCH;

S13, dividing the data channel of each PCIE interface at one end of the cable into two groups, one group is connected to the host 1, the other group is connected to the host 2, and the other end of the cable is connected to the corresponding PCIE interface on the hard disk backboard;

S14, the two clock signals on each PCIE interface on the host side are transmitted to the PCIE interface on the hard disk backplane side through cables.

In step S11, there are two hosts, and each host allocates N clk buffers, and each clk buffer divides the clock signal of the host into two, so each host obtains 2N clock signals. There are 2N PCIE interfaces on the host side, and the clock signal of each host is correspondingly transmitted to the PCIE interface.

In step S12, the 2N clock signals corresponding to each host are transmitted to the corresponding hard disk backplane through cables. There are 2N interfaces on the hard disk backplane, and the clock signals of each host are transmitted to the hard disk backplane through cables. On the corresponding 2N interfaces, dual hosts control the hard disk backplane through clk buffer and cables.

In step S13, there are 4 data channels for each PCIE interface, and in the two groups that are divided into, each group includes two data channels, which are connected to host 1 and host 2 respectively, so that each PCIE interface on the host side has two data channels. The data signals of two hosts are correspondingly connected to the hard disk backplane side, and there are data signals of two hosts on each PCIE interface, so as to realize dual control.

In step S14, similarly, the clock signal of each host is also transmitted to 2N PCIE interfaces through cables.

Both ends of the cable have 2N PCIE interfaces. One end of the cable is connected to the PCIE SWITCH, and the other end is connected to the hard disk backplane. Each PCIE interface at one end of the cable includes 4 data channels, and the signal lines of the 4 channels are divided into Two groups, each group includes 2 data channels, one group is connected to host 1, the other group is connected to host 2, and the other side of the cable is connected to the corresponding 2N PCIE interfaces on the corresponding hard disk backboard.

As shown in Figure 2, on the basis of the above-mentioned embodiments, an embodiment of a hard disk backplane connection method supporting dual-control mode of the present invention includes the following steps:

S21, designing a hard disk backplane with 2N interfaces;

S22, adding clk buffer in the circuit of PCIE SWITCH board;

S23, assigning one clk buffer to each PCIE interface on the host side, and each clk buffer divides the clock signal into two;

S24, the clock signal is respectively transmitted to 2N PCIE interfaces at one end of the cable connected to the PCIE SWITCH;

S25, dividing the data channel of each PCIE interface at one end of the cable into two groups, one group is connected to the host 1, and the other group is connected to the host 2;

S26, the two clock signals on each PCIE interface on the host side are transmitted to the PCIE interface on the hard disk backplane side through cables.

As shown in Figure 3, a kind of hard disk backplane connection system supporting dual control mode of the present invention, the system includes a hard disk backplane, PCIE SWITCH, cables connecting the hard disk backplane and PCIE SWITCH and two hosts, hard disk backplane It includes 2N interfaces, and both ends of the cable have 2N PCIE interfaces. In FIG. 3 , N=2 is taken as an example to illustrate. One end of the cable is connected to two hosts through PCIE SWITCH, and the other end is connected to the hard disk backplane;

Each PCIE interface at one end of the cable includes 4 data channels, the signal lines of the 4 data channels are divided into two groups, each group includes 2 data channels, one group is connected to the host 1, and the other group is connected to Host 2, the other side of the cable is connected to the corresponding 2N PCIE ports on the hard disk backboard.

The above is only a preferred embodiment of the present invention. For those of ordinary skill in the art, without departing from the principle of the present invention, some improvements and modifications can also be made, and these improvements and modifications are also considered as the present invention. protection scope of the invention.

Claims (7)

1. a kind of hard disk backboard connection method for supporting pattern of double controlling, it is characterized in that：Comprise the following steps：

Clock signal is divided into two for the clk of each PCIE interface assignments of host computer side 1 buffer, each clk buffer；

Clock signal be respectively transmitted to on the 2N PCIE interface of PCIE SWITCH associated wires one end；

The data channel of each PCIE interfaces of described cable one end is divided into two groups, one group of connection host 1, another group of connection master Machine 2, the other end of cable are connected on hard disk backboard corresponding PCIE interfaces；

On PCIE interfaces of 2 clock signals by cable transmission to hard disk backboard side on each PCIE interfaces of host computer side.

2. a kind of hard disk backboard connection method for supporting pattern of double controlling according to claim 1, it is characterized in that：In the step Further included before rapid：Clk buffer are added in the circuit of PCIE SWITCH plates.

3. a kind of hard disk backboard connection method for supporting pattern of double controlling according to claim 1 or 2, it is characterized in that：Institute Further included before stating step：Hard disk backboard of the design with 2N interface.

4. a kind of hard disk backboard connection method for supporting pattern of double controlling according to claim 3, it is characterized in that：The data Passage has 4, and every group includes 2 data channel.

5. a kind of hard disk backboard connection cables for supporting pattern of double controlling, it is characterized in that：The both ends of the cable are respectively provided with 2N PCIE interfaces, one end connection PCIE SWITCH of cable, other end connection hard disk backboard, each PCIE interfaces of cable one end Including 4 data channel, the signal wire of 4 passages is divided into two groups, and every group includes 2 data channel, and one of which is connected to master Machine 1, another group is connected to host 2, and the connection of cable opposite side corresponds to corresponding 2N PCIE interfaces on hard disk backboard.

6. a kind of hard disk backboard for supporting pattern of double controlling connects system, it is characterized in that：Including hard disk backboard, PCIESWITCH, company The cable and two hosts of hard disk backboard and PCIE SWITCH are connect, the hard disk backboard includes 2N interface, the cable Both ends are respectively provided with 2N PCIE interface, and one end of cable connects two hosts respectively by PCIE SWITCH, and other end connection is hard Disk backboard；

Each PCIE interfaces of cable one end include 4 data channel, and the signal wire of 4 data channel is divided into two groups, Every group includes 2 data channel, and one of which is connected to host 1, and another group is connected to host 2, the corresponding hard disk of cable opposite side connection Corresponding 2N PCIE interfaces on backboard.

7. a kind of hard disk backboard for supporting pattern of double controlling according to claim 6 connects system, it is characterized in that：It is described each Clock signal is divided into two by host by the N number of clk buffer of PCIE SWITCH connections, each clk buffer.