CN107978521B - Cutting method of display panel mother board, display panel and display device - Google Patents

Abstract

Embodiments of the present invention provide a method for cutting a display panel motherboard, a display panel, and a display device. The cutting method includes: sequentially fabricating a buffer layer and an interlayer insulating layer on the substrate, and both the buffer layer and the interlayer insulating layer cover the display edge area of the panel; removing part of the interlayer insulating layer at the edge area position to form a first pattern, and exposing part of the buffer layer; performing ion implantation on the exposed buffer layer; and cutting along the cutting line. Due to the ion implantation treatment on the exposed buffer layer, the buffer layer after the ion implantation treatment becomes a low stress film layer. At this time, the film layer cracking caused by the cutting external force will not continue to extend to the interior of the display screen, which can improve the Product yield.

Description

Cutting method of display panel motherboard, display panel, display device

technical field

The present invention relates to the field of display technology, and in particular, to a method for cutting a display panel motherboard, a display panel and a display device.

Background technique

Flexible display is an important development direction of next-generation display technology. This technology has the characteristics of being bendable, non-breakable, ultra-light and ultra-thin, low-power consumption, portable, etc. Broad application prospects and good development expectations. Currently, the substrate materials used in flexible displays are organic plastics, thin metal foils, and thin glass.

In the current preparation method of flexible display, a cutting process is required after laser peeling, and the large panel (flexible display panel mother board) is divided into small panels (flexible display panel) for the back-end module assembly process, and the commonly used cutting methods include: Knife cutting and laser cutting. Due to the multi-layer inorganic barrier film at the cutting position of the flexible display panel motherboard, whether it is knife cutting or laser cutting, the instantaneous high pressure and heat will cause the film to rupture, which will affect the display characteristics of the flexible element.

To sum up, when the flexible display panel motherboard is cut in the prior art, the external force of cutting may cause the film to be broken, so that the yield of the flexible display panel is low.

SUMMARY OF THE INVENTION

The primary purpose of the present invention is to provide a method for cutting a display panel motherboard, which is used to solve the problem of film breakage caused by external cutting force and to solve the problem of low product yield.

Another object of the present invention is to provide a display panel to solve the problem of low product yield.

Another object of the present invention is to provide a display device for solving the problem of low product yield.

In order to achieve the above object, the present invention provides the following technical solutions:

A method for cutting a display panel motherboard, wherein the display panel motherboard includes a plurality of display panels, and each edge area of the display panel is provided with a cutting line; the cutting method includes:

A buffer layer and an interlayer insulating layer are sequentially fabricated on the substrate, and both the buffer layer and the interlayer insulating layer cover the edge region of the display panel;

removing part of the interlayer insulating layer at the position of the edge region, forming a first pattern, and exposing part of the buffer layer;

performing ion implantation treatment on the exposed buffer layer;

Cut along the cut line.

Preferably, the removing part of the interlayer insulating layer at the position of the edge region to form the first pattern includes:

Part of the interlayer insulating layer at the position of the edge region is removed to form a plurality of support walls, and the plurality of support walls are spaced along a direction from the edge of the display panel to the interior of the display panel.

Preferably, after the ion implantation is performed on the exposed buffer layer and before the cutting along the cutting line, the method further comprises:

Perform annealing treatment.

Preferably, removing part of the interlayer insulating layer at the corresponding position of the edge region to form a plurality of support walls, including:

Coating photoresist on the interlayer insulating layer, and removing the photoresist at the position where ion implantation needs to be performed by exposing and developing, exposing the interlayer insulating layer at the position where ion implantation needs to be performed;

The exposed interlayer insulating layer is etched to form a plurality of supporting walls arranged at intervals.

Preferably, before the step of sequentially fabricating the buffer layer and the interlayer insulating layer on the substrate, the method further includes:

A barrier layer is formed on the substrate.

Preferably, after the removing part of the interlayer insulating layer at the position of the edge region and forming the first pattern, and before performing the ion implantation treatment on the exposed buffer layer, the method further comprises:

Ion implantation is performed on the barrier layer at a position below the exposed buffer layer.

Preferably, the ion implantation process includes:

acquiring an ion parameter, where the ion parameter is a parameter obtained according to the exposed buffer layer and the material and thickness of the barrier layer at a position below the exposed buffer layer;

Ion implantation is performed according to the ion parameters.

Preferably, performing ion implantation treatment on the exposed barrier layer at a position below the buffer layer includes:

Boron or phosphorus ions are implanted into the barrier layer at locations below the exposed buffer layer.

Preferably, performing ion implantation on the exposed buffer layer includes:

Boron ions or phosphorus ions are implanted into the exposed buffer layer.

Preferably, after removing a part of the interlayer insulating layer at the position of the edge region and forming a first pattern, and after performing the ionization on the barrier layer at the position below the exposed buffer layer Before injection processing, also include:

Photoresist is used to shield the interlayer insulating layer and the support wall.

Preferably, the material of the barrier layer is the same as the material of the buffer layer; or

The material of the interlayer insulating layer is the same as that of the buffer layer.

Preferably, the material of the buffer layer includes any one or a combination of silicon oxide and silicon nitride.

A display panel, comprising a display area and an edge area around the display area, a cutting line is arranged in the edge area, the edge area includes a buffer layer sequentially located on a substrate, and an interlayer insulation with a first pattern Floor;

And the exposed buffer layer contains implanted ions outside the coverage of the interlayer insulating layer of the first pattern.

Preferably, the display panel further comprises: a barrier layer between the substrate and the buffer layer;

And the barrier layer at the position below the exposed buffer layer contains implanted ions.

A display device includes the above-mentioned display panel.

Compared with the prior art, the scheme of the present invention has the following beneficial effects:

In the method for cutting a display panel motherboard provided by the embodiment of the present invention, since the method adopts a patterning process to remove part of the interlayer insulating layer at the position of the edge region, a first pattern is formed, and part of the buffer layer is exposed; The exposed buffer layer is treated with ion implantation, and the ion implantation can release the stress, so that the buffer layer after the ion implantation treatment becomes a low-stress film layer. At this time, the cracking of the film layer caused by the cutting force will not continue to the inside of the display screen. extension, thereby improving product yield.

Additional aspects and advantages of the present invention will be set forth in part in the following description, which will be apparent from the following description, or may be learned by practice of the present invention.

Description of drawings

The above and/or additional aspects and advantages of the present invention will become apparent and readily understood from the following description of embodiments taken in conjunction with the accompanying drawings, wherein:

1 is a schematic structural diagram of the prior art when cutting a flexible display panel motherboard after laser peeling;

2 is a flowchart of a method for cutting a display panel motherboard according to an embodiment of the present invention;

3-7 are schematic structural diagrams of a method for cutting a display panel motherboard according to an embodiment of the present invention at different cutting stages.

The meanings represented by the reference numerals in the embodiments of the present invention are described below:

10-cutting position; 1-flexible substrate; 2-blocking layer; 3-buffer layer; 4-interlayer insulating layer; 5-supporting wall; 6-low stress film area; 41-photoresist; 42-mask .

Detailed ways

The following describes in detail the embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein the same or similar reference numerals refer to the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, but not to be construed as a limitation of the present invention.

It will be understood by those skilled in the art that the singular forms "a", "an", "the" and "the" as used herein can include the plural forms as well, unless expressly stated otherwise. It should be further understood that the word "comprising" used in the description of the present invention refers to the presence of stated features, integers, steps, operations, elements and/or components, but does not exclude the presence or addition of one or more other features, Integers, steps, operations, elements, components and/or groups thereof. It will be understood that when we refer to an element as being "connected" or "coupled" to another element, it can be directly connected or coupled to the other element or intervening elements may also be present. Furthermore, "connected" or "coupled" as used herein may include wirelessly connected or wirelessly coupled. As used herein, the term "and/or" includes all or any element and all combination of one or more of the associated listed items.

It will be understood by those skilled in the art that, unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. It should also be understood that terms, such as those defined in a general dictionary, should be understood to have meanings consistent with their meanings in the context of the prior art and, unless specifically defined as herein, should not be interpreted in idealistic or overly formal meaning to explain.

The following first introduces the technical terms used in the embodiments of the present invention.

The ion implantation process is widely used in the preparation process of semiconductor display devices. It is characterized by good collimation (that is, small lateral diffusion), and the depth and concentration of doping ions can be precisely controlled by adjusting the energy and dose of implanted ions. To meet the requirements of high-purity doping, prevent harmful substances from entering semiconductor materials, and improve the performance of semiconductor devices, ion implantation has become an important doping technology in large-scale and ultra-large-scale integrated circuits.

The inventors of the present invention have studied the cutting method of the flexible display panel in the prior art, and found the following problems.

As shown in FIG. 1, FIG. 1 is a schematic diagram of cutting a flexible display panel motherboard after laser peeling in the prior art, 10 indicates the cutting position, and FIG. 1 only shows two flexible display panels formed after cutting, Since the inventors of the present invention did not involve the display area of the flexible display panel when researching the prior art, only the edge area of the flexible display panel is shown in FIG. The barrier layer 2 , the buffer layer 3 , the interlayer insulating layer 4 and the support wall 5 are on the top.

As shown in FIG. 1 , the setting of the support wall 5 can effectively avoid the occurrence of cutting cracks, but this design has a disadvantage: if the cutting crack during cutting occurs in the barrier layer 2 or the buffer layer 3, the support wall 5 The setting will not avoid the occurrence of cutting cracks.

During the research process, the inventor found that if the cutting crack during cutting occurs in the barrier layer 2 or the buffer layer 3, in order to avoid the occurrence of cutting cracks, the barrier layer 2 or the buffer layer at the position between the adjacent support walls 5 Layer 3 needs to be removed by etching.

In FIG. 1, the support wall 5 is formed by etching part of the interlayer insulating layer 4 at the corresponding position of the edge region, and the etching time during the etching should not be too long, because the etching time is too long, the flexibility will be reduced. The gate electrode and the semiconductor active layer in the display area of the display panel are etched away. Therefore, the buffer layer 3 and the barrier layer 2 cannot be etched away in this etching step.

In the prior art, in order to etch away the buffer layer 3 and the barrier layer 2, an additional mask process is required, which increases the manufacturing cost and wastes the process time.

Therefore, the inventor found that the existing technology cannot avoid the occurrence of cutting cracks when cutting the flexible display panel motherboard; and, in order to avoid the occurrence of cutting cracks, the existing technology increases the production cost and wastes the process time. .

The improved ideas and principles of the embodiments of the present invention are described below with reference to the accompanying drawings.

The thickness, area and shape of the film layer in the specific embodiments of the present invention do not reflect the real proportion of the film layer, and are only used to illustrate the specific embodiments of the present invention.

The inventor of the present invention, in view of the shortcomings of the prior art, provides a method for cutting a display panel motherboard.

As shown in FIG. 2 , a specific embodiment of the present invention provides a method for cutting a display panel motherboard. The display panel motherboard includes a plurality of display panels, and each display panel edge area is provided with a cutting line; the cutting method includes: :

S201, forming a buffer layer and an interlayer insulating layer on the substrate in sequence, and both the buffer layer and the interlayer insulating layer cover the edge area of the display panel;

S202, removing part of the interlayer insulating layer at the position of the edge region, forming a first pattern, and exposing part of the buffer layer;

S203, performing ion implantation on the exposed buffer layer;

S204, cutting along the cutting line.

In the method for cutting a display panel motherboard provided by a specific embodiment of the present invention, since the method adopts a patterning process to remove part of the interlayer insulating layer at the position of the edge region, a first pattern is formed, and part of the buffer layer is exposed; due to the specific implementation of the present invention For example, ion implantation is performed on the exposed buffer layer, and the ion implantation can release the stress, so that the buffer layer after the ion implantation treatment becomes a low stress film, and the film cracking caused by the cutting force will not continue to display. The internal extension of the screen can improve the product yield; compared with the prior art, the specific embodiment of the present invention can effectively avoid the generation of cutting cracks on the basis of no need to increase the mask process, save the production cost, and improve the Product yield.

Preferably, in the specific embodiment of the present invention, a part of the interlayer insulating layer at the position of the edge region is removed to form the first pattern, including:

Part of the interlayer insulating layer at the position of the edge region is removed to form a plurality of supporting walls, and the plurality of supporting walls are arranged in a direction from the edge of the display panel to the interior of the display panel.

When the cutting method provided by the specific embodiment of the present invention is used for cutting, if the cutting crack occurs in the film layer where the interlayer insulating layer is located, the formed support wall can effectively avoid the generation of cutting cracks, thereby improving the product yield; The cutting crack occurs in the film layer where the buffer layer is located. Due to the ion implantation treatment of the exposed buffer layer, the ion implantation can release the stress, so that the buffer layer after the ion implantation treatment becomes a low stress film layer. At this time, the external force of cutting The resulting film cracks will not continue to extend to the interior of the display screen, thereby improving product yield; compared with the prior art, the specific embodiment of the present invention does not matter whether the cutting crack occurs in the film layer where the interlayer insulating layer is located or the buffer layer The film layers where it is located can effectively avoid the generation of cutting cracks on the basis of no need to increase the mask process, save the production cost and improve the product yield.

The reason why the ion implantation can release the stress is that the ion implantation process will cause damage to the lattice in the film, so that the high stress can be released and the stress of the film can be reduced. The depth of the ion implantation process is mainly controlled by the energy of the ion implantation. The higher the energy, the deeper the implantation depth. Relying on ion implantation to adjust the film stress, the depth of ion implantation can neither be too deep nor too shallow; if the depth of ion implantation is too shallow, the high stress of the film will not be completely released, and the effect of stress release will not be achieved. If the depth of ion implantation is too deep, the film may be broken down, thereby affecting the film layer below the film.

Specifically, the stress of the silicon nitride film before and after ion implantation with the same ion implantation dose and different ion implantation energies is shown in Table 1:

Table 1

The ion species implanted in Table 1 are introduced by taking boron (B) ion or phosphorus (P) ion as an example. It can be seen from Table 1 that the same ion implantation dose, the higher the ion implantation energy, the lower the film stress after implantation. the greater the impact.

Preferably, in the specific embodiment of the present invention, after the ion implantation is performed on the exposed buffer layer and before the cutting along the cutting line, the method further includes: performing an annealing treatment, and the annealing treatment can repair the film damage caused by the ion implantation, The specific process parameters during the annealing treatment (eg, annealing time, annealing temperature, etc.) are set according to actual production conditions, and the specific process of the annealing treatment is similar to that in the prior art, which will not be repeated here. During specific implementation, the specific embodiment of the present invention places the buffer layer after ion implantation treatment and the substrate after the interlayer insulating layer step after patterning process into annealing equipment for annealing treatment.

The following describes the cutting method of the above-mentioned display panel motherboard provided by the specific embodiment of the present invention in detail.

For the above step S201, a buffer layer and an interlayer insulating layer are sequentially fabricated on the substrate, and both the buffer layer and the interlayer insulating layer cover the edge area of the display panel; The flexible display panel formed by the substrate has the characteristics of being bendable, unbreakable, ultra-light and ultra-thin, low power consumption, portable, etc. Of course, the substrate in the specific embodiment of the present invention is not limited to a flexible substrate, and can also be other types of substrates. For example: the substrate is a glass substrate.

Preferably, in the specific embodiment of the present invention, the material of the interlayer insulating layer is the same as the material of the buffer layer, which can save the cost of material selection, thereby reducing the production cost, and the same film layer manufacturing equipment can be used to manufacture the buffer layer and the interlayer. Insulation.

Preferably, the material of the buffer layer can be a single-layer film of silicon oxide or silicon nitride, or a composite film of silicon oxide and silicon nitride. Of course, other types of insulating materials can also be selected. The specific material of the buffer layer is not limited.

In the specific embodiment of the present invention, the specific method of sequentially fabricating the buffer layer and the interlayer insulating layer on the substrate is similar to that in the prior art, and will not be repeated here.

For the above step S202, removing part of the interlayer insulating layer at the position corresponding to the edge region to form a first pattern includes: removing part of the interlayer insulating layer at the position of the edge region to form a plurality of supporting walls, the plurality of supporting walls are along the Arrange in the direction from the edge of the display panel to the inside of the display panel.

Specifically, the specific embodiment of the present invention adopts a patterning process to remove part of the interlayer insulating layer at the position of the edge region. First, a photoresist is coated on the interlayer insulating layer, and through exposure and development, the ion implantation position is removed. The photoresist exposes the interlayer insulating layer at the position where ion implantation needs to be performed; during the specific implementation, the photoresist coated in the specific embodiment of the present invention may be a positive photoresist or a negative photoresist. Specific embodiments of the invention The specific processes of photoresist coating, exposure and development are similar to those in the prior art, and will not be repeated here.

Next, the exposed interlayer insulating layer is etched to form a plurality of supporting walls arranged at intervals; in specific implementation, the exposed interlayer insulating layer is etched by dry etching, and the dry etching is controlled by controlling the dry etching. process parameters, so that only the exposed interlayer insulating layer is removed after etching, and the buffer layer under the interlayer insulating layer is not etched. The specific process of dry etching is similar to the prior art, and will not be repeated here. .

For the above step S203, ion implantation is performed on the exposed buffer layer; including:

First, obtain ion parameters, which are parameters obtained according to the material and thickness of the exposed buffer layer; preferably, the ion parameters include: ion species, ion implantation dose and ion implantation energy. Preferably, the material of the buffer layer is any one or a combination of silicon oxide (SiO ₂ ) and silicon nitride (Si ₃ N ₄ ); the thickness of the buffer layer is 200 nanometers (nm) to 500 nm.

Next, ion implantation is performed according to ion parameters; preferably, boron (B) ions or phosphorus (P) ions are implanted into the exposed buffer layer.

During the specific implementation, since the depth of the ion implantation process is mainly controlled by the energy of the ion implantation, the higher the energy, the deeper the implantation depth. Specifically, the corresponding relationship between the ion implantation energy and the ion implantation depth can be checked by querying the corresponding table of the prior art. Therefore, in the specific embodiment of the present invention, according to the material and thickness of the buffer layer, the corresponding table in the prior art can be inquired, and then the value of the ion implantation energy can be determined.

For the above-mentioned step S204, cutting along the cutting line, this step is similar to the prior art, specifically, knife cutting, laser cutting, or other types of cutting methods may be used, which will not be repeated here.

Preferably, before the buffer layer and the interlayer insulating layer are sequentially fabricated on the substrate, the specific embodiment of the present invention further includes: fabricating a barrier layer on the substrate; preferably, the material of the barrier layer is the same as the material of the buffer layer, which can save energy The cost of material selection can further reduce the production cost, and the buffer layer and the barrier layer can be produced by using the same film layer production equipment.

Further, in the specific embodiment of the present invention, after the patterning process is used to remove part of the interlayer insulating layer at the corresponding position of the edge region, after forming a plurality of spaced supporting walls, and before the ion implantation treatment is performed on the exposed buffer layer, the Including: performing ion implantation treatment on the barrier layer at the position below the exposed buffer layer; in this way, the barrier layer after the ion implantation treatment also becomes a low stress film layer, and when subsequent cutting is performed, the film layer is cracked due to the cutting force It will not continue to extend to the interior of the display screen, thereby further improving the product yield.

Preferably, the process of performing ion implantation on the barrier layer at the position below the exposed buffer layer in the specific embodiment of the present invention is similar to the process of performing ion implantation on the exposed buffer layer, and specifically includes: first, obtaining ion parameters, The ion parameters are parameters obtained from the material and thickness of the barrier layer at the position below the exposed buffer layer; then, ion implantation is performed according to the ion parameters.

Preferably, the specific embodiment of the present invention performs ion implantation treatment on the barrier layer at the position below the exposed buffer layer, including: implanting boron ions or phosphorus ions into the barrier layer at the position below the exposed buffer layer. The ion implantation process of ions or phosphorus ions is relatively mature, so the yield of products after ion implantation can be well guaranteed.

Further, in the specific embodiment of the present invention, after a patterning process is used to remove part of the interlayer insulating layer at the corresponding position of the edge region, and after forming a plurality of spaced supporting walls, the barrier layer at the position below the exposed buffer layer is processed. Before the ion implantation treatment, the method further includes: shielding the interlayer insulating layer and the support wall with a photoresist. In this way, the photoresist is shielded by the photoresist, and the photoresist can be simply removed by developing after the ion implantation, without using other complicated processes, and the coating process of the photoresist is also relatively simple.

The following describes in detail a method for cutting a display panel motherboard provided by a specific embodiment of the present invention with reference to a specific embodiment.

As shown in FIG. 3 , first, a flexible substrate 1 is prepared. The material of the flexible substrate 1 can be PI (Polyimide, polyimide). The thickness of the flexible substrate 1 is about 5 micrometers (μm) to 20 μm, which can be a single-layer structure. , or a double-layer structure.

Next, as shown in FIG. 3 , on the flexible substrate 1, a PECVD (Plasma Enhanced Chemical VaporDeposition) process is used to deposit a barrier layer 2, and the material of the barrier layer 2 can be silicon oxide or nitride The single-layer film of silicon can also be a composite film of silicon oxide and silicon nitride, and is generally a single-layer film of silicon oxide, and the thickness of the barrier layer 2 is about 200 nm to 500 nm.

Next, as shown in FIG. 3 , a buffer layer 3 is deposited on the barrier layer 2 using a PECVD process. The material of the buffer layer 3 can be a single-layer film of silicon oxide or silicon nitride, or can be silicon oxide and nitride The silicon composite film is generally a composite film of silicon oxide and silicon nitride, and the thickness of the buffer layer 3 is about 200 nm to 500 nm.

Next, as shown in FIG. 3 , on the substrate on which the buffer layer 3 is fabricated, a patterning process is used to fabricate the semiconductor active layer and the gate electrode. Since the specific embodiment of the present invention does not involve the improvement of the display area of the display panel, the The display area of the display panel is not shown, and only the edge area of the display panel is shown, that is, the semiconductor active layer and the gate electrode formed in the display area are not shown in FIG. 3 . The patterning process in the specific embodiment of the present invention includes part or all of the processes of coating, exposing, developing, etching and removing the photoresist, and the specific manufacturing method of the semiconductor active layer and the gate electrode in the specific embodiment of the present invention Similar to the prior art, details are not repeated here.

Next, as shown in FIG. 3 , on the semiconductor active layer and the gate, a PECVD process is used to deposit an interlayer insulating layer 4 , and the material of the interlayer insulating layer 4 can be a single-layer film of silicon oxide or silicon nitride , can also be a composite film of silicon oxide and silicon nitride, generally a composite film of silicon oxide and silicon nitride, and the thickness of the interlayer insulating layer 4 is about 200 nm to 500 nm.

Next, as shown in FIG. 4 , a photoresist 41 is coated on the interlayer insulating layer 4, and a mask 42 is used for exposure, and after exposure, development is performed to remove the photoresist at the position where the ion implantation needs to be performed subsequently, and Remove the photoresist at the position where the via hole needs to be formed (the via hole is located in the display area, not shown in the figure), expose the interlayer insulating layer 4 at the position where the ion implantation needs to be performed, and expose the position where the via hole needs to be formed the interlayer insulating layer 4 .

Next, as shown in FIG. 5 , the exposed interlayer insulating layer 4 is etched, preferably by dry etching, to form a plurality of supporting walls 5 arranged at intervals, and to form via holes in the display area. The formation can connect the source and drain layers formed in the subsequent fabrication with the semiconductor active layer; the formation of the support wall 5 can effectively avoid the occurrence of cutting cracks. FIG. 5 of the specific embodiment of the present invention only shows the edge area of the display panel, and the semiconductor active layer and the gate are fabricated in the display area of the display panel. Therefore, the semiconductor active layer and the gate are not shown in FIG. 5 . pole.

As shown in FIG. 5 , the etching time in this etching step should not be too long. If the etching time is too long, the semiconductor active layer under the interlayer insulating layer 4 will also be etched away, so that the source and drain layers cannot be separated from each other. The connection of the semiconductor active layer, therefore, the etching process cannot etch away the buffer layer 3 under the interlayer insulating layer 4 .

Next, as shown in FIG. 5 , the exposed buffer layer 3 and the barrier layer 2 under the exposed buffer layer 3 are subjected to ion implantation treatment. The arrows in FIG. 5 indicate the direction of ion implantation; The flexible substrate 1 that has completed the above steps is put into the ion implantation equipment for ion implantation; in order to shield and protect the position that does not require ion implantation, it is preferable not to peel off the photoresist 41, so that there is no need to separately set a protective film layer, which can Save production time and reduce production costs.

Specifically, as shown in FIG. 5 , B ions or P ions are implanted into the exposed buffer layer 3 and under the exposed buffer layer 3 according to a table for querying the corresponding relationship between ion implantation energy and ion implantation depth in the prior art In the barrier layer 2 of the exposed buffer layer 2; in the specific implementation, it can be injected in two times, the first time is to inject the barrier layer 2 under the exposed buffer layer 3, and the second time is to inject the exposed buffer layer 3; during the injection process Therefore, there is the protection of the photoresist 41, and ions can only be implanted into the exposed buffer layer 3 and the barrier layer 2 under the exposed buffer layer 3, and there are no other positions (such as the position of the support wall 5). Ion Implantation.

Next, as shown in FIG. 6 , the photoresist 41 is removed, and the photoresist can be removed by stripping, and the low stress thin film region 6 generated by ion implantation is formed in the buffer layer 3 and the barrier layer 2 .

Next, preferably, the flexible substrate 1 that has completed the above steps is put into an annealing treatment equipment for annealing treatment. The annealing treatment can modify the film damage caused by ion implantation, and can avoid the source and drain layers in the display area and the semiconductor active layer. The problem of excessive bonding resistance of the layer.

Finally, as shown in FIG. 7 , the cutting is performed along the cutting line, and the specific cutting method is the same as that in the prior art, which will not be repeated here; during cutting, if the cutting crack occurs in the film layer where the interlayer insulating layer is located, the supporting wall formed 5. It can effectively avoid the generation of cutting cracks, and then can improve the product yield; if the cutting cracks occur in the film layer where the buffer layer 3 or the barrier layer 2 is located, since the specific embodiment of the present invention forms a low-stress thin film region 6, then The cracking of the film layer caused by the cutting force will not continue to extend to the interior of the display screen, which can improve the product yield.

The specific embodiment of the present invention only adds an ion implantation process. During the cutting process, the cracking of the film layer caused by the cutting external force will not continue to extend to the interior of the display screen, which ensures the product yield. Compared with the prior art, the present invention The specific embodiment does not need to increase the mask process, which can save the production cost and improve the product yield.

Based on the same inventive concept, a specific embodiment of the present invention also provides a display panel, which is obtained by cutting the above-mentioned display panel motherboard cutting method provided by the specific embodiment of the present invention. The display panel provided by the specific embodiment of the present invention The yield of the panel is higher.

Specifically, the display panel provided by the specific embodiment of the present invention includes a display area and an edge area around the display area, a cutting line is provided in the edge area, and the edge area includes a buffer layer sequentially located on a substrate and an interlayer having a first pattern. Insulation;

And outside the coverage of the interlayer insulating layer of the first pattern, the exposed buffer layer contains implanted ions.

Further, the display panel provided by the specific embodiment of the present invention further includes: a barrier layer between the substrate and the buffer layer;

And the barrier layer at a position below the exposed buffer layer contains the implanted ions.

During specific implementation, as shown in FIG. 7 , the edge region of the display panel provided by the specific embodiment of the present invention includes: a barrier layer 2 , a buffer layer 3 , an interlayer insulating layer 4 and a support wall 5 , which are sequentially located on the flexible substrate 1 ; wherein : The region between adjacent support walls 5 forms a low stress thin film region 6 due to ion implantation.

Based on the same inventive concept, a specific embodiment of the present invention also provides a display device, the display device includes the above-mentioned display panel provided by the specific embodiment of the present invention, and the display device can be a liquid crystal panel, a liquid crystal display, a liquid crystal TV, an organic light-emitting diode Display devices such as Organic Light Emitting Diode (OLED) panels, OLED displays, OLED TVs or electronic paper.

In summary, a specific embodiment of the present invention provides a method for cutting a display panel motherboard. The cutting method includes: sequentially fabricating a buffer layer and an interlayer insulating layer on the substrate, and both the buffer layer and the interlayer insulating layer cover the display panel. The edge area of the panel; part of the interlayer insulating layer at the position of the edge area is removed to form a plurality of support walls; wherein: the plurality of support walls are arranged along the direction from the edge of the display panel to the interior of the display panel, and adjacent support walls The buffer layer is exposed in the area between; the exposed buffer layer is subjected to ion implantation; and the cutting is performed along the cutting line. When the cutting method provided by the specific embodiment of the present invention is used for cutting, if the cutting crack occurs in the film layer where the interlayer insulating layer is located, the formed support wall can effectively avoid the generation of cutting cracks, thereby improving the product yield; The dicing crack occurs in the film layer where the buffer layer is located. Since the specific embodiment of the present invention performs ion implantation on the exposed buffer layer, the ion implantation can release the stress, so that the buffer layer after the ion implantation treatment becomes a low stress film layer At this time, the cracking of the film layer caused by the external cutting force will not continue to extend to the interior of the display screen, thereby improving the product yield; compared with the prior art, the specific embodiment of the present invention does not matter whether the cutting crack occurs at the place where the interlayer insulating layer is located The film layer or the film layer where the buffer layer is located can effectively avoid the generation of cutting cracks on the basis of no need to increase the mask process, save the production cost and improve the product yield.

The above are only some embodiments of the present invention. It should be pointed out that for those skilled in the art, without departing from the principles of the present invention, several improvements and modifications can be made. It should be regarded as the protection scope of the present invention.

Claims (15)

1. A method for cutting a display panel motherboard, wherein the display panel motherboard comprises a plurality of display panels, and each edge area of the display panel is provided with a cutting line; the cutting method comprises: A buffer layer and an interlayer insulating layer are sequentially fabricated on the substrate, and both the buffer layer and the interlayer insulating layer cover the edge region of the display panel; removing part of the interlayer insulating layer at the position of the edge region, forming a first pattern, and exposing part of the buffer layer; performing ion implantation treatment on the exposed buffer layer; Cut along the cut line. 2 . The cutting method according to claim 1 , wherein the removing part of the interlayer insulating layer at the position of the edge region to form the first pattern comprises: 3 . Part of the interlayer insulating layer at the position of the edge region is removed to form a plurality of support walls, and the plurality of support walls are spaced along a direction from the edge of the display panel to the interior of the display panel. 3 . The cutting method according to claim 2 , wherein after the ion implantation treatment is performed on the exposed buffer layer and before the cutting along the cutting line, the method further comprises: 3 . Perform annealing treatment. 4 . The cutting method according to claim 2 , wherein the removing part of the interlayer insulating layer at the position of the edge region to form a plurality of support walls, comprising: 5 . Coating photoresist on the interlayer insulating layer, and removing the photoresist at the position where ion implantation needs to be performed by exposing and developing, exposing the interlayer insulating layer at the position where ion implantation needs to be performed; The exposed interlayer insulating layer is etched to form a plurality of supporting walls arranged at intervals. 5 . The cutting method according to claim 2 , wherein before the step of sequentially fabricating the buffer layer and the interlayer insulating layer on the substrate, the method further comprises: 6 . A barrier layer is formed on the substrate. 6 . The cutting method according to claim 5 , wherein after removing a part of the interlayer insulating layer at the position of the edge region and forming the first pattern, and after the pair of exposed parts Before the buffer layer is treated with ion implantation, it also includes: Ion implantation is performed on the barrier layer at a position below the exposed buffer layer. 7. The cutting method according to claim 6, wherein the ion implantation treatment comprises: acquiring an ion parameter, where the ion parameter is a parameter obtained according to the exposed buffer layer and the material and thickness of the barrier layer at a position below the exposed buffer layer; Ion implantation is performed according to the ion parameters. 8 . The cutting method according to claim 7 , wherein the performing ion implantation treatment on the exposed barrier layer at a position below the buffer layer comprises: 8 . Boron or phosphorus ions are implanted into the barrier layer at locations below the exposed buffer layer. 9. The cutting method according to any one of claims 1-8, wherein the performing ion implantation on the exposed buffer layer comprises: Boron ions or phosphorus ions are implanted into the exposed buffer layer. 10 . The cutting method according to claim 6 , wherein after removing a part of the interlayer insulating layer at the position of the edge region and forming the first pattern, and after the pair of exposed parts Before the ion implantation treatment is performed on the barrier layer at the position below the buffer layer, the method further includes: Photoresist is used to shield the interlayer insulating layer and the support wall. 11. The cutting method according to claim 5, wherein the material of the barrier layer is the same as the material of the buffer layer; or The material of the interlayer insulating layer is the same as that of the buffer layer. 12 . The cutting method according to claim 11 , wherein the material of the buffer layer comprises any one or a combination of silicon oxide and silicon nitride. 13 . 13. A display panel, comprising a display area and an edge area around the display area, wherein a cutting line is provided in the edge area, wherein the edge area comprises a buffer layer sequentially located on a substrate, and has a first a patterned interlayer insulating layer; And the exposed buffer layer contains implanted ions outside the coverage of the interlayer insulating layer of the first pattern. 14. The display panel of claim 13, further comprising: a barrier layer between the substrate and the buffer layer; And the barrier layer at the position below the exposed buffer layer contains implanted ions. 15. A display device, comprising the display panel according to claim 13 or 14.

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