CN107958841A - Wafer processing method - Google Patents

Abstract

A wafer processing method is provided so that all electrode posts are reliably exposed on the backside of the wafer. A wafer processing method, the wafer is formed with devices on the front surface, and embedded with a plurality of electrode columns extending in the thickness direction of the wafer and from the front surface of the wafer to a specified depth position, wherein the wafer The processing method has the following steps: a holding step of holding the front side of the wafer by the holding table; a thinning step of thinning the wafer to a predetermined thickness by processing the back side of the wafer held by the holding table and a judging step, after implementing the thinning step, photographing the back side of the wafer and generating a photographed image, judging whether there is an electrode column not exposed on the back side according to the photographed image, and determining that there is an electrode column by the judging step In the case of the electrode posts not exposed on the back surface of the wafer, an additional processing step for further thinning the wafer is performed.

Description

Wafer processing method

technical field

The present invention relates to a method of processing wafers made of semiconductors and the like.

Background technique

Chips having devices such as ICs and LSIs are formed by dividing a substantially disk-shaped wafer with a plurality of devices formed on the front surface. The plurality of devices are formed on the front surface of the wafer in a plurality of regions divided by planned division lines set in a grid pattern. After forming a plurality of devices, the wafer is processed from the back side by a grinding device or a grinding device to be thinned to a predetermined thickness. The thinned wafer is cut along planned dividing lines by a cutting device or the like to be divided into individual chips.

Chips having devices are widely mounted in various electronic devices such as mobile phones and personal computers. With increasing demands for miniaturization and thinning of various electronic devices, studies are being made on miniaturization and thinning of chips, reduction of the area required for mounting chips, and the like.

In recent years, as a technique for increasing the degree of integration of devices, a technique of stacking and mounting a plurality of chips has been put into practical use. In addition, in order to realize space-saving electrical connection between a plurality of stacked chips, a technique of electrically connecting chips through through electrodes (hereinafter referred to as electrode posts) embedded in holes penetrating the chips has been put into practical use. Patent Document 1 and Patent Document 2 disclose techniques for electrically connecting stacked chips using electrode posts.

The electrode post is formed, for example, by forming a hole of a predetermined depth from the front surface of the wafer before being divided, and embedding a conductive material in the hole. Thereafter, when the wafer is processed and thinned from the back surface, the bottom of the hole is removed, and the electrode post embedded in the hole is exposed on the back side.

Patent Document 1: Japanese Patent Laid-Open No. 2001-53218

Patent Document 2: Japanese Patent Laid-Open No. 2005-136187

The holes in which the conductive material is embedded are formed at a depth approximately equal to the finished thickness of the finally formed chip, but the depths of the holes vary. Therefore, even if the back surface of a wafer having a plurality of holes embedded with conductive material is processed by a processing device such as a grinding device, a lapping device, or a cutter cutting device, and the wafer is thinned to a design value, it is not possible to completely The bottom of the hole is removed, and a part of the electrode post is not exposed on the back side.

Therefore, it is necessary to confirm whether or not all the electrode posts are exposed on the back side of the wafer when the wafer is thinned. Conventionally, the operator visually checks the backside of the wafer. However, for this purpose, the wafer must be moved from the thinned place, and the wafer must be returned to the original place when additional processing is required, complicating the work. Furthermore, problems such as ignoring unexposed electrode posts arise.

Contents of the invention

The present invention was made in view of this problem, and an object of the present invention is to provide a wafer processing method capable of effectively judging whether or not all of the plurality of electrode posts are exposed on the back surface of the thinned wafer. Furthermore, there is provided a wafer processing method capable of reliably detecting the presence of unexposed electrode posts and performing additional processing so that all of the electrode posts are exposed on the back surface.

According to one aspect of the present invention, there is provided a method for processing a wafer having devices formed on the front surface thereof, and a plurality of electrode pillars embedded in the wafer, the plurality of electrode pillars extending in the thickness direction of the wafer, and extending from From the front side of the wafer to a predetermined depth position, it is characterized in that the processing method of the wafer has the following steps: holding step, using the holding table to hold the front side of the wafer; processing the back side of the wafer to thin the wafer to a predetermined thickness; The electrode posts not exposed on the back surface are determined to be present in the determination step not exposed on the back surface of the wafer, and an additional processing step of further thinning the wafer is performed.

In addition, in one aspect of the present invention, the determining step may be performed while the wafer is held on the holding table, and the additional processing step may be performed while the wafer is held on the holding table. executed below.

According to the wafer processing method according to one aspect of the present invention, after performing the thinning step of thinning the wafer to a predetermined thickness, the rear surface of the wafer to be processed can be photographed to generate a photographed image, and the It was judged whether or not there were electrode posts not exposed on the back surface. This determination is performed, for example, by comparing the generated captured image with the captured image when all the electrode posts are exposed. Therefore, accurate judgment can be performed in a short time compared with visual judgment.

Since it is possible to quickly determine whether or not all the electrode posts are exposed on the back side of the wafer, when additional processing is necessary, it is quickly determined that the additional processing is to be performed. Furthermore, when additional processing is performed and the presence or absence of unexposed electrode pillars is re-judged, the time required for the judgment can also be shortened.

As a result of this determination, when it is confirmed that all the electrode posts are exposed on the back surface of the wafer, no additional processing is required. Here, even when it is determined that additional processing is unnecessary, since it is quickly determined that additional processing is not performed, the time required to send the wafer to the next process is shortened.

In addition, since the captured image captured by the imaging unit included in the processing apparatus is used for this determination, the determination can be performed without moving the wafer from the position where the processing is performed. In the case of visual inspection of the wafer, it is necessary to take out the wafer from the processing apparatus for this purpose, and in the case of performing additional processing, it is necessary to perform an operation of rearranging the wafer. However, according to the present invention, such work is unnecessary, and the efficiency of the machining process is improved.

As described above, according to one aspect of the present invention, there is provided a wafer processing method capable of efficiently determining whether or not all of the plurality of electrode posts are exposed on the back surface of the thinned wafer. Furthermore, there is provided a wafer processing method capable of reliably detecting the electrode posts that are not exposed and performing additional processing so that all the electrode posts are exposed on the back surface.

Description of drawings

1(A) is a schematic cross-sectional view showing a wafer embedded with a plurality of electrode posts, and FIG. 1(B) is a schematic cross-sectional view showing a state where a support wafer is arranged on the front surface of the wafer.

Fig. 2 is a perspective view schematically showing an example of a processing device.

(A) of FIG. 3 is a side view explaining a holding process, and (B) of FIG. 3 is a side view explaining an example of a thinning process.

Fig. 4 is a cross-sectional view illustrating another example of the thinning step.

5(A) is a side view explaining the determination procedure, FIG. 5(B) is a schematic diagram illustrating an example of a captured image, and FIG. 5(C) is a schematic diagram illustrating another example of a captured image.

Label description

1: wafer; 1a: front; 1b: back; 3: electrode column; 5: supporting wafer; 7, 9: image capture; 2: processing device; 4: platform; Rough grinding unit; 14: feeding mechanism of rough grinding unit; 16: fine grinding unit; 18: feeding mechanism of fine grinding unit; 20: unit shell; 22: main shaft; 24: wheel mounting seat; 26: grinding grinding wheel; 28: grinding wheel abutment; 30: grinding tool; 32: motor; 34: rotating table; 36: arrow; 38: holding table; 38a: porous parts; 38b: suction path; 40, 40a : Grinding unit; 42: Main shaft; 44: Wheel mount; 46: Grinding wheel; 48: Abutment; 50: Grinding pad; 58: Judgment section; 60: Standard image storage section; 62, 64: Cassette; 66: Wafer transfer robot; 68: Temporary storage table; 70: Rotary cleaning unit; 72: Transfer unit.

Detailed ways

Embodiments of the present invention will be described. First, a wafer as a workpiece in the wafer processing method of the present embodiment will be described. (A) of FIG. 1 is a schematic cross-sectional view showing a wafer 1 as a workpiece. The front surface 1a of the wafer 1 is divided into a plurality of regions by dividing lines (not shown) arranged in a grid pattern, and devices (not shown) such as ICs and LSIs are formed in each divided region. The wafer 1 is finally divided along the planned division lines to form a plurality of chips.

The wafer 1 is made of materials such as silicon, sapphire, glass, and quartz, and is, for example, a substantially disk-shaped substrate. In the case of using a wafer made of a semiconductor material, for example, a part of the wafer 1 is used to form a device. When the wafer 1 is not made of a semiconductor material, for example, a semiconductor layer is provided on the front surface 1a of the wafer 1, and the semiconductor layer is processed to form a device.

The wafer 1 is provided with a plurality of holes of a predetermined depth opened on the front surface 1 a side, and a conductive material is introduced into each of the holes to form a plurality of electrode posts 3 extending in the thickness direction of the wafer 1 . The introduction of the conductive material into the hole is performed by a plating method, a CVD method, a vapor deposition method, or the like. Alternatively, a paste containing the conductive material is introduced and cured. After the conductive material is introduced into the hole by these methods, the front surface 1a side of the wafer 1 is planarized by CMP or the like in order to remove excess conductive material that is supplied too much and is not accommodated in the hole.

Materials such as gold, silver, copper, and aluminum are used as the conductive material. Since the electrode post 3 is used to electrically connect the stacked chips, a material with low resistance can be used as the conductive material.

When the wafer 1 is processed from the back surface 1b side and thinned to a predetermined thickness, the bottom of the hole into which the conductive material is introduced is removed to expose the electrode post 3 on the back surface 1b side, so the hole is formed smaller than the wafer 1b side. The finished thickness after thinning of 1 is deep.

In the processing method of this embodiment, before processing the rear surface 1b of the wafer 1, as shown in FIG. As the support wafer 5, for example, a silicon wafer is used. Instead of supporting the wafer 5 , a protective tape may be attached to the front surface 1 a of the wafer 1 .

Next, a processing apparatus suitable for carrying out the wafer processing method of this embodiment will be described. A perspective view of an example of this processing apparatus is shown in FIG. 2 . The processing apparatus 2 is an apparatus capable of performing processing such as grinding processing and polishing processing on a wafer.

The processing device 2 has a table 4 having a substantially rectangular parallelepiped shape. Near the end of the upper surface of the table 4, a column 6 having a substantially rectangular parallelepiped shape is erected. Two pairs of rails 8 and 10 extending in the vertical direction are provided on the front surface of the column 6 of the processing device 2 .

On a pair of rails 8, a rough grinding unit 12 is installed in a manner capable of moving up and down (Z-axis direction) by a rough grinding unit feeding mechanism 14, and on the other pair of rails 10, a rough grinding unit 12 can be moved through a fine grinding The finishing grinding unit 16 is installed in such a manner that the grinding unit feeding mechanism 18 moves in the up and down direction.

The detailed structure of the rough grinding unit 12 is demonstrated with reference to FIG.2 and (B) of FIG.3. The rough grinding unit 12 has a cylindrical unit case 20 , and a motor 32 that rotationally drives a main shaft 22 housed in the unit case 20 so as to be rotatable. The front end of the main shaft 22 is exposed to the outside from the lower surface of the unit case 20 .

The rough grinding unit 12 further includes: a disk-shaped wheel mount 24 fixed to the front end of the main shaft 22 ; and a grinding wheel 26 detachably mounted on the front end of the wheel mount 24 . The grinding wheel 26 is composed of a disc-shaped grinding wheel base 28 and a plurality of grinding tools 30. The diameter of the grinding wheel base 28 is approximately equal to the wheel mount 24, and the plurality of grinding tools 30 are fixed in a ring shape. On the outer periphery of the lower end surface of the grinding wheel base 28 .

The finish grinding unit 16 is configured in the same manner as the rough grinding unit 12 . However, as the grinding wheel included in the fine grinding unit 16 , a grinding wheel suitable for smooth grinding of a wafer is used as compared with the grinding wheel included in the rough grinding unit 12 .

As shown in FIG. 2 , the processing device 2 has a rotary table 34 substantially parallel to the upper surface of the table 4 on the front side of the column 6 . The rotary table 34 is rotated in a direction indicated by an arrow 36 by a rotary drive mechanism not shown. Four holding tables 38 , which are separated from each other by 90 degrees in the circumferential direction, are arranged on the rotary table 34 so as to be rotatable in a horizontal plane.

A porous member 38a is disposed on the upper portion of the holding table 38, and the upper surface of the porous member 38a serves as a holding surface (see FIG. 4). The holding table 38 internally has a suction path 38b connected to a suction source (not shown) at one end. The other end of the suction path 38b is connected to the porous member 38a (see FIG. 4 ). The holding table 38 applies the negative pressure generated by the suction source to the wafer 1 placed on the holding surface through the porous member 38 a to suction and hold the wafer 1 .

The four holding tables 38 arranged on the rotary table 34 are sequentially moved to the wafer carrying-in/carrying-out area A, the rough grinding processing area B, the finish grinding processing area C, and the grinding processing area by appropriate rotation of the rotary table 34. Area D. Each holding table 38 is rotatable about an axis perpendicular to the holding surface, and rotates to rotate the wafer 1 when the wafer 1 is being ground or the like.

In the polishing area D, the first polishing unit 40 is arranged. The first grinding unit 40 includes: a stationary block (not shown), which is fixed on the table 4; an X-axis moving block (not shown), which is installed on the stationary block, and can pass through an X-axis moving mechanism (not shown) move in the X-axis direction; and a Z-axis moving block (not shown), which is mounted on the X-axis moving block and can move in the Z-axis direction through a Z-axis moving mechanism (not shown).

A cylindrical unit case (not shown) is arranged on the Z-axis moving block, and as shown in FIG. 4 , the main shaft 42 is accommodated in the unit case so as to be rotatable. The front end of the main shaft 42 is exposed to the outside from the lower surface of the unit case. A disc-shaped wheel mount 44 is fixed to the front end of the main shaft 42 , and a grinding wheel 46 is attached to the wheel mount 44 so as to be detachable from the wheel mount 44 .

The grinding wheel 46 is composed of a disc-shaped base 48 having a diameter substantially equal to that of the wheel mount 44 , and a polishing pad 50 bonded to the base 48 . The base 48 side of the grinding wheel 46 is attached to the wheel mount 44 . The polishing pad 50 is formed of, for example, a felt material in which abrasive grains are dispersed in polyurethane or felt and fixed with a binder. A polishing liquid supply path 52 is formed at the center of the base 48 and the polishing pad 50 . In addition, a plurality of grooves (not shown) for holding the polishing liquid are formed on the polishing surface (lower surface) of the polishing pad 50 .

Between the wafer carrying-in/carrying-out area A and the polishing area D, a second polishing unit 40a is arranged. The second polishing unit 40 a is configured in the same manner as the first polishing unit 40 .

On the opposite side of the column 6 of the table 4 of the processing apparatus 2, a first cassette 62 for storing, for example, unprocessed wafers and a second cassette 64 for storing, for example, processed wafers are detachably attached. .

The wafer transfer robot 66 unloads the wafers stored in the first cassette 62 onto the temporary storage table 68 . Then, the processed wafers cleaned by the spin cleaning unit 70 are transferred to the second cassette 64 .

The transfer unit 72 carries wafers from the temporary storage table 68 onto the holding table 38 located in the wafer loading/unloading area A. As shown in FIG. Then, the processed wafer is sucked, and the wafer is transferred from the holding table 38 to the spin cleaning unit 70 . The transfer unit 70 is capable of moving the wafer in the X-axis direction, the Y-axis direction, and the Z-axis direction.

At least one of the rough grinding unit 12, the finish grinding unit 16, the first grinding unit 40, and the second grinding unit 40a of the processing device 2 further has an imaging unit, which is used when confirming the state of the workpiece or the processing position. The shooting unit. In addition, this imaging means is also used in the determination step of the processing method of this embodiment. The imaging unit is formed of, for example, a line sensor having a plurality of imaging elements arranged in a line in a strip-shaped housing.

As shown in FIG. 5(A) , the imaging unit 54 is located above the end of the wafer 1 so that the long axis of the bar-shaped case is parallel to the wafer 1 . The photographing unit 54 photographs the processed wafer 1 while moving in a direction perpendicular to the major axis of the housing (direction of the arrow in FIG. 5(A) ) in the horizontal plane, and generates a photographed image. The data is sent to the controller (control unit) 56 of the processing device 2 .

As shown in FIG. 2 , the processing device 2 has a controller (control unit) 56 connected to the table 4 . The controller (control unit) 56 has a function of controlling each component of the processing apparatus 2 . Then, in a determination step described later, the controller (control unit) 56 receives a captured image from the imaging unit 54 and determines whether or not all electrode posts 3 are exposed on the rear surface 1 b side of the wafer 1 based on the captured image. In addition, the configuration and functions of the controller (control unit) 56 can also be realized as software on a PC.

The controller (control unit) 56 has a determination unit 58 and a standard image storage unit 60 . A captured image of the rear surface 1 b side of the wafer 1 that has been correctly processed is stored in the standard image storage unit 60 as a standard image. In the determination step described later, the determination unit 58 compares the standard image read from the standard image storage unit 60 with the captured image sent from the imaging unit 54, and determines whether there is an electrode post 3 not exposed on the back surface. .

When it is determined by the determination unit 58 that there is no unexposed electrode post 3 , the controller (control unit) 56 sends the wafer 1 to the next step. When the judging unit 58 judges that there is an unexposed electrode post 3 , the processing unit (grinding unit or lapping unit) to which the imaging unit 54 is mounted is made to process the wafer again. In addition, after the wafer is reprocessed, the imaging unit 54 may be made to generate a captured image again and perform determination.

Next, the wafer processing method of this embodiment will be described. First, as shown in (A) of FIG. 3 , a holding step is performed to hold the wafer 1 on which a plurality of devices are formed on the front surface 1 a by the holding table 38 located in the wafer loading/unloading area A of the processing apparatus 2 . A front surface protection member such as a support wafer 5 is pasted on the front surface 1a of the wafer 1 in advance, and the wafer 1 is placed on the holding table 38 with the front surface 1a facing the holding surface of the holding table 38, and is sucked and held.

Next, a thinning step is performed to thin the wafer 1 by processing the back surface 1 b side of the wafer 1 held by the holding table 38 . In this thinning step, the wafer 1 is thinned and the bottoms of the holes of the wafer 1 in which the electrode pillars 3 are embedded are removed to expose the electrode pillars 3 on the rear surface 1 b side of the wafer 1 .

For example, the thinning step of exposing the electrode post 3 is performed using the rough grinding unit 12 , the finish grinding unit 16 , the first grinding unit 40 , and the second grinding unit 40 a of the processing device 2 . Hereinafter, the processing of the wafer 1 in each unit will be described.

First, the rotary table 34 is rotated, the holding table 38 is sent to the rough grinding processing area B, and the wafer 1 is moved. Then, the back surface 1 b of the wafer 1 is roughly ground by the rough grinding unit 12 . (B) of FIG. 3 is a side view explaining rough grinding.

In the rough grinding, first, the holding table 38 and the grinding wheel 26 are respectively rotated in the directions of the arrows shown in FIG. 3(B) . Then, the rough grinding unit feeding mechanism is operated while both are rotating, and the grinding wheel 26 is processed and fed in the downward direction. Then, when the grinding stone 30 held by the grinding wheel 26 comes into contact with the wafer 1, the back surface 1b side of the wafer 1 is roughly ground. When the wafer 1 is roughly ground to a predetermined thickness, the rough grinding ends.

Next, the rotary table 34 of the machining device 2 is rotated, and the holding table 38 is sent to the finish grinding processing area C. As shown in FIG. Then, the wafer 1 is finished ground by the finish grinding unit 16 . In addition, the finish grinding by the finish grinding unit 16 is performed similarly to the rough grinding by the rough grinding unit 12 .

Finish grinding is performed at a machining feed rate slower than that of rough grinding, and the ground surface after grinding is subjected to finish grinding to make it smooth. The back surface 1b of the wafer 1 is thinned to a thickness around the finished thickness of the chip by rough grinding and finish grinding.

After the finish grinding, the rotary table 34 is rotated, and the holding table 38 is sent to the grinding processing area D. As shown in FIG. Then, the rear surface 1 b side of the wafer 1 is polished by the first polishing unit 40 . FIG. 4 is a cross-sectional view schematically showing polishing of the rear surface 1 b side of the wafer 1 by the first polishing unit 40 .

While supplying polishing liquid to wafer 1 held on holding table 38 via polishing liquid supply path 52 , holding table 38 and polishing pad 50 are respectively rotated in the direction of the arrow shown in FIG. 4 . Then, the Z-axis moving mechanism is operated to bring the polishing pad 50 into contact with the back surface 1b of the wafer 1, and in this state, the polishing pad 50 is pressed toward the back surface 1b of the wafer 1 to perform polishing.

Next, the rotary table 34 is rotated to transport the holding table 38 to the wafer loading/unloading area A. As shown in FIG. Then, the wafer 1 is further polished by the second polishing unit 40a. In addition, the polishing by the second polishing unit 40 a is performed in the same manner as the polishing by the first polishing unit 40 . When the back surface 1b of the wafer 1 is further thinned by polishing by the first polishing unit 40 and the second polishing unit 40a, the grinding strain on the back surface 1b of the wafer 1 is removed.

Here, in any of the grinding performed by the rough grinding unit 12, the grinding performed by the finish grinding unit 16, the grinding performed by the first grinding unit 40, or the grinding performed by the second grinding unit 40a, , the bottom of the hole buried in the electrode column 3 is removed. Then, the electrode posts 3 are exposed on the rear surface 1 b side of the wafer 1 . However, the depths of the holes formed in the wafer 1 vary, and even when processing is performed under predetermined conditions, the plurality of electrode posts 3 may not all be exposed on the rear surface 1 b side of the wafer 1 .

If the electrode post 3 is not exposed on the back surface 1b side of the wafer 1, when a plurality of chips formed by dividing the wafer 1 are laminated to form a laminate, the electrode post 3 cannot be used to properly connect the chips. body cannot function properly. Therefore, it is necessary to expose all the electrode pillars 3 formed on the wafer 1 on the back surface 1 b of the wafer 1 .

Therefore, in the wafer processing method of the present embodiment, after the thinning step of exposing the electrode post 3 on the rear surface 1 b side is performed, the determination step is performed. In this determination step, the rear surface 1b of the wafer 1 is photographed to generate a captured image, and the presence or absence of electrode pillars 3 not exposed on the rear surface 1b is determined based on the captured image.

As mentioned above, the imaging unit 54 is attached to the rough grinding unit 12, the finish grinding unit 16, the 1st grinding unit 40, or the 2nd grinding unit 40a. The rear surface 1 b side of the processed wafer 1 is photographed by the photographing unit 54 to generate a photographed image. (A) of FIG. 5 is a side view illustrating imaging of the rear surface 1 b side of the wafer 1 using the imaging unit 54 . After the thinning step, the imaging step is carried out with the wafer 1 held on the holding stage 38 .

In the determination step, first, the strip-shaped casing of the imaging unit 54 is turned so that its long axis is parallel to the wafer 1 and positioned above the end of the wafer 1 . Then, the imaging unit 54 images the processed wafer 1 while moving in a direction perpendicular to the major axis of the housing (in the direction of the arrow shown in FIG. 5(A) ) in the horizontal plane to generate an imaged image. , and send the captured image to the controller (control unit) of the processing device 2 .

An example of a captured image captured by the imaging unit 54 is shown in FIG. 5(B) and FIG. 5(C). (B) of FIG. 5 is a photographed image 7 showing that a part of a plurality of electrode posts 3 formed on the wafer 1 is not exposed on the back surface 1b side of the wafer 1, and (C) of FIG. A captured image 9 of a case where the rear surface 1b side of the wafer 1 is exposed.

The captured image 9 shown in (C) of FIG. 5 is stored in advance in the standard image storage unit 60 of the controller (control unit) 56 of the processing apparatus 2 as a standard image showing a state where the thinning step is normally performed.

The judging section 58 of the controller (control section) 56 receiving the captured image from the imaging unit 54 is connected to the standard image storage section 60, and when receiving the captured image from the imaging unit 54, the image is read from the standard image storage section 60. Standard image shown in (C) of 5. Then, the captured image is compared with the standard image to determine whether or not all the electrode posts 3 are exposed on the back surface of the wafer 1 .

For example, this determination is carried out by comparing two images. When it is determined by this comparison that the two images match, the determination unit determines that there is no electrode post 3 not exposed on the rear surface 1 b side of the wafer 1 . On the other hand, when it is determined that the two images do not match, the determination unit determines that there are electrode posts 3 that are not exposed on the rear surface 1 b side of the wafer 1 . In addition, in the comparison of the two images, the two images may not completely match, for example, a positional shift is allowed within the error range of the formation position of each electrode column 3 .

When the judging unit 58 judges that there is no electrode post 3 not exposed on the rear surface 1 b side of the wafer 1 , the processing device 2 performs the subsequent step of the thinning step on the wafer 1 . In this way, even when the thinning step is normally performed without additional processing, since it can be quickly determined that additional processing is unnecessary in the wafer processing method of this embodiment, the processing method of this embodiment can Speed up the process.

When the determination unit 58 determines that there are electrode posts 3 not exposed on the rear surface 1 b side of the wafer 1 , additional processing is performed on the wafer 1 still held on the holding table 38 . The additional processing is performed to expose all the electrode posts 3 on the rear surface 1 b side of the wafer 1 . In this state, additional processing is performed using the processing unit used in the thinning step.

In the wafer processing method of the present embodiment, additional processing can be quickly performed on the wafer 1 without moving the holding table 38 or the wafer 1 when performing judgment or additional processing. Regarding the additional processing, the same processing as that performed in the thinning step is performed, for example, by shortening the processing time. After the additional processing is performed, the above-mentioned determination step is performed again, and the next step is performed after the determination that all the electrode posts 3 are exposed is obtained.

In the wafer processing method of this embodiment, the rear surface 1b of the wafer 1 is captured by the imaging unit 54 to generate a captured image, and the presence or absence of electrode posts 3 not exposed on the rear surface 1b is determined based on the captured image. Therefore, compared with the case where the wafer 1 is detached from the holding table 38 and the operator visually checks, the determination can be made quickly and reliably. In addition, since the determination can be made without moving the holding table 38, when additional processing is required, it is possible to perform additional processing on the wafer 1 at the original position.

In addition, this invention is not limited to description of said embodiment, Various changes are possible. For example, when additional processing is performed in response to the judgment of the determination unit 58 , the ratio of the electrode posts 3 exposed on the rear surface 1 b side among the plurality of electrode posts 3 may be derived in order to determine the degree of the additional processing to be performed. When considering the general distribution of the depths of the holes in which the electrode posts 3 are buried, the lower the ratio, the greater the distance from the bottom of the shallowest holes to the rear face 1b. Therefore, the content of the additional processing can be determined in consideration of the correlation between the ratio and the intensity of the additional processing required.

For example, the number of electrode posts 3 appearing in the standard image and the number of electrode posts 3 appearing in the captured image generated by the imaging unit are detected. Then, the ratio of the exposed electrode pillars 3 to the whole is derived. If the ratio of the exposed electrode posts 3 is relatively low, high-intensity additional processing may be performed in order to expose all the electrode posts 3 . On the other hand, when the ratio of the exposed electrode posts 3 is relatively high, it is only necessary to perform additional processing with low strength.

When the content of the additional processing can be determined using the captured image in this way, since the minimum additional processing required to expose the unexposed electrode post 3 can be performed, the time and money costs for the additional processing can be suppressed. lower.

Furthermore, in one aspect of the present invention, the judgment step and the reprocessing may be performed at a place different from the thinning step. For example, when finish grinding is performed as a thinning step, a determination step may be performed after grinding, and reprocessing may be performed starting from rough grinding.

In addition, the structure, method, etc. of the said embodiment can be changed suitably within the range which does not deviate from the objective of this invention.

Claims (2)

1. a kind of processing method of chip, the chip is formed with device on front, and embedment has multiple electrodes in the chip Column, the plurality of electrode column extend on the thickness direction of the chip, and from the front of the chip to defined depth location, it is special Sign is,

The processing method of the chip has the steps：

Step is kept, the face side of chip is kept using workbench is kept；

Thinning step, is processed this is wafer thinning to rule by the rear side of the chip kept to the holding workbench Fixed thickness；And

Determination step, after the thinning step is implemented, shoots the back side of chip and generates shooting image, according to this Shooting image is not exposed to the electrode column at the back side to determine whether,

In the case where being determined to have the electrode column at the back side for not being exposed to chip by the determination step, implementation make chip into The addition procedure of processing of one step thinning.

2. the processing method of chip according to claim 1, it is characterised in that

The determination step is implemented in the state of chip is maintained on the holding workbench,

The addition procedure of processing performs in the state of the chip is maintained on the holding workbench.