CN107911241A - A kind of signal simulation analysis system and method based on Gigabit Media stand-alone interface - Google Patents

Abstract

The invention provides a signal simulation analysis system and method based on a gigabit medium independent interface. In the server circuit board system, the signal integrity performance of the main board must be guaranteed. When the signal integrity of a certain board is not ideal, since the server is a whole system, other sub-cards can ensure the signal integrity, thereby ensuring the safety of the entire server operation. Greatly enhance the signal integrity and reliability of RACK whole cabinet server. By analyzing the PHY side signal and the MAC side signal at different frequencies through the signal simulation analysis system and method based on the gigabit medium independent interface, different simulation waveforms can be obtained, and then the specific loss of the signal can be obtained.

Description

A signal simulation analysis system and method based on gigabit medium independent interface

technical field

The invention relates to the server field, in particular to a signal simulation analysis system and method based on a gigabit medium independent interface.

Background technique

RGMII (Reduced Gigabit Media Independent Interface) is Reduced GMII (Gigabit Media Independent Interface). RGMII adopts 4-bit data interface, the working clock is 125MHz, and transmits data at the same time on the rising edge and falling edge, so the transmission rate can reach 1000Mbps.

At present, in the server circuit board system, the MAC side and the PHY side of RGMII cannot simulate and analyze the lack of PHY and MAC signals.

Contents of the invention

In order to overcome the deficiencies in the above-mentioned prior art, the present invention provides a signal simulation analysis system based on a gigabit medium independent interface, including: a PHY module, a clock driver and a MAC module;

The PHY module communicates with the MAC module through the clock driver;

The clock driver generates the simulation analysis system clock for the simulation analysis of the PHY module and the MAC module.

Preferably, a PHY-side Tx signal line and a PHY-side Rx signal line are provided between the PHY module and the clock driver;

The PHY module is connected to the clock driver through the Tx signal line on the PHY side, and transmits the Tx signal for simulation analysis;

The PHY module is connected to the clock driver through the Rx signal line on the PHY side, and transmits the Rx signal for simulation analysis.

Preferably, a MAC side Tx signal line and a MAC side Rx signal line are provided between the MAC module and the clock driver;

The MAC module is connected to the clock driver through the Tx signal line on the MAC side, and transmits the Tx signal for simulation analysis;

The MAC module is connected to the clock driver through the Rx signal line on the MAC side, and transmits the Rx signal for simulation analysis.

A signal simulation analysis method based on a gigabit medium independent interface, the method comprising:

Step 1, build PHY module, clock driver and MAC module for RGMII signal;

Step 2, perform topology setting for the link of RGMII, wherein the PHY module communicates with the MAC module through the clock driver;

Step 3, set various parameters through the preset simulation parameters;

Step 4 is to verify the influence of different frequencies on the signal transmission of the PHY module and the MAC module for the waveforms of the PHY and MAC obtained after adding a Rise at the Driver end.

Preferably, step 1 further includes: the clock driver generates a simulation analysis system clock for use by the simulation analysis of the PHY module and the MAC module.

Preferably, step 2 further includes: using SigXplorer software to extract the signal transmission of the PHY module, the clock driver and the MAC module.

Preferably, step three further includes: in the SigXplorer software, setting various parameters through preset simulation parameters, and setting various parameters includes: default cut-off frequency setting, and measurement period setting.

As can be seen from the above technical solutions, the present invention has the following advantages:

In a server board system, the signal integrity performance of the motherboard must be guaranteed. When the signal integrity of a certain board is not ideal, since the server is a whole system, other sub-cards can ensure the signal integrity, thereby ensuring the safety of the entire server operation. Greatly enhance the signal integrity and reliability of RACK whole cabinet server. By analyzing the PHY side signal and the MAC side signal at different frequencies through the signal simulation analysis system and method based on the gigabit medium independent interface, different simulation waveforms can be obtained, and then the specific loss of the signal can be obtained.

Description of drawings

In order to illustrate the technical solution of the present invention more clearly, the accompanying drawings that need to be used in the description will be briefly introduced below. Obviously, the accompanying drawings in the following description are only some embodiments of the present invention. As far as people are concerned, other drawings can also be obtained based on these drawings on the premise of not paying creative work.

Figure 1 is a schematic diagram of a signal simulation analysis system based on a gigabit medium-independent interface;

Fig. 2 is a flow chart of a signal simulation analysis method based on a gigabit medium independent interface;

Figure 3 is a simulation waveform diagram of the PHY side;

Figure 4 is a simulation waveform diagram of the MAC side.

Detailed ways

In order to make the purpose, features and advantages of the present invention more obvious and understandable, the technical solutions protected by the present invention will be clearly and completely described below using specific embodiments and accompanying drawings. Obviously, the implementation described below Examples are only some embodiments of the present invention, but not all embodiments. Based on the embodiments in this patent, all other embodiments obtained by persons of ordinary skill in the art without creative efforts fall within the protection scope of this patent.

This embodiment provides a signal simulation analysis system based on a gigabit medium independent interface, as shown in FIG. 1 , including: a PHY module 1, a clock driver 2 and a MAC module 3;

The PHY module 1 communicates with the MAC module 3 through the clock driver 2; the clock driver 2 generates a simulation analysis system clock for the simulation analysis of the PHY module 1 and the MAC module 2. A PHY side Tx signal line 11 and a PHY side Rx signal line 12 are provided between the PHY module 1 and the clock driver 2; the PHY module 1 is connected to the clock driver 2 through the PHY side Tx signal line 11, and transmits the Tx signal for simulation analysis; the PHY module 1 The Rx signal line 12 on the PHY side is connected to the clock driver 2 to transmit the Rx signal for simulation analysis. MAC side Tx signal line 13 and MAC side Rx signal line 14 are arranged between MAC module 3 and clock driver 2; MAC module 3 is connected with clock driver 2 through MAC side Tx signal line 13, transmits simulation analysis Tx signal; MAC module 3 The Rx signal line 14 on the MAC side is connected to the clock driver 2 to transmit the Rx signal for simulation analysis.

The present invention also provides a signal simulation analysis method based on a gigabit medium independent interface, as shown in Fig. 2, Fig. 3 and Fig. 4, the method includes:

S1, build PHY module, clock driver and MAC module for RGMII signal;

The clock driver generates the simulation analysis system clock for the simulation analysis of the PHY module and the MAC module.

S2, perform topology setting for the RGMII link, wherein the PHY module communicates with the MAC module through the clock driver;

Use SigXplorer software to extract the signal transmission of PHY module, clock driver and MAC module.

S3, setting various parameters through preset simulation parameters;

In the SigXplorer software, through the preset simulation parameters, set various parameters, including: default cut-off frequency setting, measurement cycle setting.

S4 is the waveform of the PHY and MAC obtained after adding a Rise at the Driver end, and the influence of different frequencies on the signal transmission of the PHY module and the MAC module is verified through the waveform.

Specifically, the PHY module supports a transmission rate of 10M/100M/1000Mb/s for information communication with the MAC module through a clock driver, and the corresponding clk signals are: 2.5MHz/25MHz/125MHz respectively. The RGMII data structure conforms to the IEEE Ethernet standard, and the interface definition can be found in IEEE 802.3-2000. The purpose of adopting RGMII is to reduce the cost of the circuit, so that the number of pins of the device implementing this interface is reduced from 25 to 14.

TXD[1:0]: Data transmission signal line, the data bit width is 2, which is half of the MII interface; RXD[1:0]: Data receiving signal line, the data bit width is 2, which is half of the MII interface; connect separately to the MAC side and the PHY side.

Use SigXplorer software to extract these two different routing methods and the links of the Tx and Rx signals, and the preset topology can be obtained. A receiving end and a sending end may be provided in the preset topology structure, which are responsible for sending and receiving high-speed signals. High-speed lines can be provided, and the main function is to transmit high-speed lines. Vias can be provided, and high-speed lines and miscellaneous lines can switch between different layers in the stack through the vias. Through the connection between high-speed lines of different layers and vias, the preset topology is finally realized.

In the SigXplorer software, through my own understanding of the simulation parameters, as shown in Figure 3, after setting various parameters, these parameters are Default Cutoff Frequency (default cutoff frequency) is set to 10GHz, and MeasurementCycle (measurement cycle) is set to 5 ^-8 (s), such a setting can easily see the waveform obtained by the final simulation after the simulation.

In the SigXplorer software, after setting various parameters, the waveforms shown in Figure 3 and Figure 4 are finally simulated.

For the waveforms shown in Figure 3 and Figure 4, for different clock frequencies, the simulated waveforms at the PHY side and the MAC side will have the same trend. As the frequency increases at the PHY side, the rise time decreases, while the overshoot basically remains the same. unchanged, while the MAC side also has the same trend.

The above description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the present invention will not be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (7)

1. A kind of 1. signal simulation analysis system based on Gigabit Media stand-alone interface, it is characterised in that including：PHY modules, when Clock driver and MAC module；

   PHY modules are communicated by clock driver and MAC module；

   Clock driver produces simulation analysis system clock, is used for PHY modules and MAC module simulation analysis.
2. 2. the signal simulation analysis system according to claim 1 based on Gigabit Media stand-alone interface, it is characterised in that

   PHY sides Tx signal wires and PHY sides Rx signal wires are equipped between PHY modules and clock driver；

   PHY modules are connected by PHY sides Tx signal wires with clock driver, Propagation Simulation analysis Tx signals；

   PHY modules are connected by PHY sides Rx signal wires with clock driver, Propagation Simulation analysis Rx signals.
3. 3. the signal simulation analysis system according to claim 1 or 2 based on Gigabit Media stand-alone interface, its feature exist In,

   MAC sides Tx signal wires and MAC sides Rx signal wires are equipped between MAC module and clock driver；

   MAC module is connected by MAC sides Tx signal wires with clock driver, Propagation Simulation analysis Tx signals；

   MAC module is connected by MAC sides Rx signal wires with clock driver, Propagation Simulation analysis Rx signals.
4. 4. a kind of signal simulation analysis method based on Gigabit Media stand-alone interface, it is characterised in that method includes：

   Step 1, PHY modules, clock driver and MAC module are built for RGMII signals；

   Step 2, the link for being RGMII carry out topological setting, and wherein PHY modules carry out letter by clock driver and MAC module Message communication；

   Step 3, by default simulation parameter, sets parameters；

   Step 4, is the waveform for adding the PHY obtained after a Rise and MAC at Driver ends, different frequency is verified by waveform Influence to the signal transmission of PHY modules and MAC module.
5. 5. the signal simulation analysis method according to claim 4 based on Gigabit Media stand-alone interface, it is characterised in that

   Step 1 further includes：Clock driver produces simulation analysis system clock, makes for PHY modules and MAC module simulation analysis With.
6. 6. the signal simulation analysis method according to claim 4 based on Gigabit Media stand-alone interface, it is characterised in that

   Step 2 further includes：Using SigXplorer softwares to PHY modules, the signal transmission of clock driver and MAC module into Row extraction.
7. 7. the signal simulation analysis method according to claim 4 based on Gigabit Media stand-alone interface, it is characterised in that

   Step 3 further includes：In SigXplorer softwares, by default simulation parameter, parameters are set, setting is every Parameter includes：Give tacit consent to cutoff frequency setting, measurement period setting.