CN107910299B - 阵列基板及其制作方法、显示面板和显示装置 - Google Patents
阵列基板及其制作方法、显示面板和显示装置 Download PDFInfo
- Publication number
- CN107910299B CN107910299B CN201711157110.9A CN201711157110A CN107910299B CN 107910299 B CN107910299 B CN 107910299B CN 201711157110 A CN201711157110 A CN 201711157110A CN 107910299 B CN107910299 B CN 107910299B
- Authority
- CN
- China
- Prior art keywords
- layer
- semiconductor
- etching
- conversion layer
- array substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 80
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 27
- 239000004065 semiconductor Substances 0.000 claims abstract description 129
- 238000005530 etching Methods 0.000 claims abstract description 76
- 238000000034 method Methods 0.000 claims abstract description 72
- 238000006243 chemical reaction Methods 0.000 claims abstract description 71
- 230000008569 process Effects 0.000 claims abstract description 54
- 238000000059 patterning Methods 0.000 claims abstract description 16
- 238000005260 corrosion Methods 0.000 claims description 32
- 239000007788 liquid Substances 0.000 claims description 28
- 230000000877 morphologic effect Effects 0.000 claims description 27
- 230000007797 corrosion Effects 0.000 claims description 14
- 229920002120 photoresistant polymer Polymers 0.000 claims description 14
- 229910052751 metal Inorganic materials 0.000 claims description 6
- 239000002184 metal Substances 0.000 claims description 6
- 230000006740 morphological transformation Effects 0.000 claims description 4
- 239000013078 crystal Substances 0.000 abstract description 11
- 238000005265 energy consumption Methods 0.000 abstract description 3
- 238000005516 engineering process Methods 0.000 abstract description 2
- 230000009466 transformation Effects 0.000 abstract 1
- 238000000151 deposition Methods 0.000 description 11
- 239000010408 film Substances 0.000 description 10
- 230000008021 deposition Effects 0.000 description 9
- 239000000463 material Substances 0.000 description 9
- 238000002425 crystallisation Methods 0.000 description 6
- 230000008025 crystallization Effects 0.000 description 6
- 238000010586 diagram Methods 0.000 description 6
- 238000002834 transmittance Methods 0.000 description 6
- 238000001704 evaporation Methods 0.000 description 4
- 230000008020 evaporation Effects 0.000 description 4
- 230000014759 maintenance of location Effects 0.000 description 4
- 238000004544 sputter deposition Methods 0.000 description 4
- 238000004140 cleaning Methods 0.000 description 3
- 238000005507 spraying Methods 0.000 description 3
- 238000001039 wet etching Methods 0.000 description 3
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 2
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000001755 magnetron sputter deposition Methods 0.000 description 2
- 238000002360 preparation method Methods 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- 230000009471 action Effects 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000005137 deposition process Methods 0.000 description 1
- 238000010894 electron beam technology Methods 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
- 229910052742 iron Inorganic materials 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 239000002086 nanomaterial Substances 0.000 description 1
- 239000002861 polymer material Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 239000011787 zinc oxide Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/01—Manufacture or treatment
- H10D86/021—Manufacture or treatment of multiple TFTs
- H10D86/0221—Manufacture or treatment of multiple TFTs comprising manufacture, treatment or patterning of TFT semiconductor bodies
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/004—Photosensitive materials
- G03F7/038—Macromolecular compounds which are rendered insoluble or differentially wettable
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/16—Coating processes; Apparatus therefor
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/20—Exposure; Apparatus therefor
- G03F7/2002—Exposure; Apparatus therefor with visible light or UV light, through an original having an opaque pattern on a transparent support, e.g. film printing, projection printing; by reflection of visible or UV light from an original such as a printed image
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/20—Exposure; Apparatus therefor
- G03F7/2037—Exposure with X-ray radiation or corpuscular radiation, through a mask with a pattern opaque to that radiation
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/26—Processing photosensitive materials; Apparatus therefor
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/26—Processing photosensitive materials; Apparatus therefor
- G03F7/42—Stripping or agents therefor
- G03F7/422—Stripping or agents therefor using liquids only
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
- H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
- H01L21/0274—Photolithographic processes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/34—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/18, H10D48/04 and H10D48/07, with or without impurities, e.g. doping materials
- H01L21/46—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428
- H01L21/461—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/674—Thin-film transistors [TFT] characterised by the active materials
- H10D30/6755—Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/01—Manufacture or treatment
- H10D86/021—Manufacture or treatment of multiple TFTs
- H10D86/0212—Manufacture or treatment of multiple TFTs comprising manufacture, treatment or coating of substrates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/01—Manufacture or treatment
- H10D86/021—Manufacture or treatment of multiple TFTs
- H10D86/0231—Manufacture or treatment of multiple TFTs using masks, e.g. half-tone masks
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
- H10D86/411—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs characterised by materials, geometry or structure of the substrates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
- H10D86/421—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer
- H10D86/423—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
- H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D99/00—Subject matter not provided for in other groups of this subclass
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Spectroscopy & Molecular Physics (AREA)
- Photosensitive Polymer And Photoresist Processing (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
- Electroluminescent Light Sources (AREA)
- Thin Film Transistor (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
- Liquid Crystal (AREA)
Abstract
本发明涉及显示技术领域,尤其涉及阵列基板及其制作方法、显示面板和显示装置。所述阵列基板的制作方法包括:在基底上的预设半导体去除区形成能够在图形化处理过程中被腐蚀液腐蚀的形态转化层;在所述基底上形成半导体层,以使所述半导体层覆盖所述形态转化层。本发明提供的方案在有效清除刻蚀过程中残留的半导体晶粒的同时,能够降低耗能成本及对设备的损伤。
Description
【技术领域】
本发明涉及显示技术领域,尤其涉及阵列基板及其制作方法、显示面板和显示装置。
【背景技术】
氧化铟锡(Indium Tin Oxide,简称透明氧化物半导体)薄膜是宽禁带半导体材料,具有高电导率和可见光范围的高透射率(在可见光范围内的平均穿透率可超过90%),被广泛应用到光电器件中。透明氧化物半导体薄膜的制备方法有很多,如喷涂、蒸发、射频溅射和磁控溅射等。随着显示技术的高精细化和大型化的发展,磁控溅射法备受欢迎。但过长的沉积时间会导致基板温度升高,进而导致透明氧化物半导体发生局部的结晶现象。透明氧化物半导体根据结晶的状况可以分为非晶透明氧化物半导体与多晶透明氧化物半导体,多晶透明氧化物半导体由于晶粒较大,形成的薄膜透过率和导电性能相应较高,但多晶透明氧化物半导体常使用氯化系的刻蚀液进行刻蚀,对设备的损伤大,并且在沉积过程中需要400多度的高温进行沉积,成膜设备耗能成本也大。
TFT工艺中的透明氧化物半导体图形化过程中,发生透明氧化物半导体局部结晶现象,残留的微小透明氧化物半导体晶粒很难在随后的透明氧化物半导体湿法刻蚀工艺中除去,进而导致像素内部的电路短路,引起面板出现亮点缺陷,大面积的透明氧化物半导体残留,会造成多个亮点连成一片,无法显示。
【发明内容】
本发明的目的旨在提供一种阵列基板及其制作方法、显示面板和显示装置,以使半导体去除区的形态转化层被腐蚀液腐蚀,进而连带形态转化层之上的半导体层脱离基底,从而解决半导体刻蚀过程中出现的半导体结晶残留的问题。
为实现该目的,本发明提供了一种阵列基板的制作方法,包括:在基底上的预设半导体去除区形成在图形化处理过程中能够被腐蚀液腐蚀的形态转化层;
在所述基底上形成半导体层,以使所述半导体层覆盖所述形态转化层。
具体地,在所述基底上形成半导体层的步骤之后,还包括:
对半导体层进行图形化曝光、腐蚀工艺。
具体地,在预设的半导体去除区形成能够在图形化处理过程中被腐蚀液腐蚀的形态转化层的步骤,包括:
在基底上形成形态转化层;
对该形态转化层上的非所述预设半导体去除区所对应的部分进行刻蚀处理,以使该形态转化层仅在所述预设半导体去除区所对应的区域保留。
具体地,所述对该形态转化层上的非所述预设半导体去除区所对应的部分进行刻蚀处理的过程,包括:
在预设半导体去除区对应的形态转化层上覆盖防刻蚀层。
具体地,在预设半导体去除区对应的形态转化层上覆盖防刻蚀层的步骤之后,还包括:去除所述防刻蚀层。
具体地,对半导体层进行图形化曝光、腐蚀工艺的步骤之前,还包括:在非所述预设半导体去除区所对应的半导体层上覆盖防腐蚀层。
优选地,所述形态转化层包括能与腐蚀液反应的金属或负性光刻胶。
优选地,所述腐蚀液包括:刻蚀液和/或剥离液。
具体地,对半导体层进行腐蚀工艺的过程,包括:
在非预设半导体去除区对应的半导体层上覆盖防腐蚀层;
将所述非预设半导体去除区覆盖有防腐蚀层的基板置于腐蚀液中,以使所述预设半导体去除区所对应区域的形态转化层被腐蚀液腐蚀。
相应地,本发明还提供了一种阵列基板,所述阵列基板由上述任一技术方案所述的阵列基板的制作方法制备而成。
相应地,本发明还提供了一种显示面板,其包括上述任一技术方案所述的阵列基板。
相应地,本发明还提供了一种显示装置,其包括上述任一技术方案所述的显示面板。
与现有技术相比,本发明具备如下优点:
本发明提供的阵列基板的制作方法,采用在半导体去除区形成易被腐蚀液腐蚀的形态转化层,该形态转化层在后续工序中被腐蚀液腐蚀而溶解于腐蚀液中,使得形态转化层之上的膜层失去支撑进而形成膜层断裂,实现易于清除的目的。在有效清除刻蚀过程中残留的半导体结晶的同时,对设备的损伤小,工艺简单,降低耗能成本。
本发明提供的腐蚀液优选为刻蚀液和/或剥离液,所述两种腐蚀液均为制作阵列基板的常用液体,无需另外制备新的腐蚀液,在传统制备阵列基板的工艺步骤中,也并未增添腐蚀步骤,简化清除刻蚀过程中残留的半导体结晶的工艺。
本发明提供的形态转化层,是根据腐蚀液的性质,将形态转化层的材料优选为与防刻蚀层相同的光刻胶或者易与刻蚀液反应的金属材料,并未引入新的材料来实现清除刻蚀过程中残留的半导体结晶的目的,从而避免引入污染源,保证阵列基板及显示器件的良率。
另外,本发明中的显示面板及显示装置皆是在所述阵列基板的基础上进行改进的,因此,所述显示面板及显示装置自然继承了所述阵列基板的全部优点。
本发明附加的方面和优点将在下面的描述中部分给出,这些将从下面的描述中变得明显,或通过本发明的实践了解到。
【附图说明】
图1为本发明提供的阵列基板的制作方法的流程示意图;
图2为图1中S100的细化步骤的流程示意图;
图3为本发明提供的在所述预设半导体去除区所对应的区域保留形态转化层的阵列基板的结构示意图;
图4为本发明提供的阵列基板的制作方法的另一种流程示意图;
图5为本发明提供的在所述半导体保留区覆盖有防刻蚀层的阵列基板的结构示意图;
图6为本发明提供的清除半导体去除区的半导体层之后的阵列基板的结构示意图。
【具体实施方式】
下面结合附图和示例性实施例对本发明作进一步地描述,其中附图中相同的标号全部指的是相同的部件。此外,如果已知技术的详细描述对于示出本发明的特征是不必要的,则将其省略。
本发明提供的一种阵列基板的制作方法,其流程示意图如图1所示,包括如下步骤:
S100,在基底上的预设半导体去除区形成能够在图形化处理过程中被腐蚀液腐蚀的形态转化层;
在TFT器件制作工艺中,氧化物半导体工艺顺序为:薄膜沉积—图形化曝光—刻蚀—剥离,最终形成所需的图形。发明人在实践过程中发现,氧化物半导体对温度比较敏感,温度较高时,氧化物半导体容易产生结晶问题,随着温度的升高,氧化物半导体的晶化程度加剧,而形成的晶化氧化物半导体不能被非晶氧化物半导体的刻蚀液所刻蚀,造成残留,引起显示面板出现亮点缺陷。
针对该问题,本发明引入形态转化层,所述形态转换层具有能够被腐蚀液腐蚀的特性,在后续进行的图形化处理过程中该形态转化层被腐蚀液腐蚀溶解,则该形态转化层上层的物质失去支撑,也将脱离基底,裸露出形态转化层所在区域的基底,所述形态转化层的存在能够轻易实现彻底清理形态转化层上层膜层物质、裸露基底的目的,避免了图形化之后的电路出现短路问题。
形成形态转化层的方法包括:蒸镀、溅射等方法,在预设形成半导体区域形成形态转化层。
图形化处理过程包括图形化曝光、腐蚀工艺,因此形态转化层能够在图形化处理过程中被腐蚀液腐蚀,溶解在腐蚀液中。
S110,在所述基底上形成半导体层,以使所述半导体层覆盖所述形态转化层。
由于透明氧化物半导体薄膜是宽禁带半导体材料,具有高电导率和可见光范围的高透射率,能够提高显示器件的光透过率及电阻性能参数,因此本实施方式所述的半导体层优选透明氧化物半导体层,如ITO、IZO等,但透明氧化物半导体层在沉积过程中沉积厚度超过一定的厚度时,过长的沉积时间会导致基板温度升高,进而导致ITO发生局部结晶现象,如ITO在沉积厚度超过时会出现ITO结晶的问题。
通过蒸镀、溅射、喷涂等方法在所述基底上形成半导体层,所述半导体层覆盖S100中形成的形态转化层。
由于所述形态转化层能够在图形化处理过程中被腐蚀液腐蚀,使其上层的半导体层失去下层支撑,从而实现预设半导体去除区的形态转化层连带其上层的半导体层及形成的晶粒脱离所述基底,解决了由于半导体层过厚或沉积温度过高导致的半导体结晶残留的问题,该种方式能够保证半导体层的沉积厚度及温度不受限制,有利于提高产品透过率及电阻等性能参数的提升。
在一种优选的实施方式中,S100包括S101及S102,其流程示意图如图2所示,具体包括:
S101,在基底上形成形态转化层;
在基底上沉积形态转化层,沉积方式如蒸镀、溅射、喷涂等,在基底上形成一层完整无间断的形态转化层,所述形态转化层的厚度视腐蚀工艺情况(如腐蚀时间、腐蚀液浓度、腐蚀液材料)而定,形态转化层具备被腐蚀液腐蚀的特性。
S102,对该形态转化层上的非预设半导体去除区进行刻蚀处理,以使该形态转化层仅在所述预设半导体去除区所对应的区域保留。
其中,对形态转化层上的非预设区域进行刻蚀处理的步骤包括:
首先,在预设半导体去除区对应的形态转化层上覆盖防刻蚀层;然后,对上述形态转化层上覆盖有防刻蚀层的基板进行曝光处理,形态转化层仅在所述预设半导体去除区所对应的区域保留。
该步骤完成之后,阵列基板的结构示意图如图3所示,此时阵列基板包括基底10,半导体去除区的形态转化层20。
在本实施方式中,所述防刻蚀层优选光刻胶,光刻胶是一种具有光敏化学作用的高分子聚合物材料,能够保护衬底表面。在进行曝光步骤之前,首先在形态转化层表面涂覆一层防刻蚀层,在涂覆防刻蚀层时需要注意防刻蚀层的厚度及均匀。经过紫外光或电子束照射后,光刻胶材料本身的特性发生改变,曝光后的负性光刻胶或未曝光的正性光刻胶会留在衬底表面,这样就将设计的微纳结构转移到了光刻胶上,后续进行刻蚀等工艺,就可将该图案转移到光刻胶下面的衬底上。
控制合理的曝光时长及光照强度之后,基底上形成由防刻蚀层所在区域组成的掩膜图形,即形态转化层仅在所述预设半导体去除区所对应的区域保留。
为表述方便,将非预设半导体去除区称为半导体保留区。
经过预设曝光时长后,半导体保留区的形态转化层被刻蚀掉,预设半导体去除区的形态转化层被保留,但预设半导体去除区的防腐蚀层仍存在,则需要去除所述防腐蚀层,如利用除胶剂将防腐蚀层去除,实现所述预设半导体去除区仅存在形态转化层。
结合防腐蚀层的涂覆厚度及曝光时长,控制刻蚀过程中防腐蚀层下层薄膜的均匀完整。
在一种优选实施方式中,所述阵列基板的制作方法还包括S120及S130,其流程示意图如图4所示:
S120,对所述半导体层进行图形化曝光;
在对半导体层进行图形化曝光之前,为了保留半导体保留区的半导体层,需要在曝光之前,在所述非预设半导体去除区对应的半导体层上覆盖防腐蚀层,即在所述半导体保留区覆盖防腐蚀层,所述防腐蚀层优选光刻胶。此时阵列基板的结构示意图如图5所示,此时的阵列基板包括:基底10,半导体去除区的形态转化层20,半导体层30,半导体层保留区上层的防腐蚀层50。将所述非预设半导体去除区覆盖有防腐蚀层的基板置于腐蚀液中,以便所述预设半导体去除区所对应区域的形态转化层被腐蚀液腐蚀。
S130,对所述半导体层进行腐蚀工艺。
其中,所述腐蚀工艺包括刻蚀、剥离工艺。在所述阵列基板的制作方法中,进行刻蚀、剥离工艺是常规的制备工序,本实施方式中刻蚀优选为湿法刻蚀,刻蚀工艺中需要刻蚀液,剥离工艺中需要剥离液,则本发明所述的腐蚀液优选刻蚀液或者剥离液。
针对腐蚀液的选择,为了节省工艺程序,降低成本,所述形态转化层优选为能与刻蚀液反应的金属,如铝、铁等,或者能被剥离液腐蚀的负性光刻胶,或者铟镓锌氧化物(IGZO)。
所述形态转化层被腐蚀液腐蚀的过程如下:
当形态转化层的材料为负性光刻胶时,由于形态转化层在剥离过程中能够被剥离液腐蚀,溶解在腐蚀液中,覆盖于形态转化层之上的半导体层没有下层薄膜的支撑而自动脱落。
当形态转化层的材料为金属时,由于金属在刻蚀过程中与刻蚀液发生反应,溶解在刻蚀液中,覆盖于形态转化层之上的半导体层没有下层支撑而自动脱落。
本发明提供的腐蚀液优选为刻蚀液和/或剥离液,所述两种腐蚀液均为制作阵列基板的常用液体,也是湿法刻蚀中必然要用到的液体,无需另外制备新的腐蚀液,在传统的阵列基板的制作步骤中,也并未添加新的腐蚀步骤,简化清除刻蚀过程中残留的半导体结晶的工艺。
而且,本发明针对腐蚀液的选择,将形态转化层的材料优选为与防腐蚀层相同的负性光刻胶或者易与刻蚀液反应的金属,并未引入新的材料来实现清除刻蚀过程中残留的半导体结晶的目的,从而避免引入污染源,保证阵列基板及显示器件的良率。
经过上述步骤的阵列基板经过去除覆盖于半导体保留区的防腐蚀层及清洗工序之后,此时阵列基板的结构示意图如图6所示,此时阵列基板的结构包括:基底10,半导体层保留区的半导体层30。半导体去除区不存在半导体层或其残留,仅在半导体预留区存在所述半导体层。
相应地,本发明还提供了一种阵列基板,所述阵列基板由上述技术方案任一项所述的阵列基板的制作方法制备而成;同时,本还发明还提供了一种显示面板,该显示面板包括前述任一技术方案所述的阵列基板;另外,本发明还提供了一种显示装置,该显示装置包括前述任一技术方案所述的显示面板,该显示装置可以为电子纸、OLED面板、手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
由于所述显示面板和显示装置皆是在所述阵列基板的基础上进行改进的,因此,所述显示面板及显示装置自然继承了所述阵列基板的全部优点。
综上,本发明采用在半导体去除区形成易被腐蚀的形态转化层,该形态转化层在后续工序中被腐蚀液腐蚀而溶解在腐蚀液中,使得形态转化层之上的膜层失去支撑进而形成膜层断裂,实现有效清除刻蚀过程中残留的半导体结晶的同时,工艺简单,减低对设备的损伤,降低制作成本。
虽然上面已经示出了本发明的一些示例性实施例,但是本领域的技术人员将理解,在不脱离本发明的原理或精神的情况下,可以对这些示例性实施例做出改变,本发明的范围由权利要求及其等同物限定。
Claims (7)
1.一种阵列基板的制作方法,其特征在于,包括:
在基底上的预设半导体去除区形成能够在图形化处理过程中被腐蚀液腐蚀的形态转化层;
在所述基底上形成半导体层,以使所述半导体层覆盖所述形态转化层;
对半导体层进行图形化曝光、腐蚀工艺,所述腐蚀工艺包括刻蚀、剥离工艺,所述腐蚀液包括刻蚀液和/或剥离液。
2.根据权利要求1所述的阵列基板的制作方法,其特征在于,在预设的半导体去除区形成能够在图形化处理过程中被腐蚀液腐蚀的形态转化层的步骤,包括:
在基底上形成形态转化层;
对该形态转化层上的非所述预设半导体去除区所对应的部分进行刻蚀处理,以使该形态转化层仅在所述预设半导体去除区所对应的区域保留。
3.根据权利要求2所述的阵列基板的制作方法,其特征在于,所述对该形态转化层上的非所述预设半导体去除区所对应的部分进行刻蚀处理的过程,包括:
在预设半导体去除区对应的形态转化层上覆盖防刻蚀层。
4.根据权利要求3所述的制作方法,其特征在于,在预设半导体去除区对应的形态转化层上覆盖防刻蚀层的步骤之后,还包括:去除所述防刻蚀层。
5.根据权利要求1所述的阵列基板的制作方法,其特征在于,对半导体层进行图形化曝光、腐蚀工艺的步骤之前,还包括:
在非所述预设半导体去除区所对应的半导体层上覆盖防腐蚀层。
6.根据权利要求1或2所述的阵列基板的制作方法,其特征在于,所述形态转化层包括能与腐蚀液反应的金属或负性光刻胶。
7.根据权利要求1所述的阵列基板的制作方法,其特征在于,对半导体层进行腐蚀工艺的过程,包括:
在非预设半导体去除区对应的半导体层上覆盖防腐蚀层;
将所述非预设半导体去除区覆盖有防腐蚀层的基板置于腐蚀液中,以使所述预设半导体去除区所对应区域的形态转化层被腐蚀液腐蚀。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201711157110.9A CN107910299B (zh) | 2017-11-20 | 2017-11-20 | 阵列基板及其制作方法、显示面板和显示装置 |
US16/030,825 US10615192B2 (en) | 2017-11-20 | 2018-07-09 | Array substrate assembly, method of manufacturing array substrate assembly, display panel and display apparatus |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201711157110.9A CN107910299B (zh) | 2017-11-20 | 2017-11-20 | 阵列基板及其制作方法、显示面板和显示装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN107910299A CN107910299A (zh) | 2018-04-13 |
CN107910299B true CN107910299B (zh) | 2020-05-12 |
Family
ID=61846332
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201711157110.9A Active CN107910299B (zh) | 2017-11-20 | 2017-11-20 | 阵列基板及其制作方法、显示面板和显示装置 |
Country Status (2)
Country | Link |
---|---|
US (1) | US10615192B2 (zh) |
CN (1) | CN107910299B (zh) |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101135865A (zh) * | 2006-08-29 | 2008-03-05 | 中国科学院声学研究所 | 一种图形化锆钛酸铅铁电薄膜的剥离制备方法 |
CN101136327A (zh) * | 2006-08-29 | 2008-03-05 | 中国科学院声学研究所 | 一种图形化铂/钛金属薄膜的剥离制备方法 |
CN102800576A (zh) * | 2011-05-26 | 2012-11-28 | 中芯国际集成电路制造(上海)有限公司 | 图形化膜层的方法、形成栅极、mos晶体管的方法 |
CN103560083A (zh) * | 2013-11-18 | 2014-02-05 | 电子科技大学 | 一种用于非制冷红外焦平面探测器电极图形化的剥离工艺 |
CN105514031A (zh) * | 2016-01-27 | 2016-04-20 | 上海集成电路研发中心有限公司 | 一种后道互连空气隙的制备方法 |
CN106575607A (zh) * | 2014-08-14 | 2017-04-19 | 光州科学技术院 | 正交图案化方法 |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20040087162A1 (en) * | 2002-10-17 | 2004-05-06 | Nantero, Inc. | Metal sacrificial layer |
US20140313443A1 (en) * | 2013-04-22 | 2014-10-23 | Shenzhen China Star Optoelectronics Technology Co., Ltd. | Display panel, transistor, and the manufacturing method thereof |
KR102723396B1 (ko) * | 2016-11-04 | 2024-10-31 | 삼성디스플레이 주식회사 | 박막 트랜지스터, 그의 제조 방법, 및 이를 포함하는 표시 장치 |
-
2017
- 2017-11-20 CN CN201711157110.9A patent/CN107910299B/zh active Active
-
2018
- 2018-07-09 US US16/030,825 patent/US10615192B2/en active Active
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101135865A (zh) * | 2006-08-29 | 2008-03-05 | 中国科学院声学研究所 | 一种图形化锆钛酸铅铁电薄膜的剥离制备方法 |
CN101136327A (zh) * | 2006-08-29 | 2008-03-05 | 中国科学院声学研究所 | 一种图形化铂/钛金属薄膜的剥离制备方法 |
CN102800576A (zh) * | 2011-05-26 | 2012-11-28 | 中芯国际集成电路制造(上海)有限公司 | 图形化膜层的方法、形成栅极、mos晶体管的方法 |
CN103560083A (zh) * | 2013-11-18 | 2014-02-05 | 电子科技大学 | 一种用于非制冷红外焦平面探测器电极图形化的剥离工艺 |
CN106575607A (zh) * | 2014-08-14 | 2017-04-19 | 光州科学技术院 | 正交图案化方法 |
CN105514031A (zh) * | 2016-01-27 | 2016-04-20 | 上海集成电路研发中心有限公司 | 一种后道互连空气隙的制备方法 |
Also Published As
Publication number | Publication date |
---|---|
US20190157308A1 (en) | 2019-05-23 |
CN107910299A (zh) | 2018-04-13 |
US10615192B2 (en) | 2020-04-07 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN103295970B (zh) | 阵列基板、其制造方法及显示装置 | |
CN103928406B (zh) | 阵列基板的制备方法、阵列基板、显示装置 | |
US9627414B2 (en) | Metallic oxide thin film transistor, array substrate and their manufacturing methods, display device | |
WO2015096394A1 (zh) | 薄膜晶体管的制备方法、阵列基板的制备方法及阵列基板 | |
CN102646632A (zh) | 阵列基板及其制作方法和显示装置 | |
CN103972075A (zh) | 一种刻蚀方法和阵列基板 | |
CN105914183A (zh) | Tft基板的制造方法 | |
CN102881598B (zh) | 薄膜晶体管的制造方法、阵列基板的制造方法及显示装置 | |
CN103700670B (zh) | 阵列基板及其制作方法、显示装置 | |
US8017460B2 (en) | Method of manufacturing flat panel display | |
CN106847757B (zh) | 一种显示基板及其制作方法、显示装置 | |
US10141423B2 (en) | Thin film transistor and fabrication method thereof, array substrate and fabrication method thereof, display apparatus | |
CN103489828A (zh) | 薄膜晶体管阵列基板的制造方法 | |
US10921662B2 (en) | Manufacturing method of array substrate, array substrate, display panel and display device | |
WO2016192364A1 (zh) | 狭缝电极的制造方法、狭缝电极及显示面板 | |
CN107910299B (zh) | 阵列基板及其制作方法、显示面板和显示装置 | |
WO2014126041A1 (ja) | 薄膜の転写方法、薄膜トランジスタの製造方法、液晶表示装置の画素電極形成方法 | |
CN104112711B (zh) | 共平面型氧化物半导体tft基板的制作方法 | |
CN105280552A (zh) | 一种阵列基板的制备方法、阵列基板和显示装置 | |
CN106601668B (zh) | 平板显示设备、薄膜晶体管基板及其制作方法 | |
CN106129062B (zh) | 绝缘层的制造方法、阵列基板的制造方法及阵列基板 | |
WO2015143746A1 (zh) | 一种tft阵列基板的制造方法 | |
CN105702584B (zh) | 薄膜晶体管及阵列基板的制作方法、阵列基板、显示装置 | |
CN115547927A (zh) | 阵列基板的制备方法、阵列基板及显示面板 | |
US20040131976A1 (en) | Method of forming a thin film transistor liquid crystal display |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |