CN107845630A - GaN base single-chip integration formula half-bridge circuit - Google Patents

Abstract

The invention belongs to semiconductor devices and technical field of integrated circuits, particularly relates to a kind of GaN base single-chip integration formula half-bridge circuit.Unlike the half-bridge circuit being made up of discrete device of routine, two enhanced GaN HEMT and GaN base diode are integrated in same chip module by the present invention, this is easy to reduce stray inductance, increases switching tube switching speed, so as to reduce switching tube switching power loss.Meanwhile diode is controlled in the down tube both ends reverse parallel connection field of half-bridge circuit, this can reduce the stray inductance between diode electrode and lower pipe electrode, make that the quick change of current can be realized between diode and down tube raceway groove.Simultaneously as the forward conduction voltage drop of field control diode is relatively low, dead time conduction voltage drop can be greatly lowered, improve the efficiency of system.Further, since field control diode preparation technology and enhanced GaN HEMT are completely compatible, the complexity of preparation technology is greatly reduced.The type half-bridge circuit module is applied to Buck, Boost and Buck Boost circuit etc..

Description

GaN-based monolithic integrated half-bridge circuit

technical field

The invention belongs to the technical field of semiconductor devices and integrated circuits, and in particular relates to a GaN-based monolithic integrated half-bridge circuit.

Background technique

Gallium Nitride (GaN) is a representative of the third-generation wide-bandgap semiconductor material, and is attracting extensive attention from researchers from all over the world. GaN has the characteristics of large band gap, high saturated electron drift velocity, small dielectric constant and good chemical stability. Therefore, compared with Si-based devices, GaN-based HEMT devices have lower on-resistance and smaller parasitic Capacitance, high breakdown voltage and other excellent properties can meet the application requirements of the next generation system for semiconductor devices with higher power, smaller size and higher frequency.

However, as the operating frequency of the system increases, the parasitic phenomena that were originally ignored in the circuit become more prominent. At this time, the impact of parasitic effects on the system needs to be paid enough attention. In order to deal with this problem, system design puts forward higher requirements on device design, device packaging, and PCB board layout.

Therefore, for the overall system design, in order to achieve higher performance under high-frequency working conditions, it can be optimized from three aspects: at the device design level, by optimizing the device structure, the device can achieve higher performance under the same application conditions. Higher performance; at the device packaging level, as the operating frequency of the system increases, the system is more sensitive to parasitic effects, and it is no longer possible to use a package similar to silicon-based devices, and needs to use a package with lower parasitic inductance; PCB board At the layout level, a more compact layout structure is required to reduce parasitic effects. To sum up, reducing various parasitic effects and rationally designing devices is one of the problems that researchers need to focus on.

For example, the document Richard Reiner "Integrated Reverse-Diode for GaN-HEMTStructures" reported that a device structure was designed. The device has Schottky diodes connected in reverse parallel at both ends of the source and drain, which can avoid the parasitic inductance caused by parallel diodes through external circuits. , and at the same time, the reverse conduction power consumption of the GaN HEMT device can be reduced. The document "A Multiloop Method for Minimization of Parasitic Inductance in GaN-Based High-Frequency DC–DC Converter" by Kangping Wang reported several new PCB board layout schemes, which reduced the parasitic inductance of the loop to a certain extent and improved the system efficiency . Document Zhengyang Liu "Evaluation of High-Voltage Cascode GaN HEMT in Different Packages" evaluates the influence of different device packages on device switching characteristics. The literature Takehiko Nomura "Discrete and Half BridgeModule using GaN HFETs for High Temperature Applications more than 200℃" reported a GaN half-bridge circuit, but the half-bridge circuit is packaged as a half-bridge circuit module with the prepared GaN device, and the reverse The diodes connected in parallel are SiC Schottky diodes, which are not real GaN-based integrated half-bridge circuit chip modules.

Although researchers have optimized and improved GaN device-based systems from multiple angles in recent years to improve the overall performance of the system, these improvements are all based on circuits composed of discrete devices. Since discrete devices must be connected through external circuits to achieve specific functions, it is impossible to further optimize parasitic effects. With the gradual development of GaN process technology, GaN-based power devices are the core components of switching power supply circuits. In order to reduce the parasitic effects caused by the interconnection between devices, it can be improved by designing GaN-based devices into GaN-based monolithic integrated chips. above question.

Contents of the invention

The present invention aims at the problem that the parasitic inductance of the above discrete devices is large when the circuit is assembled through the PCB board, and the external anti-parallel diode cannot effectively reduce the conduction power consumption of the dead time, and proposes a new type of GaN-based monolithic integrated half bridge. circuit chip. The chip structure of the GaN-based monolithic integrated half-bridge circuit proposed by the present invention is not only suitable for DC conversion topologies such as Buck, Boost and Buck-Boost, but also suitable for full-bridge circuits in the field of switching power conversion, etc., after proper adjustment of the chip structure.

The technical solution of the present invention is: a GaN-based monolithic integrated half-bridge circuit, including a first GaN HEMT device, a second GaN HEMT device and a diode, and the first GaN HEMT device is an enhancement device; it is characterized in that the The first GaN HEMT device, the second GaN HEMT device and the diode are integrated on the same GaN base; its structure is:

The cross-sectional view of the device is set to be a plane formed by the transverse direction and the vertical direction, the top view of the device is a plane formed by the transverse direction and the longitudinal direction, and the described transverse direction, the vertical direction and the longitudinal direction are three-dimensional directions perpendicular to each other; then Along the vertical direction, from bottom to top include:

a substrate, a GaN layer, and an active region on the GaN layer;

In the lateral direction, from one end of the device to the other, in order include:

The cathode of the diode, the anode of the diode, the source of the first GaN HEMT device, the drain of the first GaN HEMT device, the source of the second GaN HEMT device, and the drain of the second GaN HEMT device; wherein, the first An AlGaN layer is provided between the source of a GaN HEMT device and the drain of the first GaN HEMT device, a GaN-based upper layer below the AlGaN layer forms a two-dimensional electron gas channel, and a gate of the first GaN HEMT device is provided on the AlGaN layer; There is an AlGaN layer between the source of the second GaN HEMT device and the drain of the second GaN HEMT device, the GaN-based upper layer below the AlGaN layer forms a two-dimensional electron gas channel, and the second GaN HEMT device is on the AlGaN layer the gate of the first GaN HEMT device; and there is a space between the drain of the first GaN HEMT device and the source of the second GaN HEMT device;

Wherein, the source of the first GaN HEMT device, the drain of the second GaN HEMT device are electrically connected to the cathode of the diode, and the source of the second GaN HEMT device is electrically connected to the anode of the diode.

The general technical scheme of the present invention is different from the half-bridge circuit assembled by discrete devices:

In the present invention, the antiparallel diode and the switch tube are integrated into the same chip, which can reduce the electrode gap between the diode and the lower tube (for ease of description, the first GaN HEMT is called the upper tube, and the second GaN HEMT is called the lower tube). The parasitic inductance enables fast commutation between the diode and the channel of the lower tube. Similarly, since the integrated diode is a field-controlled diode, the forward conduction voltage drop is low, which can greatly reduce the conduction voltage drop during dead time and improve the efficiency of the system.

The working principle of the present invention is: because this type monolithic integrated half-bridge circuit chip can be applied in various topological structures, now take the Buck converter as an example (as shown in Figure 5) to illustrate the monolithic half-bridge circuit chip working principle. Figure 4 is a timing diagram of the gate drive signals of the upper and lower transistors of the switching tube. flow; in the t1-t2 stage, as shown in Figure 6, the gate drive signals of the upper and lower transistors of the switching transistor are both 0, and the channels of the two switching transistors are in the off state. For a circuit composed of discrete devices, due to the large parasitic inductance, a large di/dt will be formed during the commutation phase t1-t2 of the upper tube and the lower tube, thereby forming a larger induced voltage and blocking the current from flowing through the external Anti-parallel diodes, but can not make the diode play a role, the schematic diagram of the circuit shown in Figure 8. For this monolithic integrated half-bridge circuit, since the parasitic inductance between the diode and the switch tube is negligible (as shown in Figure 6), the current can pass through the reverse-parallel diode of the lower tube during the t1-t2 commutation phase Realize turn-on freewheeling, so that the reverse parallel diode can function. Moreover, due to the adjustable conduction voltage drop of the antiparallel FER diode, a lower forward conduction voltage can be achieved, which is lower than the forward conduction voltage drop of the conventional GaN-based Schottky diode, so that the conduction work of the dead time can be greatly reduced. consumption. In addition, the higher the operating frequency of the system, the more obvious the improvement of system efficiency by this type of anti-parallel diode. In the t2-t3 stage, as shown in FIG. 7 , the gate drive signal of the lower transistor is greater than the threshold voltage, the channel of the lower transistor is turned on, and the current flows from the antiparallel diode to the secondary diode. In the t3-t4 stage, as shown in Figure 6, the lower tubes of the switch tubes are all in the off state, and the current flows from the lower tube channel to the anti-parallel diode. The working state of this stage is similar to the t1-t2 state.

The beneficial effects of the present invention are: the GaN-based monolithic integrated half-bridge circuit chip well reduces the parasitic inductance generated by the interconnection between devices, and is suitable for applications with high power density, low voltage, high current, and high frequency. It can effectively increase the switching speed of the device, reduce the switching power consumption of the switching tube, and reduce the power consumption of the dead time, so as to give full play to the excellent performance of the GaN power device; at the same time, it is fully compatible with the conventional GaN-based HEMT enhanced device manufacturing process, without additional The process conditions can greatly reduce the complexity of process preparation brought about by chip integration.

Description of drawings

FIG. 1 is a schematic top view of a GaN-based monolithic integrated half-bridge circuit chip of the present invention.

Fig. 2 is a schematic cross-sectional view of a GaN-based monolithic integrated half-bridge circuit of the present invention.

FIG. 3 is a schematic diagram of the circuit structure of the GaN-based monolithic integrated half-bridge circuit of the present invention.

FIG. 4 is a timing diagram of the gate drive signal of the half-bridge circuit switching tube.

Figure 5 shows that the pipe channel on the Buck circuit is turned on.

Figure 6 is a Buck circuit anti-parallel diode conduction.

Figure 7 shows that the lower channel of the Buck circuit is turned on.

Figure 8 is the Buck circuit externally connected anti-parallel diode equivalent circuit.

Fig. 9 is a schematic diagram of the p-GaN enhancement mode GaN HEMT device structure.

Fig. 10 is a schematic diagram of the p-GaN type field control diode structure.

Fig. 11 Schematic diagram of the device structure of the groove gate enhanced GaN HEMT.

Fig. 12 Schematic diagram of the structure of a groove gate field-controlled diode.

Fig. 13F is a schematic diagram of the ion implantation enhanced GaN HEMT device structure.

FIG. 14F is a schematic diagram of the structure of an ion-implanted field-controlled diode.

Figure 15. Monolithic integrated half-bridge circuit chip structure in which diodes are connected in antiparallel to both ends of the source and drain of the upper tube.

Figure 16: Monolithic integrated half-bridge circuit chip structure in which diodes are connected in antiparallel to the source and drain of the upper tube and the lower tube.

Figure 17 is a schematic diagram of the Boost converter.

Figure 18 is a schematic diagram of the Buck-Boost converter.

Detailed ways

The technical solutions of the present invention will be described in detail below in conjunction with the accompanying drawings and examples.

The GaN-based monolithic integrated half-bridge circuit chip is composed of a GaN HEMT device and a GaN-based diode. The GaN HEMT device is an enhancement device. In its preparation process, the enhancement technology for GaN-based HEMT devices mainly includes P-GaN enhancement type technology, groove gate enhanced technology, and F ion implantation enhanced technology. The specific device structures are shown in Figures 9, 11 and 13. The anti-parallel diode is a field control diode, which can be regarded as connecting the gate and drain of the GaN-based enhanced HEMT device as the anode of the diode, and using the source of the GaN-based enhanced HEMT device as the cathode of the diode, and then by adjusting The threshold voltage of the device is used to prepare a field-controlled diode with a low conduction voltage drop, and the device structure of the corresponding field-controlled diode is shown in the accompanying drawings (Figures 10, 12, and 14).

Example 1

Wherein, the source of the first GaN HEMT device, the drain of the second GaN HEMT device are electrically connected to the cathode of the diode, and the source of the second GaN HEMT device is electrically connected to the anode of the diode. The chip structure of the monolithic integrated half-bridge circuit is shown in FIG. 3 , and is applicable to Buck (as shown in FIG. 5 ) and Buck-Boost topological circuits (as shown in FIG. 18 ).

Example 2

Wherein, the source of the first GaN HEMT device and the drain of the second GaN HEMT device are electrically connected to the anode of the diode, and the drain of the second GaN HEMT device is electrically connected to the cathode of the diode. The chip structure of the monolithic integrated half-bridge circuit is shown in FIG. 15 , which is suitable for Boost topology circuits, and its Boost circuit structure is shown in FIG. 17 .

Example 3

Wherein, the source of the first GaN HEMT device, the drain of the second GaN HEMT device are electrically connected to the anode of the first diode, and the drain of the second GaN HEMT device is electrically connected to the cathode of the first diode. The source of the GaN HEMT device, the drain of the second GaN HEMT device are electrically connected to the cathode of the second diode, and the source of the second GaN HEMT device is electrically connected to the anode of the second diode. The chip structure of the monolithic integrated half-bridge circuit is shown in FIG. 16 , which is applicable to other topological circuits.

Claims (1)

1.GaN base single-chip integration formula half-bridge circuits, including the first GaN HEMT devices, the 2nd GaN HEMT devices and diode, The first GaN HEMT devices are enhancement device；Characterized in that, the first described GaN HEMT devices, the 2nd GaN HEMT device and diode are integrated in same GaN base；Its structure is：

The profile of device is set as the plane that is made up of horizontal direction and vertical direction, then vertically, from bottom to up according to It is secondary including：

Substrate, GaN layer, the active area in GaN layer；

In transverse direction, include successively from device one end to the other end：

The negative electrode of diode, the anode of diode, the source electrode of the first GaN HEMT devices, the 2nd GaN HEMT devices source electrode, Drain electrode, the drain electrode of the first GaN HEMT devices of 2nd GaN HEMT devices；Wherein, the source of the first described GaN HEMT devices There is AlGaN layer, the GaN base upper strata below AlGaN layer forms Two-dimensional electron between the drain electrode of pole and the first GaN HEMT devices Gas channel, there is the grid of the first GaN HEMT devices in AlGaN layer；The source electrode and second of the 2nd described GaN HEMT devices There is AlGaN layer between the drain electrode of GaN HEMT devices, the GaN base upper strata below AlGaN layer forms Two-dimensional electron gas channel, There is the grid of the 2nd GaN HEMT devices in AlGaN layer；And drain electrode and the first GaN HEMT of the 2nd GaN HEMT devices There is spacing between the source electrode of device；

Wherein, the negative electrode electrical connection of the source electrode of the first GaN HEMT devices, the drain electrode of the 2nd GaN HEMT devices and diode, The source electrode of 2nd GaN HEMT devices and the anode electrical of diode connect.