CN107742978B - Charge pump circuit with enhancing driving capability - Google Patents

Abstract

The application provides a charge pump including a charge pump main module, the charge pump main module includes X first-stage charge pump units, where X is a positive integer greater than 1; a clock module is used to output a clock sequence to adjust the first The coupling relationship between the first-stage charge pump units and the coupling relationship inside the first-stage charge pump unit; the magnification selection module controls the clock module to output a corresponding clock sequence according to the required output magnification; the charge pump main The module reorganizes the X first-stage charge pump units into Y second-stage charge pump units according to the received clock sequence, Y is a positive integer greater than or equal to 1 but less than or equal to X, wherein for each integer or integer One-half of the ratio, the Y second-stage charge pump units have the same equivalent capacitance value, or the difference in the number of first-stage charge pump units contained in each of the second-stage charge pump units is less than or equal to 1 . The present application also provides a method for adjusting voltage using a charge pump.

Description

Charge pump circuit with enhanced drive capability

technical field

The application relates to the field of integrated circuits, in particular to a full rate charge pump with high output driving capability.

Background technique

The charge pump structure is widely used in the power management system design of display screens or handheld devices. A charge pump, also known as a switched capacitor voltage converter, is a type of DC converter that uses capacitors instead of inductors or transformers to store energy. The input voltage can be raised or lowered by a charge pump, and can even be used to generate negative voltages. The charge pump structure uses a switch array to control the charging and discharging of capacitors in a certain way, so that the input voltage is multiplied or subtracted by a certain factor, so as to obtain the required output voltage. Since the (capacitive) charge pump does not include an inductor, electromagnetic interference caused by the inductor can be avoided.

Regardless of the application, the user hopes that the multiple of the charge pump output voltage can be varied within a relatively wide range, which can effectively improve power efficiency and ripple performance. When the input voltage of the charge pump is small, the high rate operation mode can be selected, otherwise the low rate operation mode can be used. In particular, the on-chip power module is very popular among users due to its high level of integration. The on-chip power module is generally designed with an on-chip Dickson charge pump, mainly due to its small chip area and small loss caused by parasitic capacitance.

Taking the traditional N-stage step-down Dickson charge pump as an example, the input voltage is V _DD , and its output voltage is V _DD /(N+1), that is, the generated voltage multiplier is 1/(N+1). As shown in Figure 1, when the charge pump is switched from one magnification to another, for example: when the charge pump is converted from 1/5 magnification to 1/3 magnification, the traditional method is to connect the first three stages in parallel to become a new In this way, the Dickson charge pump changes from the original 4-stage structure to a 2-stage structure, and the magnification becomes 1/3. Although this solution effectively utilizes all the on-chip capacitors and can improve the load carrying capacity, the output drive capability of the charge pump also needs to be improved. This is because the capacitance distribution of the combined charge pump units is uneven, so the charge pump circuit cannot achieve the maximum output driving capability.

Therefore, it is necessary to provide a charge pump that can realize all integer or integer multiples to increase system power and provide better output drive capability.

Contents of the invention

In view of the problems existing in the current technology, the application provides a charge pump, including a charge pump main module, the charge pump main module includes X first-stage charge pump units, where X is a positive integer greater than 1; the clock module , configured to output a clock sequence to adjust the coupling relationship between the first-stage charge pump units and the coupling relationship inside the first-stage charge pump unit; the magnification selection module is configured to control the output magnification according to the needs The clock module outputs a corresponding clock sequence; wherein, the charge pump main module reorganizes the X first-stage charge pump units into Y second-stage charge pump units according to the received clock sequence, and Y is greater than or equal to 1 but a positive integer less than or equal to X, wherein for each integer or multiple of an integer, the Y second-stage charge pump units have the same equivalent capacitance value, or each of the second-stage charge pump units The number difference of the included first-stage charge pump units is less than or equal to 1.

Specifically, in the case that the Y second-stage charge pump units have the same equivalent capacitance value, the sum of the capacitance value of the first first-stage charge pump unit coupled to the input terminal of the charge pump is the same as the The capacitance value of the Xth first-stage charge pump unit coupled to the output terminal of the charge pump is a standard value, and the capacitance values of the other first-stage charge pump units are smaller than the standard value.

In particular, the charge pump further includes an output capacitor coupled between the output terminal of the charge pump and the ground level.

In particular, when the maximum or minimum achievable rate of the charge pump is n+1 or 1/(n+1), the sum of the total capacitance values of the X first-stage charge pump units is equivalent to n units The sum of capacitors, i+1 is the actual required multiplier and i is a positive integer less than or equal to n, j is a positive integer less than or equal to i, for the jth second-stage charge pump unit, a _ij =n*j The integer part of /i plus 1 represents the serial number of the unit capacitor where the j-th second-stage charge pump unit is located, and its fractional part represents the division position in the unit capacitor where the j-th second-stage charge pump unit is located.

Particularly, each of the first-stage charge pump units includes a capacitor, the first end of which is coupled to the output end of the previous first-stage charge pump unit through the first switch, and the first end of the capacitor is connected through the second The switch is coupled to the input terminal of the next first-stage charge pump unit, the second terminal of the capacitor is coupled to the output terminal of the charge pump through the third switch, and the second terminal of the capacitor is coupled to the ground through the fourth switch level; wherein the clock sequence includes two opposite clock signals configured to respectively control one or more of the first to fourth switches.

The present application also provides a display, including the charge pump described above.

The present application also provides a flash memory device, including the charge pump described above.

The present application also provides a power supply, including the charge pump described above.

The present application also provides a method for adjusting voltage using a charge pump, wherein the charge pump includes a charge pump main module, a clock module and a multiplier selection module, and the method includes that the multiplier selection module controls the clock module according to the required output ratio The corresponding clock sequence is generated; the clock module outputs the corresponding clock sequence under the control of the multiplier selection module; the charge pump main module outputs the The X first-stage charge pump units are reorganized into Y second-stage charge pump units, Y is a positive integer greater than or equal to 1 but less than or equal to X, wherein for each integer or one-integer multiple, the Y first The two-stage charge pump units have the same equivalent capacitance value, or the difference in the number of the first-stage charge pump units contained in each of the second-stage charge pump units is less than or equal to 1.

The present application also provides a method for voltage adjustment using a charge pump, wherein the charge pump includes a charge pump main module, a clock module and a multiplier selection module, and the charge pump main module includes X first-stage charge pump units, Each of the first-stage charge pump units has the same capacitance value, the method includes dividing the X first-stage charge pump units into two groups, one group includes m second-stage charge pump units, and the other group Including n second-stage charge pump units; wherein each of the m second-stage charge pump units includes k first-stage charge pump units, and each of the n second-stage charge pump units includes k-1 first-stage charge pump units; if X=1, stop all operations, otherwise make X=X-1, split one of n second-stage charge pumps into k-1 first-stage charges pump unit; when (n-1)≥(k-1), insert the k-1 first-stage charge pump units into n-1 second charge pump units consisting of k-1 first-stage charge pump units In the first-stage charge pump unit, thereby forming two groups of new second-stage charge pump units, one group includes m+k-1 second-stage charge pump units, and each second-stage charge pump unit in this group includes k-th One-stage charge pump unit; another group includes n-k second-stage charge pump units, and each second-stage charge pump unit of this group includes k-1 first-stage charge pump units; when (n-1)<(k -1) and (k-n)<m, insert the k-1 first-stage charge pump units into n-1 second-stage charge pump units composed of k-1 first-stage charge pump units and k-n In a second-stage charge pump unit composed of k first-stage charge pump units, two new sets of second-stage charge pump units are formed, and one group includes (n-1)+(m-(k-n)) units The second-stage charge pump unit, each second-stage charge pump unit in this group includes k first-stage charge pump units; the other group includes k-n second-stage charge pump units, and each second-stage charge pump unit in this group The unit includes k+1 first-stage charge pump units.

The charge pump provided in the present application and the method for adjusting the voltage using such a charge pump provide charge pump units with the same or substantially the same equivalent capacitance for all integer or fractional multiples, and for specific multiples Say, the output drive capability of the charge pump is increased by 33% or more.

Hereinafter, a detailed description will be given of exemplary embodiments of the present application with reference to the accompanying drawings.

Description of drawings

Embodiments are shown and explained with reference to the figures. The figures serve to clarify the basic principles and thus only show the aspects which are necessary for understanding the basic principles. The drawings are not to scale. In the drawings, the same reference numerals denote similar features.

FIG. 1 is a schematic diagram of a charge pump structure module according to an embodiment of the present application;

FIG. 2 is a schematic structural diagram of a charge pump main module according to an embodiment of the present application;

Figures 3a-3d are schematic diagrams of the working state of the main module of the charge pump shown in Figure 2;

FIG. 4 is a schematic diagram of a clock signal used in an embodiment of the present application;

FIG. 5 shows a flowchart of a method for constructing a full rate charge pump according to an embodiment of the present application;

FIG. 6 shows a state diagram of constructing a full rate charge pump according to one embodiment of the present application;

FIG. 7 is a schematic structural diagram of a charge pump circuit with a minimum magnification of 1/7 according to an embodiment of the present application;

8a-8d are schematic diagrams showing the working state of the main module of the charge pump according to another embodiment of the present application;

FIG. 9 shows a scheme list for recombination of charge pump units in charge pumps with different rates according to an embodiment of the present application; and

FIG. 10 shows a method for voltage regulation using a charge pump according to an embodiment of the present application.

Detailed ways

Exemplary embodiments of the present application will be described in detail below with reference to the accompanying drawings. It should be noted that the relative arrangements of components and steps, numerical expressions and numerical values set forth in these embodiments do not limit the scope of the present application unless specifically stated otherwise.

The following description of at least one exemplary embodiment is merely illustrative in nature and not intended as any limitation of the application, its application or uses.

Techniques, methods and devices known to those of ordinary skill in the relevant art may not be discussed in detail, but where appropriate, such techniques, methods and devices should be considered part of the description.

In all examples shown and discussed herein, any specific values should be construed as exemplary only, and not as limitations. Therefore, other instances of the exemplary embodiment may have different values.

It should be noted that like numerals and letters denote like items in the following figures, therefore, once an item is defined in one figure, it does not require further discussion in subsequent figures.

For an N-stage Dickson charge pump, i is a positive integer greater than or equal to 1 and less than or equal to N, C _i is the capacitance value of the i-th charge pump unit, f is the operating frequency of the charge pump, _IL is the output current of the charge pump, and the charge pump internal resistance R _ssl , the output voltage V _OUT can be expressed as:

where the internal resistance R _ssl and the output current I _L of the charge pump can be expressed as

The total capacitance value of the charge pump can be expressed by the following formula,

According to the mean value inequality, when the output voltage and frequency are constant, if and only if the capacitances of all charge pump units are equal, that is, C ₁ =C ₂ =...=C _N , the output current I _L is the largest:

The existing practice is to set the capacitance values of N charge pump units to be the same. When the charge pump is switched from N times or 1/N times to another multiplier, the existing setting method is to simply set the capacitor values of other charge pump units Capacitors are allocated to, for example, the first charge pump unit, and the capacitance value of the combined first charge pump unit will be much larger than that of other charge pump units, and the drive capability of the charge pump will be affected accordingly, and such a setting is easy Incomplete charging and discharging of the first charge pump unit (because RC is too large) may limit the overall operating frequency of the charge pump and result in lower drive capability.

In order to overcome the above problems, the charge pump disclosed in the present application and the method for adjusting voltage by using the charge pump provide better output driving capability while realizing full rate and making full use of the on-chip capacitance.

Figure 1 shows the block diagram of the charge pump. Wherein, the charge pump 100 may include a multiplier selection module 102 configured to receive an input signal, generate a multiplier of the output signal relative to the input signal, and generate a control signal according to the multiplier, so as to control the clock module to select a corresponding clock sequence. The clock module 104 is configured to select a corresponding clock sequence under the control of the multiplier selection module 102 , so as to control the on-off state of each switch in the charge pump main module 106 . The charge pump 100 also includes a charge pump main module 106 which includes a plurality of charge pump units. The charge pump units include capacitors and switch arrays. Each charge pump unit includes switches inside and switches between each charge pump unit. The opening and closing states of these switches are controlled by the clock sequence received from the clock module 104 .

FIG. 2 is a schematic diagram of a partial structure of a step-down charge pump according to an embodiment of the present application. Figure 2 shows the charge pump main block and output capacitor C _L . According to one embodiment, the maximum output ratio of the charge pump is 5 times or 1/5 times. In this embodiment, the charge pump main module includes six charge pump units, and the capacitance values included in each charge pump unit in the direction from the input end to the output end are C, 1/3C, 2/3C, 2/3C, and C, where C represents the cell capacitance value. The lower plates of the capacitors in each charge pump unit are respectively coupled to the output voltage V _OUT and the ground level through switches; the upper plates of the capacitors in adjacent charge pump units are coupled to each other through switches. The upper plate of the capacitor of the first (ie, closest to the input) charge pump cell is also coupled via a switch to the input of the charge pump for receiving an input signal such as V _DD . The upper plate of the sixth (ie, closest to the output) charge pump cell is also coupled to the upper plate of the output capacitor _CL and to the charge pump output. The lower plate of output capacitor _CL is coupled to ground level.

It should be noted that although the example described in this application may be a step-down charge pump. However, those skilled in the art know that based on the technical solution disclosed in the present application, the corresponding boost charge pump can be realized without creative effort.

FIG. 3a-FIG. 3d are schematic diagrams of the working state of the part structure of the charge pump shown in FIG. 2 working at different output ratios. FIG. 4 is a schematic diagram of a clock sequence for the charge pump shown in FIG. 2 .

FIG. 3a is a schematic diagram showing the state of the part of the structure of the charge pump shown in FIG. 2 working in the working mode with an output ratio of 1/5. Two clock signals Φ ₁ and Φ ₂ shown in FIG. 4 can be used to control the switching states inside the charge pump unit and between the charge pump units.

According to an embodiment, the charge pump main module in this embodiment includes 6 charge pump units and an output capacitor C _L . The clock signal Φ ₁ controls the switch S ₁ between the input terminal and the first charge pump unit, the switch S 4 between the third charge pump unit and the fourth charge pump unit, and the switch S ₄ between the sixth charge pump unit and the output terminal The state of the switch S ₇ ; Φ ₁ also controls the state of the switches S ₈ , S ₁₄ and S ₁₆ between the first and fourth and fifth charge pump units and the output voltage V _OUT , and the states of the second, third and States of switches S ₁₁ , S ₁₃ and S ₁₉ between the sixth charge pump unit and ground.

According to one embodiment, Φ2 controls the state of switch S2 between the first charge pump unit and the _second charge pump unit, and the state of switch _S6 between the fifth charge pump unit and the sixth charge pump unit _; Φ ₂ also controls the state of the switches _S9 , _S15 and _S17 between the first, fourth and fifth charge pump units and the ground level, and the connection between the second, third and sixth charge pump units and the output voltage V The state of switches S ₁₀ , S ₁₂ and S ₁₈ between _OUT .

According to one embodiment, the switch S ₃ between the second and the third charge pump unit, and the switch S ₅ between the fourth and the fifth charge pump unit are all set to a constant conduction state, or in other words, at an effective voltage These two switches are always turned on under the control of level (for example, high level).

According to an embodiment, as shown in FIG. 4 , Φ ₁ and Φ ₂ are two clock signals whose active levels, such as high levels, do not overlap.

According to one embodiment, when Φ ₁ =1 Φ ₂ =0, the switches S ₁ and S ₈ are turned on, the switches S ₂ and S ₉ are turned off, and the capacitor C ₁ of the first charge pump unit is charged by the input voltage V _DD to V _DD -V _OUT .

When Φ ₁ =0 and Φ ₂ =1, the switch S ₂ is turned on, and the capacitor C ₁ of the first charge pump unit is discharged. The switches _S10 and _S12 are turned on, and the switches _S11 and _S13 are turned off. Since the switch S3 is always turned on, the capacitors C2 and C3 _of the _second and _third charge pump units are connected in parallel, and the equivalent capacitance value is C, and is charged to V _DD -2V _OUT .

When Φ ₁ =1 Φ ₂ =0 again, the switch S ₄ is turned on, and the capacitors C ₂ and C ₃ in the second and third charge pump units are discharged together. The switches _S14 and _S16 are turned on, and the switches _S15 and _S17 are turned off. Since the switch S5 is always turned on, the capacitors _C4 and _C5 of the fourth and _fifth charge pump units are connected in parallel, and the equivalent capacitance value is C, and is charged to V _DD -3V _OUT .

When Φ ₁ =0 Φ ₂ =1 again, the switch S ₆ is turned on, the capacitors C ₄ and C ₅ in the fourth and fifth charge pump units are discharged together, the switch S ₁₈ is turned on, and the switch S ₁₉ is turned off, The capacitor C ₆ of the sixth charge pump unit is charged to V _DD −4V _OUT .

When Φ ₁ =1 Φ ₂ =0 again, the switch S ₇ is turned on, the capacitor C ₆ of the sixth charge pump unit discharges to the output capacitor _CL , and provides an output signal V _DD -4V _OUT =V _OUT to the output terminal . Therefore, it can be seen that V _OUT =1/5V _DD .

In this embodiment, the equivalent capacitance values of the second-stage capacitor C1, C ₂ +C ₃ , C ₄ +C ₅ , and C ₆ formed by recombining the six first-stage capacitors C ₁ to C ₆ are c. According to the aforementioned theory, under 1/5 magnification, the capacitance values of each unit of the charge pump are equal, thus realizing the maximum output driving capability.

FIG. 3b is a schematic diagram showing the state of the part of the structure of the charge pump shown in FIG. 2 working in an operating mode with an output ratio of 1/4. Similarly, the _two clock signals Φ1 and Φ2 shown in FIG. ₄ can be used to control the switching states inside the charge pump unit and between the charge pump units.

According to one embodiment, Φ ₁ controls the state of switches S ₁ and S ₅ between the charge pump units; Φ ₁ also controls the internal switches S ₈ , S ₁₀ , S ₁₃ , S ₁₅ , S ₁₆ and S ₁₈ status. Φ ₂ controls the state of switches S ₃ and S ₇ between the charge pump units; Φ ₂ also controls the states of switches S ₉ , S ₁₁ , S ₁₂ , S ₁₄ , S ₁₇ and S ₁₉ inside the charge pump unit.

According to one embodiment, the switch S ₂ between the first and second charge pump unit, the switch S ₄ between the third and fourth charge pump unit, and the switch S ₆ between the fifth and sixth charge pump unit Both are set to a constant conduction state, or in other words, these two switches are always on under the control of an active level (such as a high level).

According to an embodiment, as shown in FIG. 4 , Φ ₁ and Φ ₂ are two clock signals whose active levels, such as high levels, do not overlap.

According to an embodiment, when Φ ₁ =1 Φ ₂ =0, the switches S ₁ , S ₈ and S ₁₀ are turned on, and the switches S ₃ , S ₉ and S ₁₁ are turned off. Since the switch S ₂ is always turned on, the capacitors C ₁ and C ₂ of the first and second charge pump units are connected in parallel, and the equivalent capacitance value is (1+1/3)C, which is charged to V _DD -V _OUT .

When Φ ₁ =0 Φ ₂ =1, the switch S ₃ is turned on, and the capacitors C ₁ and C ₂ of the first and second charge pump units are discharged. The switches _S12 and _S14 are turned on, and the switches _S13 and _S15 are turned off. Since the switch S4 is always turned on, the capacitors C3 and _C4 of the _third and _fourth charge pump units are connected in parallel, and the equivalent capacitance value is (1 +1/3)C and is charged to V _DD -2V _OUT .

When Φ ₁ =1 Φ ₂ =0 again, the switch S ₅ is turned on, and the capacitors C ₃ and C ₄ in the third and fourth charge pump units are discharged together. The switches _S16 and _S18 are turned on, and the switches _S17 and _S19 are turned off. Since the switch S5 is constantly turned on, the capacitors _C5 and _C6 of the _fifth and sixth charge pump units are connected in parallel, and the equivalent capacitance value is (1 +1/3)C and is charged to V _DD -3V _OUT .

When Φ ₁ =0 Φ ₂ =1 again, the switch S ₇ is turned on, the capacitors C ₅ and C ₆ of the fifth and sixth charge pump units discharge to the output capacitor _CL , and provide the output signal V _DD to the output terminal -3V _OUT =V _OUT . Therefore, it can be seen that V _OUT =1/4V _DD .

In this embodiment, the equivalent capacitance of the second-stage capacitor formed by C ₁ +C ₂ , C ₃ +C ₄ , and C ₅ +C ₆ is recombined by the first-stage capacitor C ₁ -C ₆ The values are all (1+1/3)C. According to the aforementioned theory, such an arrangement can realize the maximum output current of the charge pump.

Similarly, Fig. 3c and Fig. 3d show the working status diagrams of the part structure of the charge pump in Fig. 2 in the case of realizing 1/3 and 1/2 magnification. In FIG. 3c, C ₁ +C ₂ +C ₃ and C ₄ +C ₅ +C ₆ are recombined into two second-stage capacitors, and the equivalent capacitance value of each second-stage capacitor is 2C. In Figure 3d, C ₁ +C ₂ +C ₃ +C ₄ +C ₅ +C ₆ are recombined to form a second-stage capacitor with an equivalent capacitance of 4C.

In this application, a step-down charge pump is used for illustration. A person skilled in the art can implement a boost charge pump based on the information disclosed in this application.

It can be seen that, by using the charge pump in the embodiment of the present application, while realizing all integer multiples, it is ensured that the equivalent capacitance values of each secondary charge pump unit corresponding to a specific multiple are the same, so that the charge pump can operate at each multiple can achieve the maximum output drive capability.

FIG. 5 shows a method for constructing a full-rate charge pump according to an embodiment of the present application. The charge pump in this embodiment can achieve a maximum output magnification of 1/(n+1), where n is a positive integer greater than or equal to 1.

In step 502, n charge pump units are set, wherein each charge pump unit includes the same capacitance value.

In step 504, the capacitors in the charge pump units except the 1st and nth charge pump units are divided, wherein the division point is a _ij =n*j/i, where i is the actual charge pump stage that needs to be realized number (the corresponding multiplier can be, for example, 1/(i+1)), i is a positive integer greater than or equal to 1 and less than or equal to n, j is a positive integer greater than or equal to 1 and less than or equal to i, and the integer part of a _ij is the same as the The serial number of the capacitor is related, for example, adding 1 to the integer part of a _ij is the serial number of the capacitor to be divided. The fraction of a _ij is related to the position of the division point in the capacitor to be divided, for example, it represents the position point in the capacitor to be divided.

FIG. 6 is a schematic diagram of the method shown in FIG. 5 performing capacitance division for different magnifications. When the magnification to be output is the maximum or minimum output magnification n+1 or 1/(n+1), a _n,j =n*j/n, j is a positive integer greater than or equal to 1 and less than or equal to n, the charge pump There are exactly n charge pump units, so it is not necessary to divide the capacitors in each charge pump unit. When the required output magnification is n or 1/n, a _{n-1, j} = n*j/(n-1), j is a positive integer greater than or equal to 1 and less than or equal to n-1, which can be based on this rule The required multiplier stepwise adjusts the division of standard charge pump cells.

FIG. 7 is a schematic diagram of dividing the capacitance by the method shown in FIG. 5 under the condition of n=6. When i=6, it is not necessary to divide the capacitors in the six charge pump units.

When i=5, a _{5, j} are 6/5, 12/5, 18/5, 24/5 and 6 respectively, which means that at 1/5 of the capacitance of the second charge pump unit, at the third The division is performed at 2/5 of the capacitance of the charge pump unit, at 3/5 of the capacitance of the fourth charge pump unit, and at 4/5 of the capacitance of the fifth charge pump unit.

When i=4, a _{4, j} are 3/2, 3, 9/2, and 6 respectively, which means that at 1/2 of the capacitance of the second charge pump unit and at the capacitance of the fifth charge pump unit 1/2 for splitting.

When i=3, a _{3, j} are 2, 4, and 6 respectively, and there is no need to divide the capacitance of the charge pump unit.

When i=2, a _{2 and j} are 3 and 6 respectively, and there is no need to divide the capacitance of the charge pump unit.

To sum up, in order to use the charge pump shown in Figure 6 to achieve a magnification of 1 to 7 or 1 to 1/7, the capacitance of the second charge pump unit needs to be divided twice, and the division point is 1/5 of the capacitance and 1/2; the capacitance of the third charge pump unit needs to be divided once, and the division point is 2/5 of the capacitance; the capacitance of the fourth charge pump unit needs to be divided once, and the division point is 3/5 of the capacitance 5 places; the capacitor of the fifth charge pump unit needs to be divided twice, and the division points are 1/2 and 4/5 of the capacitor; the capacitors of the first and sixth charge pump units do not need to be divided.

Therefore, in order to achieve all the above multipliers, in the design of the main module of the charge pump, a total of 12 small capacitors need to be set, and the ratios of the capacitor values are: 1, 1/5, 3/10, 1/2, 2/5, 3/5, 3/5, 2/5, 1/2, 3/10, 1/5, 1. These capacitors may be referred to as first-stage capacitors, and the charge pump unit including these 12 small capacitors may be referred to as a first-stage charge pump unit. According to the above-mentioned embodiment, according to the different magnifications that need to be realized, these first-stage charge pump units can be combined to form a second-stage charge pump unit with the same equivalent capacitance value, so as to ensure that the charge pump has the maximum performance at each magnification. output drive capability.

8a-8d are schematic diagrams showing the working states of another embodiment of the charge pump shown in FIG. 1 at different output ratios. In this embodiment, each charge pump unit in the charge pump main module has the same capacitance. Different from the traditional charge pump, when changing the output ratio, in order to achieve the largest possible output drive capability, the ratio selection module will make the capacitance value of the recombined second-stage charge pump unit as average as possible through calculation.

FIG. 8 a is a schematic diagram of the working state of the part of the structure of the charge pump in this embodiment working at an output ratio of 1/5. Two clock signals Φ ₁ and Φ ₂ shown in FIG. 4 can be used to control the switching states inside the charge pump unit and between the charge pump units. According to an embodiment, the charge pump main module in this embodiment includes 4 charge pump units and an output capacitor C _L . Since the capacitance values of the four charge pump units of the charge pump main module are equal, the maximum output driving capability can be achieved without recombining the charge pump units in the case of realizing a 1/5 multiplier.

FIG. 8 b is a schematic diagram showing the state of the charge pump part structure of this embodiment working in the working mode with an output ratio of 1/4.

According to one embodiment, the clock signal Φ ₁ controls the state of the switch S ₁ between the input terminal and the first charge pump unit, the switch S ₄ between the third charge pump unit and the fourth charge pump unit; Φ ₁ also controls The states of the switches _S6 , _S8 and _S12 between the first, second and fourth charge pump units and the output voltage _VOUT , and the state of the switch _S11 between the third charge pump unit and the ground level .

According to one embodiment, Φ2 controls the state of switch S3 between the _second charge pump unit and the _third charge pump, and the state of switch S5 between the fourth charge pump unit and the output _{; Φ2} also controls _The state of switches S7, _S9 and _S13 between the first, second and fourth charge pump units and ground level, and the state of switch _S10 between the third charge pump unit and the output voltage _VOUT .

According to one embodiment, the switch S2 between the first and _second charge pump units is set to a constant conduction state, or in other words, the switch is always turned on under the control of an active level (eg high level).

According to an embodiment, as shown in FIG. 4 , Φ ₁ and Φ ₂ are two clock signals whose active levels, such as high levels, do not overlap.

According to one embodiment, when Φ ₁ =1 Φ ₂ =0, the switch S ₁ is turned on, and the switches S ₇ and S ₉ are turned off. Since the switch S ₂ is always turned on, the capacitances of the first and second charge pump units C ₁ and C ₂ are connected in parallel and are charged to V _DD -V _OUT by the input voltage V _DD .

When Φ ₁ =0 Φ ₂ =1, the switch S ₃ is turned on, and the capacitors C ₁ and C ₂ of the first and second charge pump units are discharged. The switches S ₃ and S ₁₀ are turned on, the switch S ₁₁ is turned off, and the capacitor C ₃ of the third charge pump unit is charged to V _DD -2V _OUT .

When Φ ₁ =1 Φ ₂ =0 again, switch S ₄ is turned on, and C ₃ discharges. Switch S ₁₂ is turned on, switch S ₁₃ is turned off, and C ₄ is charged to V _DD -3V _OUT .

When Φ ₁ =0 Φ ₂ =1 again, the switch S ₅ is turned on, the capacitor C ₄ of the fourth charge pump unit discharges to the output capacitor _CL , and provides an output signal V _DD -3V _OUT =V _OUT to the output terminal . Therefore, it can be seen that V _OUT =1/4V _DD .

In this embodiment, the first and _second charge pump cells consisting of _C1 and C2 are recombined as charge pump cells of the second stage, but the charge pump cells of the first stage consisting _of C3 and _C4 are not combined .

FIG. 8c is a schematic diagram showing the state of the part of the structure of the charge pump in this embodiment working in the working mode with an output ratio of 1/3.

According to one embodiment, the clock signal Φ ₁ controls the state of the switch S ₁ between the input terminal and the first charge pump unit, the switch S ₅ between the fourth charge pump unit and the output terminal; Φ ₁ also controls the state of the first charge pump unit , the states of the switches _S6 and _S8 between the second charge pump unit and the output voltage _VOUT , and the states of the switches _S11 and _S13 between the third and fourth charge pump units and the ground level.

According to one embodiment, Φ2 controls the state of the switch S3 between the _second charge pump unit and the _third charge pump; Φ2 also controls the switch S between the first and _second charge pump units and the ground level ₇ and _S9 , and the states of switches _S10 and _S12 between the third and fourth charge pump cells and the output voltage _VOUT .

According to one embodiment, the switch S2 between the first and the _second charge pump unit and the switch S4 between the third and the _fourth charge pump unit are set to a constant conduction state, or in other words at an active level ( For example, under the control of high level), the switch is always on.

According to an embodiment, as shown in FIG. 4 , Φ ₁ and Φ ₂ are two clock signals whose active levels, such as high levels, do not overlap.

According to one embodiment, when Φ ₁ =1 Φ ₂ =0, the switches S ₁ , S ₆ and S ₈ are turned on, and the switches S ₇ and S ₉ are turned off. Since the switch S ₂ is always on, the first and second Capacitors C ₁ and C ₂ of the two charge pump units are connected in parallel, and are charged to V _DD -V _OUT by the input voltage V _DD .

When Φ ₁ =0 Φ ₂ =1, the switch S ₃ is turned on, and the capacitors C ₁ and C ₂ of the first and second charge pump units are discharged. The switches S ₁₀ and S ₁₂ are turned on, and the switches S ₁₁ and S ₁₃ are turned off. Since the switch S ₄ is always turned on, the capacitors C ₃ and C ₄ of the third charge pump unit are connected in parallel and charged to V _DD -2V _OUT .

When Φ ₁ =1 Φ ₂ =0 again, the switch S ₅ is turned on, C ₃ and C ₄ discharge the output capacitor _CL , and provide the output signal V _DD −2V _OUT =V _OUT to the output terminal. Therefore, it can be seen that V _OUT =1/3V _DD .

In this embodiment, the first _- stage charge pump units including _C1 and C2 and the first _- stage charge pump units including C3 and _C4 are respectively recombined into two sets of second-stage charge pump units. After such a recombination, the equivalent capacitance values of the two second-stage charge pump units are equal, thereby realizing the maximum output driving capability under 1/3 output ratio.

FIG. 8d is a schematic diagram showing the state of the charge pump part structure of this embodiment working in the working mode with an output ratio of 1/2. In this case, it is enough to directly combine the four charge pump units into the second-stage charge pump unit, so in the case of realizing 1/2, it is not necessary to consider the problem that the equivalent capacitance of the second-stage charge pump unit is as average as possible.

To sum up, from the example shown in Figure 8a-Figure 8d, for the case of 1/5 magnification and 1/3 magnification, the capacitance values of each charge pump unit are equal, especially for the case of 1/3 magnification Compared with the traditional practice (that is, for example, combining the first, second and third charge pump units into one second-stage charge pump unit), the output driving capability is increased by 33.3%.

A method for constructing a full-rate charge pump according to an embodiment of the present application. The charge pump in this embodiment may include m*k+n*(k-1) first-stage charge pump units, and the capacitance values of each first-stage charge pump unit are equal. For each integer fraction multiplier In other words, the above-mentioned first-stage charge pump unit can be divided into two groups of second-stage charge pump units, one group includes m second-stage charge pump units, and each charge pump unit includes k first-stage charge pump units unit; another group includes n second-stage charge pump units, and each charge pump unit includes k-1 first-stage charge pump units; where x=m+n, wherein m, n, k are greater than or equal to 1 positive integer. The above combination relationship can be expressed by formula (6).

when to further implement The magnification is When multiplying, one second-stage charge pump unit can be reduced, for example, one of the rightmost n second-stage charge pump units composed of k-1 first-stage charge pump units, the second-stage charge pump The k-1 first-stage charge pump units in the cell are evenly "inserted" into other n-1 second-stage charge pump units consisting of k-1 first-stage charge pump units and m second-stage charge pump units consisting of k charge The pump unit is composed of the second stage charge pump unit.

There are two situations: when (n-1)≥(k-1), the rightmost second-stage charge pump unit consisting of k-1 first-stage charge pump units can be evenly inserted into n-1 In the second-stage charge pump unit composed of k-1 first-stage charge pump units, k-1 new second-stage charge pump units composed of k first-stage charge pump units are formed, and nk A second-stage charge pump unit composed of k-1 first-stage charge pump units, thus realizing magnification. Equation 7 embodies in The combination method formed in order to achieve close to the maximum output drive capacity under the magnification.

When (n-1)<(k-1) and (kn)<m, the rightmost second-stage charge pump unit consisting of k-1 first-stage charge pump units is evenly inserted into n-1 In the second-stage charge pump unit composed of k-1 first-stage charge pump units, thus forming (n-1)+(m-(kn)) second-stage charge pump units composed of k first-stage charge pump units stage charge pump unit, and kn second-stage charge pump units composed of k+1 first-stage charge pump units, so as to realize magnification. Equation 8 embodies in The combination method formed in order to achieve close to the maximum output drive capacity under the magnification.

The table shown in FIG. 9 is the combination of charge pump units for different output ratios according to the above-mentioned embodiments. The combination in the dotted line box is the magnification of the driving ability compared with the traditional charge pump.

FIG. 10 shows a method for voltage regulation using a charge pump according to an embodiment of the present application, wherein the main module of the charge pump includes x first-stage charge pump units, and each first-stage charge pump unit has the same capacitance Value, x is a positive integer greater than or equal to 1.

In step 1002, the x first-stage charge pump units are divided into two groups, one group includes m second-stage charge pump units, and the other group includes n second-stage charge pump units; wherein the m second-stage charge pump units Each of the charge pump units includes k first-stage charge pump units, and each of the n second-stage charge pump units includes k-1 first-stage charge pump units;

In step 1004, if x=1, then stop calculating, otherwise enter into step 1006;

In step 1006, x=x-1, split one of the n second-stage charge pumps into k-1 first-stage charge pump units;

In step 1008, the relationship between n-1 and k-1 is detected;

In step 1010, when (n-1)≥(k-1), insert the k-1 first-stage charge pump units into n-1 first-stage charge pump units consisting of k-1 first-stage charge pump units In the second-stage charge pump unit, thus forming two groups of new second-stage charge pump units, one group includes m+k-1 second-stage charge pump units, and each second-stage charge pump unit in this group includes k The first-stage charge pump unit; another group includes n-k second-stage charge pump units, and each second-stage charge pump unit in this group includes k-1 first-stage charge pump units;

In step 1012, when (n-1)<(k-1) and (k-n)<m, insert the k-1 first-stage charge pump units into n-1 by k-1 first-stage In the second-stage charge pump unit composed of the charge pump unit and k-n second-stage charge pump units composed of k first-stage charge pump units, thus forming two groups of new second-stage charge pump units, one group includes ( n-1)+(m-(k-n)) second-stage charge pump units, each second-stage charge pump unit in this group includes k first-stage charge pump units; another group includes k-n second-stage charge pump units A charge pump unit, each second-stage charge pump unit in the group includes k+1 first-stage charge pump units.

Although some specific embodiments of the present application have been described in detail through examples, those skilled in the art should understand that the above examples are only for illustration, rather than limiting the scope of the present application. Those skilled in the art will appreciate that modifications can be made to the above embodiments without departing from the scope and spirit of the application. The scope of the application is defined by the appended claims.

Claims (10)

1. a kind of charge pump, including

Charge pump main module, the charge pump main module include X first order charge pump unit, and wherein X is just whole greater than 1 Number, one end of the capacitor in each first order charge pump unit under any working condition its be only attached to the charge pump Output end or ground level；

Clock module, be configured as output clock sequence with adjust coupled relation between the first order charge pump unit and Coupled relation inside the first order charge pump unit；

Multiplying power selecting module is configured as output multiplying power as needed and controls the corresponding clock sequence of the clock module output Column；

Wherein, clock sequence recombinates the X first order charge pump unit to the charge pump main module based on the received For Y second level charge pump unit, Y is the positive integer more than or equal to 1 but less than or equal to X, wherein being directed to each integer or integer / mono- multiplying power, Y second level charge pump unit equivalent capacitance value having the same or each second level charge The number difference of first order charge pump unit included in pump unit is less than or equal to 1.

2. charge pump as described in claim 1, wherein in Y second level charge pump unit equivalent capacity having the same In the case where value, the capacitance of first first order charge pump unit coupled with the charge pump input terminal and with the charge The capacitance of the X first order charge pump unit of pump output terminal coupling is standard value, other described first order charge pump units Capacitance be less than the standard value.

3. charge pump as described in claim 1 further includes output capacitance, it is coupled in the output end and ground level of the charge pump Between.

4. charge pump as claimed in claim 2, wherein when the maximum of the charge pump or minimum achievable multiplying power are n+1 or 1/ (n+1), the sum of the total capacitance value of the X first order charge pump unit is equivalent to the sum of n specific capacitance, and i+1 is practical needs The multiplying power and i wanted are the positive integer less than or equal to n, and j is the positive integer less than or equal to i, for j-th of second level charge pump unit For, a_ijThe integer part of=n*j/i adds 1 to represent specific capacitance serial number where j-th of second level charge pump unit, score Part represents the division position in the specific capacitance where j-th of second level charge pump unit.

5. charge pump as described in claim 1, wherein the capacitor first end is coupled to previous first by first switch The output end of grade charge pump unit, and the first end of the capacitor is coupled to next first order charge pump by second switch The input terminal of unit, the second end of the capacitor are coupled to the output end of the charge pump by third switch, the capacitor Second end is coupled to ground level by the 4th switch；

Wherein the clock sequence includes two opposite clock signals, is configured to control first to fourth switch One or more of.

6. a kind of display, including such as charge pump as claimed in any one of claims 1 to 5.

7. a kind of flash memory device, including such as charge pump as claimed in any one of claims 1 to 5.

8. a kind of power supply, including such as charge pump as claimed in any one of claims 1 to 5.

9. a kind of method using charge pump adjustment voltage, wherein the charge pump includes charge pump main module, clock module and Multiplying power selecting module, the method includes

The multiplying power selecting module controls the corresponding clock sequence of generation of clock module according to required output multiplying power；

The clock module exports corresponding clock sequence under the control of the multiplying power selecting module；

The charge pump main module based on the received clock sequence by X first order charge in the charge pump main module Pump unit is reassembled as Y second level charge pump unit, and Y is the positive integer more than or equal to 1 but less than or equal to X, wherein for each One multiplying power of integer or integer point, Y second level charge pump unit equivalent capacitance value having the same or each described The number difference of first order charge pump unit included in the charge pump unit of the second level is less than or equal to 1, each first order electricity One end of capacitor in lotus pump unit is only attached to the output end or ground level of the charge pump under any working condition.

10. a kind of method for carrying out voltage adjustment using charge pump, wherein the charge pump includes charge pump main module, clock mould Block and multiplying power selecting module, the charge pump main module include X first order charge pump unit, each first order charge pump Unit capacitance having the same, the method includes

The X first order charge pump unit is divided into two groups, one group includes m second level charge pump unit, and another group includes n A second level charge pump unit；Wherein each of m second level charge pump unit includes k first order charge pump list Member, each of n second level charge pump unit include k-1 first order charge pump unit；

If X=1, stop all operations, otherwise make X=X-1, one in n second level charge pump is split as k-1 the One-step charge pump unit；

As (n-1) >=(k-1), by the k-1 first order charge pump unit insertion n-1 by k-1 first order charge pump In the second level charge pump unit of unit composition, to form two groups of new second level charge pump units, one group includes m+k-1 Second level charge pump unit, each second level charge pump unit includes k first order charge pump unit in the group；Another group includes N-k second level charge pump unit, each second level charge pump unit of the group include k-1 first order charge pump unit；

As (n-1) < (k-1) and (k-n) < m, by the k-1 first order charge pump unit insertion n-1 by k-1 first The second level charge pump unit of grade charge pump unit composition and the k-n second level being made of k first order charge pump unit In charge pump unit, to form two groups of new second level charge pump units, one group includes a second level (n-1)+(m- (k-n)) Charge pump unit, each second level charge pump unit includes k first order charge pump unit in the group；Another group includes k-n Second level charge pump unit, each second level charge pump unit of the group include k+1 first order charge pump unit.