CN107733378B - Current multiplexing low-power-consumption feedforward operational amplifier circuit - Google Patents
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Abstract
The invention discloses a current multiplexing low-power-consumption feedforward operational amplifier circuit, which comprises a first-stage differential circuit, a second-stage differential circuit and a common-mode feedback circuit; the first-stage differential circuit comprises a positive resistance structure and a negative resistance structure, and the absolute values of the resistance values of the positive resistance structure and the negative resistance structure are the same; the output end of the second-stage differential circuit is electrically connected with the common mode feedback circuit, the common mode feedback circuit adjusts the error amount of the common mode and the reference voltage of the second-stage differential circuit, and the obtained error amount is fed back to the tail current of the second-stage circuit; the input end of the first-stage differential circuit is connected with the input end of the second-stage differential circuit; the second-stage differential circuit comprises a second constant current source, four identical second components, two identical polar capacitors and two resistors with equal resistance values; the invention provides a current multiplexing low-power-consumption feedforward amplifier circuit for realizing low power consumption and high gain.
Description
Technical Field
The invention relates to the field of radio frequency and analog integrated circuits, in particular to a current multiplexing low-power-consumption feedforward operational amplifier circuit.
Background
With the continuous development of integrated circuit technology, high-performance operational amplifiers are widely applied to various circuit systems such as high-speed analog-to-digital converters (ADCs), digital-to-analog converters (DACs), switched capacitor filters, bandgap voltage reference sources, precision comparators and the like, and become core unit circuits designed for analog integrated circuits and mixed signal integrated circuits, and the performance of the core unit circuits directly affects the overall performance of the circuits and the systems. Therefore, the design of high performance operational amplifiers has been one of the hot spots in analog integrated circuit designs to satisfy the needs of various application fields in a trade-off.
As circuit design frequencies continue to rise, challenges are presented to the finite gain-bandwidth product of an operational amplifier. The feedforward operational amplifier structure can expand the gain bandwidth product to a certain extent and improve the frequency characteristic of the operational amplifier. Feed forward amplifiers are a method of combining a high gain low frequency path and a low gain high frequency path to achieve a large bandwidth. The main principle of the method is that the first non-main pole point is counteracted by the left zero point generated by adding two paths, and the bandwidth performance of the operational amplifier is expanded. Conventional feed forward operational amplifiers often require two stages of common mode feedback circuits, which consume additional power.
In the prior art, the implementation mode of the feedforward operational amplifier without adding a common mode feedback circuit in the first stage is the closest scheme, and as shown in fig. 1, the obvious defect of the circuit is that the second-stage current cannot be completely multiplexed after the problem of instability of the second-stage common mode is solved, and low power consumption cannot be well realized.
As shown in fig. 1, where M0, M1, M2, M3 constitute a first stage of the feed-forward operational amplifier and M4, M5, M6, M7 constitute a second stage of the feed-forward operational amplifier. The input signals vinp, vinn are amplified by the first stage N-pipe (M0/M1) to generate output signals voutn and voutp1 at the output end, and the input signals are fed forward to the second stage input N-pipe (M6/M7). The output common mode of the first stage is determined by a large resistor R connected across the drain and gate of the P-pipe without introducing additional power consumption. Output signals voutn and vonp generated by the first stage are connected to the P pipe input of the second stage, so that partial current multiplexing is realized. The output common mode of the second stage is determined by a common mode feedback loop by detecting the error amount of the common mode at the output and Vref (reference voltage) and then by adjusting the second stage tail current. Although the circuit can save the current of the common mode feedback circuit of one stage, the constant current source I03 is added so as not to cause the problem of unstable common mode of the second stage, and the current of the second stage cannot be completely multiplexed. The common mode gain of the feedforward operational amplifier is calculated through two branches respectively: two-stage branch common mode gain A CM1＝G0R0gm4rout, whereG 0 is the equivalent transconductance of the first-stage differential circuit of the tail current source IO 1; r ss1 is represented as the finite output impedance of the current source I01, and g m0 is represented as the transconductance of the M0 tube; (low frequency), R 0 is the output impedance of the first stage circuit, g m2 is the transconductance of the M2 tube; if there is jitter in the high frequency component on the dc, G m4 represents the transconductance of the M4 tube; the second stage circuit output impedances r out＝r04//r06,r04 and r 06 are represented as the output impedances of the M4 pipe and the M6 pipe, respectively,// is a shunt sign; feedforward branch common-mode gain A CM2＝G6rout, whereG 6 is the equivalent transconductance of the second stage differential circuit with tail current source IO2, R ss2 is the finite output impedance of current source IO2, and G m6 is the transconductance of the M6 tube; therefore, a CM1 is larger than a CM2, and the directions of the common-mode gains generated by the two branches are opposite, so that the common-mode instability is easily caused. Of course, in order to reduce a CM1, g m4 may be optionally reduced, which makes the current of the second stage not completely multiplexed, but only partially multiplexed, and reduces the current use efficiency.
The differential mode gain of this circuit, a DM＝gm0(R//r01//r03)·gm4rout+gm6rout, where r 01 and r 03 are denoted as the output impedance of the M1 and M3 tubes, respectively; to increase the gain of the op-amp, it is often necessary to increase the resistance R of the first stage to ensure a sufficiently large gain. However, excessive resistance is more likely to cause instability of the common mode gain.
Disclosure of Invention
The invention overcomes the defects of the prior art and provides a current multiplexing low-power-consumption feedforward amplifier circuit which realizes low power consumption and high gain.
The technical scheme of the invention is as follows:
A current multiplexing low-power-consumption feedforward operational amplifier circuit comprises a first-stage differential circuit, a second-stage differential circuit and a common-mode feedback circuit; the first-stage differential circuit comprises a first constant current source, a first component M0, a first component M1, a first component M2, a first component M3, a first component M2a and a first component M3a, wherein the first component M0, the first component M1, the first component M2, the first component M3, the first component M2a and the first component M3a are one of PMOS (P-channel metal oxide semiconductor) tubes, NMOS (N-channel metal oxide semiconductor) tubes or triodes, the first component M2a and the first component M3a form a positive resistance structure, the first component M2 and the first component M3 form a negative resistance structure, the absolute values of the resistance values of the positive resistance structure and the negative resistance structure are the same, and the first component M0 and the first component M1 form a first-stage differential circuit input structure and are electrically connected with the first constant current source; the second-stage differential circuit comprises a second constant current source, a second component M4, a second component M5, a second component M6, a second component M7, two identical polar capacitors and two resistors with equal resistance values, wherein the second component M4, the second component M5, the second component M6 and the second component M7 are one of PMOS (P-channel metal oxide semiconductor) tubes, NMOS (N-channel metal oxide semiconductor) tubes or triodes, the second component M6 and the second component M7 form a first-stage input structure, and the second component M4 and the second component M5 form a second-stage input structure; the output signal of the first-stage differential circuit is connected to a second-stage input structure of the second-stage differential circuit; the output end of the second-stage differential circuit is electrically connected with the common mode feedback circuit, the common mode feedback circuit adjusts the error quantity of the output common mode of the second-stage differential circuit and the reference voltage, and the obtained error quantity is fed back to the tail current of the second-stage circuit; the input end of the first-stage differential circuit is connected with the input end of the first-stage input structure of the second-stage differential circuit.
Further, the first component M0, the first component M1, the first component M2, the first component M3, the first component M2a, the first component M3a, the second component M4, the second component M5, the second component M6 and the second component M7 are PMOS transistors, the S poles of the first component M2, the first component M3, the first component M2a and the first component M3a are connected, the G pole of the first component M2 is connected with the D pole of the first component M3, the G pole of the first component M3a and the D pole of the first component M3a, and is connected with the D pole of the first component M1 and the G pole of the second component M5 of the second level differential circuit; the D pole of the first component M2 is connected with the G pole of the first component M3, the G pole of the first component M2a and the D pole of the first component M2a, and is connected with the D pole of the first component M0 and the G pole of the second component M4 of the second-stage differential circuit, and the S pole of the first component M0 and the S pole of the first component M1 are connected with a first constant current source; the S pole of the second component M4 is connected with the S pole of the second component M5, the D pole of the second component M4 and the D pole of the second component M6 are connected with one end of one of the polar capacitors and one end of the resistor, the other ends of the polar capacitors and the resistor are respectively connected with one end of the other polar capacitor and one end of the circuit, the other ends of the other polar capacitors and the circuit are connected with the D pole of the second component M5 and the D pole of the second component M7, the S pole of the second component M6 and the S pole of the second component M7 are connected with a second constant current source, the G level of the second component M7 is connected with the G level of the first component M0, and the G level of the first component M1 is connected with the G level of the second component M6.
Compared with the prior art, the invention has the advantages that: the combination of the first, negative resistance and positive resistance completely determines the output common mode of the first stage, does not have larger fluctuation along with the process angle and the temperature, saves the use of an independent common mode feedback circuit of the first stage, and saves the power consumption.
Secondly, the size of the positive resistance transistor is guaranteed to be consistent with that of the negative resistance transistor in the design, under the condition of reasonable layout and wiring, the positive resistance and the negative resistance cancel each other, the first-stage gain can be greatly improved, and the high gain of the integral feedforward amplifying circuit is realized. The gain expression of the feed forward amplifying circuit is as follows,
Wherein g m2a is the transconductance of the M 2a tube, and as shown in the above formula, as long as the positive resistance transconductance g m2a and the negative resistance transconductance g m2 are ensured to be equal, a large impedance can be obtained theoretically.
And the common mode of the first-stage output of the structure is just equal to the common mode of the second-stage P pipe input, and the second-stage current multiplexing is conveniently realized without changing with the process angle and the temperature, so that the power consumption is further saved.
Fourth, the structure does not cause the problem of common mode instability of the conventional structure. The following is a demonstration through theoretical analysis, and a common mode gain formula of the two branches is written:
two-stage branch common mode gain Wherein g m4＝K·(gm2+gm2a), soFeedforward branch common-mode gain a CM2＝G6rout; wherein G 6＝KG0. A CM1＝ACM2 is a circuit without considering parasitic capacitance of transistors and wiring capacitance introduced on two branches. Considering the influence of parasitic capacitance of two branches, as the parasitic capacitance C par1 of the transistor introduced by the two-stage branch is larger than the parasitic capacitance C par2 of the transistor introduced by the feedforward branch, the A CM1<ACM2 is beneficial to the stability of the common mode point of the second stage along with the increase of frequency.
Drawings
FIG. 1 is a circuit design diagram of the closest technology of the present invention;
FIG. 2 is a circuit design diagram of the present invention;
FIG. 3 is a circuit design diagram of the first stage load shown in the circuit of FIG. 2 in accordance with the present invention as a conventional structural load;
FIG. 4 is a circuit diagram of a common mode stability simulation of the present invention;
FIG. 5 is a graph of common mode stability simulation results for the structure of FIG. 3;
FIG. 6 is a graph of the results of a common mode stability simulation of the structure of the present invention;
FIG. 7 is a graph of the differential mode gain simulation results for the structure of FIG. 3;
FIG. 8 is a graph of the result of a differential mode gain simulation of the structure of the present invention.
Detailed Description
The invention is further described below with reference to the drawings and the detailed description.
As shown in fig. 2, a current multiplexing low-power-consumption feedforward operational amplifier circuit comprises a first-stage differential circuit, a second-stage differential circuit and a common-mode feedback circuit; the first-stage differential circuit comprises a first constant current source, a first component M0, a first component M1, a first component M2, a first component M3, a first component M2a and a first component M3a, wherein the first component M0, the first component M1, the first component M2, the first component M3, the first component M2a and the first component M3a are one of PMOS (P-channel metal oxide semiconductor) tubes, NMOS (N-channel metal oxide semiconductor) tubes or triodes, the first component M2a and the first component M3a form a positive resistance structure, the first component M2 and the first component M3 form a negative resistance structure, the absolute values of the resistance values of the positive resistance structure and the negative resistance structure are the same, and the first component M0 and the first component M1 form a first-stage differential circuit input structure and are electrically connected with the first constant current source; the second-stage differential circuit comprises a second constant current source, a second component M4, a second component M5, a second component M6, a second component M7, two identical polar capacitors and two resistors with equal resistance values, wherein the second component M4, the second component M5, the second component M6 and the second component M7 are one of PMOS (P-channel metal oxide semiconductor) tubes, NMOS (N-channel metal oxide semiconductor) tubes or triodes, the second component M6 and the second component M7 form a first-stage input structure, and the second component M4 and the second component M5 form a second-stage input structure; the output signal of the first-stage differential circuit is connected to a second-stage input structure of the second-stage differential circuit; the output end of the second-stage differential circuit is electrically connected with the common mode feedback circuit, the common mode feedback circuit adjusts the error quantity of the output common mode of the second-stage differential circuit and the reference voltage, and the obtained error quantity is fed back to the tail current of the second-stage circuit; the input end of the first-stage differential circuit is connected with the input end of the first input structure of the second-stage differential circuit.
The first component M0, the first component M1, the first component M2, the first component M3, the first component M2a, the first component M3a, the second component M4, the second component M5, the second component M6 and the second component M7 are all PMOS pipes, the S poles of the first component M2, the first component M3, the first component M2a and the first component M3a are connected, and the G pole of the first component M2 is connected with the D pole of the first component M3, the G pole of the first component M3a and the D pole of the first component M3a and is connected with the D pole of the first component M1 and the G pole of the second component M5 of the second-stage differential circuit; the D pole of the first component M2 is connected with the G pole of the first component M3, the G pole of the first component M2a and the D pole of the first component M2a, and is connected with the D pole of the first component M0 and the G pole of the second component M4 of the second-stage differential circuit, and the S pole of the first component M0 and the S pole of the first component M1 are connected with a first constant current source; the S pole of the second component M4 is connected with the S pole of the second component M5, the D pole of the second component M4 and the D pole of the second component M6 are connected with one end of one of the polar capacitors and one end of the resistor, the other ends of the polar capacitors and the resistor are respectively connected with one end of the other polar capacitor and one end of the circuit, the other ends of the other polar capacitors and the circuit are connected with the D pole of the second component M5 and the D pole of the second component M7, the S pole of the second component M6 and the S pole of the second component M7 are connected with a second constant current source, the G level of the second component M7 is connected with the G level of the first component M0, and the G level of the first component M1 is connected with the G level of the second component M6. Wherein the second component M4 is sized to be K times the first component M2 and the first component M2a, the second component M5 is sized to be K times the first component M3 and the first component M3a, and the second component M6 and the second component M7 are sized to be K times the first component M0 and the first component M1, respectively. As described above in connection with fig. 2, vinp of the first stage differential circuit is connected to vinp of the second stage differential circuit. The output signals voutn and vonp1 generated by the first-stage differential circuit are respectively connected to the input ends of the marks voutn and vonp1 of the second-stage differential circuit, so that the second-stage current is completely multiplexed. The output of the second-stage differential circuit is determined by the common mode feedback circuit by detecting the error amount of the reference voltage vref of the output common mode and common mode feedback circuit of the output stage and then returning the adjustment amount to the second-stage differential circuit to adjust the tail current. The common mode of the output of the first-stage differential circuit of the circuit structure is just equal to the common mode of the input of the second-stage differential circuit, and the common mode does not change along with the process angle and the temperature, thereby facilitating the realization of second-stage current multiplexing and further saving the power consumption.
The differential mode gain a DM of the feed forward amplifying circuit is expressed as the following formula (1),
Wherein g m0 is the transconductance of the first component M0, g m2a is the transconductance of the first component M2a, g m2 is the transconductance of the first component M2, g m4 is the transconductance of the second component M4, g m6 is the transconductance of the second component M6, and r out＝r04//r06,r04 and r 06 are the output impedances of the second component M4 and the second component M6, respectively. As shown in the above formula (1), as long as the positive resistance transconductance g m2a is ensured to be equal to the negative resistance transconductance g m2, a large impedance can be obtained.
The two-stage branch common mode gains are A CM1 and A CM2 respectively:
Wherein g m4＝K·(gm2+gm2a), so Wherein the method comprises the steps ofR ss1 is denoted as the finite output impedance of the current source I01.
A CM2＝G6rout formula (3)
Wherein the method comprises the steps ofR ss2 is the finite output impedance of the current source IO2, and G 6＝KG0 and K are multiples of the size of the MOS tube of the second-stage differential circuit and the corresponding MOS tube of the first-stage differential circuit.
A CM1＝ACM2, without considering the parasitic capacitance of the transistors introduced on the two branches and the routing capacitance. Considering the influence of parasitic capacitance of two branches, as the parasitic capacitance C par1 of the transistor introduced by the two-stage branch is larger than the parasitic capacitance C par2 of the transistor introduced by the feedforward branch, the A CM1<ACM2 is beneficial to the stability of the common mode point of the second stage along with the increase of frequency.
In order to demonstrate the problem of common mode stability, on the basis of the same current multiplexing degree, the positive resistance structure and the negative resistance structure shown in the circuit of fig. 2 are changed into the traditional structural load, so that the circuit shown in fig. 3 is obtained, and a common mode stability simulation circuit is built, as shown in fig. 4, opamp shown in the figure is an operational amplifier circuit structure. The structures shown in fig. 2 and 3 are substituted into Opamp for simulation, and INP and INN are input as dc (direct current), i.e. no signal is input, and only the stability problem of the simulation circuit is tested. The simulation results are shown in fig. 5 and 6, fig. 5 is a simulation result of a conventional structure, and fig. 6 is a simulation result of the structure of the present invention. As can be seen from fig. 5, although fig. 3 achieves the same current multiplexing effect as fig. 2, the common mode of the circuit oscillates and does not work properly, as compared with the conventional structure. Figure 6 shows normal performance.
The differential mode gains of the two structures were compared at the same current, and the simulation results are shown in fig. 7 and 8. Fig. 7 shows the result of differential-mode gain simulation in the conventional structure. FIG. 8 is a simulation result of differential mode gain of the structure according to the present invention. As can be seen from fig. 7 and 8, the gain of the structure of the present invention is approximately 10dB greater than that of the conventional structure at the same current.
The foregoing is merely a preferred embodiment of the present invention, and it should be noted that modifications and adaptations to those skilled in the art may be made without departing from the concept of the present invention, and such modifications and adaptations are intended to be comprehended within the scope of the present invention.
Claims (2)
1. The current multiplexing low-power-consumption feedforward amplifying circuit is characterized by comprising a first-stage differential circuit, a second-stage differential circuit and a common-mode feedback circuit; the first-stage differential circuit comprises a first constant current source, a first component M0, a first component M1, a first component M2, a first component M3, a first component M2a and a first component M3a, wherein the first component M0, the first component M1, the first component M2, the first component M3, the first component M2a and the first component M3a are one of PMOS (P-channel metal oxide semiconductor) tubes, NMOS (N-channel metal oxide semiconductor) tubes or triodes, the first component M2a and the first component M3a form a positive resistance structure, the first component M2 and the first component M3 form a negative resistance structure, the absolute values of the resistance values of the positive resistance structure and the negative resistance structure are the same, and the first component M0 and the first component M1 form a first-stage differential circuit input structure and are electrically connected with the first constant current source; the second-stage differential circuit comprises a second constant current source, a second component M4, a second component M5, a second component M6, a second component M7, two identical polar capacitors and two resistors with equal resistance values, wherein the second component M4, the second component M5, the second component M6 and the second component M7 are one of PMOS (P-channel metal oxide semiconductor) tubes, NMOS (N-channel metal oxide semiconductor) tubes or triodes, the second component M6 and the second component M7 form a first-stage input structure, and the second component M4 and the second component M5 form a second-stage input structure; the output signal of the first-stage differential circuit is connected to a second-stage input structure of the second-stage differential circuit; the output end of the second-stage differential circuit is electrically connected with the common mode feedback circuit, the common mode feedback circuit adjusts the error quantity of the output common mode of the second-stage differential circuit and the reference voltage, and the obtained error quantity is fed back to the tail current of the second-stage circuit; the input end of the first-stage differential circuit is connected with the input end of the first-stage input structure of the second-stage differential circuit;
the differential mode gain a DM of the feed forward amplifying circuit is expressed as follows,
Wherein g m0 is the transconductance of the first component M0, g m2a is the transconductance of the first component M 2a, g m2 is the transconductance of the first component M2, g m4 is the transconductance of the second component M4, g m6 is the transconductance of the second component M6, and r out＝r04//r06,r04 and r 06 are the output impedances of the second component M4 and the second component M6, respectively;
The two-stage branch common mode gains are A CM1 and A CM2 respectively: where g m4＝K·(gm2+gm2a),G0 is the equivalent transconductance of the first stage differential circuit of the tail current source IO1, so, Wherein, R ss1 is represented as the finite output impedance of the current source I01; a CM2＝G6rout, wherein,G 6 is the equivalent transconductance of the second-stage differential circuit with the tail current source IO2, rss2 is the limited output impedance of the current source IO2, and G 6＝KG0 and K are multiples of the size of the MOS tube of the second-stage differential circuit and the corresponding MOS tube of the first-stage differential circuit.
2. The current multiplexing low power consumption feedforward amplifying circuit according to claim 1, wherein the first component M0, the first component M1, the first component M2, the first component M3, the first component M2a, the first component M3a, the second component M4, the second component M5, the second component M6, and the second component M7 are PMOS transistors, and the G pole of the first component M2, the first component M3, the first component M2a, and the S pole of the first component M3a are connected, and the G pole of the first component M2 is connected to the D pole of the first component M3, the G pole of the first component M3a, and the D pole of the first component M3a, and is connected to the D pole of the first component M1, and the G pole of the second component M5 of the second level differential circuit; the D pole of the first component M2 is connected with the G pole of the first component M3, the G pole of the first component M2a and the D pole of the first component M2a, and is connected with the D pole of the first component M0 and the G pole of the second component M4 of the second-stage differential circuit, and the S pole of the first component M0 and the S pole of the first component M1 are connected with a first constant current source; the S pole of the second component M4 is connected with the S pole of the second component M5, the D pole of the second component M4 and the D pole of the second component M6 are connected with one end of one of the polar capacitors and one end of the resistor, the other ends of the polar capacitors and the resistor are respectively connected with one end of the other polar capacitor and one end of the circuit, the other ends of the other polar capacitors and the circuit are connected with the D pole of the second component M5 and the D pole of the second component M7, the S pole of the second component M6 and the S pole of the second component M7 are connected with a second constant current source, the G level of the second component M7 is connected with the G level of the first component M0, and the G level of the first component M1 is connected with the G level of the second component M6.
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| CN104639076A (en) * | 2014-08-27 | 2015-05-20 | 北京中电华大电子设计有限责任公司 | Lower-power-consumption broadband fully differential operational amplifier |
| CN104283519A (en) * | 2014-10-24 | 2015-01-14 | 中国电子科技集团公司第十三研究所 | Current multiplexing type feed-forward compensation fully differential operational amplifier |
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