CN107728712B - Autonomous controllable computer mainboard - Google Patents
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Abstract
The invention discloses an autonomous controllable computer mainboard, which comprises a COMe mainboard, a CPCI adapter board and a power module for supplying power to the COMe mainboard and the CPCI adapter board; the COMe mainboard comprises a processor, a bridge chip and a memory, and the CPCI adapter board comprises a PCIe to PCI bridge chip; the processor adopts a Loongson 3A series processor, the bridge chip adopts a Loongson 2H chip, the memory adopts a DDR3 memory particle chip, the Loongson 3A series processor is connected with the Loongson 2H chip through an HT bus, and the Loongson 3A series processor and the Loongson 2H chip are both connected with the DDR3 memory particle chip through a memory channel; and an EJTAG debugging interface for performing reliability test on the Loongson 3A series processor and the Loongson 2H chip is also arranged on the COMe mainboard. According to the invention, the loongson 3A series of processors with completely independent intellectual property rights and the loongson 2H matching bridge chip are adopted, and the hardware interface of the mainboard platform is arranged, so that the high product localization rate can be realized, the requirements of information safety and independent control are met, and the technical risk and the uncontrollable hidden danger in the product use and maintenance are eliminated.
Description
Technical Field
The invention belongs to the technical field of computer mainboards, and particularly relates to an autonomous controllable computer mainboard.
Background
For a long time, the computing equipment in China largely adopts foreign software and hardware products, and core technologies such as a high-performance processor, an operating system and the like are completely closed, so that the technology is restricted by people and potential safety hazards exist. The prism gate event shows that the United states has attempts, means and capabilities for implementing network penetration attack on China through information products, and foreign software and hardware products purchased by current governments, military parties and the like may have internal backdoor and holes, so that the information products become important potential safety hazards for secret leakage and even normal operation of an information system. In recent years, through the arrangement of national science and technology development plans, the software and hardware technology of a domestic computer makes a major breakthrough, and a high-performance processor represented by dragon core, Feiteng, Shenwei and the like and a domestic operating system represented by a Kanghu operating system, a Ruihukins real-time operating system and the like are developed, so that the national computer has the capability of primarily completing the domestic development of computer core components.
Disclosure of Invention
Aiming at the defects or improvement requirements in the prior art, the invention provides an autonomous controllable computer mainboard, which adopts a scheme of completely autonomous controllable Loongson 3A series processor and Loongson 2H matched bridge, is a hardware platform for realizing nationwide production of a CPU and a nest, ensures autonomous controllability of the computer mainboard in the aspect of core devices, and solves the potential safety hazards of technical risk and uncontrollable maintenance caused by insufficient mastering of a core technical principle.
In order to achieve the above object, according to an aspect of the present invention, there is provided an autonomous controllable computer motherboard, including a COMe motherboard, a CPCI adapter board, and a power module for supplying power to the COMe motherboard and the CPCI adapter board; the COMe mainboard comprises a processor, a bridge chip and a memory, and the CPCI adapter board comprises a PCIe to PCI bridge chip; the processor adopts a Loongson 3A series processor, the bridge chip adopts a Loongson 2H chip, the memory adopts a DDR3 memory particle chip, the Loongson 3A series processor is connected with the Loongson 2H chip through an HT bus, and the Loongson 3A series processor and the Loongson 2H chip are both connected with the DDR3 memory particle chip through a memory channel; the Loongson 3A series processor is connected with the VGA interface, the Ethernet interface and the PCIe interface on the COMe mainboard body, the Loongson 2H chip is connected with the SPI interface, the SATA interface, the LPC Bus interface, the HDA interface, the UART interface, the USB interface, the 12C Bus interface and the SDVO interface on the mainboard body, and the COMe mainboard is further provided with an EJTAG debugging interface for testing the reliability of the Loongson 3A series processor and the Loongson 2H chip.
Preferably, the power module of the autonomous controllable computer motherboard includes a power chip, a DC-DC power conversion chip and a voltage monitoring module, the power chip satisfies 5V ± 5% and 12V ± 5% voltage inputs, the DC-DC power conversion chip is configured to convert an external power supply into a working voltage of each power domain required by the COMe motherboard, and the voltage monitoring module is configured to collect an input voltage of the power chip, so as to ensure stable power-on of the COMe motherboard.
Preferably, in the main board of the autonomous controllable computer, the DDR3 memory particle chips are connected to the loongson 3A series of processors and the loongson 2H chip by means of surface mounting, wherein the loongson 3A series of processors are respectively connected to two sets of DDR3 memory particle chips through two memory channels, and the loongson 2H chip is connected to one set of DDR3 memory particle chips.
Preferably, the main board of the autonomous controllable computer further comprises two VGA analog display interfaces and one DVI digital display interface; the VGA analog display interface and the DVI digital display interface are both realized by a GPU integrated in a Loongson 2H chip, a first display switching chip connected with a CRT analog display interface output by the Loongson 2H chip converts the CRT analog display interface into the VGA analog display interface and divides the VGA analog display interface into two paths of output, one path of output is output to a front panel, and the other path of output is output to a rear I/O; the second display switching chip connected with the DVO digital display interface output by the Loongson 2H chip converts the DVO digital display interface into a DVI digital display interface, and the DVI digital display interface outputs back I/O; the first display switching chip and the second display switching chip are both arranged on the CPCI adapter plate, the MAX4885 chip is selected as the first display switching chip, and the TFP410-EP chip is adopted as the second display switching chip.
Preferably, in the main board of the autonomous controllable computer, the loongson 2H chip provides an SATA interface, and according to an application requirement, a FLASH memory chip or a hard disk connected to the SATA interface may be attached to the board surface to implement a storage function, where the FLASH memory chip is a NANDrive chip, and the hard disk is connected to the CPCI main board through the SATA interface.
Preferably, the loongson 2H chip of the main board of the autonomous controllable computer provides 6 USB2.0 interfaces, two of which are led out to the front panel, and the other four of which are led out to the rear I/O.
Preferably, in the main board of the autonomous controllable computer, a GMAC controller built in a loongson 2H chip of the main board is connected to a PHY chip disposed on the CPCI adapter board to implement a network interface function, and a network interface output by the PHY chip is isolated by a transformer and then connected to the rear I/O bus.
Preferably, in the main board of the autonomous controllable computer, a serial port controller built in a loongson 2H chip of the main board is connected with a serial port level mode conversion chip arranged on the CPCI adapter board to realize an RS232 serial port interface function, and the serial port level mode conversion chip adopts an SM3232 integrated multi-protocol serial port level mode conversion chip.
Preferably, the HDA controller provided by the loongson 2H chip of the main board of the autonomous controllable computer implements an audio interface function in combination with the HAD codec chip; the HAD coding and decoding chip selects an ALC888HAD audio decoding chip; the audio interface includes: left and right channels line-in, microphone input, left and right channels CD input, left and right channels line-out.
Preferably, in the main board of the autonomous controllable computer, the PCIe to PCI bridge chip is implemented by using a PI7C9X110 chip, and the PI7C9X110 chip is combined with an interface circuit to convert one PCIe bus provided by the loongson 2H chip into a 32bit @33mhz cpci bus.
In general, compared with the prior art, the above technical solution contemplated by the present invention can achieve the following beneficial effects:
(1) the autonomous controllable computer mainboard provided by the invention adopts a Loongson 3A series processor and a Loongson 2H matching bridge chip with completely autonomous intellectual property rights, and sets a hardware interface of a mainboard platform, wherein main chips of the mainboard platform can adopt home-made devices including a CPU (central processing unit), a bridge chip, an internal memory, a network controller and the like, so that higher product localization rate can be realized, and the types of home-made devices of the mainboard of the computer are more than 96%; the number of the domestic devices is more than 99%, the standard that the types and the number of the devices exceed double 95% is realized, the requirements of information safety and autonomous control are met, and the technical risk and uncontrollable hidden danger in the use and maintenance of products are eliminated;
(2) the main board of the autonomous controllable computer provided by the invention adopts the design of the COMe main board and the CPCI adapter board to realize the parallel development of the core board and the function board, and the function verification board which can be used for target equipment is produced at a higher speed; a more flexible extension form is provided for users, the design period of the user for constructing the autonomous computer product based on the Loongson 3A processor is shortened, and the method has important economic value and strategic significance;
(3) the autonomous controllable computer mainboard provided by the invention can be simultaneously applied to 5V and 12V voltage environments by the matched arrangement of the power chip, the DC-DC power conversion chip and the voltage monitoring module, the power monitoring module collects input power voltage, and the mainboard starts to be electrified after the voltage is stable, so that the stable electrification of a system is ensured, and the capability of resisting severe environments is enhanced;
(4) the autonomous controllable computer mainboard provided by the invention can realize the access of a CPU and a bridge chip register through the arranged EJTAG debugging interface, so that the state of a chip can be flexibly accessed, controlled and detected when the computer mainboard breaks down or debugs software, and the troubleshooting and debugging are facilitated; through POMON firmware design, set up the serial ports of CPU and bridge piece into DEBUG information printing interface, can realize the online debugging to relevant integrated circuit board through host computer serial ports connection, detect CPU's operational aspect, remote debugging is realized to serial ports debugging interface to make the testability performance reinforcing of module.
Drawings
FIG. 1 is a schematic block diagram of a COMe motherboard of an autonomous controllable computer motherboard according to the present invention;
FIG. 2 is a schematic block diagram of a 6U CPCI patch board for a main board of an autonomous controllable computer provided by the present invention;
FIG. 3 is a schematic diagram of display switching of a motherboard of an autonomous controllable computer according to the present invention;
FIG. 4 is a schematic diagram of a power module of a motherboard of an autonomous controllable computer according to the present invention;
fig. 5 shows the installation effect of the hard disk of the main board of the autonomous controllable computer provided by the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention. In addition, the technical features involved in the embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.
The invention provides an autonomous controllable computer mainboard which comprises a mainboard body, a Loongson 3A1500 processor, a Loongson 2H chip, a memory, a PCIe-to-PCI bridge chip and a power module, wherein hardware interfaces of the mainboard are arranged and comprise a display interface, a storage interface, a USB interface, a network interface, a serial interface and an audio interface.
As shown in fig. 1 and 2, the main board body adopts a design of a COMe main board and a CPCI adapter board, the COMe main board considers the size of TYPE6, and the CPCI adapter board adopts a 6U CPCI adapter board;
the adopted Loongson 3A1500 processor is a microstructure upgrading version of a Loongson 3A1000 quad-core processor, and packaging pins of the Loongson 3A1500 processor are compatible with the Loongson 3A 1000; the Loongson 3A1500 is a processor configured as a single-node 4-core, is manufactured by adopting a 40nm process, has the working dominant frequency of 700MHz-1GHz, and has the following main technical indexes: the working dominant frequency is 700MHz-1 GHz; 4 64-bit four-emission superscalar GS464E high-performance processor cores are integrated on a chip; the primary instruction and data private cache of each processor core is 64KB, the secondary private cache of each processor core is 256KB, four processor cores share the distributed 4MB three-level cache, 2 64-bit ECC (error correction code) controllers and 667MHz (double data rate) 2/3 controllers are integrated in a chip, 2 16-bit or 2 8-bit HyperTransport3.0 controllers are integrated in a 3A1500 chip, 1 LPC (linear predictive controller), 2 UART (universal asynchronous receiver/transmitter), 1 SPI (serial peripheral) and 16-way GPIO (general purpose input/output) interfaces are integrated in a chip, and the industrial-40-85-DEG working device is provided.
The bridge chip adopts a Loongson 2H chip matched with the processor, and the Loongson 2H chip adopts a general processor with completely independent intellectual property rights and integrates a CPU, a GPU, various buses and I/O interfaces. In this embodiment, the integrated GPU and bus interface functions are utilized to provide interface function bridging for the Loongson 3a1500 processor chip. The Loongson 2H chip is realized by adopting a 65nm technology, the main frequency reaches more than 1GHz, and the functions of a fixed-point processor, a floating-point processor, streaming media processing and graphic image processing, south bridge, north bridge and other matched chip sets are integrated in the chip; the main technical indexes are as follows: the MIPS 64R 2 system structure is compatible, comprises 2 full-flow 64-bit double-precision floating point multiply-add units, 64KB data Cache, 64KB instruction Cache and 512K secondary Cache, and has industrial-grade working devices from minus 40 ℃ to plus 85 ℃.
The Loongson 3A1500 processor and the Loongson 2H chip both support DDR2/DDR3 memory, the DDR3 is considered to be better in performance and lower in power consumption, and DDR3-SDRAM particles are adopted to achieve the memory function in the embodiment; in order to ensure the working reliability and the capability of resisting severe environment of the COMe mainboard, the mode of pasting on the surface of the mainboard is adopted. The surface-mounted memory chip is a 4Gbit DDR3-SDRAM (HXI15H4G160AF) chip, and the chip can be compatible with an MT41K256M16 chip; the main technical indexes of the memory chip are as follows: 256Meg 16DDR3 SDRAM supports 1.5V and 1.35V VDDQ, maximum DDR3-2133, and the working temperature range is-40 ℃ to +95 ℃.
The GPU integrated by the Loongson 2H chip supports two paths of display output, one path of CRT analog display interface and one path of DVO digital display interface; the GPU has the following main technical indexes: support AVS, H.264 and VC-1 decoding, support 1080p high definition, support OpenGLES2.0, OpenGL ES 1.1, support OpenVG, Alpha mixing, 90-degree rotation, transparent support, color space conversion, high-quality scaling, dual-display output, CRT/DVO, hardware cursor, high-pixel clock (CRT 200MHz, DVO 165MHz 1080 p);
the display switching schematic block diagram is shown in fig. 2 and fig. 3, the display switching chip divides the CRT analog display interface output by the loongson 2H into two VGA analog display interfaces, one of which is output to the front panel, and the other is output to the rear I/O; the display switching chip selects MAX4885, the MAX4885 chip integrates switching functions of VGA interface analog RGB signals, digital synchronizing signals and DDC signals, and also integrates a digital signal level conversion function of a VGA analog display interface, and meanwhile, the display switching chip has 8KV human body electrostatic protection. The MAX4885 chip has the following main technical indexes: the system is supported by a 5V single power supply, a DDC signal programmable voltage clamp, a 5-ohm R, G, B signal on-resistance, 13pF R and G, B signal capacitors, 8KV human body electrostatic ESD protection, and the working temperature range is-40 ℃ to +85 ℃.
Because the digital display output interface of the Loongson 2H chip is a DVO interface, for realizing DVI display output, the TFP410-EP chip is adopted to convert the DVO digital display interface into the DVI digital display interface; the TFP410-EP chip supports 165MHz pixel clock frequency to the maximum, and can realize 1080p resolution video conversion, and the detailed technical indexes are as follows: the pixel frequency of 165MHz (1080p @60Hz), a general graphic controller interface, enhanced PLL noise control and enhanced jitter control can be supported, programming can be carried out through an I2C interface, hot plug detection of a display is carried out, power is supplied by a single 3.3V power supply, and the working temperature range is from minus 55 ℃ to plus 125 ℃.
The operating voltage of COMe mainboard is 12V, the operating voltage of CPCI keysets is mainly 5V and 3.3V, for realizing the compatible adaptation of COMe mainboard and CPCI keysets, this embodiment provides one kind can satisfy 5V simultaneously, the power module of 12V voltage demand, this power module is for the domestic power chip that has 4-14V wide range input, satisfy 5V 5% and 12V 5% voltage input, and the 0.75V voltage that memory VTT needs then designs to get the electricity from power module's rear, guaranteed in two kinds of voltage range, COMe mainboard can normally work.
The power domains required by the COMe motherboard include: (1) the power supply of the processor core is 1.15V; (2) the memory controller and the memory power supply are 1.5V; (3) 2H SOC of the Loongson and 1.15V of CPU voltage; (4) PLL power supply of Loongson 3A and 2H is 1.1V; (5) HT bus voltage of loongson 3A and 2H is 1.2V; (6) HT bus PHY voltage of loons 3A and 2H is 1.8V; (7) the PHY power supply of the Loongson 2H network card is 2.5V; (8) the system working state (S0) power supply is 3.3V; (9) system S3(Suspend to RAM) status power supply 3.3V; (10) the power supply of the system S0 is 2.5V; (11) the Loongson 2H RSM domain power supply is 1.15V. In order to realize the above power conversion in a small-sized board, a high-integration DC-DC power conversion chip is used, as shown in fig. 4, the DC-DC power conversion chip converts a 12V power supply into different operating voltages of the power domains by using a national micro LTM46 series chip and a TPS51200, the national micro LTM46 series chip includes, but is not limited to, an LTM4644, an LTM4620, an LTM4630 and an LTM4628 chip, wherein nuclear power of a large current is realized by using the national micro LTM4620, the rest of power supplies are realized by using the national micro LTM4644, and the TPS51200 is used for converting a 3.3V voltage into a 0.75V power supply required by a DDR3 terminal resistor.
In practical application, a computer motherboard is usually matched with a plurality of groups of functional modules, so that a large impact current may be generated at the moment of power-on, which leads to voltage drop, and the voltage drop easily leads to abnormal power-on of the COMe motherboard.
The COMe mainboard is separately designed with an EJTAG debugging interface of Loongson 3A and 2H, and an EJTAG matching special adapter can realize access of a CPU and a bridge register, so that the COMe mainboard can flexibly access a chip and control and detect the state of the chip when a fault occurs or software is debugged, thereby being very favorable for troubleshooting and debugging. And through PMON firmware design, set up the serial ports of CPU and bridge piece into DEBUG information printing interface, can realize the online debugging to relevant integrated circuit board through host computer serial ports connection, detect CPU's behavior, the remote debugging is realized to serial ports debugging interface to make the testability performance of module strengthen.
The Loongson 2H chip is integrated with an SATA (serial advanced technology attachment) hard disk interface, and the embodiment provides two storage modes based on the SATA interface, wherein one mode is to paste a FLASH storage chip on a board surface, and the other mode is to provide a reinforced SATA hard disk; the surface-mounted FLASH memory chip can provide a high-density and severe environment resistant storage mode, but has limited storage capacity and low read-write speed; the SATA hard disk can provide a high-capacity and high-speed storage mode, and the performance of the SATA hard disk is inferior to that of a surface-mounted chip in severe environment resistance.
A NANDrive chip is selected as a FLASH storage chip on a board surface, and the chip has the following main technical indexes: SATA1.5Gb/s, ATA/ATAPI-8 compatibility, 48-bit address function setting support, 120MB/s sequential data reading support, 80MB/s sequential data writing support, 3.3V and 1.2V voltage support, SMART command support, 1bit per cell (SLC) NAND flash, and the working temperature range is-40 ℃ to +85 ℃;
the reinforced SATA hard disk adopts a mature solution, as shown in FIG. 5, a standard 2.5-inch SATA interface hard disk can be mounted on the board card, and the hard disk is reinforced; the hard disk is connected to the CPCI adapter plate through the SATA interface adapter plate; the SATA interface hard disk can be installed on the cold conduction structure through a reinforcing piece, and can also be installed on the CPCI adapter plate through a stud.
Two paths of 6 paths of USB2.0 interfaces provided by the Loongson 2H chip are led out to the front panel so as to facilitate connection of a keyboard and a mouse or USB storage equipment during debugging of the front panel, and the other four paths are led out to the bus back I/O for bus I/O function expansion; the USB2.0 interface of the front panel is powered by a power supply inside the board card, the two interfaces share a USB special power supply for power supply, and the current is limited to about 1.2A; the USB2.0 interface of the back I/O only leads out signals, and the CPCI board card does not independently provide a power supply, and the power is supplied from the bus backboard in specific application.
The Loongson 2H chip provides two paths of Ethernet GMAC controllers, the Ethernet controller provided by the Loongson 2H chip realizes the Ethernet function, the use number of imported devices can be reduced, and the compatibility of a network interface and software and hardware of a Loongson system can also be ensured. The Ethernet GMAC controller provided by the Loongson 2H chip has the following main technical indexes: the two paths of 10/100/1000Mbps adaptive Ethernet MAC and the double network cards are compatible with IEEE 802.3, realize RGMII interface for external PHY, realize half-duplex/full-duplex adaptation, Timestamp function and half-duplex working hours, support collision detection and retransmission (CSMA/CD) protocol, support automatic generation and verification of CRC check codes and support generation and deletion of prefixes;
two PHY chips are expanded outside the Loongson 2H chip to realize a standard copper cable gigabit Ethernet interface, and an Ethernet interface output by the PHY chip is isolated by an Ethernet transformer and then connected to an I/O bus behind the CPCI patch board.
The two paths of serial interfaces are realized by using a serial controller provided by a Loongson 2H chip, two paths of serial level mode conversion chips are expanded outside the Loongson 2H chip to realize the RS232 serial interface function, and the two paths of serial interfaces adopt a 3-wire serial mode and comprise TXD (transmit-X-ray device), RXD (receive-X-ray device) and GND (ground) signals; the serial port level mode conversion chip adopts a mature scheme, uses an SM3232 serial port level mode conversion chip, can support an RS232 serial port level standard, and can configure the output serial port level standard through a mode selection pin. The serial port circuit adopts a mature interface protection scheme, so that the damage of serial port signal line interference to a serial port interface chip in an industrial environment can be effectively reduced.
The audio interface function is realized by combining an HDA controller provided by a Loongson 2H chip with an external HAD coding and decoding chip; the HAD controller has the following main technical indexes: supporting 16, 18 and 20 bit sampling accuracy supports variable rates up to 192KHz, 7.1 channel surround sound output, three audio inputs. The audio interface coding and decoding chip selects an ALC888HAD audio decoding chip. The audio interface designed in the present embodiment includes: left and right channels line-in, microphone input, left and right channels CD input, left and right channels line-out.
The CPCI bus adopts a full-blown cooperation CPCI mature scheme on an X86 platform and is transferred out through a PCIe to PCI bridge chip; the PCIe to PCI bridge chip is realized by adopting a PI7C9X110 chip, and a 32bit @33MHz CPCI bus supporting 7 peripheral boards is realized by a PCIe X1 bus, the PI7C9X110 chip and an interface circuit which are provided by a Loongson 2H chip.
The Loongson 3A1500 processor belongs to an MIPS64 framework, software is divided into three parts, namely firmware, an operating system and application software, the firmware adopts a BIOS chip similar to an X86 platform and is responsible for carrying out basic initialization on the processor and a bridge piece, and a bootable environment is built; the operating system is the same as a bottom layer interface of the X86 platform and is responsible for realizing software and hardware scheduling of the whole equipment; the application software is consistent with the X86 platform at the original code level and is responsible for realizing specific functions.
The firmware that is currently successfully adapted to the Loongson 3A processor is: PMON firmware, Kunlun firmware, and hundred-chann firmware, wherein Kunlun and hundred-chann firmware conforms to the UEFI standard; the operating systems that successfully adapt to the Loongson 3A processor are: a Loongix system, a NeoKylin system, a VxWorks6.8.3 system, a ReWorks system and a DeltaOS system; wherein Loongix and NeoKylin are both based on Linux system, and ReWorks and DeltaOS are both compatible with VxWorks system.
The main board of the autonomous controllable computer provided by the invention adopts a domestic and completely autonomous controllable processor and a matched bridge chip, so that higher product localization rate can be realized, and the requirements of information safety and autonomous controllable are met.
It will be understood by those skilled in the art that the foregoing is only a preferred embodiment of the present invention, and is not intended to limit the invention, and that any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the scope of the present invention.
Claims (10)
1. An autonomous controllable computer mainboard is characterized by comprising a COMe mainboard, a CPCI adapter board and a power module for supplying power to the COMe mainboard and the CPCI adapter board; the COMe mainboard comprises a processor, a bridge chip and a memory, and the CPCI adapter board comprises a PCIe-to-PCI bridge chip; the processor adopts a Loongson 3A series processor, the bridge chip adopts a Loongson 2H chip, the memory adopts a DDR3 memory particle chip, the Loongson 3A series processor is connected with the Loongson 2H chip through an HT bus, and the Loongson 3A series processor and the Loongson 2H chip are both connected with the DDR3 memory particle chip through a memory channel; the Loongson 3A series processor is connected with a VGA interface, an Ethernet interface and a PCIe interface on a COMe mainboard body, the Loongson 2H chip is connected with an SPI interface, an SATA interface, an LPC Bus interface, an HDA interface, a UART interface, a USB interface, a 12C Bus interface and an SDVO interface on the mainboard body, and the COMe mainboard is also provided with an EJTAG debugging interface and an adapter for performing reliability test on the Loongson 3A series processor and the Loongson 2H chip so as to realize access of a CPU and a bridge chip register; serial ports of the CPU and the bridge chip are set as DEBUG information printing interfaces through PMON firmware, and the DEBUG information printing interfaces are connected with serial ports of an upper computer to realize online debugging of relevant board cards.
2. The autonomous controllable computer motherboard as recited in claim 1, wherein the power module comprises a power chip, a DC-DC power conversion chip and a voltage monitoring module, the power chip satisfies 5V ± 5% and 12V ± 5% voltage inputs, the DC-DC power conversion chip is configured to convert an external power supply into operating voltages of each power domain required by the COMe motherboard, and the voltage monitoring module is configured to collect input voltages of the power chip and ensure stable power-on of the COMe motherboard.
3. The autonomous controllable computer motherboard according to claim 1 or 2, wherein said DDR3 memory granule chips are connected to the loongson 3A series of processors and the loongson 2H chip by means of surface mounting, wherein the loongson 3A series of processors are connected to two sets of DDR3 memory granule chips through two memory channels, respectively, and the loongson 2H chip is connected to one set of DDR3 memory granule chips.
4. The autonomous controllable computer motherboard according to claim 1 or 2, further comprising two VGA analog display interfaces and one DVI digital display interface; the VGA analog display interface and the DVI digital display interface are both realized by a GPU integrated in a Loongson 2H chip, a first display switching chip connected with a CRT analog display interface output by the Loongson 2H chip converts the CRT analog display interface into the VGA analog display interface and divides the VGA analog display interface into two paths of output, one path of output is output to a front panel, and the other path of output is output to a rear I/O; the second display switching chip connected with the DVO digital display interface output by the Loongson 2H chip converts the DVO digital display interface into a DVI digital display interface, and the DVI digital display interface outputs to a back I/O; the first display switching chip and the second display switching chip are both arranged on the CPCI adapter plate, the MAX4885 chip is selected as the first display switching chip, and the TFP410-EP chip is adopted as the second display switching chip.
5. The autonomous controllable computer motherboard according to claim 1, wherein said Loongson 2H chip provides SATA interface, and a FLASH memory chip or a hard disk connected to said SATA interface is attached to the board surface to realize storage function, said FLASH memory chip is NANDrive chip, and said hard disk is connected to the CPCI adapter board through SATA interface.
6. The autonomous controllable computer motherboard according to claim 1 or 5, wherein said Loongson 2H chip provides six USB2.0 interfaces, two of which are USB2.0 interfaces leading out to the front panel, and the other four are USB2.0 interfaces leading out to the back I/O.
7. The autonomous controllable computer motherboard of claim 1, wherein said GMAC controller built in the loongson 2H chip is connected to a PHY chip disposed on the CPCI adapter board to implement a network interface function, and a network interface output by said PHY chip is further isolated by a transformer and then connected to an I/O bus of the CPCI adapter board.
8. The autonomous controllable computer motherboard according to claim 1 or 7, wherein a serial port controller built in the loongson 2H chip is connected to a serial port level mode conversion chip provided on the CPCI adapter board to implement an RS232 serial port interface function, and the serial port level mode conversion chip adopts an SM3232 integrated multi-protocol serial port level mode conversion chip.
9. The autonomous controllable computer motherboard according to claim 8, wherein said HDA controller provided by said loongson 2H chip implements an audio interface function in combination with an HAD codec chip; the HAD coding and decoding chip selects an ALC888HAD audio decoding chip; the audio interface includes: left and right channels line-in, microphone input, left and right channels CD input, left and right channels line-out.
10. The autonomous controllable computer motherboard of claim 1, wherein said PCIe to PCI bridge chip is implemented using a PI7C9X110 chip, and said PI7C9X110 chip is combined with an interface circuit to convert a PCIe bus provided by the loongson 2H chip into a 32bit @33MHz CPCI bus.
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