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CN107688435B - IO stream adjusting method and device - Google Patents

IO stream adjusting method and device Download PDF

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Publication number
CN107688435B
CN107688435B CN201610836522.4A CN201610836522A CN107688435B CN 107688435 B CN107688435 B CN 107688435B CN 201610836522 A CN201610836522 A CN 201610836522A CN 107688435 B CN107688435 B CN 107688435B
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group
command
logical
logical units
unit group
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CN107688435A (en
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路向峰
孙清涛
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Beijing Memblaze Technology Co Ltd
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Beijing Memblaze Technology Co Ltd
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Priority to PCT/CN2017/095662 priority Critical patent/WO2018024214A1/en
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0602Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/061Improving I/O performance
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0629Configuration or reconfiguration of storage systems
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0668Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671In-line storage system
    • G06F3/0673Single storage device
    • G06F3/0679Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Human Computer Interaction (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Read Only Memory (AREA)
  • Logic Circuits (AREA)

Abstract

An IO stream adjusting method and device are provided, and IO streams are adjusted by processing IO commands. The method for processing the IO command comprises the following steps: acquiring a first logic unit group; obtaining a first IO command having a first tag based on a first group of logical units, wherein the first group of logical units is associated with the first tag; and writing data to the first group of logical units in response to the first IO command.

Description

IO stream adjusting method and device
Technical Field
The present invention relates to a solid state disk, and in particular, to a method and an apparatus for processing multiple write request streams in a solid state disk.
Background
Referring to FIG. 1, a block diagram of a solid-state storage device is shown. The solid-state storage device 102 is coupled to a host for providing storage capabilities to the host. The host and the solid-state storage device 102 may be coupled by various methods, including but not limited to, connecting the host and the solid-state storage device 102 by, for example, SATA (Serial Advanced Technology Attachment), SCSI (Small Computer System Interface), SAS (Serial Attached SCSI), IDE (Integrated Drive Electronics), USB (Universal Serial Bus), PCIE (Peripheral Component Interconnect Express, PCIE, high-speed Peripheral Component Interconnect), NVMe (NVM Express, high-speed nonvolatile storage), ethernet, fiber channel, wireless communication network, etc. The host may be an information processing device, such as a personal computer, tablet, server, portable computer, network switch, router, cellular telephone, personal digital assistant, etc., capable of communicating with the storage device in the manner described above. The storage device 102 includes an interface 103, a control unit 104, one or more NVMs (non-volatile memory,
Non-Volatile Memory) chip 105 and DRAM (Dynamic Random Access Memory) 110. NAND flash, phase change memory, FeRAM, MRAM, etc. are common NVMs. The interface 103 may be adapted to exchange data with a host by means such as SATA, IDE, USB, PCIE, NVMe, SAS, ethernet, fibre channel, etc. Control component 104 is used to control the transfer of data between interface 103, NVM chip 105, and DRAM 110, as well as for memory management, host logical address to flash physical address mapping, erase leveling, bad block management, etc. The control component 104 can be implemented in a variety of ways including software, hardware, firmware, or a combination thereof. The control unit 104 may be in the form of an FPGA (Field-programmable gate array), an ASIC (Application Specific Integrated Circuit), or a combination thereof. The control component 104 may also include a processor or controller in which software is executed to manipulate the hardware of the control component 104 to process IO commands. The control unit 104 is also coupled to the DRAM 110 and can access data of the DRAM 110. FTL tables and/or cached IO command data may be stored in the DRAM.
The memory Target (Target) is one or more Logic units (Logic units) that share a Chip Enable (CE) signal within the NAND flash package. Each logical Unit has a Logical Unit Number (LUN). One or more dies (Die) may be included within the NAND flash memory package. Typically, a logic cell corresponds to a single die. The logical unit may include a plurality of planes (planes). Multiple planes within a logical unit may be accessed in parallel, while multiple logical units within a NAND flash memory chip may execute commands and report status independently of each other. The meaning for target, logical Unit, LUN, Plane (Plane) is provided in "Open NAND Flash Interface Specification (Revision 3.0)" available from http:// www.micron.com// media/Documents/Products/Other% 20Documents/ONFI3_0 gold.
NVM storage media typically store and read data on a page basis. And data is erased in blocks. A block contains multiple pages. Pages on the storage medium (referred to as physical pages) have a fixed size, e.g., 17664 bytes. Physical pages may also have other sizes.
In the solid-state storage device, mapping information from logical addresses to physical addresses is maintained using FTL (Flash Translation Layer). The logical addresses constitute the storage space of the solid-state storage device as perceived by upper-level software, such as an operating system. The physical address is an address for accessing a physical memory location of the solid-state memory device. Address mapping may also be implemented in the prior art using an intermediate address modality. E.g. mapping the logical address to an intermediate address, which in turn is further mapped to a physical address.
A table structure storing mapping information from logical addresses to physical addresses is called an FTL table. FTL tables are important metadata in solid state storage devices. Usually, the data entry of the FTL table records the address mapping relationship in the unit of data page in the solid-state storage device.
The FTL table includes a plurality of FTL table entries (or table entries). In one example, each FTL table entry records a corresponding relationship between a logical page address and a physical page. In another example, each FTL table entry records the correspondence between consecutive logical page addresses and consecutive physical pages. In another embodiment, each FTL table entry records the corresponding relationship between the logical block address and the physical block address. In still another embodiment, the FTL table records the mapping relationship between logical block addresses and physical block addresses, and/or the mapping relationship between logical page addresses and physical page addresses.
Disclosure of Invention
Because the write command processing bandwidth of the solid state disk is limited by the number of flash memory channels and the electric quantity of a standby battery, a plurality of IO commands need to be processed by the limited bandwidth, and good performance, user experience or service quality are obtained.
According to a first aspect of the present invention, there is provided a first method for processing an IO command, including: acquiring a first logic unit group; obtaining a first IO command having a first tag based on a first group of logical units, wherein the first group of logical units is associated with the first tag; and writing data to the first group of logical units in response to the first IO command.
According to the first method for processing IO commands of the first aspect of the present invention, there is provided the second method for processing IO commands of the first aspect of the present invention, further comprising: acquiring a second logic unit group; obtaining a second IO command having a second tag based on a second group of logical units, wherein the second group of logical units is associated with the second tag; and writing data to a second group of logic cells in response to the second IO command.
According to the first or second method for processing an IO command of the first aspect of the present invention, there is provided a third method for processing an IO command of the first aspect of the present invention, further comprising: based on the first logic unit group, if a first IO command with a first label to be processed does not exist, acquiring a third IO command with a second label; and writing data to the first group of logic cells in response to the third IO command.
According to the second method for processing an IO command of the first aspect of the present invention, there is provided a fourth method for processing an IO command of the first aspect of the present invention, further comprising: based on the second logic unit group, if a second IO command with a second label to be processed does not exist, acquiring a fourth IO command with a third label; and writing data to a second group of logic cells in response to the fourth IO command.
According to one of the first to fourth methods of processing an IO command of the first aspect of the present invention, there is provided a fifth method of processing an IO command of the first aspect of the present invention, further comprising: before writing data into the logic unit group, distributing a physical address for the IO command from the logic unit group; and updating the FTL table by using the logical address and the physical address of the IO command.
According to the first or second method for processing an IO command of the first aspect of the present invention, there is provided a sixth method for processing an IO command of the first aspect of the present invention, further comprising: if the first logic unit group has responded to the first number of the first IO commands, acquiring a fifth IO command having a second tag based on the first logic unit group; and writing data to the first group of logic cells in response to the fifth IO command.
According to the second method for processing an IO command of the first aspect of the present invention, there is provided a seventh method for processing an IO command of the first aspect of the present invention, further comprising: if the second logic unit group has responded to the second IO commands of the second number, acquiring a sixth IO command with a third tag based on the second logic unit group; and writing data to the second group of logical units in response to the sixth IO command.
According to one of the first to seventh methods of processing an IO command of the first aspect of the present invention, there is provided the eighth method of processing an IO command of the first aspect of the present invention, wherein the writing of data to the group of logical units is writing data sequentially to active large blocks of the group of logical units.
According to one of the first to eighth methods of processing an IO command of the first aspect of the present invention, there is provided the ninth method of processing an IO command of the first aspect of the present invention, further comprising: and changing the corresponding relation between the logical unit group and the label so that the first logical unit group is associated with the second label.
According to a ninth method for processing an IO command of the first aspect of the present invention, there is provided the tenth method for processing an IO command of the first aspect of the present invention, further comprising: obtaining an IO command with a second label associated with the first logic unit based on the first logic unit group; and writing data to the first group of logical units in response to the IO command.
According to a third method for processing an IO command of the first aspect of the present invention, there is provided the eleventh method for processing an IO command of the first aspect of the present invention, further comprising: the correspondence of the group of logical units to the tags is changed such that the first group of logical units is associated with the second tag with a first priority and the first group of logical units is associated with the third tag with a second priority, wherein the first priority is higher than the second priority.
According to a tenth aspect of the present invention, there is provided the twelfth aspect of the present invention, there is provided a method of processing an IO command, further comprising: based on the first logic unit group, obtaining an IO command with a second label or an IO command with a third label associated with the first logic unit group according to the priority; and writing data to the first group of logical units in response to the IO command.
According to one of the ninth to twelfth methods of processing an IO command of the first aspect of the present invention, there is provided the thirteenth method of processing an IO command of the first aspect of the present invention, wherein the correspondence relationship between the first logical unit group and the tag is changed so that the first logical unit group is associated with the second tag, based on the specified amount of data being written to the first logical unit group.
According to one of the ninth to twelfth methods of processing an IO command of the first aspect of the present invention, there is provided the fourteenth method of processing an IO command of the first aspect of the present invention, wherein the correspondence relationship between the first logical unit group and the tag is changed based on a lapse of the specified time interval so that the first logical unit group is associated with the second tag.
According to one of the ninth to fourteenth methods of processing an IO command of the first aspect of the present invention, there is provided the fifteenth method of processing an IO command of the first aspect of the present invention, further comprising: and changing the corresponding relation between the logical unit group and the label so that the second logical unit group is associated with the third label.
According to one of the first to fifteenth methods of processing IO commands of the first aspect of the present invention, there is provided the sixteenth method of processing IO commands of the first aspect of the present invention, wherein the first tag indicates a sequential write stream, the second tag indicates a random write stream, and the third tag indicates a command stream from a garbage collection operation.
According to one of the first to sixteenth methods of processing an IO command of the first aspect of the present invention, there is provided the seventeenth method of processing an IO command of the first aspect of the present invention, further comprising: an IO command is received.
According to a seventeenth method for processing an IO command of the first aspect of the present invention, there is provided the eighteenth method for processing an IO command of the first aspect of the present invention, further comprising: a tag is set for the IO command.
According to a seventeenth or eighteenth method of processing an IO command of the first aspect of the present invention, there is provided the nineteenth method of processing an IO command of the first aspect of the present invention, further comprising: and adjusting the processing bandwidth of the IO commands with different labels according to the number of the idle large blocks.
According to a nineteenth method of processing IO commands of the first aspect of the present invention, there is provided the twentieth method of processing IO commands of the first aspect of the present invention, wherein if the number of free large blocks is below the threshold, the processing bandwidth of the IO commands having the first tag and/or the second tag is reduced, and the processing bandwidth of the IO commands having the third tag is increased.
According to a nineteenth or twentieth aspect of the present invention, there is provided the twenty-first method for processing an IO command according to the first aspect of the present invention, wherein if the number of free chunks is not lower than the threshold, the processing bandwidth of the IO command having the first tag and/or the second tag is increased, and the processing bandwidth of the IO command having the third tag is decreased.
According to one of the nineteenth to twenty-first methods of processing an IO command of the first aspect of the present invention, there is provided the twenty-second method of processing an IO command of the first aspect of the present invention, wherein a processing bandwidth of the IO command is a number of IO commands having a specified tag processed per unit time.
According to a second aspect of the present invention, there is provided an apparatus for processing an IO command according to the second aspect of the present invention, including: means for obtaining a first group of logical units; means for obtaining a first IO command having a first tag based on a first set of logical units, wherein the first set of logical units is associated with the first tag; and means for writing data to the first group of logical units in response to the first IO command.
According to a second aspect of the present invention, there is provided an IO command processing apparatus, further comprising: means for obtaining a second set of logical units; means for obtaining a second IO command having a second tag based on a second set of logical units, wherein the second set of logical units is associated with the second tag; and means for writing data to a second group of logic cells in response to the second IO command.
The first or second IO command processing apparatus according to the second aspect of the present invention provides the third IO command processing apparatus according to the second aspect of the present invention, further including: a module configured to obtain, based on the first logical unit group, a third IO command having a second tag if there is no to-be-processed first IO command having the first tag; and means for writing data to the first group of logic cells in response to the third IO command.
The second IO command processing apparatus according to the second aspect of the present invention provides the fourth IO command processing apparatus according to the second aspect of the present invention, further including: a module configured to obtain, based on the second logic unit group, a fourth IO command having a third tag if there is no to-be-processed second IO command having the second tag; and means for writing data to a second group of logic cells in response to the fourth IO command.
According to one of the first to fourth IO command processing apparatuses of the second aspect of the present invention, there is provided an IO command processing apparatus of the fifth aspect of the present invention, further comprising: a module for allocating a physical address to the IO command from the logical unit group before writing data to the logical unit group; and means for updating the FTL table with the logical address and the physical address of the IO command.
According to the first or second IO command processing apparatus of the second aspect of the present invention, there is provided an IO command processing apparatus of the sixth aspect of the present invention, further comprising: means for obtaining a fifth IO command having a second tag based on the first group of logic cells if the first group of logic cells has responded to the first IO command of the first number; and means for writing data to the first group of logic cells in response to the fifth IO command.
The second IO command processing apparatus according to the second aspect of the present invention provides the seventh IO command processing apparatus according to the second aspect of the present invention, further including: means for obtaining a sixth IO command having a third tag based on the second group of logic cells if the second group of logic cells has responded to the second IO commands of the second number; and means for writing data to a second group of logic cells in response to the sixth IO command.
According to one of the first to seventh devices for processing an IO command of the second aspect of the present invention, there is provided the eighth device for processing an IO command of the second aspect of the present invention, wherein the writing of data to the group of logical units is sequential writing of data to the active large blocks of the group of logical units.
According to one of the first to eighth apparatuses for processing an IO command of the second aspect of the present invention, there is provided the ninth apparatus for processing an IO command of the second aspect of the present invention, further comprising: and a module for changing the correspondence between the logical unit groups and the tags so that the first logical unit group is associated with the second tag.
According to a ninth apparatus for processing an IO command of the second aspect of the present invention, there is provided the tenth apparatus for processing an IO command of the second aspect of the present invention, further comprising: means for obtaining an IO command associated with the first logical unit having a second tag based on the first group of logical units; and means for writing data to the first group of logical units in response to the IO command.
The third IO command processing apparatus according to the second aspect of the present invention provides the eleventh IO command processing apparatus according to the second aspect of the present invention, further including: means for changing correspondence of the set of logical units to the tags such that the first set of logical units is associated with the second tag with a first priority and the first set of logical units is associated with the third tag with a second priority, wherein the first priority is higher than the second priority.
The tenth IO command processing apparatus according to the second aspect of the present invention provides the twelfth IO command processing apparatus according to the second aspect of the present invention, further comprising: means for obtaining an IO command with a second tag or an IO command with a third tag associated with the first logical group unit according to the priority based on the first logical group unit; and means for writing data to the first group of logical units in response to the IO command.
According to one of the ninth to twelfth apparatuses that process IO commands of the second aspect of the present invention, there is provided the thirteenth apparatus that processes IO commands of the second aspect of the present invention, wherein the correspondence relationship between the first logical unit group and the tag is changed so that the first logical unit group is associated with the second tag, based on the specified amount of data being written to the first logical unit group.
According to one of the ninth to twelfth apparatuses for processing an IO command of the second aspect of the present invention, there is provided the fourteenth apparatus for processing an IO command of the second aspect of the present invention, wherein the correspondence relationship of the first logical unit group and the tag is changed based on a lapse of the specified time interval so that the first logical unit group is associated with the second tag.
According to one of the ninth to fourteenth apparatuses for processing an IO command of the second aspect of the present invention, there is provided the fifteenth apparatus for processing an IO command of the second aspect of the present invention, further comprising: and a module for changing the correspondence between the logical unit group and the tag so that the second logical unit group is associated with the third tag.
According to one of the first to fifteenth apparatuses for processing an IO command of the second aspect of the present invention, there is provided the sixteenth apparatus for processing an IO command of the second aspect of the present invention, wherein the first tag indicates a sequential write stream, the second tag indicates a random write stream, and the third tag indicates a command stream from a garbage collection operation.
According to one of the first to sixteenth apparatuses for processing an IO command of the second aspect of the present invention, there is provided the seventeenth apparatus for processing an IO command of the second aspect of the present invention, further comprising: means for receiving an IO command.
According to a seventeenth device for processing IO commands of the second aspect of the present invention, there is provided the eighteenth device for processing IO commands of the second aspect of the present invention, a module for setting tags for IO commands.
According to a seventeenth or eighteenth IO command processing apparatus of the second aspect of the present invention, there is provided the nineteenth IO command processing apparatus of the second aspect of the present invention, further comprising: and adjusting the processing bandwidth of the IO commands with different tags according to the number of the idle large blocks.
According to a nineteenth apparatus for processing IO commands of the second aspect of the present invention, there is provided the apparatus for processing IO commands of the twentieth aspect of the present invention, wherein if the number of free large blocks is lower than the threshold, the processing bandwidth of the IO commands having the first tag and/or the second tag is reduced, and the processing bandwidth of the IO commands having the third tag is increased.
According to a nineteenth apparatus for processing an IO command of the second aspect of the present invention, there is provided the twenty-first apparatus for processing an IO command of the second aspect of the present invention, wherein if the number of free chunks is not less than the threshold, the processing bandwidth of the IO command having the first tag and/or the second tag is increased, and the processing bandwidth of the IO command having the third tag is decreased.
According to one of the nineteenth to twenty-first devices for processing IO commands of the second aspect of the present invention, there is provided the twenty-second device for processing IO commands of the second aspect of the present invention, wherein a processing bandwidth of the IO commands is a number of IO commands with tags generated per unit time.
According to a third aspect of the present invention, there is provided a solid-state storage device for processing IO commands according to the first aspect of the present invention, comprising a controller and a nonvolatile memory; the nonvolatile memory includes a plurality of memory cell groups; the controller selects a first group of logic cells, obtains a first IO command having a first tag based on the first group of logic cells, wherein the first group of logic cells is associated with the first tag, and writes data to the first group of logic cells in response to the first IO command.
According to a first solid-state storage device for processing IO commands of a third aspect of the present invention, there is provided a second solid-state storage device for processing IO commands of the third aspect of the present invention, wherein: the controller also selects a second group of logic cells; obtaining a second IO command having a second tag based on a second group of logical units, wherein the second group of logical units is associated with the second tag; and writing data to a second group of logic cells in response to the second IO command.
According to the solid-state storage device for processing the IO command in the third aspect of the present invention, there is provided a solid-state storage device for processing the IO command in the third aspect of the present invention, where the controller includes a host interface, a front-end processing unit, and a back-end processing unit, and the host interface receives the IO command and forwards the IO command to the front-end processing unit; the front-end processing component sets a label for the IO command and forwards the IO command to the back-end processing component; the back-end processing component selects a first group of logic cells, obtains a first IO command having a first tag based on the first group of logic cells, wherein the first group of logic cells is associated with the first tag, and writes data to the first group of logic cells in response to the first IO command.
According to a third aspect of the solid-state storage device for processing IO commands of the third aspect of the present invention, there is provided the solid-state storage device for processing IO commands of the fourth aspect of the present invention, wherein the back-end processing component further adjusts a processing bandwidth of IO commands having different tags according to the number of free chunks.
According to the third or fourth solid-state storage device for processing IO commands of the third aspect of the present invention, there is provided the solid-state storage device for processing IO commands of the fifth aspect of the present invention, wherein the back-end processing component further adjusts an association relationship between the logical unit group and the tag.
According to a fourth aspect of the present invention there is provided a program according to the fourth aspect of the present invention comprising instruction code which, when loaded into a solid state storage device and executed on a controller of the solid state storage device, causes the controller to perform a method according to the first aspect of the present invention.
According to a fifth aspect of the present invention, there is provided a solid-state storage device according to the fifth aspect of the present invention, comprising a controller and a nonvolatile memory, the nonvolatile memory including a plurality of memory cell groups; the controller executes the method according to the first aspect of the invention by executing a program.
According to a sixth aspect of the present invention, there is provided a first solid-state storage device according to the sixth aspect of the present invention, comprising a controller and a nonvolatile memory, the nonvolatile memory including a plurality of memory cell groups; the controller executes a program to: acquiring a first logic unit group; obtaining a first IO command having a first tag based on a first group of logical units, wherein the first group of logical units is associated with the first tag; and writing data to the first group of logical units in response to the first IO command.
According to a first solid-state storage device of a sixth aspect of the present invention, there is provided the second solid-state storage device of the sixth aspect of the present invention, wherein the controller further selects the second group of logic cells; obtaining a second IO command having a second tag based on a second group of logical units, wherein the second group of logical units is associated with the second tag; and writing data to a second group of logic cells in response to the second IO command.
According to a sixth aspect of the present invention there is provided a third solid-state storage device according to the sixth aspect of the present invention, wherein the controller: receiving an IO command; setting a label for the IO command; selecting a first logic unit group, and acquiring a first IO command with a first tag based on the first logic unit group, wherein the first logic unit group is associated with the first tag; and writing data to the first group of logical units in response to the first IO command.
According to a third solid-state storage device of a sixth aspect of the present invention, there is provided the fourth solid-state storage device of the sixth aspect of the present invention, wherein the controller further adjusts a processing bandwidth of IO commands having different tags according to the number of free chunks.
According to a third or fourth solid-state storage device of a sixth aspect of the present invention, there is provided the fifth solid-state storage device of the sixth aspect of the present invention, wherein the controller further adjusts the association relationship of the logical unit group with the tag.
Drawings
The invention, as well as a preferred mode of use and further objectives and advantages thereof, will best be understood by reference to the following detailed description of an illustrative embodiment when read in conjunction with the accompanying drawings, wherein:
FIG. 1 illustrates a block diagram of a solid-state storage device;
FIG. 2 shows a schematic diagram of a large block in accordance with an embodiment of the invention;
FIG. 3 shows a schematic diagram of a group of logical units according to an embodiment of the invention;
FIG. 4 is a diagram illustrating the processing of IO commands by a solid-state storage device according to an embodiment of the invention;
FIG. 5A is a schematic diagram of a mapping of a write command stream to a group of logical units, according to an embodiment of the invention;
FIG. 5B is a mapping table of write command streams to groups of logical units, according to an embodiment of the invention;
FIG. 5C is a mapping table of write command streams to groups of logical units according to another embodiment of the present invention;
FIG. 6 is a flow diagram of processing an IO command according to an embodiment of the present invention;
FIG. 7 is a schematic diagram of a mapping of write command streams to groups of logical units according to yet another embodiment of the invention; and
FIG. 8 is a flow diagram of processing an IO command in accordance with yet another embodiment of the present invention.
Detailed Description
Referring to fig. 2, a schematic diagram of a large block is shown, in accordance with an embodiment of the present invention. The solid-state storage device includes a plurality of NVM chips therein. Each NVM chip includes one or more logic cells. The large block includes physical blocks from each of the plurality of logical units. Preferably, each logical unit provides one physical block for a large block. By way of example, large blocks are constructed on every 16 Logical Units (LUNs). Each large block includes 16 physical blocks, from each of 16 Logical Units (LUNs). In the example of FIG. 2, chunk 0 includes physical block 0 from each of the 16 Logical Units (LUNs), and chunk 1 includes physical block 1 from each Logical Unit (LUN). There are many other ways to construct the bulk mass.
Page stripes are constructed in large blocks, and physical pages of the same physical address within each Logical Unit (LUN) constitute "page stripes". In FIG. 2, physical pages 0-0, physical pages 0-1 … …, and physical pages 0-x form a page stripe 0, where physical pages 0-0, physical pages 0-1 … … physical pages 0-14 are used to store user data, and physical pages 0-15 are used to store parity data computed from all user data within the stripe. Similarly, in FIG. 2, pages physical page 2-0, physical page 2-1 … …, and physical page 2-x comprise page strip 2. Alternatively, the physical page used to store parity data may be located anywhere in the page stripe.
Referring to fig. 3, a schematic diagram of a group of logic cells is shown, according to an embodiment of the invention. In fig. 3, a large block is constructed on every 16 logic cells, and the 16 logic cells for constructing the large block constitute a logic cell group. As shown in fig. 3, logical unit 0(LUN 0) to logical unit 15(LUN 15) constitute logical unit group 1(LUN group 1), logical unit 16(LUN 16) to logical unit 31(LUN 31) constitute logical unit group 2(LUN group 2), logical unit 32(LUN 32) to logical unit 47(LUN 47) constitute logical unit group 3(LUN group 3), and logical unit 48(LUN 48) to logical unit 63(LUN 63) constitute logical unit group 4(LUN group 4). Although 16 logic cells are shown in fig. 3 for each group of logic cells, it should be apparent that other configurations may be used to provide different numbers of logic cells in the group of logic cells.
In the solid-state storage device, the number of LUN groups represents the capability of the solid-state storage device to process IO commands in parallel. At most 1 chunk is being written with data at the same time in each group of logical units. The large block of the group of logical units to which data can currently be written is referred to as the active large block.
The solid-state storage device is used for processing IO commands. The IO command includes a variety of attributes. For example, an attribute indicates whether the IO command is a read command or a write command. The attributes also indicate the frequency of occurrence of the IO commands, order, randomness, subsequent IO commands, temporal/spatial affinity, and the like. In various standards, the attributes of an IO command are defined.
Attributes are set for IO commands at multiple stages of IO command processing. For example, an application may set properties in an IO command based on application characteristics, user context, and the like. The operating system/storage driver or protocol may set attributes for the IO command, for example, to label which virtual machine or operating system the IO command came from, or to convert the attributes labeled in the IO command for application into a protocol-defined form. The storage device may also set attributes for the IO command. For example, in chinese patent application (application No. CN201610169011.1) entitled sequential stream detection method and apparatus, a storage device labels sequential and/or random attributes for IO commands based on logical addresses accessed by the IO commands, and is incorporated herein by reference in its entirety. The storage device may also classify and set attributes for the IO commands based on historical information, rules, or machine learning results.
The attributes of the IO command may be indicated by a tag carried in the IO command. Applications, drivers, operating systems, storage devices may also convert attributes in the IO commands into tags. Tags have limited or diverse meanings. For example, the tags include T1, T2, T3, T4 and T5, while T1 to T3 each represent one of three sequential write streams, while T4 represents a random write stream, and T5 represents a GC (garbage collection) write stream. Other tags may be provided to indicate IO commands of other meanings.
When the IO command is processed, the processing of the IO command can be optimized according to the label in the IO command.
Fig. 4 is a schematic diagram illustrating an IO command processing performed by a solid-state storage device according to an embodiment of the present invention. The control component 104 of the solid state storage device includes a host interface 410, a front-end processing module 420, and a back-end processing module 440.
The host interface 410 is used to exchange commands and data with a host. In one example, the host and the storage device communicate via NVMe/PCIe protocol, and the host interface 410 processes the PCIe protocol data packet, extracts the NVMe protocol command, and returns the processing result of the NVMe protocol command to the host. The host interface 410 receives a plurality of IO commands (shown in fig. 4 as a1, B1, C2, B2, A3, B4, C1, and B1) to access the solid state storage devices. The front-end processing module 420 tags IO commands received from the host interface 410. In fig. 4, the IO command carrying tag T1 constitutes write command stream S1, the IO command carrying tag T2 constitutes write command stream S2, the IO command carrying tag T3 constitutes write command stream S3 and the IO command carrying tag T5 constitutes write command stream S5. By way of example, the write command stream S1 is a sequential stream in which IO commands write data to substantially a contiguous logical address space; the write command stream S2 is another sequential stream in which IO commands write data to substantially a continuous logical address space, the write command stream S3 is a command stream from a Garbage Collection (GC) task, and the write command stream S4 is a command stream from another garbage collection task. The front-end module 420 generates the write command stream S1 and/or the write command stream S2 using the scheme disclosed in chinese patent application with application number CN201610169011.1 (entitled "sequential stream detection method and apparatus"), optionally, the front-end module 420 sets a tag for the IO command to classify the IO command into a plurality of write command streams using the prior art or a manner that may be implemented in the future and known to those skilled in the art. The command streams marked by the front-end module can have different numbers, and tags are set in the IO commands to distinguish the command streams.
The back-end processing module 440 receives the write command stream and accesses one or more NVM chips. In fig. 4, a plurality of NVM chips form a logic cell group, including a logic cell group 401, a logic cell group 403, a logic cell group 405, and a logic cell group 407. The back-end processing module assigns the write command stream to different groups of logical units. Preferably, write commands belonging to the same write command stream are assigned to the same group of logic cells to enhance spatial locality of data in NVM chip 105. For example, write command stream S1 is assigned to logical unit group 401, write command stream S2 is assigned to logical unit group 403, write command stream S3 is assigned to logical unit group 405, and write command stream S4 is assigned to logical unit 407.
The correspondence between the logical address of the write command stream and the physical address to which the write command is written is also recorded in the FTL table. The FTL table may be updated by the back-end processing module 440 or by other components of the control component 104.
FIG. 5A is a schematic diagram of a mapping of a write command stream to a group of logical units, according to an embodiment of the invention. The write command stream is assigned to the group of logical units by a logical unit group assignment module 510 in a back-end processing module (see fig. 4, back-end processing module 440). And maintaining a mapping table, and recording the mapping relation between the write command stream and the logic unit.
FIG. 5B is a mapping table of write command streams to groups of logical units, according to an embodiment of the invention. According to FIG. 5B, write command stream S1 is mapped to logical Unit group 1, write command stream S2 is mapped to logical Unit group 2, write command stream S3 is mapped to logical Unit group 3, and write command stream S4 is mapped to logical Unit group 4.
Referring back to FIG. 5A, the logical unit group assignment module 510 assigns a logical unit group to the write command stream according to a mapping table. In one example, the logical unit group assignment module 510 obtains the write command, identifies the write command stream (e.g., S1) to which the write command belongs from a tag (e.g., T1) in the write command, and obtains the corresponding logical unit group (e.g., logical unit group 1) from the mapping table according to the tag (T1). The back-end processing module 440 (see fig. 4) also assigns a physical address belonging to logical unit group 1 for the write command. To execute the write command, data corresponding to the write command is written to the group of logical units 1 according to the assigned physical address. And updating an FTL table, and recording the corresponding relation between the logic address of the write command and the physical address of the distributed logic unit group 1 in the FTL table.
In another example, the logical unit group assignment module 510 selects a logical unit group and assigns a write command thereto. For example, the logical unit group assignment module 510 assigns a command to each of a plurality of logical unit groups in the solid-state storage device in turn. By way of example, logical unit group 2 is selected, and logical unit group 2 is determined to be associated with write command stream S2 identified by tag T2 by way of a mapping table (see FIG. 5B). The logical unit group allocation module 510 acquires a write command belonging to the write command stream S2. The logical unit group assignment module 510 or the back-end processing module 440 (see fig. 4) also assigns a physical address belonging to the logical unit group 2 to the write command. To execute the write command, data corresponding to the write command is written to the group of logical units 2 according to the assigned physical address.
In yet another example, the group of logical units assignment module 510 assigns write commands to multiple groups of logical units in parallel.
In an embodiment in accordance with the invention, the write command stream S1 is a sequential write stream, the write command stream S2 is a random write stream, the write command stream S3 is a command stream from a garbage collection task, and the write command stream S4 is a command stream from another garbage collection task. By mapping write command streams to particular groups of logical units, data belonging to the same write command stream (e.g., write command stream S1) is stored in the same group of storage units (e.g., logical unit group 1), thereby enhancing spatial locality of data in the solid-state storage device and, in turn, reducing write amplification of the solid-state storage device. Free memory is freed for a group of memory cells by performing a garbage collection operation in the group of logical cells. The appropriate timing is selected to assign the other write command stream (write command stream S2, write command stream S3, or write command S4 to group 1 of logic cells (e.g., group 2 of logic cells), or to assign write command stream S1 to the other group of logic cells (group 2 of logic cells, group 3 of logic cells, or group 4 of logic cells) to fully utilize the storage space in the solid-state storage device.
And under certain conditions, adjusting the mapping relation between the logical unit group and the write command stream. For example, after a specified amount of data is written to a group of logical units, the mapping relationship between the group of logical units and the write command stream is changed; and/or, at a specified time interval, changing the mapping relation between the logical unit group and the write command stream; and/or changing the mapping relation between the logical unit group and the write command stream based on the number of free storage spaces of the logical unit group; and/or changing the mapping relation between the logical unit group and the write command stream according to the instruction of a user. To change the mapping relationship of the group of logical units to the write command stream, the mapping table shown in FIG. 5B is modified.
FIG. 5C is a mapping table of write command streams to groups of logical units according to another embodiment of the present invention. According to FIG. 5C, the write command of write command stream S1 is assigned with high priority and the write command of write command stream S2 is assigned with low priority for logical unit group 1(LUN group 1); assigning a write command of the write command stream S2 with a high priority and a write command of the write command stream S3 with a low priority for logical unit group 2(LUN group 2); assigning a write command of the write command stream S3 with a high priority and a write command of the write command stream S4 with a low priority for logical unit group 3(LUN group 3); the write command of the write command stream S4 is assigned with high priority and the write command of the write command stream S1 is assigned with low priority for the logical unit group 4(LUN group 4).
For example, the logical unit group assignment module 510 assigns commands to each of a plurality of logical unit groups in the solid-state storage device in turn. By way of example, logical unit group 1 is selected, and logical unit group 1 is determined by the mapping table (see FIG. 5C) to be associated with write command stream S1 identified by tag T1 with high priority. The logical unit group allocation module 510 acquires a write command belonging to the write command stream S1. The logical unit group assignment module 510 or the back-end processing module 440 (see fig. 4) also assigns a physical address belonging to the logical unit group 1 to the write command, and writes data corresponding to the write command to the logical unit group 1 according to the assigned physical address. In some cases, there is no write command belonging to write command stream S1, logical unit group assignment module 510 determines from the mapping table shown in fig. 5C that logical unit group 1 is associated with write command stream S2 identified by tag T2 at low priority, and acquires and processes the write command belonging to write command S2.
In another example, logical unit group 2 is selected, and logical unit group 2 is determined by the mapping table (see FIG. 5C) to be associated with write command stream S2 identified by tag T1 with high priority. The logical unit group allocation module 510 acquires and processes the write command belonging to the write command stream S2. The logical unit group assignment module 510 also maintains the number of data or write commands belonging to the command stream S2 written to the logical unit group 2, and if the number of data or write commands belonging to the command stream S2 written to the logical unit group 2 exceeds a threshold, acquires a write command stream (write command stream S3) of another priority level associated with the logical unit group 2 from the mapping table (see fig. 5C), and acquires and processes the write commands belonging to the write command stream S3.
FIG. 6 is a flow diagram of processing an IO command in accordance with an embodiment of the present invention. The back-end processing module 440 (see fig. 4) or the logical unit group assignment module 510 (see fig. 5) selects one of a plurality of logical unit groups (e.g., logical unit group 3) in the solid-state storage device (610). The write command of the write command stream S3 indicated by the tag T3 is acquired (620). As an example, the tag T3 or the write command stream S3 associated with the logical unit group 3 is acquired through a mapping table (see fig. 5B or fig. 5C) or other means. And writing data of the write command from the write command stream S3 to the logical unit group 3 (630).
To write a command to a group of logical units (e.g., logical unit group 3), a physical address is also assigned to the write command from logical unit group 3 after step 620. To increase the locality of data in the group of logical units, physical addresses are allocated from the active large block of logical unit group 3. In particular, the current write location of the active large block is used as the allocated physical address and is pointed to the next free location of the active large block.
The allocated physical address is recorded in the FTL table in association with the logical address indicated by the write command, so that the physical address storing the written data can be acquired through the FTL table and the written data can be accessed.
In one example, the back-end processing module 440 (see fig. 4) or the logical unit group assignment module 510 (see fig. 5) alternately selects one of the plurality of logical unit groups and assigns a write command to the logical unit group by performing the method shown in fig. 6. In another example, the back-end processing module 440 (see FIG. 4) or the logical unit group assignment module 510 (see FIG. 5) assigns write commands to multiple logical unit groups in parallel. For example, back-end processing module 440 (see fig. 4) or logical unit group assignment module 510 (see fig. 5) may include multiple processing elements (e.g., processors, threads, or tasks) that each assign a write command to a logical unit group.
FIG. 7 is a schematic diagram of a mapping of write command streams to groups of logical units according to yet another embodiment of the invention. The back-end processing module (see fig. 4, back-end processing 440) includes a logical unit group assignment module 510 and a write command stream adjustment module 710. The logical unit group assignment module 510 assigns the write command stream to the logical unit group. The write command stream adjustment module 710 adjusts the processing bandwidth of each write command stream. The processing bandwidth of a write command stream can be described by the number of write commands belonging to the write command stream passing through per unit time. In FIG. 7, the write command stream throttle module 710 provides the maximum processing bandwidth for the write command stream S2, the next largest processing bandwidth for the write command stream S1, and a lower or 0 processing bandwidth for the write command stream S3 and the write command stream S4.
By adjusting the processing bandwidth of the write command stream, different quality of service levels can be customized for different write command streams, and the ratio of processing write commands from the user to the number of write commands from garbage collection can also be adjusted.
When the free storage space in the solid-state storage device is insufficient, the storage space is released by executing garbage collection operation. However, garbage collection operations occupy the processing bandwidth of the solid-state storage device and have an impact on the processing of user IO commands (read commands and/or write commands). In an embodiment consistent with the invention, the write command stream adjustment module 710 adjusts the processing bandwidth of each write command stream based on the size of free storage space (or the number of free chunks) in the solid-state storage device. For example, when the free storage of the solid-state storage device is sufficiently free (e.g., greater than a threshold), the write command stream S1 and/or the write command stream S2 formed by the write commands from the user is preferentially processed, a high processing bandwidth is provided for the write command stream S1 and/or the write command stream S2, the write command stream S3 and/or the write command stream S4 from the garbage collection operation is limited, a low processing bandwidth is set for the write command stream S3 and/or the write command stream S4, or the write command stream S3 and/or the write command stream S4 are not allowed to pass through. And when the storage space of the solid-state storage device is insufficient (for example, not more than or less than a threshold value), the write command stream from the garbage collection operation is processed preferentially to release the storage space, and the write command stream from the user is limited to slow down the consumption of the free storage space. For example, limiting write command stream S1 and/or write command stream S2 sets a low processing bandwidth for write command stream S1 and/or write command stream S2, and sets a high processing bandwidth for write command stream S3 and/or write command stream S4 from a garbage collection operation.
FIG. 8 is a flow diagram of processing an IO command in accordance with yet another embodiment of the present invention. The back-end processing module 440 (see fig. 4) or the logical unit group assignment module 710 (see fig. 7) adjusts the processing bandwidth of the write command stream (810). Different processing bandwidths are set for different write command streams with different tags. For example, when free storage space is sufficient, a relatively high processing bandwidth is set for write command streams from users, while a relatively low processing bandwidth is set for write command streams from garbage collection operations. While in the case of insufficient free memory, a relatively low processing bandwidth is set for the write command stream from the user, and a relatively high processing bandwidth is set for the write command stream from the garbage collection operation.
The back-end processing module 440 (see fig. 4) or the logical unit group assignment module 510 (see fig. 7) selects 820 one of a plurality of logical unit groups (e.g., logical unit group 4) in the solid-state storage device. The write command of the write command stream S4 indicated by the tag T4 is acquired (830). And writes the data of the write command from the write command stream S4 to the group of logical units 4 (840).
To write a command to a group of logical units (e.g., group of logical units 4), a physical address is also assigned to the write command from group of logical units 4 after step 830. The allocated physical address is recorded in the FTL table in association with the logical address indicated by the write command so that the written data can be accessed.
The back-end processing module 440 (see FIG. 4) or the logical unit group assignment module 510 (see FIG. 7) also updates the association of the logical unit group with the write command stream (850). For example, after a specified amount of data from write command stream S4 has been written to group of logical units 4, group of logical units 4 is modified to be preferentially associated with write command stream 1 (e.g., modifying the mapping table provided in FIG. 5B or FIG. 5C) to distribute write command stream 1 more to group of logical units 4, such that group of logical units 4 carries the data of write command stream 1. In another example, the association of the group of logical units with the write command stream is modified based on the passage of a specified time period. As another example, to modify the association of a group of logical units with a write command stream, a group of logical units in the mapping table is rotated to replace the group of logical units with the next group of logical units that is adjacent in number to the group of logical units. For example, the logical unit group 2 is the next logical unit group that is adjacent in number to the logical unit group 1, and when the association provided by the mapping table of fig. 5B or 5C is modified, the logical unit group 1 is replaced with the logical unit group 2. Similarly, logical unit group 2 is replaced with logical unit group 3, and logical unit group 4 is replaced with logical unit group 1.
Embodiments of the present invention also provide a program comprising program code that, when loaded into a host CPU and executed in the CPU, causes the CPU to perform the above method performed by the host.
Embodiments of the present invention also provide a program comprising program code which, when loaded into a storage device and executed thereon, causes a processor of the storage device to perform one of the methods described above as being performed by a device.
It will be understood that each block of the block diagrams and flowchart illustrations, and combinations of blocks in the block diagrams and flowchart illustrations, respectively, can be implemented by various means including computer program instructions. These computer program instructions may be loaded onto a general purpose computer, special purpose computer, or other programmable data control apparatus to produce a machine, such that the instructions which execute on the computer or other programmable data control apparatus create means for implementing the functions specified in the flowchart block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data control apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including computer-readable instructions for implementing the function specified in the flowchart block or blocks. The computer program instructions may also be loaded onto a computer or other programmable data control apparatus to cause a series of operational operations to be performed on the computer or other programmable apparatus to produce a computer-implemented process such that the instructions which execute on the computer or other programmable apparatus provide operations for implementing the functions specified in the flowchart block or blocks.
Accordingly, blocks of the block diagrams and flowchart illustrations support combinations of means for performing the specified functions, combinations of operations for performing the specified functions and program instruction means for performing the specified functions. It will also be understood that each block of the block diagrams and flowchart illustrations, and combinations of blocks in the block diagrams and flowchart illustrations, can be implemented by special purpose hardware-based computer systems that perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
Although the present invention has been described with reference to examples, which are intended to be illustrative only and not to be limiting of the invention, changes, additions and/or deletions may be made to the embodiments without departing from the scope of the invention.
Many modifications and other embodiments of the inventions set forth herein will come to mind to one skilled in the art to which these embodiments pertain having the benefit of the teachings presented in the foregoing descriptions and the associated drawings. Therefore, it is to be understood that the inventions are not to be limited to the specific embodiments disclosed and that modifications and other embodiments are intended to be included within the scope of the appended claims. Although specific terms are employed herein, they are used in a generic and descriptive sense only and not for purposes of limitation.

Claims (10)

1. A method of processing IO commands, comprising:
acquiring a first logic unit group;
obtaining a first IO command having a first tag based on a first group of logical units, wherein the first group of logical units is associated with the first tag; and
writing data to a first group of logic cells in response to the first IO command; wherein
The large block comprises a physical block from each of a plurality of logical units, the plurality of logical units for constructing the large block form a logical unit group, and at most 1 large block is written with data at the same time in each logical unit group; and wherein writing data to the group of logical units is writing data sequentially to the active chunks of the group of logical units.
2. The method of claim 1, further comprising:
acquiring a second logic unit group;
obtaining a second IO command having a second tag based on a second group of logical units, wherein the second group of logical units is associated with the second tag; and
writing data to a second group of logic cells in response to the second IO command.
3. The method of claim 1 or 2, further comprising:
based on the first logic unit group, if a first IO command with a first label to be processed does not exist, acquiring a third IO command with a second label; and
writing data to the first group of logical units in response to the third IO command.
4. The method of claim 3, further comprising:
before writing data into the logic unit group, distributing a physical address for the IO command from the logic unit group; and
and updating the FTL table by using the logical address and the physical address of the IO command.
5. The method of claim 4, further comprising:
if the first logic unit group has responded to the first IO commands of the first number, acquiring a fourth IO command with a second tag based on the first logic unit group; and
writing data to the first group of logic cells in response to the fourth IO command.
6. The method of claim 5, further comprising:
and changing the corresponding relation between the logical unit group and the label so that the first logical unit group is associated with the second label.
7. The method of claim 6, further comprising:
and adjusting the processing bandwidth of the IO commands with different labels according to the number of the idle large blocks.
8. An apparatus to process IO commands, comprising:
means for obtaining a first group of logical units;
means for obtaining a first IO command having a first tag based on a first group of logical units, wherein the first group of logical units is associated with the first tag; and
means for writing data to a first group of logic cells in response to the first IO command; wherein
The large block comprises a physical block from each of a plurality of logical units, the plurality of logical units for constructing the large block form a logical unit group, and at most 1 large block is written with data at the same time in each logical unit group; and wherein writing data to the group of logical units is writing data sequentially to the active chunks of the group of logical units.
9. A solid-state storage device for processing IO commands comprises a controller and a nonvolatile memory;
the nonvolatile memory includes a plurality of memory cell groups;
the controller selects a first group of logic cells, obtains a first IO command having a first tag based on the first group of logic cells, wherein the first group of logic cells is associated with the first tag, and
writing data to a first group of logic cells in response to the first IO command; wherein
The large block comprises a physical block from each of a plurality of logical units, the plurality of logical units for constructing the large block form a logical unit group, and at most 1 large block is written with data at the same time in each logical unit group; and wherein writing data to the group of logical units is writing data sequentially to the active chunks of the group of logical units.
10. A solid-state storage device includes a controller and a nonvolatile memory, the nonvolatile memory including a plurality of memory cell groups;
the controller executes the program to perform the method according to one of claims 1 to 7.
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