CN107621847A - One kind pull-up accelerating circuit - Google Patents
One kind pull-up accelerating circuit Download PDFInfo
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- CN107621847A CN107621847A CN201710846550.9A CN201710846550A CN107621847A CN 107621847 A CN107621847 A CN 107621847A CN 201710846550 A CN201710846550 A CN 201710846550A CN 107621847 A CN107621847 A CN 107621847A
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Abstract
The invention discloses one kind to pull up accelerating circuit, and for pulling up an output port, the output port is by voltage clamping.The pull-up accelerating circuit includes：Comparator, it is configured to by the voltage of the output port compared with a clamped voltage, wherein, the clamped voltage is associated with the final voltage of the output port；Pull up transistor, be configured to couple with the output of the comparator, wherein, when the voltage of the output port is less than the clamped voltage, the conducting that pulls up transistor, pull-up is opened；When the voltage of the output port is more than the clamped voltage, the disconnection that pulls up transistor, pull-up is closed；Wherein, the source electrode to pull up transistor is directly connected with operating voltage, and its grid is connected with the output port, and its output to drain with the comparator couples.
Description
Technical field
The present invention relates to pull-up accelerating circuit, more particularly to port to be clamped, and the pulling drive ability of the port has one
The pull-up accelerating circuit of provisioning request.
Background technology
The port of chip is required clamper within certain voltage range, and the requirement of the pulling drive ability of the port
Can not therefore it lower the requirement again.Therefore, how faster the port pull up just into comparing one of stubborn problem.
Fig. 1 shows traditional pull-up circuit.As shown in figure 1, traditional approach will be controlled by logic circuit (LOGIC2) 101
Signal processed is transformed into required voltage domain by current voltage domain and (is not required, can choose whether to use according to actual pressure-resistant situation
Circuit), 102 (that is, the Mp1, output driving Buffer) that pull up transistor directly are controlled, then pass through output voltage clamp circuit 103
Clamper is carried out to output current potential.
Fig. 2 shows the external circuit of pull-up circuit chip.With reference to shown in Fig. 1 and Fig. 2, with output port (OUT) voltage
Continuous rising, pull up transistor 102 with output voltage clamp circuit 103 in clamped pipe Mn gate-to-source (Gate-
Source) pressure difference constantly reduces, and driving current can be less and less, and pull-up speed gradually slows down, therefore, anaplasia when causing to pull up
It is long.
Therefore, a kind of technical scheme that can be fast pull-up to port progress is needed badly.
The content of the invention
To solve the problems, such as to pull up rate request, the invention provides one kind to accelerate pull-up circuit, for pulling up an output
Port, the output port is by voltage clamping, it is characterised in that the pull-up accelerating circuit includes：
Comparator, it is configured to by the voltage of the output port compared with a clamped voltage, wherein, it is described clamped
Voltage is associated with the final voltage of the output port；
Pull up transistor, be configured to couple with the output of the comparator, wherein, when the voltage of the output port is small
When the clamped voltage, the conducting that pulls up transistor, pull-up is opened；When the voltage of the output port is more than described clamped
During voltage, the disconnection that pulls up transistor, pull-up is closed；
Wherein, the source electrode to pull up transistor is directly connected with operating voltage, and its grid is connected with the output port,
Its output to drain with the comparator couples.
In one embodiment, the pull-up accelerating circuit also includes logic circuit, and the logic circuit is connected to the ratio
Compared with device and it is described pull up transistor between.
In one embodiment, the logic circuit includes：
First input end, the first input end are connected with the output end of the comparator；
Second input, second input are connected with a regulated voltage signal；And
Output end, the output of the output end are connected with the drain electrode to pull up transistor.
In one embodiment, the output port couples with charging capacitor.
In one embodiment, the logic circuit is configured in the regulated voltage signal after 0 → 1, is examined for the first time
When measuring the voltage of the output port and being less than the clamped voltage, described pull up transistor is beaten in the output of the logic circuit
Open, so as to be charged to the charging capacitor, when detecting that the voltage of the output port is more than the clamped voltage again afterwards, then
Opening action is not carried out to described pull up transistor, to prevent the moment of the closing that pulls up transistor from causing the output port
Voltage under jump, cause the comparator to occur exporting by mistake.
In one embodiment, the logic circuit is further configured to the current voltage domain conversion of the regulated voltage signal
To a voltage domain, and the voltage domain after the conversion can guarantee that the grid to pull up transistor is not damaged by.
In one embodiment, the regulated voltage signal is used for the electricity needed for by the voltage Tiao Jiedao of the output port
Pressure.
Brief description of the drawings
The above content of the invention and following embodiment of the present invention can obtain more preferably when being read in conjunction with the figure
Understanding.It should be noted that example of the accompanying drawing only as claimed invention.In the accompanying drawings, identical reference
Represent same or similar element.
Fig. 1 is traditional pull-up circuit；
Fig. 2 is chip exterior circuit diagram；And
Fig. 3 is the pull-up accelerating circuit schematic diagram according to one embodiment of the invention.
Description of reference numerals
101 logic circuits
102 pull up transistor
103 output voltage clamp circuits
201 comparators
202 logic circuits
203 pull up transistor
Embodiment
In order to illustrate more clearly of the technical scheme of embodiments herein, make required in being described below to embodiment
Accompanying drawing is briefly described.It should be evident that drawings in the following description are only some examples or the implementation of the application
Example, on the premise of not paying creative work, can also be according to these accompanying drawings for one of ordinary skill in the art
The application is applied to other similar to scene.Unless explained obviously or separately, identical label generation in figure from language environment
The identical structure of table or operation.
The invention discloses a kind of applied to the port being clamped, the port has certain requirements to pull up to pull-up speed to be added
Fast circuit.
The port that the pull-up accelerating circuit is mainly used in chip is required clamper within certain voltage range, and right
The pull-up speed of the port has certain requirements chip.
Fig. 3 shows pull-up accelerating circuit schematic diagram according to an embodiment of the invention.In one embodiment, it is of the invention
Pull-up accelerating circuit includes comparator 201 (CMP), optional logic circuit 202 (LOGIC1) and pulls up transistor (MP2)
203。
Comparator 201 is configured to the voltage of output port (OUT, i.e. voltage are by clamped port) and clamped voltage
(VB1) it is compared, wherein, clamped voltage (VB1) is used for the output current potential of clamper output port (OUT), clamped voltage (VB1)
It is associated with by the final voltage of clamped output port (OUT).In one embodiment, clamped voltage can be one advance
The value of setting.When output port (OUT) voltage is less than clamped voltage (VB1), (Mp2) 203 that pull up transistor conductings, that is, pull up
Open so that the electric capacity C of output port (OUT) is rapidly charged VB1 (referring to Fig. 2)；When clamped voltage (VB1) is more than output
During port (OUT) voltage, (Mp2) 203 that pull up transistor is disconnected, i.e., pull-up is closed.
Logic circuit (LOGIC1) 202 is configured in regulated voltage signal (OUT_L) after 0 → 1, is detected for the first time
When the voltage of output port (OUT) is less than clamped voltage (VB1), the output of logic circuit (LOGIC1) 202 will pull up transistor
(Mp2) 203 open, so as to be charged to the electric capacity C on output port (OUT), detect output port (OUT) voltage again afterwards
More than clamped voltage (VB1), then opening action is not carried out to (Mp2) 203 that pull up transistor, be mainly used to prevent from pulling up transistor
(Mp2) 203 moments closed caused OUT outputs are lower to jump, and caused comparator 201 to occur exporting by mistake.Wherein, the voltage-regulation letter
Number (OUT_L) is used for the voltage needed for by the voltage Tiao Jiedao of output port (OUT).
Logic circuit (LOGIC1) 202 be further configured to by the current voltage domain of regulated voltage signal (OUT_L) change to
Required voltage domain, the grid that required voltage domain refers to can guarantee that (Mp2) 203 that pull up transistor are not damaged by.
Because the source electrode for (Mp2) 203 that pull up transistor meets power vd D, therefore, as output port (OUT) current potential is continuous
Rising, the gate-to-source pressure difference for (Mp2) 203 that pull up transistor is still sufficiently large, can ensure pull up transistor (Mp2)
203 driving force is sufficiently high.
(MP2) 203 that pull up transistor ensures that output port (OUT) voltage is quickly moved to required current potential, tradition pull-up electricity
Road ensures that it is maintained on required current potential.
In a specific implementation, the electrode input end of comparator 201 is connected with output port (OUT), its negative input
It is connected with clamped voltage (VB1), the output (VOUT) of comparator 201 connects with the first input end of logic circuit 202 (LOGIC1)
Connect.Second input of logic circuit 202 (LOGIC1) and regulated voltage signal (OUT_L).Logic circuit 202 (LOGIC1)
Export and pull up transistor (Mp2) 203 drain electrode connection.Pull up transistor (Mp2) 203 source electrode directly with operating voltage VDD
Connection.(Mp2) 203 grid of pulling up transistor is connected with output port (OUT).
In one embodiment, if (Mp2's) 203 that pull up transistor is pressure-resistant sufficiently high, logic circuit (LOGIC1)
202 can save.In this case, the electrode input end of comparator 201 is connected with output port (OUT), the input of its negative pole
End is connected with clamped voltage (VB1), and the output (VOUT) of comparator 201 is connected with the drain electrode for (Mp2) 203 that pull up transistor.On
The source electrode of pull transistor (Mp2) 203 is directly connected with power vd D.Pull up transistor (Mp2) 203 grid and output port
(OUT) connect.
The pull-up accelerating circuit of the application has unexpected beneficial effect compared with traditional pull-up circuit.Specifically
Comparative analysis is as follows.
Traditional pull-up circuit generally includes：Logic circuit 101, output voltage clamp circuit 103, pull up transistor
(Mp1) 102, wherein, 102 source electrode of pulling up transistor is not connected directly with operating voltage VDD, but is needed and output voltage
Clamp circuit connects, and directly receives the input of clamped voltage.
The effect of output voltage clamp circuit 103 is：Output current potential is subjected to clamper.
Pull-up accelerating circuit described herein is characterised by：(Mp2) is pulled up transistor in pull-up accelerating circuit
Source electrode meets VDD, and the drain electrode of the clamped pipe Mn in output voltage clamp circuit is connect relative to the source electrode of the Mp1 in common pull-up circuit
For, the pressure difference of Mp2 gate-to-source is bigger so that Mp2 pulling drive ability is stronger, ensure OUT terminal mouth it is quick on
Draw.Accelerate the response speed of the comparator in pull-up circuit must be fast, otherwise OUT can produce larger overshoot.Drawn in OUT
To required current potential, close and accelerate pull-up circuit to save power consumption.
Pulling drive Capability Requirement to a certain extent when, the Mp1 and Mn of traditional circuit area will be very big,
At this moment increase accelerates pull-up circuit, can save the area needed for circuit.
If the electric capacity C increases of chip exterior circuit, the pull-up time required for traditional pull-up circuit are directly proportional to electric capacity C
Increase, and pull up accelerating circuit it is increased pull-up the time can be relatively fewer.
As shown in the application and claims, unless context clearly prompts exceptional situation, " one ", "one", " one
The word such as kind " and/or "the" not refers in particular to odd number, may also comprise plural number.It is, in general, that term " comprising " is only prompted to wrap with "comprising"
Include clearly identify the step of and element, and these steps and element do not form one it is exclusive enumerate, method or equipment
The step of may also including other or element.
Meanwhile the application has used particular words to describe embodiments herein.Such as " one embodiment ", " one implements
Example ", and/or " some embodiments " mean a certain feature, structure or the feature related at least one embodiment of the application.Cause
This, it should be highlighted that and it is noted that " embodiment " or " implementation that are referred to twice or repeatedly in diverse location in this specification
Example " or " alternate embodiment " are not necessarily meant to refer to the same embodiment.In addition, in one or more embodiments of the application
Some features, structure or feature can carry out appropriate combination.
Similarly, it is noted that real to one or more invention so as to help in order to simplify herein disclosed statement
Apply the understanding of example, above in the description of the embodiment of the present application, sometimes by various features merger to one embodiment, accompanying drawing or
In descriptions thereof.But this disclosure method is not meant to carry in the aspect ratio claim required for the application object
And feature it is more.In fact, the feature of embodiment will be less than whole features of the single embodiment of above-mentioned disclosure.
Here the term and form of presentation used is only intended to describe, and the present invention should not be limited to these terms and table
State.It is not meant to exclude the equivalent features of any signal and description (or which part) using these terms and statement, should recognizes
Knowing various modifications that may be present should also include within the scope of the claims.Other modifications, variations and alternatives also likely to be present.
Accordingly, claim should be regarded as covering all these equivalents.
In addition, except clearly stating in non-claimed, the order of herein described processing element and sequence, digital alphabet
Using or other titles use, be not intended to limit the order of the application flow and method.Although by each in above-mentioned disclosure
Kind of example discusses some it is now recognized that useful inventive embodiments, but it is to be understood that, such details only plays explanation
Purpose, appended claims are not limited in the embodiment disclosed, on the contrary, claim is intended to cover and all meets the application
The amendment of embodiment spirit and scope and equivalent combinations.For example, although circuit described above can be real by hardware device
It is existing, but its some aspect can also be achieved by the solution of software.
Equally, it should be pointed out that although the present invention describes with reference to current specific embodiment, this technology neck
Those of ordinary skill in domain is it should be appreciated that the embodiment of the above is intended merely to the explanation present invention, without departing from the present invention
Various equivalent change or replacement can be also made in the case of spirit, therefore, as long as right in the spirit of the present invention
The change, modification of above-described embodiment will all fall in the range of following claims.
Claims (7)
1. one kind pull-up accelerating circuit, for pulling up an output port, the output port is by voltage clamping, it is characterised in that
The pull-up accelerating circuit includes：
Comparator, it is configured to by the voltage of the output port compared with a clamped voltage, wherein, the clamped voltage
It is associated with the final voltage of the output port；
Pull up transistor, be configured to couple with the output of the comparator, wherein, when the voltage of the output port is less than institute
When stating clamped voltage, the conducting that pulls up transistor, pull-up is opened；When the voltage of the output port is more than the clamped voltage
When, the disconnection that pulls up transistor, pull-up is closed；
Wherein, the source electrode to pull up transistor is directly connected with operating voltage, and its grid is connected with the output port, and it leaks
Pole and the output of the comparator couple.
2. pull-up accelerating circuit as claimed in claim 1, it is characterised in that the pull-up accelerating circuit also includes logic electricity
Road, the logic circuit be connected to the comparator and it is described pull up transistor between.
3. pull-up accelerating circuit as claimed in claim 2, it is characterised in that the logic circuit includes：
First input end, the first input end are connected with the output end of the comparator；
Second input, second input are connected with a regulated voltage signal；And
Output end, the output of the output end are connected with the drain electrode to pull up transistor.
4. pull-up accelerating circuit as claimed in claim 3, it is characterised in that the output port couples with charging capacitor.
5. pull-up accelerating circuit as claimed in claim 4, it is characterised in that the logic circuit is configured in the voltage
Regulate signal is after 0 → 1, when detecting that the voltage of the output port is less than the clamped voltage for the first time, the logic electricity
The opening that pulls up transistor so as to be charged to the charging capacitor, is detected the output port by the output on road again afterwards
Voltage when being more than the clamped voltage, then opening action is not carried out to described pull up transistor, to prevent the upper crystal pulling
The moment that pipe is closed causes to jump under the voltage of the output port, causes the comparator to occur exporting by mistake.
6. pull-up accelerating circuit as claimed in claim 4, it is characterised in that the logic circuit is further configured to the electricity
The current voltage domain of pressure Regulate signal is changed to a voltage domain, and the voltage domain after the conversion can guarantee that described pull up transistor
Grid is not damaged by.
7. pull-up accelerating circuit as claimed in claim 3, it is characterised in that the regulated voltage signal is used for the output
Voltage needed for the voltage Tiao Jiedao of port.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710846550.9A CN107621847A (en) | 2017-09-19 | 2017-09-19 | One kind pull-up accelerating circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710846550.9A CN107621847A (en) | 2017-09-19 | 2017-09-19 | One kind pull-up accelerating circuit |
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| Publication Number | Publication Date |
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| CN107621847A true CN107621847A (en) | 2018-01-23 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201710846550.9A Pending CN107621847A (en) | 2017-09-19 | 2017-09-19 | One kind pull-up accelerating circuit |
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Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0965652A (en) * | 1995-08-23 | 1997-03-07 | Denso Corp | Dc-dc converter |
| CN1637946A (en) * | 2003-12-30 | 2005-07-13 | 海力士半导体有限公司 | Internal voltage generating circuit in semiconductor memory device |
| CN1728519A (en) * | 2004-07-26 | 2006-02-01 | 冲电气工业株式会社 | Step-down power supply |
| CN104411035A (en) * | 2014-10-16 | 2015-03-11 | 宁波芯辰微电子有限公司 | LED drive circuit without auxiliary winding for power supply |
| CN105005346A (en) * | 2015-06-04 | 2015-10-28 | 中颖电子股份有限公司 | Negative voltage clamping circuit |
| CN105138062A (en) * | 2014-05-29 | 2015-12-09 | 展讯通信（上海）有限公司 | System improving load regulation rate of low-pressure-difference linear voltage regulator |
-
2017
- 2017-09-19 CN CN201710846550.9A patent/CN107621847A/en active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0965652A (en) * | 1995-08-23 | 1997-03-07 | Denso Corp | Dc-dc converter |
| CN1637946A (en) * | 2003-12-30 | 2005-07-13 | 海力士半导体有限公司 | Internal voltage generating circuit in semiconductor memory device |
| CN1728519A (en) * | 2004-07-26 | 2006-02-01 | 冲电气工业株式会社 | Step-down power supply |
| CN105138062A (en) * | 2014-05-29 | 2015-12-09 | 展讯通信（上海）有限公司 | System improving load regulation rate of low-pressure-difference linear voltage regulator |
| CN104411035A (en) * | 2014-10-16 | 2015-03-11 | 宁波芯辰微电子有限公司 | LED drive circuit without auxiliary winding for power supply |
| CN105005346A (en) * | 2015-06-04 | 2015-10-28 | 中颖电子股份有限公司 | Negative voltage clamping circuit |
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Application publication date: 20180123 |
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