[go: up one dir, main page]

CN107612335B - An Interleaved Parallel Control Method for Three-level LLC Resonant Converters - Google Patents

An Interleaved Parallel Control Method for Three-level LLC Resonant Converters Download PDF

Info

Publication number
CN107612335B
CN107612335B CN201710851061.2A CN201710851061A CN107612335B CN 107612335 B CN107612335 B CN 107612335B CN 201710851061 A CN201710851061 A CN 201710851061A CN 107612335 B CN107612335 B CN 107612335B
Authority
CN
China
Prior art keywords
llc resonant
phase
resonant converter
current
driving signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201710851061.2A
Other languages
Chinese (zh)
Other versions
CN107612335A (en
Inventor
徐应年
罗斐
夏华东
邹智勇
徐朝阳
张磊
汪波
陈永胜
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Wuhan University of Technology WUT
Original Assignee
Wuhan University of Technology WUT
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Wuhan University of Technology WUT filed Critical Wuhan University of Technology WUT
Priority to CN201710851061.2A priority Critical patent/CN107612335B/en
Publication of CN107612335A publication Critical patent/CN107612335A/en
Application granted granted Critical
Publication of CN107612335B publication Critical patent/CN107612335B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Landscapes

  • Dc-Dc Converters (AREA)

Abstract

本发明公开了一种三电平LLC谐振变换器的交错并联控制方法,至少包括:对各相LLC谐振变换器输出驱动信号;将所述各相LLC谐振变换器的电流进行比较;基于比较结果将时间增量叠加到电流较大的各相LLC谐振变换器的驱动信号的第二死区时间上。本发明先将各相LLC谐振变换器的电流进行比较,再基于比较结果将时间增量叠加到电流较大的各相LLC谐振变换器的驱动信号的第二死区时间上,使这些相LLC谐振变换器的驱动信号的第二死区时间Td2变大,从而减小了输入电压作用在谐振腔上的时间,使该相的LLC谐振变换器的谐振电流减小,从而使各路LLC谐振变换器的功率平衡,进而提高了电源的效率和可靠性。

The invention discloses an interleaved parallel control method for three-level LLC resonant converters, which at least includes: outputting drive signals to the LLC resonant converters of each phase; comparing the currents of the LLC resonant converters of each phase; and based on the comparison results The time increment is superimposed on the second dead time of the driving signal of the LLC resonant converter of each phase with larger current. The present invention firstly compares the currents of the LLC resonant converters of each phase, and then superimposes the time increment on the second dead time of the driving signals of the LLC resonant converters of each phase with larger currents based on the comparison results, so that the LLCs of these phases The second dead time T d2 of the driving signal of the resonant converter becomes larger, thereby reducing the time for the input voltage to act on the resonant cavity, and reducing the resonant current of the LLC resonant converter of this phase, so that each LLC The power balance of the resonant converter improves the efficiency and reliability of the power supply.

Description

一种三电平LLC谐振变换器的交错并联控制方法An Interleaved Parallel Control Method for Three-level LLC Resonant Converters

技术领域technical field

本发明涉及电源技术领域,尤其涉及一种三电平LLC谐振变换器的交错并联控制方法。The invention relates to the technical field of power supplies, in particular to an interleaved parallel control method of a three-level LLC resonant converter.

背景技术Background technique

LLC谐振变换器,由于其结构简单、效率高并能全负载范围实现零电压开关(ZeroVoltage Switch,简称ZVS)等优点,在当今电源设计中得到了广泛的应用。将三电平(Three-Level)结构应用在LLC谐振变换器上,可以提高变换器的输入电压,使变换器适用于高电压应用。同时,将LLC变换器用交错(interleaving)的方式并联,不仅可以提高电源的输出电流,而且还可以减小输入输出的滤波电容。The LLC resonant converter is widely used in today's power supply design because of its simple structure, high efficiency and the ability to realize zero voltage switching (ZeroVoltage Switch, ZVS for short) in the full load range. Applying the three-level (Three-Level) structure to the LLC resonant converter can increase the input voltage of the converter and make the converter suitable for high voltage applications. At the same time, connecting the LLC converters in parallel in an interleaving manner can not only increase the output current of the power supply, but also reduce the input and output filter capacitance.

但是,当LLC谐振变换器交错并联时,谐振元件参数上低于5%的偏差便会造成很大的功率不平衡,损害了整个电源的效率和可靠性。However, when LLC resonant converters are interleaved and connected in parallel, a deviation of less than 5% in the parameters of the resonant components will cause a large power imbalance, which will damage the efficiency and reliability of the entire power supply.

发明内容Contents of the invention

本发明通过提供一种三电平LLC谐振变换器的交错并联控制方法,解决了现有技术中功率不平衡的技术问题,实现了提高了电源的效率和可靠性的技术效果。The invention solves the technical problem of power imbalance in the prior art by providing an interleaved parallel control method of the three-level LLC resonant converter, and realizes the technical effect of improving the efficiency and reliability of the power supply.

本发明提供了一种三电平LLC谐振变换器的交错并联控制方法,至少包括:The present invention provides an interleaved parallel control method for a three-level LLC resonant converter, which at least includes:

对各相LLC谐振变换器输出驱动信号;Output drive signals to LLC resonant converters of each phase;

将所述各相LLC谐振变换器的电流进行比较;comparing the currents of the LLC resonant converters of each phase;

基于比较结果将时间增量叠加到电流较大的各相LLC谐振变换器的驱动信号的第二死区时间上。The time increment is superimposed on the second dead time of the drive signal of each phase of the LLC resonant converter with a larger current based on the comparison result.

进一步地,所述对各相LLC谐振变换器输出驱动信号,至少包括:Further, the outputting the driving signal to the LLC resonant converter of each phase at least includes:

对所述各相LLC谐振变换器输出相位差φ为360°/N的驱动信号;其中,N为所述LLC谐振变换器的个数。Outputting drive signals with a phase difference φ of 360°/N to the LLC resonant converters of each phase; wherein, N is the number of the LLC resonant converters.

进一步地,所述将所述各相LLC谐振变换器的电流进行比较,至少包括:Further, the comparing the currents of the LLC resonant converters of each phase at least includes:

将所述各相LLC谐振变换器的输入电流或输出电流进行比较。The input current or output current of the LLC resonant converter of each phase is compared.

进一步地,所述基于比较结果将时间增量叠加到电流较大的各相LLC谐振变换器的驱动信号的第二死区时间上,至少包括:Further, the superimposing the time increment on the second dead time of the driving signal of the LLC resonant converter of each phase with larger current based on the comparison result at least includes:

基于比较结果确定所述各相LLC谐振变换器中的最小电流;determining a minimum current in each phase of the LLC resonant converter based on the comparison result;

将所述各相LLC谐振变换器的电流与所述最小电流求差;taking the difference between the current of the LLC resonant converter of each phase and the minimum current;

基于电流差值得到所述各相LLC谐振变换器的时间增量;Obtaining the time increment of the LLC resonant converter of each phase based on the current difference;

将各所述时间增量叠加到所述各LLC谐振变换器的驱动信号的第二死区时间上。Each of said time increments is superimposed on a second dead time of a drive signal of said respective LLC resonant converter.

进一步地,所述基于电流差值得到所述各相LLC谐振变换器的时间增量,至少包括:Further, the obtaining the time increment of the LLC resonant converter of each phase based on the current difference at least includes:

将各电流差值通过比例-积分控制器,得到所述各相LLC谐振变换器的时间增量。Each current difference is passed through a proportional-integral controller to obtain the time increment of each phase of the LLC resonant converter.

进一步地,在所述将各电流差值通过比例-积分控制器之后,还至少包括:Further, after passing each current difference value through the proportional-integral controller, it also includes at least:

将各电流差值通过限幅器,得到所述各相LLC谐振变换器的时间增量。Each current difference value is passed through the limiter to obtain the time increment of the LLC resonant converter of each phase.

本发明中提供的一个或多个技术方案,至少具有如下技术效果或优点:One or more technical solutions provided in the present invention have at least the following technical effects or advantages:

先将各相LLC谐振变换器的电流进行比较,再基于比较结果将时间增量叠加到电流较大的各相LLC谐振变换器的驱动信号的第二死区时间上,使这些相LLC谐振变换器的驱动信号的第二死区时间Td2变大,从而减小了输入电压作用在谐振腔上的时间,使该相的LLC谐振变换器的谐振电流减小,从而使各路LLC谐振变换器的功率平衡,进而提高了电源的效率和可靠性。The currents of the LLC resonant converters of each phase are compared first, and then based on the comparison results, the time increment is superimposed on the second dead time of the driving signal of the LLC resonant converter of each phase with a larger current, so that the LLC resonant conversion of these phases The second dead time T d2 of the driving signal of the inverter becomes larger, thereby reducing the time for the input voltage to act on the resonant cavity, reducing the resonant current of the LLC resonant converter of this phase, so that each LLC resonant conversion The power balance of the inverter improves the efficiency and reliability of the power supply.

附图说明Description of drawings

图1为三电平LLC谐振变换器的电路图;Figure 1 is a circuit diagram of a three-level LLC resonant converter;

图2为单个三电平LLC谐振变换器的驱动信号的波形图;FIG. 2 is a waveform diagram of a driving signal of a single three-level LLC resonant converter;

图3为三电平LLC谐振变换器交错并联的电路图;Figure 3 is a circuit diagram of a three-level LLC resonant converter interleaved in parallel;

图4为本发明实施例提供的三电平LLC谐振变换器的交错并联控制方法的流程图;4 is a flow chart of an interleaved parallel control method for a three-level LLC resonant converter provided by an embodiment of the present invention;

图5为三电平LLC谐振变换器交错并联时各路驱动信号的相位示意图;Fig. 5 is a schematic diagram of the phase of each drive signal when the three-level LLC resonant converter is interleaved and connected in parallel;

图6为本发明实施例提供的三电平LLC谐振变换器的交错并联控制方法中步骤S130中第一部分的流程图;FIG. 6 is a flowchart of the first part of step S130 in the interleaved parallel control method of the three-level LLC resonant converter provided by the embodiment of the present invention;

图7为本发明实施例提供的三电平LLC谐振变换器的交错并联控制方法中步骤S130中第二部分的流程图;FIG. 7 is a flowchart of the second part of step S130 in the interleaved parallel control method of the three-level LLC resonant converter provided by the embodiment of the present invention;

图8为三电平LLC谐振变换器交错并联时未施加平衡控制时输出功率的波形图;Figure 8 is a waveform diagram of the output power when the three-level LLC resonant converters are interleaved and connected in parallel without applying balance control;

图9为三电平LLC谐振变换器交错并联时施加了平衡控制后输出功率的波形图。Fig. 9 is a waveform diagram of the output power after the balance control is applied when the three-level LLC resonant converters are interleaved and connected in parallel.

具体实施方式Detailed ways

本发明实施例通过提供一种三电平LLC谐振变换器的交错并联控制方法,解决了现有技术中功率不平衡的技术问题,实现了提高了电源的效率和可靠性的技术效果。The embodiment of the present invention solves the technical problem of power imbalance in the prior art by providing an interleaved parallel control method of the three-level LLC resonant converter, and achieves the technical effect of improving the efficiency and reliability of the power supply.

本发明实施例中的技术方案为解决上述问题,总体思路如下:The technical solution in the embodiment of the present invention is to solve the above-mentioned problems, and the general idea is as follows:

先将各相LLC谐振变换器的电流进行比较,再基于比较结果将时间增量叠加到电流较大的各相LLC谐振变换器的驱动信号的第二死区时间上,使这些相LLC谐振变换器的驱动信号的第二死区时间Td2变大,从而减小了输入电压作用在谐振腔上的时间,使该相的LLC谐振变换器的谐振电流减小,从而使各路LLC谐振变换器的功率平衡,进而提高了电源的效率和可靠性。The currents of the LLC resonant converters of each phase are compared first, and then based on the comparison results, the time increment is superimposed on the second dead time of the driving signal of the LLC resonant converter of each phase with a larger current, so that the LLC resonant conversion of these phases The second dead time T d2 of the driving signal of the inverter becomes larger, thereby reducing the time for the input voltage to act on the resonant cavity, reducing the resonant current of the LLC resonant converter of this phase, so that each LLC resonant conversion The power balance of the inverter improves the efficiency and reliability of the power supply.

为了更好地理解上述技术方案,下面将结合说明书附图以及具体的实施方式对上述技术方案进行详细的说明。In order to better understand the above technical solution, the above technical solution will be described in detail below in conjunction with the accompanying drawings and specific implementation methods.

在对本发明实施例提供的三电平LLC谐振变换器的交错并联控制方法进行说明之前,需要先对三电平LLC谐振变换器的电路结构、三电平LLC谐振变换器的控制方法和三电平LLC谐振变换器交错并联的电路结构进行说明。首先,对三电平LLC谐振变换器的电路结构进行说明:Before explaining the interleaved parallel control method of the three-level LLC resonant converter provided by the embodiment of the present invention, it is necessary to first understand the circuit structure of the three-level LLC resonant converter, the control method of the three-level LLC resonant converter and the three-level The circuit structure of the flat LLC resonant converter interleaved in parallel will be described. First, the circuit structure of the three-level LLC resonant converter is explained:

参见图1,三电平LLC谐振变换器的电路结构由变压器XFR1、一次侧谐振电路和二次侧整流电路组成。其中,变压器XFR1的原边采用一个绕组。一次侧谐振电路,包括四个开关管S1、S2、S3、S4,两个二极管D1、D2,以及由谐振电感Lr和谐振电容Cr组成的谐振腔;二次侧整流电路,包括两个二极管D3、D4。一次侧的四个开关管S1-S4依次串联。两个二极管串联后和开关管S2、S3并联。谐振电感Lr、谐振电容Cr和变压器XFR1的一次绕组三者串联后,一端连接至S2与S3的连接处(S2的s端),另一端接至二极管D1、D2的连接处。输入的正极Vin+接至开关管S1的d端,输入的负极Vin-接至开关管S4的s端,输入的中点N接至二极管D1、D2的连接处。变压器XFR1二次侧绕组和二极管组成整流电路。第一绕组的一个端子p2和二极管D3的阳极相连,另一个端子m2和第二绕组的异名端p3相连,并接至输出的负极Vout-。第二绕组的另一个端子m3和二极管D4的阳极相连。二极管D3和D4的阴极相连,并接至输出的正极Vout+。由控制器产生的驱动信号g1、g2、g3、g4分别控制开关管S1、S2、S3、S4的开通和关断。驱动信号为高电平时,开通对应的开关管;驱动信号为低电平时,关断对应的开关管。Referring to Figure 1, the circuit structure of the three-level LLC resonant converter consists of a transformer XFR1, a primary side resonant circuit and a secondary side rectifier circuit. Wherein, the primary side of the transformer XFR1 adopts one winding. The primary side resonant circuit includes four switching tubes S1, S2, S3, S4, two diodes D1, D2, and a resonant cavity composed of a resonant inductor Lr and a resonant capacitor Cr; the secondary side rectifier circuit includes two diodes D3 , D4. The four switch tubes S1-S4 on the primary side are connected in series in sequence. After the two diodes are connected in series, they are connected in parallel with the switch tubes S2 and S3. After the resonant inductor Lr, the resonant capacitor Cr and the primary winding of the transformer XFR1 are connected in series, one end is connected to the junction of S2 and S3 (the s end of S2), and the other end is connected to the junction of diodes D1 and D2. The positive pole Vin+ of the input is connected to the d terminal of the switch tube S1, the negative pole Vin- of the input is connected to the s terminal of the switch tube S4, and the midpoint N of the input is connected to the junction of the diodes D1 and D2. Transformer XFR1 secondary side winding and diodes form a rectifier circuit. One terminal p2 of the first winding is connected to the anode of the diode D3, the other terminal m2 is connected to the opposite terminal p3 of the second winding, and connected to the output negative pole Vout-. The other terminal m3 of the second winding is connected to the anode of the diode D4. The cathodes of diodes D3 and D4 are connected and connected to the positive output Vout+. The driving signals g1, g2, g3, g4 generated by the controller respectively control the switching on and off of the switching tubes S1, S2, S3, S4. When the driving signal is at a high level, the corresponding switching tube is turned on; when the driving signal is at a low level, the corresponding switching tube is turned off.

参见图2,如果不考虑死区时间,驱动信号g1、g2、g3、g4为占空比为0.5的同频率方波,其频率为fsw。其中,g1与g2相位相同,g3与g4相位相同;g1、g2与g3、g4反相,即相位差180°。控制器通过改变驱动信号的频率fsw,从而控制LLC变换器的输出电压。Referring to Fig. 2, if the dead time is not considered, the driving signals g1, g2, g3, g4 are square waves of the same frequency with a duty ratio of 0.5, and their frequency is f sw . Among them, g1 and g2 have the same phase, and g3 and g4 have the same phase; g1, g2 and g3, g4 have opposite phases, that is, the phase difference is 180°. The controller controls the output voltage of the LLC converter by changing the frequency f sw of the driving signal.

为了避免开关管直通并实现ZVS,驱动信号g1、g2、g3、g4之间加入第一死区时间Td1与第二死区时间Td2。具体的说,驱动信号g1变低后延迟一段时间Td2,再使驱动信号g2变低;g2变低后延迟一段时间Td1,再使驱动信号g3、g4变高。相似地,驱动信号g4变低后延迟一段时间Td2,再使驱动信号g3变低;g3变低后延迟一段时间Td1,再使驱动信号g3、g4变高。In order to avoid straight-through of the switching tubes and realize ZVS, a first dead time T d1 and a second dead time T d2 are added between the driving signals g1 , g2 , g3 , and g4 . Specifically, after the driving signal g1 goes low, delay for a period of T d2 , and then make the driving signal g2 go low; after g2 goes low, delay for a period of T d1 , and then make the driving signals g3 and g4 high. Similarly, after the drive signal g4 goes low, delay for a period of time T d2 , and then drive the drive signal g3 to go low; after g3 goes low, delay for a period of time T d1 , and then make the drive signals g3 and g4 high.

参见图3,三电平LLC谐振变换器交错并联的电路结构由n个三电平LLC谐振变换器组成,其中n≥2。输入的正极和两个串联且容值相等的电容C1、C2的一端相连,输入的负极和两个串联的电容C1、C2的另一端相连。所有LLC谐振变换器的输入正极Vin+和输入的正极相连;所有LLC谐振变换器的输入负极Vin-和输入的负极相连;所有LLC谐振变换器的中点N和电容C1、C2的连接点相连。所有LLC谐振变换器的输出正极Vout+都和输出的正极相连,所有LLC谐振变换器的输出负极Vout-都和输出的负极相连。输出的正负极之间接电容C3。Referring to FIG. 3 , the circuit structure of three-level LLC resonant converters connected in parallel is composed of n three-level LLC resonant converters, where n≥2. The positive pole of the input is connected to one end of two capacitors C1 and C2 of equal capacitance in series, and the negative pole of the input is connected to the other end of the two capacitors C1 and C2 in series. The positive input pole Vin+ of all LLC resonant converters is connected to the positive pole of the input; the negative pole Vin- of the input of all LLC resonant converters is connected to the negative pole of the input; the midpoint N of all LLC resonant converters is connected to the connection point of capacitors C1 and C2. The output positive pole Vout+ of all LLC resonant converters is connected to the positive pole of the output, and the output negative pole Vout- of all LLC resonant converters is connected to the negative pole of the output. The capacitor C3 is connected between the positive and negative poles of the output.

参见图4,本发明实施例提供的三电平LLC谐振变换器的交错并联控制方法,至少包括:Referring to Fig. 4, the interleaved parallel control method of the three-level LLC resonant converter provided by the embodiment of the present invention at least includes:

步骤S110:对各相LLC谐振变换器输出驱动信号;Step S110: outputting driving signals to the LLC resonant converters of each phase;

对本步骤进行说明:To illustrate this step:

对各相LLC谐振变换器输出相位差φ为360°/N的驱动信号;其中,N为LLC谐振变换器的个数。由于输入电流的基波为开关频率,而输出电流的基波为2倍的开关频率,因此这样不仅可以使输出纹波电流减小,而且还可以消除输入电流的开关频率的纹波。以三路并联为例,如图5所示,各路驱动信号的相位差为120°,达到同时减小输入和输出纹波的目的。The LLC resonant converters of each phase output drive signals with a phase difference φ of 360°/N; wherein, N is the number of LLC resonant converters. Since the fundamental wave of the input current is the switching frequency, and the fundamental wave of the output current is twice the switching frequency, this not only reduces the output ripple current, but also eliminates the ripple of the switching frequency of the input current. Taking the three-way parallel connection as an example, as shown in Figure 5, the phase difference of each driving signal is 120°, so as to reduce the input and output ripples at the same time.

步骤S120:将各相LLC谐振变换器的电流进行比较;Step S120: comparing the currents of the LLC resonant converters of each phase;

对本步骤进行说明:To illustrate this step:

将各相LLC谐振变换器的输入电流或输出电流进行比较。The input current or output current of each phase LLC resonant converter is compared.

这里需要说明的是,由于比较输入电流和比较输出电流是等价的,没有区别,因此,在任何情况下,既可以比较输入电流,也可以比较输出电流。What needs to be explained here is that since comparing the input current and comparing the output current are equivalent and there is no difference, therefore, in any case, both the input current and the output current can be compared.

步骤S130:基于比较结果将时间增量叠加到电流较大的各相LLC谐振变换器的驱动信号的第二死区时间上,使这些相LLC谐振变换器的第二死区时间Td2变大。Step S130: Based on the comparison result, superimpose the time increment on the second dead time of the driving signal of the LLC resonant converter of each phase with larger current, so that the second dead time T d2 of the LLC resonant converter of these phases becomes larger .

对本步骤进行说明:To illustrate this step:

基于比较结果确定各相LLC谐振变换器中的最小电流;Determining the minimum current in the LLC resonant converter of each phase based on the comparison result;

将各相LLC谐振变换器的电流与最小电流求差;Calculate the difference between the current of each phase LLC resonant converter and the minimum current;

这里需要说明的是,若比较结果为输入电流的比较结果,则最小电流为最小输入电流;将各相LLC谐振变换器的输入电流与最小输入电流求差;若比较结果为输出电流的比较结果,则最小电流为最小输出电流;将各相LLC谐振变换器的输出电流与最小输出电流求差。What needs to be explained here is that if the comparison result is the comparison result of the input current, the minimum current is the minimum input current; the difference between the input current of each phase LLC resonant converter and the minimum input current is calculated; if the comparison result is the comparison result of the output current , then the minimum current is the minimum output current; the difference between the output current of each phase LLC resonant converter and the minimum output current is calculated.

基于电流差值得到各相LLC谐振变换器的时间增量;The time increment of the LLC resonant converter of each phase is obtained based on the current difference;

将各时间增量叠加到各LLC谐振变换器的驱动信号的第二死区时间上。Each time increment is superimposed on the second dead time of the drive signal of each LLC resonant converter.

其中,基于电流差值得到各相LLC谐振变换器的时间增量,至少包括:Wherein, the time increment of the LLC resonant converter of each phase is obtained based on the current difference, at least including:

将各电流差值通过比例-积分控制器,得到各相LLC谐振变换器的时间增量。Each current difference is passed through a proportional-integral controller to obtain the time increment of each phase LLC resonant converter.

具体地,在将各电流差值通过比例-积分控制器之后,还至少包括:Specifically, after each current difference is passed through the proportional-integral controller, it also includes at least:

将各电流差值通过限幅器,得到各相LLC谐振变换器的时间增量。Each current difference is passed through the limiter to obtain the time increment of each phase LLC resonant converter.

更具体地,步骤S130通过两部分完成,如图6和图7所示。第一部分,选择一相LLC变换器作为基准相。具体包括:将未改变第二死区时间的变换器(也就是ΔTd=0的变换器)作为备选对象,将它们的输出电流进行比较,选出电流最小的一相(假设是第m相)作为基准相。并将基准相的电流作为电流参考。第二部分,各相产生各自的第二死区时间增量ΔTd。具体包括:如果该相是基准相(即m=i),那么死区增量设为零(即ΔTd=0)。如果该相不是基准相(即m≠i),那么对该相的输出电流和基准相的输出电流求差,并经过比例-积分控制器和限幅器,产生死区时间增量ΔTd。其中,限幅器的作用是使时间增量大于或者等于零,如果比例-积分控制器产生的死区时间增量ΔTd小于零,那么限幅器将使ΔTd=0。各相产生的死区时间增量ΔTd叠加到原先的第二死区时间Td2上,使第二死区时间增加为Td2+ΔTdMore specifically, step S130 is completed in two parts, as shown in FIG. 6 and FIG. 7 . In the first part, a phase LLC converter is selected as the reference phase. Specifically, it includes: taking the converter without changing the second dead time (that is, the converter with ΔT d = 0) as the candidate object, comparing their output currents, and selecting the phase with the smallest current (assumed to be the mth phase phase) as the reference phase. And take the current of the reference phase as the current reference. In the second part, each phase generates its own second dead time increment ΔT d . Specifically, it includes: if the phase is the reference phase (ie m=i), then the dead zone increment is set to zero (ie ΔT d =0). If the phase is not the reference phase (that is, m≠i), then the difference between the output current of the phase and the output current of the reference phase is calculated, and through the proportional-integral controller and the limiter, a dead time increment ΔT d is generated. Wherein, the function of the limiter is to make the time increment greater than or equal to zero. If the dead time increment ΔT d generated by the proportional-integral controller is less than zero, the limiter will make ΔT d =0. The dead time increment ΔT d generated by each phase is superimposed on the original second dead time T d2 , so that the second dead time increases as T d2 +ΔT d .

这里需要说明的是,各相产生的死区时间增量送回第一部分,作为生成基准相的依据。What needs to be explained here is that the increment of dead time generated by each phase is sent back to the first part as the basis for generating the reference phase.

图显示了采用交错并联但未施加平衡控制时,三路LLC谐振变换器的并联效果。交错并联的方式使各路驱动信号互差120°。电流的峰值由于相差互相错开,纹波变小。但由于谐振参数的不一致(存在5%的偏差),在未施加平衡控制时,各路输出的功率不平衡。The figure shows the effect of paralleling three LLC resonant converters when interleaved paralleling is used but no balancing control is applied. The staggered parallel connection makes each drive signal different from each other by 120°. The peak values of the current are staggered from each other due to the phase difference, and the ripple becomes smaller. However, due to the inconsistency of the resonance parameters (there is a 5% deviation), when the balance control is not applied, the output power of each channel is unbalanced.

图显示的是施加平衡控制后的交错并联效果。平衡控制使各路LLC变换器的驱动信号的第二死区时间有所不同,从而使各路变换器的输出功率趋于一致。The figure shows the effect of interleaved paralleling after applying the balance control. The balance control makes the second dead time of the driving signal of each LLC converter different, so that the output power of each converter tends to be consistent.

1、先将各相LLC谐振变换器的电流进行比较,再基于比较结果将时间增量叠加到电流较大的各相LLC谐振变换器的驱动信号的第二死区时间上,使这些相LLC谐振变换器的驱动信号的第二死区时间Td2变大,从而减小了输入电压作用在谐振腔上的时间,使该相的LLC谐振变换器的谐振电流减小,从而使各路LLC谐振变换器的功率平衡,进而提高了电源的效率和可靠性。1. First compare the currents of the LLC resonant converters of each phase, and then superimpose the time increment on the second dead time of the driving signal of the LLC resonant converter of each phase with a larger current based on the comparison results, so that the LLCs of these phases The second dead time T d2 of the driving signal of the resonant converter becomes larger, thereby reducing the time for the input voltage to act on the resonant cavity, and reducing the resonant current of the LLC resonant converter of this phase, so that each LLC The power balance of the resonant converter improves the efficiency and reliability of the power supply.

2、对各相LLC谐振变换器输出相位差φ为360°/N的驱动信号,由于输入电流的基波为开关频率,而输出电流的基波为2倍的开关频率,因此这样不仅可以使输出纹波电流减小,而且还可以消除输入电流的开关频率的纹波。2. For the LLC resonant converter of each phase, the drive signal with a phase difference φ of 360°/N is output. Since the fundamental wave of the input current is the switching frequency, and the fundamental wave of the output current is twice the switching frequency, this can not only make The output ripple current is reduced, and the ripple of the switching frequency of the input current can also be eliminated.

本发明实施例不仅能够减小输入输出的纹波电流,特别是能减小开关频率的输入电流纹波,而且还能克服多个LLC谐振变换器在交错并联时,出现的功率不平衡现象,从而提高了变换器的功率密度,并使其运行更安全、可靠、高效。The embodiment of the present invention can not only reduce the input and output ripple current, especially the input current ripple of the switching frequency, but also overcome the power imbalance phenomenon that occurs when multiple LLC resonant converters are interleaved and connected in parallel. Thereby, the power density of the converter is improved, and its operation is safer, more reliable and more efficient.

尽管已描述了本发明的优选实施例,但本领域内的技术人员一旦得知了基本创造性概念,则可对这些实施例作出另外的变更和修改。所以,所附权利要求意欲解释为包括优选实施例以及落入本发明范围的所有变更和修改。While preferred embodiments of the invention have been described, additional changes and modifications to these embodiments can be made by those skilled in the art once the basic inventive concept is appreciated. Therefore, it is intended that the appended claims be construed to cover the preferred embodiment as well as all changes and modifications which fall within the scope of the invention.

显然,本领域的技术人员可以对本发明进行各种改动和变型而不脱离本发明的精神和范围。这样,倘若本发明的这些修改和变型属于本发明权利要求及其等同技术的范围之内,则本发明也意图包含这些改动和变型在内。Obviously, those skilled in the art can make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalent technologies, the present invention also intends to include these modifications and variations.

Claims (5)

1. a kind of crisscross parallel control method of three-level LLC resonance inverter, which is characterized in that include at least:
To each phase LLC resonant converter output drive signal;
The electric current of each phase LLC resonant converter is compared;
Based on comparative result by incremental time be added to the biggish each phase LLC resonant converter of electric current driving signal it is second dead On area's time;
It is described based on comparative result by incremental time be added to the biggish each phase LLC resonant converter of electric current driving signal In two dead times, include at least:
The minimum current in each phase LLC resonant converter is determined based on comparative result;
The electric current of each phase LLC resonant converter and the minimum current are asked poor;
The incremental time of each phase LLC resonant converter is obtained based on current differential;
Each incremental time is added in the second dead time of the driving signal of each LLC resonant converter;
Wherein, the second dead time be driving signal g1 be lower with driving signal g2 be lower between delay time, and the drive Dynamic signal g1 is identical as the phase of the driving signal g2.
2. the method as described in claim 1, which is characterized in that it is described to each phase LLC resonant converter output drive signal, until Include: less
The driving signal for being 360 °/N to each phase LLC resonant converter phase difference output φ;Wherein, N is the LLC resonance The number of converter.
3. the method as described in claim 1, which is characterized in that the electric current by each phase LLC resonant converter carries out Compare, include at least:
The input current of each phase LLC resonant converter or output electric current are compared.
4. the method as described in claim 1, which is characterized in that described to obtain each phase LLC resonance change based on current differential The incremental time of parallel operation, includes at least:
By each current differential by proportional-plus-integral controller, the incremental time of each phase LLC resonant converter is obtained.
5. method as claimed in claim 4, which is characterized in that each current differential is passed through proportional-plus-integral controller described Later, it also includes at least:
By each current differential by limiter, the incremental time of each phase LLC resonant converter is obtained.
CN201710851061.2A 2017-09-20 2017-09-20 An Interleaved Parallel Control Method for Three-level LLC Resonant Converters Active CN107612335B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201710851061.2A CN107612335B (en) 2017-09-20 2017-09-20 An Interleaved Parallel Control Method for Three-level LLC Resonant Converters

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201710851061.2A CN107612335B (en) 2017-09-20 2017-09-20 An Interleaved Parallel Control Method for Three-level LLC Resonant Converters

Publications (2)

Publication Number Publication Date
CN107612335A CN107612335A (en) 2018-01-19
CN107612335B true CN107612335B (en) 2019-10-25

Family

ID=61061097

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201710851061.2A Active CN107612335B (en) 2017-09-20 2017-09-20 An Interleaved Parallel Control Method for Three-level LLC Resonant Converters

Country Status (1)

Country Link
CN (1) CN107612335B (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6988839B2 (en) * 2019-02-01 2022-01-05 オムロン株式会社 Resonant converter control circuit and its control method and resonant converter
CN110572040B (en) * 2019-09-24 2021-04-02 西北工业大学 Half-bridge LLC resonant converter interleaved parallel circuit and current-sharing control method thereof
CN113098278B (en) * 2021-04-01 2023-03-03 武汉麦格米特电气有限公司 Current-sharing adjusting method and circuit for interleaved LLC circuit in parallel and resonant converter
CN116054865B (en) * 2022-12-05 2024-11-26 华南理工大学 A transmission line structured time-to-digital converter with sub-100 fs resolution
CN116073643B (en) * 2023-02-02 2023-10-10 中山大学 A decentralized interleaved control method for parallel DC-DC converters
CN119315844B (en) * 2024-12-16 2025-02-28 深圳蜂芒新能源科技有限公司 A power regulation method, system and device

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101674016A (en) * 2009-10-01 2010-03-17 旭丽电子(广州)有限公司 Power supply device and current sharing control method
CN102545596A (en) * 2010-12-17 2012-07-04 世系动力公司 Interleaved llc converter employing active balancing
CN102545638A (en) * 2012-01-20 2012-07-04 华为技术有限公司 Interleaving three-level DC/DC converter and AC/DC converter
CN102684464A (en) * 2011-03-15 2012-09-19 雅达电子国际有限公司 Resonant converter device and method for resonant converter device
CN103532393A (en) * 2012-07-04 2014-01-22 Det国际控股有限公司 LLC balancing
CN103780081A (en) * 2012-10-22 2014-05-07 伊顿公司 Interleaved LLC current-sharing converter
CN105897000A (en) * 2016-04-25 2016-08-24 陕西科技大学 Phase shift compensation interleaved three-level LLC resonant converter

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101674016A (en) * 2009-10-01 2010-03-17 旭丽电子(广州)有限公司 Power supply device and current sharing control method
CN102545596A (en) * 2010-12-17 2012-07-04 世系动力公司 Interleaved llc converter employing active balancing
CN102684464A (en) * 2011-03-15 2012-09-19 雅达电子国际有限公司 Resonant converter device and method for resonant converter device
CN102545638A (en) * 2012-01-20 2012-07-04 华为技术有限公司 Interleaving three-level DC/DC converter and AC/DC converter
CN103532393A (en) * 2012-07-04 2014-01-22 Det国际控股有限公司 LLC balancing
CN103780081A (en) * 2012-10-22 2014-05-07 伊顿公司 Interleaved LLC current-sharing converter
CN105897000A (en) * 2016-04-25 2016-08-24 陕西科技大学 Phase shift compensation interleaved three-level LLC resonant converter

Also Published As

Publication number Publication date
CN107612335A (en) 2018-01-19

Similar Documents

Publication Publication Date Title
CN107612335B (en) An Interleaved Parallel Control Method for Three-level LLC Resonant Converters
CN112511007B (en) Isolated DC/DC converter suitable for wide output voltage range and control method thereof
EP3734828B1 (en) Power conversion device
US9425693B2 (en) Systems and methods for high power DC/DC conversion using voltage converter cells
US10658928B2 (en) Switched capacitor converters with multi resonant frequencies
US11496044B2 (en) DC/DC converter and neutral-point voltage balance control method thereof
JP6186357B2 (en) Power converter
WO2015174123A1 (en) Power conversion device
JP6388154B2 (en) Resonant type DC-DC converter
KR101742231B1 (en) High Power Factor And High Efficiency Interleaved Dual-Buck Converter And Method Therefor
Sato et al. A novel secondary PWM-controlled interleaved LLC resonant converter for load current sharing
JP2001211643A (en) Active clamp forward converter
JP2012050264A (en) Load driving device
EP3700074A1 (en) Dc-dc converter
Coccia et al. Wide input voltage range compensation in DC/DC resonant architectures for on-board traction power supplies
JP5072097B2 (en) Three-phase voltage type inverter system
JP6140007B2 (en) Power converter
CN112117913B (en) Power converter and control method thereof
Chen et al. Current balance method for the two-phase interleaved LLC-RDCX with parallel PWM output regulation
JP5418910B2 (en) DC-DC converter
JP7100847B2 (en) Power converter control device
CN112928918A (en) Resonance conversion system, signal control method, and signal control device
US9871450B2 (en) Isolated step-up converter
CN112117912B (en) Power converter and control method thereof
Toniolo et al. Design criteria and modulation strategies for complete zvs operation of the bidirectional interleaved boost converter with coupled inductors

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant
EE01 Entry into force of recordation of patent licensing contract
EE01 Entry into force of recordation of patent licensing contract

Application publication date: 20180119

Assignee: Wuhan Financial Leasing Co.,Ltd.

Assignor: WUHAN NANHUA INDUSTRIAL EQUIPMENT ENGINEERING Co.,Ltd.

Contract record no.: X2023420000146

Denomination of invention: A interleaved parallel control method for three-level LLC resonant converters

Granted publication date: 20191025

License type: Exclusive License

Record date: 20230607