CN107591420B - Sensor Package Structure - Google Patents
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
- H01L2224/48471—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area being a ball bond, i.e. wedge-to-ball, reverse stitch
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48475—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball
- H01L2224/48476—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area
- H01L2224/48477—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area being a pre-ball (i.e. a ball formed by capillary bonding)
- H01L2224/48478—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area being a pre-ball (i.e. a ball formed by capillary bonding) the connecting portion being a wedge bond, i.e. wedge on pre-ball
- H01L2224/48479—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area being a pre-ball (i.e. a ball formed by capillary bonding) the connecting portion being a wedge bond, i.e. wedge on pre-ball on the semiconductor or solid-state body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
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- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- Pressure Sensors (AREA)
Abstract
一种感测器封装结构,包括:基板、设置于上述基板的感测芯片、电性连接上述基板与感测芯片的多条金属线、位置对应于感测芯片的透光层、及能使透光层稳定地黏固于感测芯片与基板的黏接体。远离基板的感测芯片顶面包含有感测区及围绕于感测区的间隔区,并且顶面具有至少一第一边缘与至少一第二边缘,第一边缘与间隔区的距离大于第二边缘与间隔区的距离。感测芯片在顶面的第一边缘与间隔区之间形成有多个连接垫,而第二边缘与间隔区之间未形成有任何连接垫。黏接体包覆感测芯片外侧缘、第一边缘与间隔区之间的顶面部位、及透光层外侧缘,而每条金属线的至少部分埋置于黏接体内。借此,上述感测器封装结构能够适用来封装较小尺寸的感测芯片。
A sensor packaging structure includes: a substrate, a sensing chip disposed on the substrate, a plurality of metal wires electrically connecting the substrate and the sensing chip, a light-transmitting layer corresponding to the position of the sensing chip, and an adhesive body capable of stably bonding the light-transmitting layer to the sensing chip and the substrate. The top surface of the sensing chip away from the substrate contains a sensing area and a spacing area surrounding the sensing area, and the top surface has at least one first edge and at least one second edge, and the distance between the first edge and the spacing area is greater than the distance between the second edge and the spacing area. The sensing chip has a plurality of connection pads formed between the first edge of the top surface and the spacing area, and no connection pads are formed between the second edge and the spacing area. The adhesive body covers the outer edge of the sensing chip, the top surface portion between the first edge and the spacing area, and the outer edge of the light-transmitting layer, and at least part of each metal wire is buried in the adhesive body. Thereby, the sensor packaging structure can be used to package sensing chips of smaller sizes.
Description
技术领域technical field
本发明是涉及一种封装结构,且还涉及一种感测器封装结构。The present invention relates to a package structure, and also relates to a sensor package structure.
背景技术Background technique
现有电子装置内的电子构件需要朝向尺寸缩小的方向研发,以使电子装置能够在有限的空间内安装更多的电子构件。然而,现有感测器封装结构(例如:影像感测器封装结构)的发展已面临难以继续缩小尺寸的问题,而其中一个主要原因在于,现有感测器封装结构并不适合用来进行较小尺寸感测芯片的封装。The electronic components in the existing electronic devices need to be developed in the direction of downsizing, so that the electronic devices can install more electronic components in a limited space. However, the development of existing sensor packaging structures (eg, image sensor packaging structures) has faced the problem that it is difficult to continue to reduce the size, and one of the main reasons is that the existing sensor packaging structures are not suitable for Packaging for smaller size sensing chips.
于是,本发明人认为上述缺陷可改善,潜心研究并配合学理的运用,终于提出一种设计合理且有效改善上述缺陷的本发明。Therefore, the inventors of the present invention believe that the above-mentioned defects can be improved, and have concentrated on research and application of theories, and finally come up with the present invention with a reasonable design and effectively improving the above-mentioned defects.
发明内容SUMMARY OF THE INVENTION
本发明实施例在于提供一种感测器封装结构,通过有别于以往的构造而能有效地改善现有感测器封装结构所易发生的问题。The embodiments of the present invention provide a sensor package structure, which can effectively improve the problems that are likely to occur in the existing sensor package structure by being different from the conventional structure.
本发明实施例公开一种感测器封装结构,包括:一基板,所述基板包含位于相反两侧的一上表面与一下表面,并且所述基板在所述上表面形成有多个焊垫;一感测芯片,所述感测芯片包含有位于相反两侧的一顶面与一底面,所述感测芯片的所述底面设置于所述基板的所述上表面,所述顶面包含有一感测区以及围绕于所述感测区的一间隔区;其中,所述顶面具有至少一第一边缘与至少一第二边缘,并且所述感测芯片在所述顶面的至少一所述第一边缘与所述间隔区之间形成有多个连接垫,而至少一所述第二边缘与所述间隔区之间未形成有任何连接垫;多条金属线,多条所述金属线的一端分别连接于多个所述焊垫,并且多条所述金属线的另一端分别连接于多个所述连接垫;一第一接合层,所述第一接合层设置于至少一所述第一边缘与所述间隔区之间的所述顶面部位上;一第二接合层,所述第二接合层设置于所述上表面并且邻设于所述感测芯片的至少一所述第二边缘旁,所述第二接合层相较于所述上表面的高度等同于所述第一接合层相较于所述上表面的高度;一透光层,所述透光层具有位于相反两侧的一第一表面与一第二表面,所述透光层的所述第二表面黏接于所述第一接合层与所述第二接合层;以及一封胶体,所述封胶体设置于所述基板的所述上表面并包覆所述感测芯片外侧缘、所述第一接合层外侧缘、所述第二接合层外侧缘、及所述透光层外侧缘,而每条所述金属线的至少部分及每个所述焊垫皆埋置于所述封胶体内。An embodiment of the present invention discloses a sensor package structure, comprising: a substrate, the substrate includes an upper surface and a lower surface on opposite sides, and a plurality of solder pads are formed on the upper surface of the substrate; a sensing chip, the sensing chip includes a top surface and a bottom surface on opposite sides, the bottom surface of the sensing chip is disposed on the upper surface of the substrate, the top surface includes a A sensing area and a spacer area surrounding the sensing area; wherein the top surface has at least one first edge and at least one second edge, and the sensing chip is at least one of the top surface A plurality of connection pads are formed between the first edge and the spacer, and no connection pad is formed between at least one of the second edges and the spacer; a plurality of metal lines, a plurality of the metal One end of the wire is respectively connected to the plurality of the bonding pads, and the other end of the plurality of the metal wires is respectively connected to the plurality of the connection pads; a first bonding layer, the first bonding layer is arranged on at least one of the bonding pads. On the top surface portion between the first edge and the spacer; a second bonding layer, the second bonding layer is disposed on the upper surface and adjacent to at least one of the sensing chips Next to the second edge, the height of the second bonding layer relative to the upper surface is equal to the height of the first bonding layer relative to the upper surface; a light-transmitting layer, the light-transmitting layer has a first surface and a second surface on opposite sides, the second surface of the light-transmitting layer is bonded to the first bonding layer and the second bonding layer; and an encapsulant, the The encapsulant is disposed on the upper surface of the substrate and covers the outer edge of the sensing chip, the outer edge of the first bonding layer, the outer edge of the second bonding layer, and the outer edge of the light-transmitting layer, At least part of each of the metal lines and each of the solder pads are embedded in the encapsulant.
优选地,所述第一接合层的所述外侧缘包含有一弧形曲面,并且所述弧形曲面的弧心位于所述封胶体。Preferably, the outer edge of the first bonding layer includes an arc-shaped curved surface, and the arc center of the arc-shaped curved surface is located on the sealing compound.
优选地,在垂直于所述上表面的一截面,所述第二接合层的所述外侧缘呈S形曲线。Preferably, in a section perpendicular to the upper surface, the outer edge of the second bonding layer is an S-shaped curve.
优选地,所述第二接合层的所述外侧缘与所述感测区的距离等于至少一所述第一边缘与所述感测区的距离。Preferably, the distance between the outer edge of the second bonding layer and the sensing area is equal to the distance between at least one of the first edges and the sensing area.
优选地,所述第二接合层进一步设置于至少一所述第二边缘与所述间隔区之间的所述顶面部位上。Preferably, the second bonding layer is further disposed on the top surface portion between at least one of the second edges and the spacer region.
优选地,至少一所述第二边缘与所述间隔区之间的所述顶面部位的面积小于其所相连的所述间隔区部位的面积。Preferably, the area of the top surface portion between at least one of the second edges and the spacer is smaller than the area of the spacer portion to which it is connected.
优选地,至少一所述第一边缘与所述间隔区的距离大于至少一所述第二边缘与所述间隔区的距离。Preferably, the distance between at least one of the first edges and the spacer area is greater than the distance between at least one of the second edges and the spacer area.
优选地,所述感测芯片正投影于所述第二表面而形成有一投影区域,并且所述投影区域是位于所述第二表面的轮廓内;所述第二表面在黏接于所述第一接合层与所述第二接合层的部位的外侧留有一固定区,所述封胶体进一步包覆所述固定区。Preferably, the sensing chip is projected on the second surface to form a projection area, and the projection area is located within the outline of the second surface; the second surface is adhered to the first surface. A fixing area is left on the outer side of the part of the first bonding layer and the second bonding layer, and the sealing compound further covers the fixing area.
优选地,所述封胶体进一步限定为一液状封装胶体,并且所述透光层的所述第一表面与相邻的所述封胶体表面形成有大于90度且小于等于180度的一夹角。Preferably, the encapsulant is further defined as a liquid encapsulant, and the first surface of the light-transmitting layer and the adjacent surface of the encapsulant form an included angle greater than 90 degrees and less than or equal to 180 degrees .
优选地,所述感测器封装结构进一步包括有设置于所述封胶体顶缘的一模制胶体,所述模制胶体的顶表面与相邻的所述第一表面呈平行设置,所述模制胶体的侧表面与相邻的所述封胶体的侧缘呈共平面设置。Preferably, the sensor packaging structure further includes a molding compound disposed on the top edge of the sealing compound, and the top surface of the molding compound is arranged in parallel with the adjacent first surface, and the The side surface of the molding compound and the adjacent side edges of the encapsulant are arranged coplanarly.
优选地,所述封胶体进一步限定为一模制胶体,并且所述透光层的所述第一表面与相邻的所述封胶体表面形成有180度的一夹角。Preferably, the sealing compound is further defined as a molding compound, and the first surface of the light-transmitting layer and the adjacent surface of the sealing compound form an included angle of 180 degrees.
本发明实施例也公开一种感测器封装结构,其特征在于,所述感测器封装结构包括:一基板,所述基板包含位于相反两侧的一上表面与一下表面,并且所述基板在所述上表面形成有多个焊垫;一感测芯片,所述感测芯片包含有位于相反两侧的一顶面与一底面,所述感测芯片的所述底面设置于所述基板的所述上表面,所述顶面包含有一感测区以及围绕于所述感测区的一间隔区;其中,所述顶面具有至少一第一边缘与至少一第二边缘,至少一所述第一边缘与所述间隔区的距离大于至少一所述第二边缘与所述间隔区的距离,并且所述感测芯片在所述顶面的至少一所述第一边缘与所述间隔区之间形成有多个连接垫,而至少一所述第二边缘与所述间隔区之间未形成有任何连接垫;多条金属线,多条所述金属线的一端分别连接于多个所述焊垫,并且多条所述金属线的另一端分别连接于多个所述连接垫;一透光层,所述透光层具有位于相反两侧的一第一表面与一第二表面,所述透光层的所述第二表面是面向于所述感测芯片的所述顶面;以及一黏接体,所述黏接体设置于所述基板的所述上表面并包覆所述感测芯片外侧缘、至少一所述第一边缘与所述间隔区之间的所述顶面部位、及所述透光层外侧缘与部分所述第二表面,而每条所述金属线的至少部分及每个所述焊垫皆埋置于所述黏接体内。An embodiment of the present invention also discloses a sensor package structure, wherein the sensor package structure includes: a substrate, the substrate includes an upper surface and a lower surface on opposite sides, and the substrate A plurality of bonding pads are formed on the upper surface; a sensing chip includes a top surface and a bottom surface on opposite sides, and the bottom surface of the sensing chip is disposed on the substrate The upper surface of the top surface includes a sensing area and a spacer area surrounding the sensing area; wherein, the top surface has at least one first edge and at least one second edge, and at least one The distance between the first edge and the spacer is greater than the distance between at least one of the second edges and the spacer, and at least one of the first edges and the space of the sensing chip on the top surface A plurality of connection pads are formed between the regions, and no connection pads are formed between at least one of the second edges and the spacer region; a plurality of metal lines, one end of the plurality of metal lines is respectively connected to the plurality of the bonding pads, and the other ends of the plurality of metal lines are respectively connected to the plurality of connection pads; a light-transmitting layer, the light-transmitting layer has a first surface and a second surface on opposite sides , the second surface of the light-transmitting layer faces the top surface of the sensing chip; and an adhesive body, the adhesive body is disposed on the upper surface of the substrate and covers The outer edge of the sensing chip, the top surface portion between at least one of the first edges and the spacer region, the outer edge of the light-transmitting layer and part of the second surface, and each of the At least part of the metal lines and each of the pads are embedded in the adhesive body.
优选地,所述黏接体包含:一支撑层,所述支撑层邻设于所述感测芯片的至少一所述第二边缘旁,并且远离所述基板的所述支撑层端缘与所述感测芯片的所述顶面等高;一接合层,所述接合层设置于所述支撑层以及至少一所述第一边缘与所述间隔区之间的所述顶面部位上,所述透光层的所述第二表面黏接于所述接合层;一封胶体,所述封胶体设置于所述基板的所述上表面并包覆所述感测芯片外侧缘、所述支撑层外侧缘、所述接合层外侧缘、及所述透光层外侧缘,而每条所述金属线的至少部分及每个所述焊垫皆埋置于所述封胶体内。Preferably, the adhesive body includes: a support layer, the support layer is adjacent to at least one of the second edges of the sensing chip, and is far away from the end edge of the support layer and the support layer of the substrate. The top surface of the sensing chip is of the same height; a bonding layer, the bonding layer is disposed on the support layer and the top surface portion between at least one of the first edges and the spacer, so The second surface of the light-transmitting layer is adhered to the bonding layer; an encapsulant body, the encapsulant body is disposed on the upper surface of the substrate and covers the outer edge of the sensing chip, the support The outer edge of the layer, the outer edge of the bonding layer, and the outer edge of the light-transmitting layer, and at least part of each of the metal lines and each of the solder pads are embedded in the encapsulant.
优选地,所述支撑层的所述外侧缘包含有一弧形侧面,并且所述弧形侧面的弧心位于所述封胶体的内侧。Preferably, the outer edge of the support layer includes an arc-shaped side surface, and the arc center of the arc-shaped side surface is located inside the sealing compound.
优选地,所述接合层的所述外侧缘包含有一弧形曲面,并且所述弧形曲面的弧心位于所述封胶体。Preferably, the outer edge of the bonding layer includes an arc-shaped curved surface, and the arc center of the arc-shaped curved surface is located on the sealing compound.
优选地,所述接合层的所述外侧缘与所述感测区的距离等于至少一所述第一边缘与所述感测区的距离。Preferably, the distance between the outer edge of the bonding layer and the sensing area is equal to the distance between at least one of the first edges and the sensing area.
优选地,所述接合层进一步设置于至少一所述第二边缘与所述间隔区之间的所述顶面部位上。Preferably, the bonding layer is further disposed on the top surface portion between at least one of the second edges and the spacer region.
优选地,至少一所述第二边缘与所述间隔区之间的所述顶面部位的面积小于其所相连的所述间隔区部位的面积。Preferably, the area of the top surface portion between at least one of the second edges and the spacer is smaller than the area of the spacer portion to which it is connected.
优选地,所述感测芯片正投影于所述第二表面而形成有一投影区域,并且所述投影区域是位于所述第二表面的轮廓内;所述第二表面在黏接于所述接合层的部位的外侧留有一固定区,所述封胶体进一步包覆所述固定区。Preferably, the sensing chip is projected on the second surface to form a projected area, and the projected area is located within the outline of the second surface; the second surface is being bonded to the bonding A fixing area is left outside the part of the layer, and the encapsulant body further covers the fixing area.
综上所述,本发明所公开的感测器封装结构,能够适用于顶面边缘(如:第二边缘)与感测区之间未设有连接垫的感测芯片,借以利于封装尺寸缩小后的感测芯片。To sum up, the sensor package structure disclosed in the present invention can be applied to a sensor chip without connecting pads between the top surface edge (eg, the second edge) and the sensing area, so as to facilitate the reduction of the package size the sensor chip behind.
为使能更进一步了解本发明的特征及技术内容,请参阅以下有关本发明的详细说明与附图,但是此等说明与所附图式仅用来说明本发明,而非对本发明的保护范围作任何的限制。In order to further understand the features and technical content of the present invention, please refer to the following detailed description and accompanying drawings of the present invention, but these descriptions and accompanying drawings are only used to illustrate the present invention, rather than to the protection scope of the present invention make any restrictions.
附图说明Description of drawings
图1为本发明感测器封装结构实施例一的剖视示意图。FIG. 1 is a schematic cross-sectional view of a first embodiment of a sensor package structure according to the present invention.
图2为图1的俯视示意图(省略封胶体、透光层、金属线)。FIG. 2 is a schematic top view of FIG. 1 (the encapsulant, the light-transmitting layer, and the metal wires are omitted).
图3为图1的俯视示意图(省略封胶体)。FIG. 3 is a schematic top view of FIG. 1 (the encapsulant is omitted).
图4为图1的另一俯视示意图(省略封胶体)。FIG. 4 is another schematic top view of FIG. 1 (the encapsulant is omitted).
图5A为图1的A区域局部放大示意图。FIG. 5A is a partial enlarged schematic diagram of the area A of FIG. 1 .
图5B为图5A的变化态样示意图。FIG. 5B is a schematic diagram of a variation of FIG. 5A .
图6为图1的B区域局部放大示意图。FIG. 6 is a partial enlarged schematic diagram of the B region of FIG. 1 .
图7为图1的变化类型的剖视示意图。FIG. 7 is a schematic cross-sectional view of the variation of FIG. 1 .
图8为图1的另一变化类型的剖视示意图。FIG. 8 is a schematic cross-sectional view of another variation of FIG. 1 .
图9为图1的又一变化类型的剖视示意图。FIG. 9 is a schematic cross-sectional view of another variation of FIG. 1 .
图10为本发明感测器封装结构实施例二的剖视示意图。FIG. 10 is a schematic cross-sectional view of
图11为本发明感测器封装结构实施例三的俯视示意图。FIG. 11 is a schematic top view of
图12为沿图11的剖线XⅡ-XⅡ的剖视示意图。FIG. 12 is a schematic cross-sectional view along the line XII-XII of FIG. 11 .
具体实施方式Detailed ways
[实施例一][Example 1]
请参阅图1至图9,其为本发明的实施例一,需先说明的是,本实施例对应图式所提及的相关数量与外型,仅用来具体地说明本发明的实施方式,以便于了解本发明,而非用来局限本发明的保护范围。Please refer to FIG. 1 to FIG. 9 , which are the first embodiment of the present invention. It should be noted that the relevant quantity and appearance mentioned in the drawings in this embodiment are only used to specifically describe the embodiments of the present invention. , so as to facilitate understanding of the present invention, but not to limit the protection scope of the present invention.
如图1和图2所示,本实施例公开一种感测器封装结构100,尤其是指一种影像感测器封装结构100,但本发明不受限于此。所述感测器封装结构100包括:一基板1、设置于上述基板1的一感测芯片2、使上述基板1与感测芯片2建立电性连接的多条金属线3、位置对应于感测芯片2的一透光层4、及能使透光层4稳定地黏固于感测芯片2与基板1的一黏接体5。以下将分别介绍感测器封装结构100中的各个构件构造,并适时说明构件间的连接关系。As shown in FIG. 1 and FIG. 2 , the present embodiment discloses a
如图1和图2所示,所述基板1可以是塑料基板、陶瓷基板、导线架(leadframe)、或是其他板状材料,本实施例对此不加以限制。其中,上述基板1包含位于相反两侧的一上表面11与一下表面12,并且所述基板1在上表面11形成有间隔排列的多个焊垫111。再者,所述基板在下表面12也形成有多个焊垫(未标示),借以用来分别焊接多颗焊接球(未标示)。也就是说,本实施例的基板1是以具备球栅阵列封装(Ball Grid Array,BGA)的构造作一说明,但不受限于此。As shown in FIG. 1 and FIG. 2 , the
如图1和图2所示,所述感测芯片2于本实施例中是以影像感测芯片作一说明,但本实施例对感测芯片2的类型不加以限制。其中,所述感测芯片2包含有位于相反两侧的一顶面21与一底面22、及垂直地相连于顶面21与底面22的一外侧缘23。所述顶面21包含有一感测区211以及围绕于上述感测区211的一间隔区212。所述感测区211于本实施例中大致呈方形(如:正方形或长方形),并且感测区211的中心可以是顶面21的中心(如图4)或是与顶面21中心留有一距离(如图2和图3)。所述间隔区212于本实施例中则是呈方环状,并且间隔区212的每个部位的宽度大致相同,但间隔区212的具体外型可以依据设计者或制造者的需求而加以调整,在此不加以限制。As shown in FIG. 1 and FIG. 2 , the
进一步地说,所述顶面21具有至少一第一边缘213与至少一第二边缘214,而所述外侧缘23包含相连于至少一所述第二边缘214的至少一侧面231。上述第一边缘213与间隔区212的距离D1(如图6)大于所述第二边缘214与间隔区212的距离D2(如图5A)。而于本实施例中,所述第二边缘214与感测区211的距离D2小于1/3至1/4的第一边缘213与感测区211的距离D1(D2<1/3~1/4D1),但上述距离D2与距离D1的比例设计可以依据设计者或制造者的需求而加以调整,在此不加以限制。所述感测芯片2在顶面21的第一边缘213与间隔区212之间形成有多个连接垫215,而第二边缘214与间隔区212之间未形成有任何连接垫215。Further, the
其中,所述顶面21可以是包含有多个第一边缘213及单个第二边缘214(如图3)、多个第一边缘213与多个第二边缘214(如图4)、或是单个第一边缘213与多个第二边缘214(图中未示出),在此不加以限制。也就是说,图1相当于沿图3的IA-IA剖线的剖视示意图、或是相当于沿图4的IB-IB剖线的剖视示意图。The
再者,所述感测芯片2是以底面22设置于基板1的上表面11,并且设置有上述感测芯片2的基板1上表面11部位是大致位于所述多个焊垫111包围的区域之内。其中,本实施例中的感测芯片2是通过黏晶胶(Die AttachEpoxy,未标示)来将其底面22固定于基板1的上表面11,但具体设置方式不受限于此。Furthermore, the
如图1和图2所示,所述多条金属线3的一端分别连接于基板1的多个焊垫111,并且多条金属线3的另一端分别连接于感测芯片2的多个连接垫215。其中,本实施例的每条金属线3是以反打(reverse bond)的方式所形成,所以上述感测芯片2的顶面21与每条金属线3的相邻部位(如图1中位于顶面21上方的金属线3部位)能够形成有小于等于45度的一夹角(未标示),以使每条金属线3的顶点31能够位在较低的高度位置,进而避免触碰到透光层4,但本发明不受限于此。例如,上述夹角也可以是小于等于30度。As shown in FIG. 1 and FIG. 2 , one ends of the plurality of
如图1和图2所示,所述透光层4于本实施例中是以平板状的玻璃作一说明,但本实施例对透光层4的类型不加以限制。其中,所述透光层4具有位于相反两侧的一第一表面41与一第二表面42、及垂直地相连于第一表面41与第二表面42的一外侧缘43。本实施例的第一表面41与第二表面42为尺寸相同的方形(如:正方形或长方形),并且所述透光层4的第二表面42面积大于上述感测芯片2的顶面21面积,但不受限于此。As shown in FIG. 1 and FIG. 2 , the light-transmitting
再者,所述透光层4通过黏接体5而固定于基板1与感测芯片2,并且透光层4的第二表面42是大致平行且面向于所述感测芯片2的顶面21。进一步地说,所述感测芯片2正投影于第二表面42而形成有一投影区域(未标示),并且所述投影区域是位于第二表面42的轮廓内。另,上述透光层4的第二表面42较佳是邻设但未接触于每条金属线3,并且每条金属线3的顶点31是位在透光层4朝向基板1正投影所形成的空间之外侧,每条金属线3的顶点31相较于感测芯片2顶面21的高度H1(如图6)较佳是小于所述透光层4第二表面42相较于感测芯片2顶面21的高度H2(如图6),但不受限于此。Furthermore, the light-transmitting
如图1、图5A、和图6,所述黏接体5可以是相同材质的单一构件或是由多种材质所组成的复合构件,本实施例对黏接体5的类型不加以限制。其中,所述黏接体5设置于基板1的上表面并包覆上述感测芯片2外侧缘23、所述第一边缘213与间隔区212之间的顶面21部位、及所述透光层4外侧缘43与部分第二表面42。每条金属线3的至少部分及每个焊垫111皆埋置于上述黏接体5内。As shown in FIGS. 1 , 5A and 6 , the
更详细地说,本实施例的黏接体5包含彼此相连接的一支撑层51、一接合层52、及一封胶体53,但本发明不受限于此。其中,所述支撑层51与接合层52较佳为相同的材质(如:玻璃接合树脂,Glass Mount Epoxy),但不同于封胶体53的材质(如:液状封装胶体,liquidcompound)。下述将分别介绍支撑层51、接合层52、及封胶体53相对于其他构件的连接关系。More specifically, the
如图2和图5A,本实施例中的支撑层51外型与形成位置是相关于感测芯片2的顶面21第二边缘214。举例来说,图3所示的支撑层51为大致平行于第二边缘214的单个长条状构造,图4所示的支撑层51则为大致平行于第二边缘214的两个长条状构造。其中,所述支撑层51是邻设于感测芯片2的第二边缘214旁(如:支撑层51抵接于感测芯片2中与第二边缘214相连的侧面231),并且远离上述基板1的支撑层51端缘(如图5A中的支撑层51顶缘)大致与感测芯片2的顶面21(或第二边缘214)等高。As shown in FIG. 2 and FIG. 5A , the shape and formation position of the
进一步地说,所述支撑层51的外侧缘511包含有一弧形侧面511,并且上述弧形侧面511的弧心(未标示)位于封胶体53的内侧(如:弧心位于支撑层51内),但不受限于此。举例来说,如图5B所示,所述弧形侧面511的弧心(未标示)也可以是位于封胶体53。Further, the
如图2、图5A、及图6,所述接合层52大致呈方环状,并且接合层52的环形内缘较佳是相接于感测芯片2的间隔区212外缘。也就是说,所述间隔区212是为隔开接合层52与感测区211所预定保留的区域。其中,所述接合层52是设置于上述支撑层51以及第一边缘213与间隔区212之间的顶面21部位上,并且设置于支撑层51上的所述接合层52部位(如图5A)可进一步设置于第二边缘214与间隔区212之间的顶面21部位上。其中,上述第二边缘214与间隔区212之间的顶面21部位的面积较佳是小于其所相连的间隔区212部位的面积。换个角度来说,在一未绘示的实施例中,当设置于支撑层51上的所述接合层52部位并未设置于感测芯片2的顶面21时,所述顶面21的第二边缘214相当于落在间隔区212外缘。As shown in FIG. 2 , FIG. 5A , and FIG. 6 , the
进一步地说,设置于支撑层51上的所述接合层52部位(如图5A)的宽度与高度大致等同设置于第一边缘213与间隔区212之间的顶面21部位上的所述接合层52部位(如图6)的宽度与高度。所述接合层52的外侧缘521包含有一弧形曲面521,并且所述弧形曲面521的弧心位于封胶体53。所述接合层52的弧形曲面521与感测区211的最大距离D3(如图5A)较佳是大致等于所述第一边缘213与感测区211的距离D4(如图6)。其中,在垂直于所述基板1上表面11的感测器封装结构100截面(如图5A)上,所述支撑层51的弧形侧面511与上述接合层52的弧形曲面521相接构成S形曲线,但本发明不以此为限(如图5B)。Further, the width and height of the
再者,每条金属线3的部分埋置于所述接合层52内,也就是说,每个连接垫215及其所连接的局部金属线3于本实施例中是被埋置于接合层52内。但在一未绘示的实施例中,所述连接垫215及其所连接的局部金属线3可以无需埋置于接合层52。Furthermore, a portion of each
另,如图1,所述透光层4的第二表面42黏接于接合层52,以使透光层4的第二表面42、接合层52、及感测芯片2的顶面21共同包围形成有一封闭空间6,而感测芯片2的感测区211位于上述封闭空间6内。其中,所述第二表面42在黏接于接合层52的部位的外侧留有呈方环状的一固定区421。In addition, as shown in FIG. 1 , the
如图1、图5A、及图6,所述封胶体53设置于基板1的上表面11并包覆所述感测芯片2外侧缘23、支撑层51外侧缘511、接合层52外侧缘521、及透光层4外侧缘43与固定区421。而每条金属线3的至少部分及每个焊垫111皆埋置于所述封胶体53内。其中,本实施例的每条金属线3是分别埋置于封胶体53与接合层52,并且每条金属线3的顶点31是埋置于封胶体53。但在一未绘示的实施例中,每条金属线3也可以完全埋置于所述封胶体53内。As shown in FIG. 1 , FIG. 5A , and FIG. 6 , the
更详细地说,所述透光层4的第一表面41与相邻的封胶体53表面(如图1中的封胶体53顶缘)形成有大于90度且小于等于180度的一夹角所述夹角较佳是介于115度至150度。而所述封胶体53侧缘则大致切齐于基板1的侧缘。其中,本实施例中的封胶体53虽是以未附着在透光层4的第一表面41作说明,但本发明不排除封胶体53附着在上述透光层4的局部第一表面41(如:第一表面41的外缘部位)。In more detail, the
综上所述,本实施例所公开的感测器封装结构100,能够适用于顶面21边缘(如:第二边缘214)与感测区211之间未设有连接垫215的感测芯片2,借以利于封装尺寸缩小后的感测芯片2。并且所述感测器封装结构100也可以通过将金属线3的局部埋置于接合层52内,而使其利于封装尺寸缩小后的感测芯片2。To sum up, the
再者,所述封胶体53通过黏接于支撑层51的弧形侧面511与接合层52的弧形曲面521、及透光层4的外侧缘43与固定区421,以使透光层4更为稳固地被设置于预定的位置上,进而使透光层4保持不接触金属线3,达到透光层4大致平行于感测芯片2顶面21的要求,借以使感测器封装结构100具有较佳的可靠度。Furthermore, the
又,所述支撑层51是先以一个流程制造,而后上述接合层52再以另外一个流程制造,所以能够通过支撑层51填补感测芯片2被缩小的部位(如:感测区211与第二边缘214之间的部位),借以提供接合层52足够的设置空间,而能够避免接合层52跨过间隔区212而接触在感测区211上。In addition, the supporting
此外,本实施例图1至图6所公开的感测器封装结构100也能够依据设计者的需求而加以调整,但由于本实施例感测器封装结构100的变化类型过多、无法逐一通过附图方式公开,所以下述仅列举部分感测器封装结构100的变化类型。In addition, the
如图7所示,所述透光层4的外侧缘43呈阶梯状并埋置于所述封胶体53内,并且所述透光层4的第一表面41的面积小于第二表面42的面积。然而,在一未绘示的实施例中,不排除上述第一表面41的面积大于第二表面42的面积。As shown in FIG. 7 , the
如图8所示,所述感测器封装结构100的黏接体5可进一步包括有一模制胶体54(molding compound)。其中,上述模制胶体54设置于所述封胶体53的顶缘,并且模制胶体54的顶表面与相邻的透光层4第一表面41大致呈平行设置,而所述模制胶体54的侧表面则与相邻的封胶体53的侧缘呈共平面设置,但不受限于此。再者,所述模制胶体54的顶表面与相邻的透光层4第一表面41也可以是大致呈共平面设置,但本发明不受限于此。As shown in FIG. 8 , the
如图9所示,所述封胶体53可以是一模制胶体54,并且所述透光层4的第一表面41与相邻的封胶体53表面大致呈平行设置,较佳为形成大致180度的夹角 As shown in FIG. 9 , the sealing
[实施例二][Example 2]
请参阅图10,其为本发明的实施例二,本实施例与上述实施例一类似,相同处则不再加以赘述,而两者的差异主要在于:上述实施例一的接合层52与支撑层51能以本实施例的第一接合层55与第二接合层56取代,也就是说,实施例一的支撑层51及设置于其上的接合层52部位(如图5A)于本实施例中改以一个流程所制造并定义为第二接合层56,而实施例一的接合层52其余部位(如图6)于本实施例中则改以另一个流程所制造并定义为第一接合层55,但本发明不受限于此。本实施例相较于实施例一的具体结构差异,大致说明如下。Please refer to FIG. 10 , which is the second embodiment of the present invention. This embodiment is similar to the above-mentioned first embodiment, and the same parts will not be repeated. The
所述第一接合层55设置于第一边缘213与间隔区212之间的所述顶面21部位上,所述第二接合层56设置于所述基板1的上表面11并且邻设于感测芯片2的第二边缘214旁(如:第二接合层56抵接于感测芯片2的侧面231)。其中,所述第二接合层56可进一步设置于第二边缘214与间隔区212之间的所述顶面21部位上,并且所述第二边缘214与间隔区212之间的顶面21部位的面积小于其所相连的间隔区212部位的面积。而所述第二接合层56顶缘相较于基板1的上表面11的高度大致等同于所述第一接合层55顶缘相较于基板1上表面11的高度。The
再者,所述第二接合层56上半部区块的外侧缘561与感测区211的最大距离大致等于所述第一边缘213与感测区211的距离。所述第一接合层55的外侧缘551包含有一弧形侧面551,并且所述弧形侧面551的弧心位于封胶体53。在垂直于所述基板1上表面11的感测器封装结构100的截面上,所述第二接合层56的外侧缘呈S形曲线,但不受限于此(如图5B)。Furthermore, the maximum distance between the
所述透光层4的第二表面42黏接于第一接合层55与第二接合层56;以及所述第二表面42在黏接于上述第一接合层55与第二接合层56的部位的外侧留有固定区421。The
所述封胶体53设置于所述基板1的上表面11并包覆所述感测芯片2外侧缘23、第一接合层55外侧缘551、第二接合层56外侧缘561、及所述透光层4外侧缘43与固定区421,而每条金属线3的部分及每个焊垫111皆埋置于所述封胶体53内。The
[实施例三][Example 3]
请参阅图11和图12,其为本发明的实施例三,本实施例与上述实施例一类似,相同处则不再加以赘述,而两者的差异主要在于:本实施例的感测器封装结构100可无须设有任何支撑层51,也就是说,本实施例的感测芯片2顶面21的边缘皆为第一边缘213。Please refer to FIG. 11 and FIG. 12 , which are
需额外说明的是,上述三个实施例的感测器封装结构100在许多部位的尺寸皆能够被缩小,举例来说,如图12所示,所述透光层4的外侧缘43与相邻的封胶体53侧缘之间的距离D5大致为300μm~500μm,所述基板1的任一个焊垫111外缘与相邻的感测芯片2外侧缘23之间的最大距离D6大致为200μm~350μm,邻近于任一个焊垫111的感测芯片2外侧缘23与相邻的封胶体53侧缘之间的距离D7大致为225μm~425μm。借此,所述感测器封装结构100的尺寸比现有技术更小,并且能够使用较少量的封胶体53,进而通过使用上述少量的封胶体53,令感测器封装结构100所受到的热涨冷缩应力减少,提升可靠度。It should be noted that the dimensions of the
以上所述仅为本发明的较佳可行实施例,并非用来局限本发明的保护范围,凡依本发明权利要求所做的均等变化与修饰,皆应属本发明的保护范围。The above descriptions are only preferred feasible embodiments of the present invention, and are not intended to limit the protection scope of the present invention. All equivalent changes and modifications made according to the claims of the present invention shall belong to the protection scope of the present invention.
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JP2020036216A (en) | 2018-08-30 | 2020-03-05 | ソニーセミコンダクタソリューションズ株式会社 | Solid-state imaging apparatus and method of manufacturing the same |
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CN111212201A (en) * | 2018-11-22 | 2020-05-29 | 纮华电子科技(上海)有限公司 | Image acquisition module and portable electronic device |
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CN111917003B (en) * | 2019-05-07 | 2021-11-30 | 光宝光电(常州)有限公司 | Light source device |
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