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CN107591420B - Sensor Package Structure - Google Patents

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CN107591420B
CN107591420B CN201610868073.1A CN201610868073A CN107591420B CN 107591420 B CN107591420 B CN 107591420B CN 201610868073 A CN201610868073 A CN 201610868073A CN 107591420 B CN107591420 B CN 107591420B
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edge
bonding layer
sensing chip
layer
area
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CN107591420A (en
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杜修文
辛宗宪
陈建儒
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Tong Hsing Electronic Industries Ltd
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Kingpak Technology Inc
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Priority to TW106112682A priority Critical patent/TWI631675B/en
Priority to EP17178909.2A priority patent/EP3267485B1/en
Priority to JP2017130939A priority patent/JP6415648B2/en
Priority to US15/641,378 priority patent/US10186538B2/en
Publication of CN107591420A publication Critical patent/CN107591420A/en
Priority to US16/133,874 priority patent/US10692917B2/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/4847Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48471Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area being a ball bond, i.e. wedge-to-ball, reverse stitch
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48475Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball
    • H01L2224/48476Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area
    • H01L2224/48477Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area being a pre-ball (i.e. a ball formed by capillary bonding)
    • H01L2224/48478Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area being a pre-ball (i.e. a ball formed by capillary bonding) the connecting portion being a wedge bond, i.e. wedge on pre-ball
    • H01L2224/48479Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area being a pre-ball (i.e. a ball formed by capillary bonding) the connecting portion being a wedge bond, i.e. wedge on pre-ball on the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

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  • Light Receiving Elements (AREA)
  • Pressure Sensors (AREA)

Abstract

一种感测器封装结构,包括:基板、设置于上述基板的感测芯片、电性连接上述基板与感测芯片的多条金属线、位置对应于感测芯片的透光层、及能使透光层稳定地黏固于感测芯片与基板的黏接体。远离基板的感测芯片顶面包含有感测区及围绕于感测区的间隔区,并且顶面具有至少一第一边缘与至少一第二边缘,第一边缘与间隔区的距离大于第二边缘与间隔区的距离。感测芯片在顶面的第一边缘与间隔区之间形成有多个连接垫,而第二边缘与间隔区之间未形成有任何连接垫。黏接体包覆感测芯片外侧缘、第一边缘与间隔区之间的顶面部位、及透光层外侧缘,而每条金属线的至少部分埋置于黏接体内。借此,上述感测器封装结构能够适用来封装较小尺寸的感测芯片。

Figure 201610868073

A sensor packaging structure includes: a substrate, a sensing chip disposed on the substrate, a plurality of metal wires electrically connecting the substrate and the sensing chip, a light-transmitting layer corresponding to the position of the sensing chip, and an adhesive body capable of stably bonding the light-transmitting layer to the sensing chip and the substrate. The top surface of the sensing chip away from the substrate contains a sensing area and a spacing area surrounding the sensing area, and the top surface has at least one first edge and at least one second edge, and the distance between the first edge and the spacing area is greater than the distance between the second edge and the spacing area. The sensing chip has a plurality of connection pads formed between the first edge of the top surface and the spacing area, and no connection pads are formed between the second edge and the spacing area. The adhesive body covers the outer edge of the sensing chip, the top surface portion between the first edge and the spacing area, and the outer edge of the light-transmitting layer, and at least part of each metal wire is buried in the adhesive body. Thereby, the sensor packaging structure can be used to package sensing chips of smaller sizes.

Figure 201610868073

Description

感测器封装结构Sensor Package Structure

技术领域technical field

本发明是涉及一种封装结构,且还涉及一种感测器封装结构。The present invention relates to a package structure, and also relates to a sensor package structure.

背景技术Background technique

现有电子装置内的电子构件需要朝向尺寸缩小的方向研发,以使电子装置能够在有限的空间内安装更多的电子构件。然而,现有感测器封装结构(例如:影像感测器封装结构)的发展已面临难以继续缩小尺寸的问题,而其中一个主要原因在于,现有感测器封装结构并不适合用来进行较小尺寸感测芯片的封装。The electronic components in the existing electronic devices need to be developed in the direction of downsizing, so that the electronic devices can install more electronic components in a limited space. However, the development of existing sensor packaging structures (eg, image sensor packaging structures) has faced the problem that it is difficult to continue to reduce the size, and one of the main reasons is that the existing sensor packaging structures are not suitable for Packaging for smaller size sensing chips.

于是,本发明人认为上述缺陷可改善,潜心研究并配合学理的运用,终于提出一种设计合理且有效改善上述缺陷的本发明。Therefore, the inventors of the present invention believe that the above-mentioned defects can be improved, and have concentrated on research and application of theories, and finally come up with the present invention with a reasonable design and effectively improving the above-mentioned defects.

发明内容SUMMARY OF THE INVENTION

本发明实施例在于提供一种感测器封装结构,通过有别于以往的构造而能有效地改善现有感测器封装结构所易发生的问题。The embodiments of the present invention provide a sensor package structure, which can effectively improve the problems that are likely to occur in the existing sensor package structure by being different from the conventional structure.

本发明实施例公开一种感测器封装结构,包括:一基板,所述基板包含位于相反两侧的一上表面与一下表面,并且所述基板在所述上表面形成有多个焊垫;一感测芯片,所述感测芯片包含有位于相反两侧的一顶面与一底面,所述感测芯片的所述底面设置于所述基板的所述上表面,所述顶面包含有一感测区以及围绕于所述感测区的一间隔区;其中,所述顶面具有至少一第一边缘与至少一第二边缘,并且所述感测芯片在所述顶面的至少一所述第一边缘与所述间隔区之间形成有多个连接垫,而至少一所述第二边缘与所述间隔区之间未形成有任何连接垫;多条金属线,多条所述金属线的一端分别连接于多个所述焊垫,并且多条所述金属线的另一端分别连接于多个所述连接垫;一第一接合层,所述第一接合层设置于至少一所述第一边缘与所述间隔区之间的所述顶面部位上;一第二接合层,所述第二接合层设置于所述上表面并且邻设于所述感测芯片的至少一所述第二边缘旁,所述第二接合层相较于所述上表面的高度等同于所述第一接合层相较于所述上表面的高度;一透光层,所述透光层具有位于相反两侧的一第一表面与一第二表面,所述透光层的所述第二表面黏接于所述第一接合层与所述第二接合层;以及一封胶体,所述封胶体设置于所述基板的所述上表面并包覆所述感测芯片外侧缘、所述第一接合层外侧缘、所述第二接合层外侧缘、及所述透光层外侧缘,而每条所述金属线的至少部分及每个所述焊垫皆埋置于所述封胶体内。An embodiment of the present invention discloses a sensor package structure, comprising: a substrate, the substrate includes an upper surface and a lower surface on opposite sides, and a plurality of solder pads are formed on the upper surface of the substrate; a sensing chip, the sensing chip includes a top surface and a bottom surface on opposite sides, the bottom surface of the sensing chip is disposed on the upper surface of the substrate, the top surface includes a A sensing area and a spacer area surrounding the sensing area; wherein the top surface has at least one first edge and at least one second edge, and the sensing chip is at least one of the top surface A plurality of connection pads are formed between the first edge and the spacer, and no connection pad is formed between at least one of the second edges and the spacer; a plurality of metal lines, a plurality of the metal One end of the wire is respectively connected to the plurality of the bonding pads, and the other end of the plurality of the metal wires is respectively connected to the plurality of the connection pads; a first bonding layer, the first bonding layer is arranged on at least one of the bonding pads. On the top surface portion between the first edge and the spacer; a second bonding layer, the second bonding layer is disposed on the upper surface and adjacent to at least one of the sensing chips Next to the second edge, the height of the second bonding layer relative to the upper surface is equal to the height of the first bonding layer relative to the upper surface; a light-transmitting layer, the light-transmitting layer has a first surface and a second surface on opposite sides, the second surface of the light-transmitting layer is bonded to the first bonding layer and the second bonding layer; and an encapsulant, the The encapsulant is disposed on the upper surface of the substrate and covers the outer edge of the sensing chip, the outer edge of the first bonding layer, the outer edge of the second bonding layer, and the outer edge of the light-transmitting layer, At least part of each of the metal lines and each of the solder pads are embedded in the encapsulant.

优选地,所述第一接合层的所述外侧缘包含有一弧形曲面,并且所述弧形曲面的弧心位于所述封胶体。Preferably, the outer edge of the first bonding layer includes an arc-shaped curved surface, and the arc center of the arc-shaped curved surface is located on the sealing compound.

优选地,在垂直于所述上表面的一截面,所述第二接合层的所述外侧缘呈S形曲线。Preferably, in a section perpendicular to the upper surface, the outer edge of the second bonding layer is an S-shaped curve.

优选地,所述第二接合层的所述外侧缘与所述感测区的距离等于至少一所述第一边缘与所述感测区的距离。Preferably, the distance between the outer edge of the second bonding layer and the sensing area is equal to the distance between at least one of the first edges and the sensing area.

优选地,所述第二接合层进一步设置于至少一所述第二边缘与所述间隔区之间的所述顶面部位上。Preferably, the second bonding layer is further disposed on the top surface portion between at least one of the second edges and the spacer region.

优选地,至少一所述第二边缘与所述间隔区之间的所述顶面部位的面积小于其所相连的所述间隔区部位的面积。Preferably, the area of the top surface portion between at least one of the second edges and the spacer is smaller than the area of the spacer portion to which it is connected.

优选地,至少一所述第一边缘与所述间隔区的距离大于至少一所述第二边缘与所述间隔区的距离。Preferably, the distance between at least one of the first edges and the spacer area is greater than the distance between at least one of the second edges and the spacer area.

优选地,所述感测芯片正投影于所述第二表面而形成有一投影区域,并且所述投影区域是位于所述第二表面的轮廓内;所述第二表面在黏接于所述第一接合层与所述第二接合层的部位的外侧留有一固定区,所述封胶体进一步包覆所述固定区。Preferably, the sensing chip is projected on the second surface to form a projection area, and the projection area is located within the outline of the second surface; the second surface is adhered to the first surface. A fixing area is left on the outer side of the part of the first bonding layer and the second bonding layer, and the sealing compound further covers the fixing area.

优选地,所述封胶体进一步限定为一液状封装胶体,并且所述透光层的所述第一表面与相邻的所述封胶体表面形成有大于90度且小于等于180度的一夹角。Preferably, the encapsulant is further defined as a liquid encapsulant, and the first surface of the light-transmitting layer and the adjacent surface of the encapsulant form an included angle greater than 90 degrees and less than or equal to 180 degrees .

优选地,所述感测器封装结构进一步包括有设置于所述封胶体顶缘的一模制胶体,所述模制胶体的顶表面与相邻的所述第一表面呈平行设置,所述模制胶体的侧表面与相邻的所述封胶体的侧缘呈共平面设置。Preferably, the sensor packaging structure further includes a molding compound disposed on the top edge of the sealing compound, and the top surface of the molding compound is arranged in parallel with the adjacent first surface, and the The side surface of the molding compound and the adjacent side edges of the encapsulant are arranged coplanarly.

优选地,所述封胶体进一步限定为一模制胶体,并且所述透光层的所述第一表面与相邻的所述封胶体表面形成有180度的一夹角。Preferably, the sealing compound is further defined as a molding compound, and the first surface of the light-transmitting layer and the adjacent surface of the sealing compound form an included angle of 180 degrees.

本发明实施例也公开一种感测器封装结构,其特征在于,所述感测器封装结构包括:一基板,所述基板包含位于相反两侧的一上表面与一下表面,并且所述基板在所述上表面形成有多个焊垫;一感测芯片,所述感测芯片包含有位于相反两侧的一顶面与一底面,所述感测芯片的所述底面设置于所述基板的所述上表面,所述顶面包含有一感测区以及围绕于所述感测区的一间隔区;其中,所述顶面具有至少一第一边缘与至少一第二边缘,至少一所述第一边缘与所述间隔区的距离大于至少一所述第二边缘与所述间隔区的距离,并且所述感测芯片在所述顶面的至少一所述第一边缘与所述间隔区之间形成有多个连接垫,而至少一所述第二边缘与所述间隔区之间未形成有任何连接垫;多条金属线,多条所述金属线的一端分别连接于多个所述焊垫,并且多条所述金属线的另一端分别连接于多个所述连接垫;一透光层,所述透光层具有位于相反两侧的一第一表面与一第二表面,所述透光层的所述第二表面是面向于所述感测芯片的所述顶面;以及一黏接体,所述黏接体设置于所述基板的所述上表面并包覆所述感测芯片外侧缘、至少一所述第一边缘与所述间隔区之间的所述顶面部位、及所述透光层外侧缘与部分所述第二表面,而每条所述金属线的至少部分及每个所述焊垫皆埋置于所述黏接体内。An embodiment of the present invention also discloses a sensor package structure, wherein the sensor package structure includes: a substrate, the substrate includes an upper surface and a lower surface on opposite sides, and the substrate A plurality of bonding pads are formed on the upper surface; a sensing chip includes a top surface and a bottom surface on opposite sides, and the bottom surface of the sensing chip is disposed on the substrate The upper surface of the top surface includes a sensing area and a spacer area surrounding the sensing area; wherein, the top surface has at least one first edge and at least one second edge, and at least one The distance between the first edge and the spacer is greater than the distance between at least one of the second edges and the spacer, and at least one of the first edges and the space of the sensing chip on the top surface A plurality of connection pads are formed between the regions, and no connection pads are formed between at least one of the second edges and the spacer region; a plurality of metal lines, one end of the plurality of metal lines is respectively connected to the plurality of the bonding pads, and the other ends of the plurality of metal lines are respectively connected to the plurality of connection pads; a light-transmitting layer, the light-transmitting layer has a first surface and a second surface on opposite sides , the second surface of the light-transmitting layer faces the top surface of the sensing chip; and an adhesive body, the adhesive body is disposed on the upper surface of the substrate and covers The outer edge of the sensing chip, the top surface portion between at least one of the first edges and the spacer region, the outer edge of the light-transmitting layer and part of the second surface, and each of the At least part of the metal lines and each of the pads are embedded in the adhesive body.

优选地,所述黏接体包含:一支撑层,所述支撑层邻设于所述感测芯片的至少一所述第二边缘旁,并且远离所述基板的所述支撑层端缘与所述感测芯片的所述顶面等高;一接合层,所述接合层设置于所述支撑层以及至少一所述第一边缘与所述间隔区之间的所述顶面部位上,所述透光层的所述第二表面黏接于所述接合层;一封胶体,所述封胶体设置于所述基板的所述上表面并包覆所述感测芯片外侧缘、所述支撑层外侧缘、所述接合层外侧缘、及所述透光层外侧缘,而每条所述金属线的至少部分及每个所述焊垫皆埋置于所述封胶体内。Preferably, the adhesive body includes: a support layer, the support layer is adjacent to at least one of the second edges of the sensing chip, and is far away from the end edge of the support layer and the support layer of the substrate. The top surface of the sensing chip is of the same height; a bonding layer, the bonding layer is disposed on the support layer and the top surface portion between at least one of the first edges and the spacer, so The second surface of the light-transmitting layer is adhered to the bonding layer; an encapsulant body, the encapsulant body is disposed on the upper surface of the substrate and covers the outer edge of the sensing chip, the support The outer edge of the layer, the outer edge of the bonding layer, and the outer edge of the light-transmitting layer, and at least part of each of the metal lines and each of the solder pads are embedded in the encapsulant.

优选地,所述支撑层的所述外侧缘包含有一弧形侧面,并且所述弧形侧面的弧心位于所述封胶体的内侧。Preferably, the outer edge of the support layer includes an arc-shaped side surface, and the arc center of the arc-shaped side surface is located inside the sealing compound.

优选地,所述接合层的所述外侧缘包含有一弧形曲面,并且所述弧形曲面的弧心位于所述封胶体。Preferably, the outer edge of the bonding layer includes an arc-shaped curved surface, and the arc center of the arc-shaped curved surface is located on the sealing compound.

优选地,所述接合层的所述外侧缘与所述感测区的距离等于至少一所述第一边缘与所述感测区的距离。Preferably, the distance between the outer edge of the bonding layer and the sensing area is equal to the distance between at least one of the first edges and the sensing area.

优选地,所述接合层进一步设置于至少一所述第二边缘与所述间隔区之间的所述顶面部位上。Preferably, the bonding layer is further disposed on the top surface portion between at least one of the second edges and the spacer region.

优选地,至少一所述第二边缘与所述间隔区之间的所述顶面部位的面积小于其所相连的所述间隔区部位的面积。Preferably, the area of the top surface portion between at least one of the second edges and the spacer is smaller than the area of the spacer portion to which it is connected.

优选地,所述感测芯片正投影于所述第二表面而形成有一投影区域,并且所述投影区域是位于所述第二表面的轮廓内;所述第二表面在黏接于所述接合层的部位的外侧留有一固定区,所述封胶体进一步包覆所述固定区。Preferably, the sensing chip is projected on the second surface to form a projected area, and the projected area is located within the outline of the second surface; the second surface is being bonded to the bonding A fixing area is left outside the part of the layer, and the encapsulant body further covers the fixing area.

综上所述,本发明所公开的感测器封装结构,能够适用于顶面边缘(如:第二边缘)与感测区之间未设有连接垫的感测芯片,借以利于封装尺寸缩小后的感测芯片。To sum up, the sensor package structure disclosed in the present invention can be applied to a sensor chip without connecting pads between the top surface edge (eg, the second edge) and the sensing area, so as to facilitate the reduction of the package size the sensor chip behind.

为使能更进一步了解本发明的特征及技术内容,请参阅以下有关本发明的详细说明与附图,但是此等说明与所附图式仅用来说明本发明,而非对本发明的保护范围作任何的限制。In order to further understand the features and technical content of the present invention, please refer to the following detailed description and accompanying drawings of the present invention, but these descriptions and accompanying drawings are only used to illustrate the present invention, rather than to the protection scope of the present invention make any restrictions.

附图说明Description of drawings

图1为本发明感测器封装结构实施例一的剖视示意图。FIG. 1 is a schematic cross-sectional view of a first embodiment of a sensor package structure according to the present invention.

图2为图1的俯视示意图(省略封胶体、透光层、金属线)。FIG. 2 is a schematic top view of FIG. 1 (the encapsulant, the light-transmitting layer, and the metal wires are omitted).

图3为图1的俯视示意图(省略封胶体)。FIG. 3 is a schematic top view of FIG. 1 (the encapsulant is omitted).

图4为图1的另一俯视示意图(省略封胶体)。FIG. 4 is another schematic top view of FIG. 1 (the encapsulant is omitted).

图5A为图1的A区域局部放大示意图。FIG. 5A is a partial enlarged schematic diagram of the area A of FIG. 1 .

图5B为图5A的变化态样示意图。FIG. 5B is a schematic diagram of a variation of FIG. 5A .

图6为图1的B区域局部放大示意图。FIG. 6 is a partial enlarged schematic diagram of the B region of FIG. 1 .

图7为图1的变化类型的剖视示意图。FIG. 7 is a schematic cross-sectional view of the variation of FIG. 1 .

图8为图1的另一变化类型的剖视示意图。FIG. 8 is a schematic cross-sectional view of another variation of FIG. 1 .

图9为图1的又一变化类型的剖视示意图。FIG. 9 is a schematic cross-sectional view of another variation of FIG. 1 .

图10为本发明感测器封装结构实施例二的剖视示意图。FIG. 10 is a schematic cross-sectional view of Embodiment 2 of the sensor package structure of the present invention.

图11为本发明感测器封装结构实施例三的俯视示意图。FIG. 11 is a schematic top view of Embodiment 3 of the sensor package structure of the present invention.

图12为沿图11的剖线XⅡ-XⅡ的剖视示意图。FIG. 12 is a schematic cross-sectional view along the line XII-XII of FIG. 11 .

具体实施方式Detailed ways

[实施例一][Example 1]

请参阅图1至图9,其为本发明的实施例一,需先说明的是,本实施例对应图式所提及的相关数量与外型,仅用来具体地说明本发明的实施方式,以便于了解本发明,而非用来局限本发明的保护范围。Please refer to FIG. 1 to FIG. 9 , which are the first embodiment of the present invention. It should be noted that the relevant quantity and appearance mentioned in the drawings in this embodiment are only used to specifically describe the embodiments of the present invention. , so as to facilitate understanding of the present invention, but not to limit the protection scope of the present invention.

如图1和图2所示,本实施例公开一种感测器封装结构100,尤其是指一种影像感测器封装结构100,但本发明不受限于此。所述感测器封装结构100包括:一基板1、设置于上述基板1的一感测芯片2、使上述基板1与感测芯片2建立电性连接的多条金属线3、位置对应于感测芯片2的一透光层4、及能使透光层4稳定地黏固于感测芯片2与基板1的一黏接体5。以下将分别介绍感测器封装结构100中的各个构件构造,并适时说明构件间的连接关系。As shown in FIG. 1 and FIG. 2 , the present embodiment discloses a sensor package structure 100 , especially an image sensor package structure 100 , but the present invention is not limited thereto. The sensor package structure 100 includes: a substrate 1 , a sensing chip 2 disposed on the substrate 1 , a plurality of metal wires 3 for establishing electrical connection between the substrate 1 and the sensing chip 2 , and a position corresponding to the sensing chip 2 . A light-transmitting layer 4 of the sensing chip 2 and a bonding body 5 that can stably adhere the light-transmitting layer 4 to the sensing chip 2 and the substrate 1 . The structure of each component in the sensor package structure 100 will be introduced separately below, and the connection relationship between the components will be described in a timely manner.

如图1和图2所示,所述基板1可以是塑料基板、陶瓷基板、导线架(leadframe)、或是其他板状材料,本实施例对此不加以限制。其中,上述基板1包含位于相反两侧的一上表面11与一下表面12,并且所述基板1在上表面11形成有间隔排列的多个焊垫111。再者,所述基板在下表面12也形成有多个焊垫(未标示),借以用来分别焊接多颗焊接球(未标示)。也就是说,本实施例的基板1是以具备球栅阵列封装(Ball Grid Array,BGA)的构造作一说明,但不受限于此。As shown in FIG. 1 and FIG. 2 , the substrate 1 may be a plastic substrate, a ceramic substrate, a leadframe, or other plate-like materials, which are not limited in this embodiment. The above-mentioned substrate 1 includes an upper surface 11 and a lower surface 12 located on opposite sides, and the substrate 1 is formed with a plurality of bonding pads 111 arranged at intervals on the upper surface 11 . Furthermore, a plurality of solder pads (not shown) are also formed on the lower surface 12 of the substrate for soldering a plurality of solder balls (not shown) respectively. That is to say, the substrate 1 of this embodiment is described as having a structure of a ball grid array (Ball Grid Array, BGA), but it is not limited thereto.

如图1和图2所示,所述感测芯片2于本实施例中是以影像感测芯片作一说明,但本实施例对感测芯片2的类型不加以限制。其中,所述感测芯片2包含有位于相反两侧的一顶面21与一底面22、及垂直地相连于顶面21与底面22的一外侧缘23。所述顶面21包含有一感测区211以及围绕于上述感测区211的一间隔区212。所述感测区211于本实施例中大致呈方形(如:正方形或长方形),并且感测区211的中心可以是顶面21的中心(如图4)或是与顶面21中心留有一距离(如图2和图3)。所述间隔区212于本实施例中则是呈方环状,并且间隔区212的每个部位的宽度大致相同,但间隔区212的具体外型可以依据设计者或制造者的需求而加以调整,在此不加以限制。As shown in FIG. 1 and FIG. 2 , the sensing chip 2 is described as an image sensing chip in this embodiment, but the type of the sensing chip 2 is not limited in this embodiment. The sensing chip 2 includes a top surface 21 and a bottom surface 22 on opposite sides, and an outer edge 23 vertically connected to the top surface 21 and the bottom surface 22 . The top surface 21 includes a sensing area 211 and a spacer area 212 surrounding the sensing area 211 . The sensing area 211 is substantially square (eg, square or rectangle) in this embodiment, and the center of the sensing area 211 may be the center of the top surface 21 (as shown in FIG. distance (see Figures 2 and 3). The spacer 212 is in the shape of a square ring in this embodiment, and the width of each part of the spacer 212 is approximately the same, but the specific shape of the spacer 212 can be adjusted according to the needs of the designer or manufacturer. , is not limited here.

进一步地说,所述顶面21具有至少一第一边缘213与至少一第二边缘214,而所述外侧缘23包含相连于至少一所述第二边缘214的至少一侧面231。上述第一边缘213与间隔区212的距离D1(如图6)大于所述第二边缘214与间隔区212的距离D2(如图5A)。而于本实施例中,所述第二边缘214与感测区211的距离D2小于1/3至1/4的第一边缘213与感测区211的距离D1(D2<1/3~1/4D1),但上述距离D2与距离D1的比例设计可以依据设计者或制造者的需求而加以调整,在此不加以限制。所述感测芯片2在顶面21的第一边缘213与间隔区212之间形成有多个连接垫215,而第二边缘214与间隔区212之间未形成有任何连接垫215。Further, the top surface 21 has at least one first edge 213 and at least one second edge 214 , and the outer edge 23 includes at least one side surface 231 connected to the at least one second edge 214 . The distance D1 between the first edge 213 and the spacer 212 (as shown in FIG. 6 ) is greater than the distance D2 between the second edge 214 and the spacer 212 (as shown in FIG. 5A ). In this embodiment, the distance D2 between the second edge 214 and the sensing area 211 is smaller than 1/3 to 1/4 of the distance D1 between the first edge 213 and the sensing area 211 (D2<1/3˜1 /4D1), but the above-mentioned proportional design of the distance D2 and the distance D1 can be adjusted according to the needs of the designer or manufacturer, which is not limited here. The sensing chip 2 has a plurality of connection pads 215 formed between the first edge 213 of the top surface 21 and the spacer region 212 , and no connection pad 215 is formed between the second edge 214 and the spacer region 212 .

其中,所述顶面21可以是包含有多个第一边缘213及单个第二边缘214(如图3)、多个第一边缘213与多个第二边缘214(如图4)、或是单个第一边缘213与多个第二边缘214(图中未示出),在此不加以限制。也就是说,图1相当于沿图3的IA-IA剖线的剖视示意图、或是相当于沿图4的IB-IB剖线的剖视示意图。The top surface 21 may include multiple first edges 213 and a single second edge 214 (as shown in FIG. 3 ), multiple first edges 213 and multiple second edges 214 (as shown in FIG. 4 ), or A single first edge 213 and a plurality of second edges 214 (not shown in the figure) are not limited herein. That is, FIG. 1 corresponds to a schematic cross-sectional view along the line IA-IA in FIG. 3 , or a schematic cross-sectional view along the line IB-IB in FIG. 4 .

再者,所述感测芯片2是以底面22设置于基板1的上表面11,并且设置有上述感测芯片2的基板1上表面11部位是大致位于所述多个焊垫111包围的区域之内。其中,本实施例中的感测芯片2是通过黏晶胶(Die AttachEpoxy,未标示)来将其底面22固定于基板1的上表面11,但具体设置方式不受限于此。Furthermore, the sensing chip 2 is disposed on the upper surface 11 of the substrate 1 with the bottom surface 22 , and the part of the upper surface 11 of the substrate 1 on which the sensing chip 2 is disposed is substantially located in the area surrounded by the plurality of bonding pads 111 within. The bottom surface 22 of the sensing chip 2 in this embodiment is fixed to the upper surface 11 of the substrate 1 by die attach adhesive (Die Attach Epoxy, not shown), but the specific arrangement is not limited thereto.

如图1和图2所示,所述多条金属线3的一端分别连接于基板1的多个焊垫111,并且多条金属线3的另一端分别连接于感测芯片2的多个连接垫215。其中,本实施例的每条金属线3是以反打(reverse bond)的方式所形成,所以上述感测芯片2的顶面21与每条金属线3的相邻部位(如图1中位于顶面21上方的金属线3部位)能够形成有小于等于45度的一夹角(未标示),以使每条金属线3的顶点31能够位在较低的高度位置,进而避免触碰到透光层4,但本发明不受限于此。例如,上述夹角也可以是小于等于30度。As shown in FIG. 1 and FIG. 2 , one ends of the plurality of metal wires 3 are respectively connected to the plurality of bonding pads 111 of the substrate 1 , and the other ends of the plurality of metal wires 3 are respectively connected to the plurality of connections of the sensing chip 2 . Pad 215. Wherein, each metal line 3 in this embodiment is formed in a reverse bond manner, so the top surface 21 of the above-mentioned sensing chip 2 is adjacent to each metal line 3 (as shown in FIG. 1 at the top surface 21 ). The metal wire 3 part above the top surface 21) can be formed with an included angle (not marked) less than or equal to 45 degrees, so that the vertex 31 of each metal wire 3 can be located at a lower height position, thereby avoiding touching The light-transmitting layer 4, but the present invention is not limited to this. For example, the above-mentioned included angle may also be less than or equal to 30 degrees.

如图1和图2所示,所述透光层4于本实施例中是以平板状的玻璃作一说明,但本实施例对透光层4的类型不加以限制。其中,所述透光层4具有位于相反两侧的一第一表面41与一第二表面42、及垂直地相连于第一表面41与第二表面42的一外侧缘43。本实施例的第一表面41与第二表面42为尺寸相同的方形(如:正方形或长方形),并且所述透光层4的第二表面42面积大于上述感测芯片2的顶面21面积,但不受限于此。As shown in FIG. 1 and FIG. 2 , the light-transmitting layer 4 is illustrated as a flat glass in this embodiment, but the type of the light-transmitting layer 4 is not limited in this embodiment. The transparent layer 4 has a first surface 41 and a second surface 42 on opposite sides, and an outer edge 43 vertically connected to the first surface 41 and the second surface 42 . In this embodiment, the first surface 41 and the second surface 42 are squares (eg, square or rectangle) with the same size, and the area of the second surface 42 of the light-transmitting layer 4 is larger than the area of the top surface 21 of the above-mentioned sensing chip 2 , but not limited to this.

再者,所述透光层4通过黏接体5而固定于基板1与感测芯片2,并且透光层4的第二表面42是大致平行且面向于所述感测芯片2的顶面21。进一步地说,所述感测芯片2正投影于第二表面42而形成有一投影区域(未标示),并且所述投影区域是位于第二表面42的轮廓内。另,上述透光层4的第二表面42较佳是邻设但未接触于每条金属线3,并且每条金属线3的顶点31是位在透光层4朝向基板1正投影所形成的空间之外侧,每条金属线3的顶点31相较于感测芯片2顶面21的高度H1(如图6)较佳是小于所述透光层4第二表面42相较于感测芯片2顶面21的高度H2(如图6),但不受限于此。Furthermore, the light-transmitting layer 4 is fixed to the substrate 1 and the sensing chip 2 by the adhesive 5 , and the second surface 42 of the light-transmitting layer 4 is substantially parallel and faces the top surface of the sensing chip 2 twenty one. Further, the sensing chip 2 is projected on the second surface 42 to form a projection area (not shown), and the projection area is located within the outline of the second surface 42 . In addition, the second surface 42 of the light-transmitting layer 4 is preferably adjacent but not in contact with each metal line 3 , and the vertex 31 of each metal line 3 is formed by the orthographic projection of the light-transmitting layer 4 toward the substrate 1 . On the outer side of the space, the height H1 of the vertex 31 of each metal line 3 relative to the top surface 21 of the sensing chip 2 (as shown in FIG. 6 ) is preferably smaller than the second surface 42 of the light-transmitting layer 4. The height H2 of the top surface 21 of the chip 2 (as shown in FIG. 6 ) is not limited thereto.

如图1、图5A、和图6,所述黏接体5可以是相同材质的单一构件或是由多种材质所组成的复合构件,本实施例对黏接体5的类型不加以限制。其中,所述黏接体5设置于基板1的上表面并包覆上述感测芯片2外侧缘23、所述第一边缘213与间隔区212之间的顶面21部位、及所述透光层4外侧缘43与部分第二表面42。每条金属线3的至少部分及每个焊垫111皆埋置于上述黏接体5内。As shown in FIGS. 1 , 5A and 6 , the adhesive body 5 may be a single component of the same material or a composite component composed of multiple materials, and the type of the adhesive body 5 is not limited in this embodiment. The bonding body 5 is disposed on the upper surface of the substrate 1 and covers the outer edge 23 of the sensing chip 2 , the top surface 21 between the first edge 213 and the spacer 212 , and the light transmission The outer edge 43 of the layer 4 and part of the second surface 42 . At least part of each metal line 3 and each pad 111 are embedded in the above-mentioned adhesive body 5 .

更详细地说,本实施例的黏接体5包含彼此相连接的一支撑层51、一接合层52、及一封胶体53,但本发明不受限于此。其中,所述支撑层51与接合层52较佳为相同的材质(如:玻璃接合树脂,Glass Mount Epoxy),但不同于封胶体53的材质(如:液状封装胶体,liquidcompound)。下述将分别介绍支撑层51、接合层52、及封胶体53相对于其他构件的连接关系。More specifically, the adhesive body 5 of this embodiment includes a support layer 51 , a bonding layer 52 , and an encapsulant 53 connected to each other, but the present invention is not limited thereto. The supporting layer 51 and the bonding layer 52 are preferably made of the same material (eg, glass bonding resin, Glass Mount Epoxy), but different from the material of the encapsulant 53 (eg, liquid compound). The connection relationship between the support layer 51 , the bonding layer 52 , and the encapsulant 53 with respect to other components will be described below.

如图2和图5A,本实施例中的支撑层51外型与形成位置是相关于感测芯片2的顶面21第二边缘214。举例来说,图3所示的支撑层51为大致平行于第二边缘214的单个长条状构造,图4所示的支撑层51则为大致平行于第二边缘214的两个长条状构造。其中,所述支撑层51是邻设于感测芯片2的第二边缘214旁(如:支撑层51抵接于感测芯片2中与第二边缘214相连的侧面231),并且远离上述基板1的支撑层51端缘(如图5A中的支撑层51顶缘)大致与感测芯片2的顶面21(或第二边缘214)等高。As shown in FIG. 2 and FIG. 5A , the shape and formation position of the support layer 51 in this embodiment are related to the second edge 214 of the top surface 21 of the sensing chip 2 . For example, the support layer 51 shown in FIG. 3 is a single elongated structure substantially parallel to the second edge 214 , and the support layer 51 shown in FIG. 4 is two elongated structures substantially parallel to the second edge 214 structure. The support layer 51 is adjacent to the second edge 214 of the sensing chip 2 (eg, the support layer 51 abuts against the side surface 231 of the sensing chip 2 connected to the second edge 214 ), and is far away from the substrate The end edge of the support layer 51 of 1 (the top edge of the support layer 51 in FIG. 5A ) is approximately the same height as the top surface 21 (or the second edge 214 ) of the sensing chip 2 .

进一步地说,所述支撑层51的外侧缘511包含有一弧形侧面511,并且上述弧形侧面511的弧心(未标示)位于封胶体53的内侧(如:弧心位于支撑层51内),但不受限于此。举例来说,如图5B所示,所述弧形侧面511的弧心(未标示)也可以是位于封胶体53。Further, the outer edge 511 of the support layer 51 includes an arc-shaped side surface 511 , and the arc center (not marked) of the arc-shaped side surface 511 is located inside the sealing compound 53 (eg, the arc center is located in the support layer 51 ) , but not limited to this. For example, as shown in FIG. 5B , the arc center (not shown) of the arc-shaped side surface 511 may also be located at the sealing compound 53 .

如图2、图5A、及图6,所述接合层52大致呈方环状,并且接合层52的环形内缘较佳是相接于感测芯片2的间隔区212外缘。也就是说,所述间隔区212是为隔开接合层52与感测区211所预定保留的区域。其中,所述接合层52是设置于上述支撑层51以及第一边缘213与间隔区212之间的顶面21部位上,并且设置于支撑层51上的所述接合层52部位(如图5A)可进一步设置于第二边缘214与间隔区212之间的顶面21部位上。其中,上述第二边缘214与间隔区212之间的顶面21部位的面积较佳是小于其所相连的间隔区212部位的面积。换个角度来说,在一未绘示的实施例中,当设置于支撑层51上的所述接合层52部位并未设置于感测芯片2的顶面21时,所述顶面21的第二边缘214相当于落在间隔区212外缘。As shown in FIG. 2 , FIG. 5A , and FIG. 6 , the bonding layer 52 is substantially in the shape of a square ring, and the ring inner edge of the bonding layer 52 is preferably connected to the outer edge of the spacer 212 of the sensing chip 2 . That is, the spacer area 212 is a predetermined reserved area for separating the bonding layer 52 and the sensing area 211 . The bonding layer 52 is disposed on the support layer 51 and the top surface 21 between the first edge 213 and the spacer 212, and is disposed on the bonding layer 52 on the support layer 51 (as shown in FIG. 5A ). ) may be further disposed on the top surface 21 portion between the second edge 214 and the spacer 212 . The area of the top surface 21 between the second edge 214 and the spacer 212 is preferably smaller than the area of the spacer 212 to which the second edge 214 is connected. To put it another way, in a not-shown embodiment, when the portion of the bonding layer 52 disposed on the support layer 51 is not disposed on the top surface 21 of the sensing chip 2, the first The two edges 214 correspond to the outer edges of the spacer 212 .

进一步地说,设置于支撑层51上的所述接合层52部位(如图5A)的宽度与高度大致等同设置于第一边缘213与间隔区212之间的顶面21部位上的所述接合层52部位(如图6)的宽度与高度。所述接合层52的外侧缘521包含有一弧形曲面521,并且所述弧形曲面521的弧心位于封胶体53。所述接合层52的弧形曲面521与感测区211的最大距离D3(如图5A)较佳是大致等于所述第一边缘213与感测区211的距离D4(如图6)。其中,在垂直于所述基板1上表面11的感测器封装结构100截面(如图5A)上,所述支撑层51的弧形侧面511与上述接合层52的弧形曲面521相接构成S形曲线,但本发明不以此为限(如图5B)。Further, the width and height of the bonding layer 52 portion (as shown in FIG. 5A ) provided on the support layer 51 are approximately equal to the bonding portion provided on the top surface 21 between the first edge 213 and the spacer 212 . The width and height of the layer 52 portion (FIG. 6). The outer edge 521 of the bonding layer 52 includes an arc-shaped curved surface 521 , and the arc center of the arc-shaped curved surface 521 is located at the sealing compound 53 . The maximum distance D3 between the curved surface 521 of the bonding layer 52 and the sensing area 211 (as shown in FIG. 5A ) is preferably approximately equal to the distance D4 between the first edge 213 and the sensing area 211 (as shown in FIG. 6 ). Wherein, on the cross section of the sensor package structure 100 perpendicular to the upper surface 11 of the substrate 1 (as shown in FIG. 5A ), the arc-shaped side surface 511 of the support layer 51 is connected to the arc-shaped surface 521 of the bonding layer 52 to form S-shaped curve, but the present invention is not limited to this (as shown in FIG. 5B ).

再者,每条金属线3的部分埋置于所述接合层52内,也就是说,每个连接垫215及其所连接的局部金属线3于本实施例中是被埋置于接合层52内。但在一未绘示的实施例中,所述连接垫215及其所连接的局部金属线3可以无需埋置于接合层52。Furthermore, a portion of each metal wire 3 is embedded in the bonding layer 52 , that is, each connection pad 215 and the local metal wire 3 connected thereto are embedded in the bonding layer in this embodiment. within 52. However, in a not-shown embodiment, the connection pads 215 and the local metal lines 3 connected thereto may not need to be embedded in the bonding layer 52 .

另,如图1,所述透光层4的第二表面42黏接于接合层52,以使透光层4的第二表面42、接合层52、及感测芯片2的顶面21共同包围形成有一封闭空间6,而感测芯片2的感测区211位于上述封闭空间6内。其中,所述第二表面42在黏接于接合层52的部位的外侧留有呈方环状的一固定区421。In addition, as shown in FIG. 1 , the second surface 42 of the light-transmitting layer 4 is bonded to the bonding layer 52 , so that the second surface 42 of the light-transmitting layer 4 , the bonding layer 52 , and the top surface 21 of the sensing chip 2 share the same A closed space 6 is formed around it, and the sensing area 211 of the sensing chip 2 is located in the closed space 6 . Wherein, the second surface 42 has a square ring-shaped fixing area 421 at the outer side of the part that is adhered to the bonding layer 52 .

如图1、图5A、及图6,所述封胶体53设置于基板1的上表面11并包覆所述感测芯片2外侧缘23、支撑层51外侧缘511、接合层52外侧缘521、及透光层4外侧缘43与固定区421。而每条金属线3的至少部分及每个焊垫111皆埋置于所述封胶体53内。其中,本实施例的每条金属线3是分别埋置于封胶体53与接合层52,并且每条金属线3的顶点31是埋置于封胶体53。但在一未绘示的实施例中,每条金属线3也可以完全埋置于所述封胶体53内。As shown in FIG. 1 , FIG. 5A , and FIG. 6 , the encapsulant 53 is disposed on the upper surface 11 of the substrate 1 and covers the outer edge 23 of the sensing chip 2 , the outer edge 511 of the support layer 51 , and the outer edge 521 of the bonding layer 52 , and the outer edge 43 and the fixed area 421 of the light-transmitting layer 4 . At least part of each metal line 3 and each pad 111 are embedded in the encapsulant 53 . In this embodiment, each metal line 3 is embedded in the encapsulant 53 and the bonding layer 52 respectively, and the vertex 31 of each metal line 3 is embedded in the encapsulant 53 . However, in a non-illustrated embodiment, each metal line 3 can also be completely embedded in the encapsulant 53 .

更详细地说,所述透光层4的第一表面41与相邻的封胶体53表面(如图1中的封胶体53顶缘)形成有大于90度且小于等于180度的一夹角所述夹角

Figure BDA0001124824480000092
较佳是介于115度至150度。而所述封胶体53侧缘则大致切齐于基板1的侧缘。其中,本实施例中的封胶体53虽是以未附着在透光层4的第一表面41作说明,但本发明不排除封胶体53附着在上述透光层4的局部第一表面41(如:第一表面41的外缘部位)。In more detail, the first surface 41 of the light-transmitting layer 4 and the surface of the adjacent sealing compound 53 (such as the top edge of the sealing compound 53 in FIG. 1 ) form an included angle greater than 90 degrees and less than or equal to 180 degrees the included angle
Figure BDA0001124824480000092
Preferably, it is between 115 degrees and 150 degrees. The side edges of the encapsulant body 53 are substantially aligned with the side edges of the substrate 1 . Wherein, although the encapsulant 53 in this embodiment is described as being not attached to the first surface 41 of the light-transmitting layer 4, the present invention does not exclude that the encapsulant 53 is attached to the partial first surface 41 ( For example: the outer edge of the first surface 41).

综上所述,本实施例所公开的感测器封装结构100,能够适用于顶面21边缘(如:第二边缘214)与感测区211之间未设有连接垫215的感测芯片2,借以利于封装尺寸缩小后的感测芯片2。并且所述感测器封装结构100也可以通过将金属线3的局部埋置于接合层52内,而使其利于封装尺寸缩小后的感测芯片2。To sum up, the sensor package structure 100 disclosed in this embodiment can be applied to a sensing chip without connecting pads 215 between the edge of the top surface 21 (eg, the second edge 214 ) and the sensing region 211 . 2, in order to facilitate the sensing chip 2 after the package size is reduced. In addition, the sensor package structure 100 can also be beneficial to the sensor chip 2 with a reduced package size by partially burying the metal wire 3 in the bonding layer 52 .

再者,所述封胶体53通过黏接于支撑层51的弧形侧面511与接合层52的弧形曲面521、及透光层4的外侧缘43与固定区421,以使透光层4更为稳固地被设置于预定的位置上,进而使透光层4保持不接触金属线3,达到透光层4大致平行于感测芯片2顶面21的要求,借以使感测器封装结构100具有较佳的可靠度。Furthermore, the encapsulant body 53 is adhered to the curved side surface 511 of the support layer 51 and the curved surface 521 of the bonding layer 52 , and the outer edge 43 and the fixing region 421 of the light-transmitting layer 4 , so that the light-transmitting layer 4 It is more stably arranged at a predetermined position, so that the light-transmitting layer 4 does not contact the metal wire 3, so that the light-transmitting layer 4 is approximately parallel to the top surface 21 of the sensor chip 2, so that the sensor package structure is 100 has better reliability.

又,所述支撑层51是先以一个流程制造,而后上述接合层52再以另外一个流程制造,所以能够通过支撑层51填补感测芯片2被缩小的部位(如:感测区211与第二边缘214之间的部位),借以提供接合层52足够的设置空间,而能够避免接合层52跨过间隔区212而接触在感测区211上。In addition, the supporting layer 51 is first fabricated in one process, and then the bonding layer 52 is fabricated in another process, so the reduced portion of the sensing chip 2 (eg, the sensing area 211 and the first part) can be filled by the supporting layer 51 . The portion between the two edges 214 ), so as to provide enough space for the bonding layer 52 to prevent the bonding layer 52 from crossing the spacer region 212 and contacting the sensing region 211 .

此外,本实施例图1至图6所公开的感测器封装结构100也能够依据设计者的需求而加以调整,但由于本实施例感测器封装结构100的变化类型过多、无法逐一通过附图方式公开,所以下述仅列举部分感测器封装结构100的变化类型。In addition, the sensor package structure 100 disclosed in FIG. 1 to FIG. 6 in this embodiment can also be adjusted according to the needs of the designer, but because the sensor package structure 100 of this embodiment has too many changes, it cannot be passed through one by one. The drawings are disclosed, so the following only lists some variations of the sensor package structure 100 .

如图7所示,所述透光层4的外侧缘43呈阶梯状并埋置于所述封胶体53内,并且所述透光层4的第一表面41的面积小于第二表面42的面积。然而,在一未绘示的实施例中,不排除上述第一表面41的面积大于第二表面42的面积。As shown in FIG. 7 , the outer edge 43 of the transparent layer 4 is stepped and embedded in the sealing compound 53 , and the area of the first surface 41 of the transparent layer 4 is smaller than that of the second surface 42 . area. However, in an embodiment not shown, it is not excluded that the area of the first surface 41 is larger than that of the second surface 42 .

如图8所示,所述感测器封装结构100的黏接体5可进一步包括有一模制胶体54(molding compound)。其中,上述模制胶体54设置于所述封胶体53的顶缘,并且模制胶体54的顶表面与相邻的透光层4第一表面41大致呈平行设置,而所述模制胶体54的侧表面则与相邻的封胶体53的侧缘呈共平面设置,但不受限于此。再者,所述模制胶体54的顶表面与相邻的透光层4第一表面41也可以是大致呈共平面设置,但本发明不受限于此。As shown in FIG. 8 , the bonding body 5 of the sensor package structure 100 may further include a molding compound 54 . The molding compound 54 is disposed on the top edge of the sealing compound 53 , and the top surface of the molding compound 54 is substantially parallel to the first surface 41 of the adjacent light-transmitting layer 4 , and the molding compound 54 The side surfaces of the s and the adjacent side edges of the sealing compound 53 are coplanar, but not limited thereto. Furthermore, the top surface of the molding colloid 54 and the adjacent first surface 41 of the light-transmitting layer 4 may be substantially coplanar, but the invention is not limited thereto.

如图9所示,所述封胶体53可以是一模制胶体54,并且所述透光层4的第一表面41与相邻的封胶体53表面大致呈平行设置,较佳为形成大致180度的夹角

Figure BDA0001124824480000101
As shown in FIG. 9 , the sealing compound 53 may be a molding compound 54 , and the first surface 41 of the light-transmitting layer 4 and the surface of the adjacent sealing compound 53 are arranged approximately parallel to each other, preferably formed approximately 180 mm angle
Figure BDA0001124824480000101

[实施例二][Example 2]

请参阅图10,其为本发明的实施例二,本实施例与上述实施例一类似,相同处则不再加以赘述,而两者的差异主要在于:上述实施例一的接合层52与支撑层51能以本实施例的第一接合层55与第二接合层56取代,也就是说,实施例一的支撑层51及设置于其上的接合层52部位(如图5A)于本实施例中改以一个流程所制造并定义为第二接合层56,而实施例一的接合层52其余部位(如图6)于本实施例中则改以另一个流程所制造并定义为第一接合层55,但本发明不受限于此。本实施例相较于实施例一的具体结构差异,大致说明如下。Please refer to FIG. 10 , which is the second embodiment of the present invention. This embodiment is similar to the above-mentioned first embodiment, and the same parts will not be repeated. The layer 51 can be replaced by the first bonding layer 55 and the second bonding layer 56 of this embodiment, that is, the supporting layer 51 of the first embodiment and the bonding layer 52 disposed thereon (as shown in FIG. 5A ) are in this embodiment. In the example, one process is used and is defined as the second bonding layer 56 , while the rest of the bonding layer 52 in the first embodiment (as shown in FIG. 6 ) is manufactured by another process and is defined as the first in this embodiment. The bonding layer 55, but the present invention is not limited to this. The specific structural differences between this embodiment and the first embodiment are roughly described as follows.

所述第一接合层55设置于第一边缘213与间隔区212之间的所述顶面21部位上,所述第二接合层56设置于所述基板1的上表面11并且邻设于感测芯片2的第二边缘214旁(如:第二接合层56抵接于感测芯片2的侧面231)。其中,所述第二接合层56可进一步设置于第二边缘214与间隔区212之间的所述顶面21部位上,并且所述第二边缘214与间隔区212之间的顶面21部位的面积小于其所相连的间隔区212部位的面积。而所述第二接合层56顶缘相较于基板1的上表面11的高度大致等同于所述第一接合层55顶缘相较于基板1上表面11的高度。The first bonding layer 55 is disposed on the top surface 21 between the first edge 213 and the spacer 212, and the second bonding layer 56 is disposed on the upper surface 11 of the substrate 1 and adjacent to the sensor. Next to the second edge 214 of the sensor chip 2 (eg, the second bonding layer 56 is in contact with the side surface 231 of the sensor chip 2 ). The second bonding layer 56 may be further disposed on the top surface 21 portion between the second edge 214 and the spacer 212 , and the top surface 21 portion between the second edge 214 and the spacer 212 The area is smaller than the area of the spacer 212 to which it is connected. The height of the top edge of the second bonding layer 56 relative to the upper surface 11 of the substrate 1 is approximately equal to the height of the top edge of the first bonding layer 55 relative to the upper surface 11 of the substrate 1 .

再者,所述第二接合层56上半部区块的外侧缘561与感测区211的最大距离大致等于所述第一边缘213与感测区211的距离。所述第一接合层55的外侧缘551包含有一弧形侧面551,并且所述弧形侧面551的弧心位于封胶体53。在垂直于所述基板1上表面11的感测器封装结构100的截面上,所述第二接合层56的外侧缘呈S形曲线,但不受限于此(如图5B)。Furthermore, the maximum distance between the outer edge 561 of the upper half block of the second bonding layer 56 and the sensing area 211 is approximately equal to the distance between the first edge 213 and the sensing area 211 . The outer edge 551 of the first bonding layer 55 includes an arc-shaped side surface 551 , and the arc center of the arc-shaped side surface 551 is located at the sealing compound 53 . On the cross section of the sensor package structure 100 perpendicular to the upper surface 11 of the substrate 1 , the outer edge of the second bonding layer 56 is an S-shaped curve, but not limited thereto (as shown in FIG. 5B ).

所述透光层4的第二表面42黏接于第一接合层55与第二接合层56;以及所述第二表面42在黏接于上述第一接合层55与第二接合层56的部位的外侧留有固定区421。The second surface 42 of the transparent layer 4 is bonded to the first bonding layer 55 and the second bonding layer 56 ; and the second surface 42 is bonded to the first bonding layer 55 and the second bonding layer 56 A fixing area 421 is left on the outside of the site.

所述封胶体53设置于所述基板1的上表面11并包覆所述感测芯片2外侧缘23、第一接合层55外侧缘551、第二接合层56外侧缘561、及所述透光层4外侧缘43与固定区421,而每条金属线3的部分及每个焊垫111皆埋置于所述封胶体53内。The encapsulant 53 is disposed on the upper surface 11 of the substrate 1 and covers the outer edge 23 of the sensing chip 2 , the outer edge 551 of the first bonding layer 55 , the outer edge 561 of the second bonding layer 56 , and the transparent The outer edge 43 of the optical layer 4 and the fixing region 421 , and a portion of each metal line 3 and each bonding pad 111 are embedded in the encapsulant 53 .

[实施例三][Example 3]

请参阅图11和图12,其为本发明的实施例三,本实施例与上述实施例一类似,相同处则不再加以赘述,而两者的差异主要在于:本实施例的感测器封装结构100可无须设有任何支撑层51,也就是说,本实施例的感测芯片2顶面21的边缘皆为第一边缘213。Please refer to FIG. 11 and FIG. 12 , which are Embodiment 3 of the present invention. This embodiment is similar to Embodiment 1 above, and the same parts will not be repeated, and the main difference between the two is: the sensor of this embodiment The package structure 100 does not need to be provided with any supporting layer 51 , that is, the edges of the top surface 21 of the sensing chip 2 in this embodiment are all the first edges 213 .

需额外说明的是,上述三个实施例的感测器封装结构100在许多部位的尺寸皆能够被缩小,举例来说,如图12所示,所述透光层4的外侧缘43与相邻的封胶体53侧缘之间的距离D5大致为300μm~500μm,所述基板1的任一个焊垫111外缘与相邻的感测芯片2外侧缘23之间的最大距离D6大致为200μm~350μm,邻近于任一个焊垫111的感测芯片2外侧缘23与相邻的封胶体53侧缘之间的距离D7大致为225μm~425μm。借此,所述感测器封装结构100的尺寸比现有技术更小,并且能够使用较少量的封胶体53,进而通过使用上述少量的封胶体53,令感测器封装结构100所受到的热涨冷缩应力减少,提升可靠度。It should be noted that the dimensions of the sensor package structure 100 of the above three embodiments can be reduced in many parts. For example, as shown in FIG. 12 , the outer edge 43 of the transparent layer 4 and the phase The distance D5 between the side edges of the adjacent encapsulation bodies 53 is approximately 300 μm˜500 μm, and the maximum distance D6 between the outer edge of any pad 111 of the substrate 1 and the outer edge 23 of the adjacent sensing chip 2 is approximately 200 μm ˜350 μm, the distance D7 between the outer edge 23 of the sensing chip 2 adjacent to any one of the bonding pads 111 and the adjacent side edge of the encapsulant body 53 is approximately 225 μm˜425 μm. Therefore, the size of the sensor package structure 100 is smaller than that of the prior art, and a smaller amount of the encapsulant 53 can be used. The thermal expansion and contraction stress are reduced, and the reliability is improved.

以上所述仅为本发明的较佳可行实施例,并非用来局限本发明的保护范围,凡依本发明权利要求所做的均等变化与修饰,皆应属本发明的保护范围。The above descriptions are only preferred feasible embodiments of the present invention, and are not intended to limit the protection scope of the present invention. All equivalent changes and modifications made according to the claims of the present invention shall belong to the protection scope of the present invention.

Claims (16)

1. A sensor package, comprising:
the substrate comprises an upper surface and a lower surface which are positioned on two opposite sides, and a plurality of welding pads are formed on the upper surface of the substrate;
a sensing chip, wherein the sensing chip comprises a top surface and a bottom surface which are positioned at two opposite sides, the bottom surface of the sensing chip is arranged on the upper surface of the substrate, and the top surface comprises a sensing region and a spacing region which surrounds the sensing region; the top surface is provided with at least one first edge and at least one second edge, a plurality of connecting pads are formed between the at least one first edge of the top surface and the spacing area of the sensing chip, and no connecting pad is formed between the at least one second edge and the spacing area;
one end of each metal wire is connected to the corresponding welding pad, and the other end of each metal wire is connected to the corresponding connecting pad;
a first bonding layer disposed on the top surface portion between at least one of the first edges and the spacer region;
a second bonding layer disposed on the upper surface and adjacent to at least one of the second edges of the sensing chip, wherein a height of the second bonding layer relative to the upper surface is equal to a height of the first bonding layer relative to the upper surface;
the light-transmitting layer is provided with a first surface and a second surface which are positioned at two opposite sides, and the second surface of the light-transmitting layer is adhered to the first bonding layer and the second bonding layer; and
the sealing colloid is arranged on the upper surface of the substrate and covers the outer edge of the sensing chip, the outer edge of the first bonding layer, the outer edge of the second bonding layer and the outer edge of the light-transmitting layer, and at least part of each metal wire and each welding pad are embedded in the sealing colloid;
the outer edge of the first bonding layer comprises an arc-shaped curved surface, and the arc center of the arc-shaped curved surface is positioned on the sealing colloid.
2. The sensor package structure of claim 1, wherein the outer edge of the second bonding layer is S-shaped in a cross-section perpendicular to the upper surface.
3. The sensor package structure of claim 1, wherein the outer edge of the second bonding layer is a distance from the sensing region equal to a distance of at least one of the first edges from the sensing region.
4. The sensor package structure of claim 1, wherein the second bonding layer is further disposed on the top surface portion between at least one of the second edges and the spacers.
5. The sensor package structure of claim 4, wherein an area of the top surface portion between at least one of the second edges and the spacers is smaller than an area of the spacer portion to which it is connected.
6. The sensor package structure of any one of claims 1-5, wherein at least one of the first edges is farther from the spacers than at least one of the second edges.
7. The sensor package structure of any one of claims 1 to 5, wherein the sensing chip is orthographically projected onto the second surface to form a projected area, and the projected area is located within a contour of the second surface; and a fixing area is reserved on the outer side of the part of the second surface, which is adhered to the first bonding layer and the second bonding layer, and the fixing area is further coated by the sealing colloid.
8. The sensor package structure of any one of claims 1 to 5, wherein the encapsulant is further defined as a liquid encapsulant, and an included angle between the first surface of the transparent layer and the adjacent surface of the encapsulant is greater than 90 degrees and less than or equal to 180 degrees.
9. The sensor package of claim 8, further comprising a molding compound disposed at a top edge of the molding compound, wherein a top surface of the molding compound is parallel to the adjacent first surface, and a side surface of the molding compound is coplanar with an adjacent side edge of the molding compound.
10. The sensor package structure as recited in any one of claims 1 to 5, wherein the encapsulant is further defined as a molding encapsulant, and the first surface of the transparent layer forms an angle of 180 degrees with an adjacent surface of the encapsulant.
11. A sensor package, comprising:
the substrate comprises an upper surface and a lower surface which are positioned on two opposite sides, and a plurality of welding pads are formed on the upper surface of the substrate;
a sensing chip, wherein the sensing chip comprises a top surface and a bottom surface which are positioned at two opposite sides, the bottom surface of the sensing chip is arranged on the upper surface of the substrate, and the top surface comprises a sensing region and a spacing region which surrounds the sensing region; the top surface is provided with at least one first edge and at least one second edge, the distance between the at least one first edge and the spacing area is larger than the distance between the at least one second edge and the spacing area, a plurality of connecting pads are formed between the at least one first edge of the top surface and the spacing area of the sensing chip, and no connecting pad is formed between the at least one second edge and the spacing area of the top surface;
one end of each metal wire is connected to the corresponding welding pad, and the other end of each metal wire is connected to the corresponding connecting pad;
the light-transmitting layer is provided with a first surface and a second surface which are positioned at two opposite sides, and the second surface of the light-transmitting layer faces the top surface of the sensing chip; and
an adhesive disposed on the upper surface of the substrate and covering the outer edge of the sensing chip, the top portion between at least one of the first edge and the spacer, and the outer edge of the light transmissive layer and a portion of the second surface, wherein at least a portion of each of the metal lines and each of the pads are embedded in the adhesive, the adhesive comprising:
the supporting layer is arranged beside at least one second edge of the sensing chip in an adjacent mode, and the end edge of the supporting layer far away from the substrate is as high as the top surface of the sensing chip;
the bonding layer is arranged on the supporting layer and the top surface part between at least one first edge and the spacing area, and the second surface of the light-transmitting layer is adhered to the bonding layer;
the sealing colloid is arranged on the upper surface of the substrate and covers the outer edge of the sensing chip, the outer edge of the supporting layer, the outer edge of the bonding layer and the outer edge of the light-transmitting layer, and at least part of each metal wire and each welding pad are embedded in the sealing colloid; the outer edge of the supporting layer comprises an arc-shaped side surface, and the arc center of the arc-shaped side surface is positioned on the inner side of the sealing colloid.
12. The sensor package structure of claim 11, wherein the outer edge of the bonding layer comprises an arc-shaped curved surface, and an arc center of the arc-shaped curved surface of the bonding layer is located on the encapsulant.
13. The sensor package structure of claim 11, wherein a maximum distance between the outer edge of the bonding layer and the sensing region is equal to a distance between at least one of the first edges and the sensing region.
14. The sensor package structure of claim 11, wherein the bonding layer is further disposed on the top surface portion between at least one of the second edges and the spacers.
15. The sensor package structure of claim 14, wherein an area of the top surface portion between at least one of the second edges and the spacers is less than an area of the spacer portion to which it is connected.
16. The sensor package structure of any one of claims 11 to 15, wherein the sensing chip is orthographically projected onto the second surface to form a projected area, and the projected area is located within a contour of the second surface; the second surface is provided with a fixed area outside the part adhered to the jointing layer, and the sealing colloid further coats the fixed area.
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JP2017130939A JP6415648B2 (en) 2016-07-06 2017-07-04 Sensor package structure
US15/641,378 US10186538B2 (en) 2016-07-06 2017-07-05 Sensor package structure
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