CN107565844B - A kind of two-way zero voltage switch modulator approach of single-phase DC-AC converter - Google Patents

Abstract

A kind of two-way zero voltage switch modulator approach of single-phase DC-AC converter disclosed by the invention, the modulator approach judge current variator operating mode by the product of network voltage and electric current.Voltage pulse of zero module forward or backwards will be inputted by selection switch after the modulating wave progress full-wave rectification of Sinusoidal Pulse Width Modulation.Converter work selects positive voltage pulse of zero module in inverter mode, and converter works in rectification mode, selects reversed voltage pulse of zero module.Modulating wave generates bridgc arm short signal and auxiliary switch signal after inputting voltage pulse of zero module forward or backwards, acts on short-circuit signal on main switch during the converter change of current, magnetizes for resonant inductance and provides continuous current circuit, to provide enough resonant energies.The configuration of the present invention is simple, inversion realize that no-voltage is open-minded with switching devices all in rectification mode, and switching loss is small, and circuit efficiency is high, and can inhibit diode reverse recovery, reduce electromagnetic interference.

Description

A Bidirectional Zero-Voltage Switching Modulation Method for Single-phase DC-AC Converter

technical field

The invention relates to a soft-switching converter and its modulation technology, in particular to a bidirectional zero-voltage switching modulation method of a single-phase DC-AC converter.

Background technique

A single-phase DC-AC converter is a device that converts direct current into single-phase alternating current. The common topology is a full-bridge topology, which can realize bidirectional flow of energy. The circuit works in a hard switching state, there is a diode reverse recovery phenomenon, and the switching loss of the device is large, which limits the increase of the operating frequency, reduces the circuit efficiency and has electromagnetic interference. The resonant DC bus soft switching technology is applied to single-phase DC-AC converters, which can realize zero-voltage switching of devices and reduce switching losses. In the forward inverter mode and reverse rectification mode, the amplitude of the AC current changes greatly with the phase, and it is difficult to realize the bidirectional full-range soft switching with the ordinary sinusoidal pulse width modulation method.

Contents of the invention

The purpose of the present invention is to overcome the deficiencies of the prior art and provide a bidirectional zero-voltage switching modulation method for a single-phase DC-AC converter.

The bidirectional zero-voltage switching modulation method of the single-phase DC-AC converter is to provide a forward zero-voltage (ZVS) pulse module to generate one auxiliary switch forward modulation signal and one forward bridge arm short-circuit signal; provide a reverse zero voltage The voltage (ZVS) pulse module generates one auxiliary switch reverse modulation signal and one reverse bridge arm short circuit signal; calculates the AC voltage and current product of the converter. When the product is positive, select the positive zero voltage pulse module, and when the product is negative, select the reverse zero voltage pulse module. According to the polarity of the AC voltage and current product of the converter, the forward bridge arm short circuit signal output by the forward zero voltage pulse module or the reverse bridge arm short circuit signal output by the reverse zero voltage pulse module Logic "OR" operation is performed on the modulated signals of the two channels respectively. According to the polarity of the AC voltage and current product of the converter, the auxiliary switch forward modulation signal output by the forward zero voltage pulse module or the auxiliary switch reverse modulation signal output by the reverse zero voltage pulse module is selected as the driving signal of the auxiliary switch tube.

The positive zero voltage pulse module has three ports, port 1 is the input port of the absolute value of the modulation wave, port 2 is the output port of the forward bridge arm short-circuit signal, and port 3 is the output port of the forward modulation signal of the auxiliary switch. The reverse zero voltage pulse module has three ports, port 1 is the input port of the absolute value of the modulation wave, port 2 is the output port of the reverse bridge arm short-circuit signal, and port 3 is the output port of the auxiliary switch reverse modulation signal.

In a bidirectional zero-voltage switching modulation method of a single-phase DC-AC converter, the AC output voltage v _o and the output current i _o of the single-phase DC-AC converter are sampled and input to the first multiplier, and the first multiplier The output terminal is connected to the positive input terminal of the first comparator, and the negative input terminal of the first comparator is 0. The output signal of the first comparator is used as a selection signal, and is respectively connected to ports 4 of the first selection switch, the second selection switch, and the third selection switch. The modulation wave is connected to the input port 5 of the frequency multiplication SPWM modulation module and the input end of the absolute value module at the same time, and the output end of the absolute value module is connected to port 3 of the first selection switch. Port 1 of the first selection switch is connected to input port 1 of the forward zero voltage pulse module, and port 2 of the first selection switch is connected to input port 1 of the reverse zero voltage pulse module. The output port 2 of the forward zero voltage pulse module is connected to the port 1 of the second selection switch, and the output port 3 of the forward zero voltage pulse module is connected to the port 1 of the third selection switch. The output port 2 of the reverse zero voltage pulse module is connected to the output port 2 of the second selection switch, and the output port 3 of the reverse zero voltage pulse module is connected to the output port 2 of the third selection switch. The port 3 of the second selection switch and the output port 1 of the frequency multiplication SPWM modulation module are respectively connected to the two input terminals of the first OR gate, and the port 3 of the second selection switch is connected to the output port 2 of the frequency multiplication SPWM modulation module respectively. The two input terminals of the OR gate, the port 3 of the second selection switch and the output port 3 of the frequency multiplication SPWM modulation module are respectively connected to the two input terminals of the third OR gate, and the port 3 of the second selection switch is connected to the frequency multiplication SPWM modulation module. The output port 4 of is respectively connected to the two input ends of the fourth OR gate.

When the output signal of the first comparator is positive, the single-phase DC-AC converter works in the forward inversion mode, and the ports 1 and 3 of the first selection switch, the second selection switch, and the third selection switch are connected; When the output signal of a comparator is negative, the single-phase DC-AC converter works in the reverse rectification mode, and ports 2 and 3 of the first selection switch, the second selection switch, and the third selection switch are connected.

The output terminal of the first OR gate is the modulation signal v _{gs1 of the upper tube of the first bridge arm of the inverter, the output terminal of the second OR gate is the modulation signal v gs4 of} the lower tube of the first bridge arm of the inverter, and the output of the third OR gate terminal is the modulation signal v gs2 of the upper tube of the second bridge arm of the inverter, and the output terminal of the fourth OR gate is the modulation signal v _gs3 of the lower tube of the second bridge arm of the _inverter . The port 3 output signal of the third selection switch is the modulation signal v _gsa of the auxiliary switching tube of the inverter.

The amplitude of the first sawtooth carrier adopted by the positive zero voltage (ZVS) pulse module is V _t and -V _t , the frequency of the first sawtooth carrier is 2f _s , and the period is T _s /2.

In the k-th triangular carrier period, the first sawtooth carrier expression is v _saw1 (t):

The first sawtooth carrier is connected to the negative input terminal of the fourth comparator and the positive input terminal of the fifth comparator. In the kth triangular carrier period, the amplitude of the modulation wave is v _m (k), and it satisfies:

0≤|v _m (k)|<V _t

The output of the absolute value module is |v _m (k)|, which is connected to one input terminal of the first adder, and the offset value -v ₁ is input to the other input terminal of the first adder. The output end of the first adder is connected to the positive input end of the fourth comparator and an input end of the second adder. The forward modulating wave increment -v ₂ is connected to an input end of the second adder. The output end of the second adder is connected to the negative input end of the fifth comparator. The output terminals of the fourth comparator and the fifth comparator are respectively connected to the two input terminals of the first AND gate, the output terminals of the first AND gate are connected to the input terminals of the fifth rising edge delay module and the fourth inverter, and the output terminals of the first AND gate are connected. The output terminals of the four inverters are connected to the sixth rising edge delay module, the output terminal of the fifth rising edge delay module is the output port 2 of the positive zero voltage pulse module, that is, the forward bridge arm short-circuit signal output port, the sixth The output terminal of the rising edge delay module is the output port 3 of the positive zero voltage pulse module, that is, the output port of the forward modulation signal of the auxiliary switch.

The amplitude of the second sawtooth carrier used by the reverse zero voltage (ZVS) pulse module is V _t and -V _t , the frequency of the second sawtooth carrier is 2f _s , and the period is T _s /2.

In the k-th triangular carrier period, the second sawtooth carrier expression is v _saw2 (t):

The second sawtooth carrier is connected to the positive input terminal of the sixth comparator and the negative input terminal of the seventh comparator. The output of the absolute value module is |v _m (k)|, which is connected to one input terminal of the third adder, and the offset value v ₁ -V _t is input to the other input terminal of the third adder. The output terminal of the third adder is connected to the negative input terminal of the sixth comparator and an input terminal of the fourth adder. The reverse modulation wave increment v ₃ is connected to the other input end of the fourth adder. The output end of the fourth adder is connected to the positive input end of the seventh comparator. The output terminals of the sixth comparator and the seventh comparator are respectively connected to the two input terminals of the second AND gate, and the output terminals of the second AND gate are connected to the input terminals of the seventh rising edge delay module and the fifth inverter. The output terminal of the fifth inverter is connected to the eighth rising edge delay module, and the output terminal of the seventh rising edge delay module is the output port 2 of the reverse zero voltage pulse module, that is, the output port of the reverse bridge arm short circuit signal, and the eighth The output terminal of the rising edge delay module is the output port 3 of the reverse zero voltage pulse module, that is, the output port of the reverse modulation signal of the auxiliary switch.

The first rising edge delay module, the second rising edge delay module, the third rising edge delay module, the fourth rising edge delay module, the fifth rising edge delay module, the sixth rising edge delay module, The function of the seventh rising edge delay module and the eighth rising edge delay module is to delay the rising edge of the module input signal, and the output signal is equal to the input signal at other times. The rising edge delays of the first rising edge delay module, the second rising edge delay module, the third rising edge delay module, and the fourth rising edge delay module are respectively t _d0 , and the fifth rising edge delay The rising edge delay of the module is t _d4 , the rising edge delay of the sixth rising edge delay module is t _d5 , the rising edge delay of the seventh rising edge delay module is t _d6 , and the eighth rising edge delay module The rising edge delay is t _d7 . And must meet:

The topology of the single-phase DC-AC converter and the auxiliary resonant circuit using the above modulation method, including the power supply V _bus of the inverter DC side, the capacitor C _bus of the DC bus, and four full-control switches S ₁ and S ₂ with anti-parallel diodes , S ₃ , S ₄ constitute the full bridge arm, S ₁ , S ₂ , S ₃ , S ₄ are connected in parallel with capacitors C ₁ , C ₂ , C ₃ , C ₄ respectively, and the output filter is connected in series between the midpoints of the two bridge arms The inductance L and the AC power grid, the series branch of the auxiliary switch S _a with anti-parallel diodes and the clamping capacitor C _c is connected between the power supply V _bus of the inverter DC side and the bridge arm of the full bridge, and the auxiliary switch S _a is connected in parallel with the capacitor C _a , and a resonant inductance L _r is connected across the two ends of the series branch. The first bridge arm is composed of main switches S ₁ and S ₄ , and the second bridge arm is composed of main switches S ₂ and S ₃ .

The modulation method proposed by the present invention can be realized by analog or digital hardware circuits, and can also be realized by software. In the commutation phase of the bridge arm switch of the single-phase DC-AC converter, by resonating the bridge arm voltage to 0, the zero voltage turn-on of the bridge arm switch is realized and the reverse recovery of the diode is suppressed. By adding the short-circuit pulse of the bridge arm, a freewheeling circuit is provided for the magnetization of the resonant inductance, which solves the problem of insufficient energy of the resonant inductance, and can realize the full-range bidirectional soft switching operation within the AC fundamental wave cycle, and all switching devices realize zero-voltage turn-on, reducing switching loss Small, high circuit efficiency, reduce electromagnetic interference.

Description of drawings

Fig. 1 is the production mode of the modulation method proposed by the present invention;

Figure 2 is the internal structure of the frequency multiplication SPWM pulse module;

Figure 3 shows the internal structure of the positive zero voltage (ZVS) pulse module;

Figure 4 shows the internal structure of the reverse zero voltage (ZVS) pulse module;

Figure 5 is a single-phase DC-AC converter and auxiliary resonant circuit topology;

Fig. 6 is the waveform of each modulation signal when the forward inverter works in a triangular carrier cycle and the modulation wave is greater than or equal to zero;

Fig. 7 is each modulated signal waveform when the forward inverter works in a triangular carrier cycle and the modulated wave is less than zero;

Fig. 8 is each modulated signal waveform when the reverse rectification works in a triangular carrier cycle and the modulated wave is greater than or equal to zero;

Fig. 9 is each modulated signal waveform when the reverse rectification works in a triangular carrier cycle and the modulated wave is less than zero;

Figure 10 shows the main voltage and current waveforms of the single-phase DC-AC converter when the forward inverter works in a triangular carrier cycle and the modulation wave is greater than or equal to zero;

Figure 11 is a circuit diagram of each working stage of the single-phase DC-AC converter when the forward inverter works in the first half of a triangular carrier cycle and the modulation wave is greater than or equal to zero;

Figure 12 shows the main voltage and current waveforms of the single-phase DC-AC converter when the reverse rectification works within a triangular carrier cycle and the modulation wave is greater than or equal to zero;

Figure 13 is a circuit diagram of each working stage of the single-phase DC-AC converter when the reverse rectification works in the first half cycle of a triangular carrier cycle and the modulation wave is greater than or equal to zero;

Detailed ways

The present invention will be described in detail below in conjunction with the accompanying drawings.

As shown in Figure 1, the modulated wave is sent to the frequency multiplication SPWM modulation module, and the modulated wave is input to the absolute value module at the same time, the output of the absolute value module is the absolute value of the modulated wave, and the output signal of the absolute value module is connected to port 3 of the first selection switch. The AC output voltage v _o and output current i _o of the single-phase DC-AC converter are sampled and input to the first multiplier, the output terminal of the first multiplier is connected to the positive input terminal of the first comparator, and the The negative input is 0. The output signal of the first comparator is used as a selection signal, and is respectively connected to ports 4 of the first selection switch, the second selection switch, and the third selection switch. The modulation wave is connected to the input port 5 of the frequency multiplication SPWM modulation module and the input end of the absolute value module at the same time, and the output end of the absolute value module is connected to port 3 of the first selection switch. Port 1 of the first selection switch is connected to input port 1 of the forward zero voltage pulse module, and port 2 of the first selection switch is connected to input port 1 of the reverse zero voltage pulse module. The output port 2 of the forward zero voltage pulse module is connected to the port 1 of the second selection switch, and the output port 3 of the forward zero voltage pulse module is connected to the port 1 of the third selection switch. The output port 2 of the reverse zero voltage pulse module is connected to the output port 2 of the second selection switch, and the output port 3 of the reverse zero voltage pulse module is connected to the output port 2 of the third selection switch. The port 3 of the second selection switch and the output port 1 of the frequency multiplication SPWM modulation module are respectively connected to the two input terminals of the first OR gate, and the port 3 of the second selection switch is connected to the output port 2 of the frequency multiplication SPWM modulation module respectively. The two input terminals of the OR gate, the port 3 of the second selection switch and the output port 3 of the frequency multiplication SPWM modulation module are respectively connected to the two input terminals of the third OR gate, and the port 3 of the second selection switch is connected to the frequency multiplication SPWM modulation module. The output port 4 of is respectively connected to the two input ends of the fourth OR gate.

When the output signal of the first comparator is positive, the single-phase DC-AC converter works in the forward inversion mode, and the ports 1 and 3 of the first selection switch, the second selection switch, and the third selection switch are connected; When the output signal of a comparator is negative, the single-phase DC-AC converter works in the reverse rectification mode, and ports 2 and 3 of the first selection switch, the second selection switch, and the third selection switch are connected.

The output terminal of the first OR gate is the modulation signal v _{gs1 of the upper tube of the first bridge arm of the inverter, the output terminal of the second OR gate is the modulation signal v gs4 of} the lower tube of the first bridge arm of the inverter, and the output of the third OR gate terminal is the modulation signal v gs2 of the upper tube of the second bridge arm of the inverter, and the output terminal of the fourth OR gate is the modulation signal v _gs3 of the lower tube of the second bridge arm of the _inverter . The port 3 output signal of the third selection switch is the modulation signal v _gsa of the auxiliary switching tube of the inverter.

As shown in Figure 2, the modulated wave is input to port 5 of the multiplier SPWM modulation module. The multiplier SPWM modulation module uses a symmetrical triangular carrier wave with amplitudes V _t and -V _t , carrier frequency f _s , and carrier period T _s . The AC fundamental wave frequency of the converter is f _g , and the AC fundamental wave period is T _g . The carrier frequency is an integer multiple of the fundamental frequency. In one AC fundamental cycle, there are N multiplied SPWM carrier cycles:

In the k-th carrier period, the triangular carrier expression is v _tri (t):

In the kth carrier cycle, the amplitude of modulation wave 1 is v _m (k):

-1＜v _m (k)＜1,1≤k≤N

The modulated wave is connected to the positive input terminal of the second comparator and the input terminal of the first inverter, and the output terminal of the first inverter is connected to the positive input terminal of the third comparator. The triangular carrier is connected to the negative input terminal of the second comparator and the negative input terminal of the third comparator. The output of the second comparator is connected to the input end of the second inverter and the input end of the first rising edge delay module. The output of the third comparator is connected to the input terminal of the third inverter and the input terminal of the third rising edge delay module. The output end of the second inverter is connected to the second rising edge delay module, and the output end of the third inverter is connected to the fourth rising edge delay module.

The output end of the first rising edge delay module is the output port 1 of the frequency multiplication SPWM modulation module, the output end of the second rising edge delay module is the output port 2 of the frequency multiplication SPWM modulation module, and the output port 2 of the third rising edge delay module The output end is the output port 3 of the frequency multiplication SPWM modulation module, and the output end of the fourth rising edge delay module is the port 4 of the frequency multiplication SPWM modulation module.

As shown in Figure 3, the amplitude of the first sawtooth carrier used by the positive zero voltage (ZVS) pulse module is V _t and -V _t , the frequency of the first sawtooth carrier is 2f _s , and the period is T _s /2.

In the k-th triangular carrier period, the first sawtooth carrier expression is v _saw1 (t):

The first sawtooth carrier is connected to the negative input terminal of the fourth comparator and the positive input terminal of the fifth comparator. The output of the absolute value module is |v _m (k)|, which is connected to one input terminal of the first adder, and the offset value -v ₁ is input to the other input terminal of the first adder. The output end of the first adder is connected to the positive input end of the fourth comparator and an input end of the second adder. The forward modulating wave increment -v ₂ is connected to an input end of the second adder. The output end of the second adder is connected to the negative input end of the fifth comparator. The output terminals of the fourth comparator and the fifth comparator are respectively connected to the two input terminals of the first AND gate, the output terminals of the first AND gate are connected to the input terminals of the fifth rising edge delay module and the fourth inverter, and the output terminals of the first AND gate are connected. The output terminals of the four inverters are connected to the sixth rising edge delay module, and the output terminal of the fifth rising edge delay module is the output port 2 of the positive zero voltage pulse module, which outputs the forward bridge arm short-circuit signal, and the sixth rising edge The output terminal of the delay module is the output port 3 of the positive zero voltage pulse module, and outputs the forward modulation signal of the auxiliary switch.

As shown in Figure 4, the amplitude of the second sawtooth carrier used by the reverse zero voltage (ZVS) pulse module is V _t and -V _t , the frequency of the second sawtooth carrier is 2f _s , and the period is T _s /2.

In the k-th triangular carrier period, the second sawtooth carrier expression is v _saw2 (t):

The second sawtooth carrier is connected to the negative input terminal of the fourth comparator and the positive input terminal of the fifth comparator. The output of the absolute value module is |v _m (k)|, which is connected to one input terminal of the third adder, and the offset value v ₁ -V _t is input to the other input terminal of the third adder. The output terminal of the third adder is connected to the negative input terminal of the sixth comparator and an input terminal of the fourth adder. The reverse modulation wave increment v ₃ is connected to the other input end of the fourth adder. The output end of the fourth adder is connected to the positive input end of the seventh comparator. The output terminals of the sixth comparator and the seventh comparator are respectively connected to the two input terminals of the second AND gate, and the output terminals of the second AND gate are connected to the input terminals of the seventh rising edge delay module and the fifth inverter. The output terminal of the fifth inverter is connected to the eighth rising edge delay module, the output terminal of the seventh rising edge delay module is the output port 2 of the reverse zero voltage pulse module, and the reverse bridge arm short circuit signal is output, and the eighth rising edge The output terminal of the delay module is the output port 3 of the reverse zero-voltage pulse module, which outputs the reverse modulation signal of the auxiliary switch.

The first rising edge delay module, the second rising edge delay module, the third rising edge delay module, the fourth rising edge delay module, the fifth rising edge delay module, the sixth rising edge delay module, The function of the seventh rising edge delay module and the eighth rising edge delay module is to delay the rising edge of the module input signal, and the output signal is equal to the input signal at other times. The rising edge delays of the first rising edge delay module, the second rising edge delay module, the third rising edge delay module, and the fourth rising edge delay module are respectively t _d0 , and the fifth rising edge delay The rising edge delay of the module is t _d4 , the rising edge delay of the sixth rising edge delay module is t _d5 , the rising edge delay of the seventh rising edge delay module is t _d6 , and the eighth rising edge delay module The rising edge delay is t _d7 . And must meet:

As shown in Figure 5, the topology of the single-phase DC-AC converter and auxiliary resonant circuit applied to the present invention includes the inverter DC side power supply V _bus and the DC bus capacitor C _bus , which are fully controlled by four anti-parallel diodes Switches S ₁ , S ₂ , S ₃ , and S ₄ constitute a full-bridge arm. S ₁ , S ₂ , S ₃ , and S ₄ are connected in parallel with capacitors C ₁ , C ₂ , C ₃ , and C ₄ respectively. The midpoint of the two bridge arms The output filter inductor L and the AC power grid are connected in series, and the series branch of the auxiliary switch S _a with an anti-parallel diode and the clamping capacitor C _c is connected between the power supply V _bus of the inverter DC side and the bridge arm of the full bridge. The auxiliary switch S _a is connected in parallel with the capacitor C _a , and the resonant inductance L _r is connected across the two ends of the series branch. The first bridge arm is composed of main switches S ₁ and S ₄ , and the second bridge arm is composed of main switches S ₂ and S ₃ .

Referring to Figure 6, v _s1 , v _s2 , v _s3 , and v _s4 are the output signal waveforms of port 1, port 2, port 3, and port 4 of the multiplier SPWM modulation module, respectively. Forward inverter working mode and the modulation wave is greater than or equal to zero, in the kth triangular carrier period: |v _m (k)|=v _m (k). In the first half cycle of the triangular carrier, the triangular carrier is equal to the first sawtooth carrier: v _tri (t) = v _saw1 (t), so the falling edge of v _gsaf lags behind the falling edge of v _gs4 by t _d1 . In the second half period of the triangular carrier wave, the triangular carrier wave and the first sawtooth carrier wave are inverted: v _tri (t) = -v _saw1 (t), so the falling edge of v _gsaf lags behind the falling edge of v _gs2 , and the lag time is still t _d1 , and satisfy:

Referring to FIG. 7 , v _s1 , v _s2 , v _s3 , and v _s4 are the output signal waveforms of port 1, port 2, port 3, and port 4 of the multiplier SPWM modulation module, respectively. In forward inverter mode and the modulating wave is less than zero, in the kth triangular carrier period: |v _m (k)|=-v _m (k). In the first half period of the triangular carrier, the triangular carrier is equal to the first sawtooth carrier: v _tri (t) = v _saw1 (t), so the falling edge of v _gsaf lags behind the falling edge of v _gs3 , and the lag time is still t _d1 . In the second half period of the triangular carrier wave, the triangular carrier wave and the first sawtooth carrier wave are inverted: v _tri (t) = -v _saw1 (t), so the falling edge of v _gsaf lags behind the falling edge of v _gs1 , and the lag time is still t _d1 .

Referring to FIG. 8 , v _s1 , v _s2 , v _s3 , and v _s4 are the output signal waveforms of port 1, port 2, port 3, and port 4 of the multiplier SPWM modulation module, respectively. In reverse rectification mode and the modulation wave is greater than or equal to zero, in the kth triangular carrier period: |v _m (k)|=v _m (k). In the first half cycle of the triangular carrier wave, the falling edge of v _gsaf lags behind the falling edge of v _gs3 , and the lag time is still t _d1 . In the second half period of the triangular carrier wave, the falling edge of v _gsaf lags behind the falling edge of v _gs1 , and the lag time is still t _d1 .

Referring to FIG. 9 , v _s1 , v _s2 , v _s3 , and v _s4 are output signal waveforms of port 1, port 2, port 3, and port 4 of the multiplier SPWM modulation module, respectively. In the reverse rectification mode and the modulation wave is less than zero, in the kth triangular carrier period: |v _m (k)|=-v _m (k). In the first half cycle of the triangular carrier wave, the falling edge of v _gsaf lags behind the falling edge of v _gs4 , and the lag time is still t _d1 . In the latter half cycle of the triangular carrier wave, the falling edge of v _gsaf lags behind the falling edge of v _gs2 , and the lag time is still t _d1 .

Referring to Fig. 10 and Fig. 11, the voltage and current waveforms and circuits of each working stage of the single-phase DC-AC converter adopting the modulation method proposed by the present invention in the forward inverter working mode will be described. To simplify the analysis, the current source is used to replace the inductor L and the AC power grid in Figure 11.

Stage 1 (t ₀ ～t ₁ ):

As shown in Figure 11(1), the main switches S ₄ , S ₃ and the auxiliary switch S _a are _turned on, and the main switches S ₁ and S ₂ are _turned off _. In the loop, the voltage across the resonant inductor L _r is -V _cc , and the current of the resonant inductor decreases linearly;

Phase 2 (t ₁ ～t ₂ ):

As shown in Figure ₁₁ ( ₂ ), at time _t1 , the main switch S4 is turned off, and the current in S4 is freewheeling by its antiparallel diode, and:

t _d1 =t ₂ -t ₁

Stage three (t ₂ ～t ₃ ):

As shown in Figure 11(3), at time _t2 , the auxiliary switch S _a is turned off, the resonant inductance L _r discharges the parallel capacitors C ₁ and C ₂ of the main switches S ₁ and S ₂ , and discharges the parallel capacitor C of the auxiliary switch S _{a a} charging, S _a zero-voltage shutdown.

Phase 4 (t ₃ ～t ₄ ):

As shown in Figure 11(4), at time _t3 , the voltages of the parallel capacitors C ₁ and C ₂ of the main switches S ₁ and S ₂ resonate to zero, the antiparallel diodes of S ₁ and S ₂ start conducting, and the resonant inductance L _r The terminal voltage is clamped at V _bus , and the current of the resonant inductor L _r rises linearly;

Phase 4 (t ₄ ～t ₅ ):

As shown in Figure 11(5), at time t ₄ , the main switches S ₁ , S ₂ , and S ₄ are turned on with zero voltage, and the current of the resonant inductor L _r continues to rise linearly, and:

t _d4 =t ₄ -t ₂

Stage five (t ₅ ～t ₆ ):

As shown in Figure 11(6), at moment t ₅ , the main switches S ₂ and S ₄ are turned off, and the resonant inductance L _r charges the parallel capacitors C ₂ and C ₄ of the main switches S ₂ and S ₄ , and charges the auxiliary switch S _a in parallel Capacitor C _a is charged, S ₂ and S ₄ are turned off at zero voltage, and:

t _d2 =t ₅ -t ₂

t _d2 is the delay time determined by the offset -v ₂ :

Stage six (t ₆ ～t ₇ ):

As shown in Figure 11( ₇ ), at time t6, the auxiliary switch S _a parallel capacitor C _a voltage resonates to zero, the S _a anti-parallel diode starts to conduct, and the voltage at both ends of the resonant inductor L _r is clamped at -V _cc by the clamp The loop composed of bit capacitance C _c and S _a paralleled with diodes discharges magnetism, and the current of resonant inductance L _r decreases linearly; the energy is transmitted from DC power supply to AC power grid.

Stage seven (t ₇ ～t ₈ ):

As shown in Fig. 11( ₈ ), at time t7, the auxiliary switch S _a is turned on with zero voltage, the voltage at both ends of the resonant inductor L _r is clamped at -V _cc , and the magnetization is released through the loop composed of clamping capacitors C _c and S _a , The resonant inductor L _r current continues to decrease linearly, and:

t _d5 =t ₇ -t ₅

Stage eight (t ₈ ～t ₉ ):

As shown in Figure ₁₁ ( ₉ ), at time _t8 , the main switch S3 is turned off, and the output current is discharged to the parallel capacitor _{C2 of} the main switch S2, and charged to the parallel capacitor C3 _of the main switch S3, and _S3 is turned off at zero voltage broken;

Stage nine (t ₉ ～t ₁₀ ):

As shown in Figure ₁₁ ( ₁₀ ), at time _t9 , the parallel capacitor _C2 of the main switch S2 discharges to zero, the antiparallel diode of the main switch S2 starts to conduct, the tube voltage of the main switch S2 is _clamped to zero, and the main switch S2 The tube voltage of S ₃ is clamped to V _bus +V _cc , and the load current is freewheeling by the anti-parallel diode of the main switch S ₂ ;

Stage ten (t ₁₀ ～t ₁₁ ):

As shown in Figure 11( ₁₁ ), at time t10, the main switch S2 is _turned on with zero voltage, and:

t _d0 =t ₁₀ -t ₈

Referring to Fig. 12 and Fig. 13, the voltage and current waveforms and the circuits of each working stage of the single-phase DC-AC converter adopting the modulation method proposed by the present invention in the reverse rectification working mode are described. To simplify the analysis, the current source is used to replace the inductor L and the AC power grid in Figure 11.

Stage 1 (t ₀ ～t ₁ ):

As shown in Figure 13(1), the main switches S ₄ , S ₃ and the auxiliary switch S _a are _turned on, and the main switches S ₁ and S ₂ are _turned off _. In the loop, the voltage across the resonant inductor L _r is -V _cc , and the current of the resonant inductor decreases linearly;

Phase 2 (t ₁ ～t ₂ ):

As shown in Figure 13( ₂ ), at time _t1 , the main switch S4 is turned off, the input current discharges the parallel capacitor _C4 of the main switch S4, charges the parallel capacitor _{C1 of} the main switch S1, and _{S4 turns} off at zero voltage ;

Stage three (t ₂ ～t ₃ ):

As shown in Figure 13(3), at time _t2 , the parallel capacitor _{C1 of} the main switch S1 discharges to zero, the antiparallel diode _of the main switch S1 starts to conduct, the tube voltage _of the main switch S1 is clamped to zero, and the main switch The tube voltage of S ₄ is clamped to V _bus +V _cc , and the input current is freewheeled by the anti-parallel diode of the main switch S ₁ . Energy is transferred from the AC grid to the DC side power supply.

Phase 4 (t ₃ ～t ₄ ):

As shown in Figure 13(4), at time _t3 , the main switch S2 is _turned on with zero voltage, and:

t _d0 =t ₃ -t ₁

Phase 4 (t ₄ ～t ₅ ):

As shown in Figure ₁₃ ( ₅ ), at time t4, the main switch S3 is turned off, and the current in S3 is _freewheeling through its antiparallel diode. and:

t _d1 =t ₅ -t ₄

Stage five (t ₅ ～t ₆ ):

As shown in Figure 13( ₆ ), at time t5, the auxiliary switch S _a is turned off, the resonant inductance L _r discharges the parallel capacitors C ₂ and C ₄ of the main switches S ₂ and S ₄ , and discharges the parallel capacitor C of the auxiliary switch S _{a a} charging, S _a zero-voltage shutdown.

Stage six (t ₆ ～t ₇ ):

As shown in Figure 13( ₇ ), at time t6, the voltage of the parallel capacitors C ₂ and C ₄ of the main switches S ₂ and S ₄ resonates to zero, the antiparallel diodes of S ₂ and S ₄ start to conduct, and the resonant inductance L _r The terminal voltage is clamped at V _bus , and the current of the resonant inductor L _r rises linearly;

Stage seven (t ₇ ～t ₈ ):

As shown in Figure 13(8), at time t ₇ , the main switches S ₂ , S ₃ , and S ₄ are turned on with zero voltage, and the current of the resonant inductor L _r continues to rise linearly, and:

t _d6 =t ₇ -t ₅

Stage eight (t ₈ ～t ₉ ):

As shown in Figure 13(9), at moment t ₈ , the main switches S ₃ and S ₄ are turned off, and the resonant inductance L _r charges the parallel capacitors C ₃ and C ₄ of the main switches S ₃ and S ₄ , and charges the auxiliary switch S _a in parallel Capacitor C _a is charged, S ₃ and S ₄ are turned off at zero voltage, and:

t _d3 =t ₈ -t ₅

t _d3 is the delay time determined by the offset v ₃ :

Stage nine (t ₉ ～t ₁₀ ):

As shown in Figure 13( ₁₀ ), at time t9, the auxiliary switch S _a parallel capacitor C _a voltage resonates to zero, the S _a anti-parallel diode starts to conduct, and the voltage at both ends of the resonant inductor L _r is clamped at -V _cc by the clamp The loop composed of bit capacitance C _c and S _a connected in parallel with diodes discharges magnetism, and the current of resonant inductance L _r decreases linearly.

Stage ten (t ₁₀ ～t ₁₁ ):

As shown in Figure 13(11), at time t ₇₀ , the auxiliary switch S _a is turned on with zero voltage, the voltage at both ends of the resonant inductor L _r is clamped at -V _cc , and the magnetization is released through the loop composed of clamping capacitors C _c and S _a , The resonant inductor L _r current continues to decrease linearly, and:

t _d7 =t ₁₀ -t ₈ .

Claims (6)

1. A bidirectional zero-voltage switching modulation method of a single-phase DC-AC converter, characterized in that the modulation method is applied to a single-phase DC-AC converter and auxiliary resonant circuit topology, including an inverter DC side power supply V _bus , the DC bus capacitance C _bus , a full-bridge bridge arm composed of four full-control switches S ₁ , S ₂ , S ₃ , and S ₄ with anti-parallel diodes, and parallel capacitors of S ₁ , S ₂ , S ₃ , and S ₄ C ₁ , C ₂ , C ₃ , C ₄ , the output filter inductor L and the AC power grid are connected in series between the midpoints of the two bridge arms, and the anti-parallel connection is connected between the power supply V _bus on the DC side of the inverter and the bridge arms of the full bridge The series branch of the auxiliary switch S _a of the diode and the clamping capacitor C _c , the auxiliary switch S _a is connected in parallel with the capacitor C _a , and the resonant inductance L _r is connected across the two ends of the series branch, and the first bridge arm is composed of the main switch S ₁ , S ₄ is formed, and the second bridge arm is formed by main switches S ₂ and S ₃ ; The modulation method includes: providing a positive zero-voltage (ZVS) pulse module (7), generating one path of auxiliary switch forward modulation signal v _gsaf and one path of forward bridge arm short-circuit signal v _scf ; A reverse zero voltage (ZVS) pulse module (8) is provided to generate an auxiliary switch reverse modulation signal v _gsar and a reverse bridge arm short-circuit signal v _scr ; Select the positive zero voltage pulse module (7) or the reverse zero voltage pulse module (8) according to the polarity of the AC voltage and current of the converter: when the polarity is positive, select the positive zero voltage pulse module; when the polarity is negative, select The reverse zero voltage pulse module combines the forward bridge arm short circuit signal output by the forward zero voltage pulse module (7) or the reverse bridge arm short circuit signal output by the reverse zero voltage pulse module (8) with the frequency multiplication SPWM modulation module ( 6) Perform logical "OR" operation on the four output modulation signals; reverse the forward modulation signal of the auxiliary switch output by the positive zero voltage pulse module (7) or the auxiliary switch output of the reverse zero voltage pulse module (8) The modulation signal is used as the modulation signal (19) of the auxiliary switching tube. 2. the bidirectional zero-voltage switching modulation method of a kind of single-phase DC-AC converter according to claim 1, it is characterized in that, the modulating wave (1) of single-phase DC-AC converter inputs frequency multiplication SPWM modulation module simultaneously (6) and the absolute value module (3), the output signal of the absolute value module (3) is connected to the port 3 of the first selection switch (5), the AC output voltage v _o and the output current i _o of the single-phase DC-AC converter Input the first multiplier (2) after sampling, the output terminal of the first multiplier (2) is connected with the positive input terminal of the first comparator (4), and the negative input terminal of the first comparator (4) is 0, The output signal of the first comparator (4) is used as selection signal, connects respectively the port 4 of the first selection switch (5), the second selection switch (9), the third selection switch (10), the first selection switch (5) Port 1 of the first selector switch (5) is connected to input port 1 of the forward zero voltage pulse module (7), and port 2 of the first selector switch (5) is connected to input port 1 of the reverse zero voltage pulse module (8). The output port 2 of the module (7) is connected to the port 1 of the second selection switch (9), the output port 3 of the forward zero voltage pulse module (7) is connected to the port 1 of the third selection switch (10), and the reverse zero voltage pulse module (7) is connected to the port 1 of the third selection switch (10). The output port 2 of the voltage pulse module (8) is connected to the port 2 of the second selection switch (9), and the output port 3 of the reverse zero voltage pulse module (8) is connected to the port 2 of the third selection switch (10). The port 3 of two selector switches (9) and the output port 1 of the frequency multiplication SPWM modulation module (6) are respectively connected with two input terminals of the first OR gate (11), and the port 3 of the second selector switch (9) is connected with the frequency multiplier The output port 2 of the SPWM modulation module (6) is respectively connected to two input ends of the second OR gate (12), and the port 3 of the second selection switch (9) is connected to the output port 3 of the frequency multiplication SPWM modulation module (6) respectively. The two input terminals of the third OR gate (13), the port 3 of the second selection switch (9) and the output port 4 of the frequency multiplication SPWM modulation module (6) are respectively connected to the two input terminals of the fourth OR gate (14) ; When the output signal of the first comparator (4) is positive, the single-phase DC-AC converter works in the forward inverting mode, the first selector switch (5), the second selector switch (9), the third selector switch ( 10) port 1 and port 3 are connected; when the output signal of the first comparator (4) is negative, the single-phase DC-AC converter works in the reverse rectification mode, the first selector switch (5), the second selector switch (9), port 2 of the third selector switch (10) communicates with port 3; The output terminal of the first OR gate (11) is the modulation signal (15) v _gs1 of the upper tube of the first bridge arm of the inverter, and the output terminal of the second OR gate (12) is the modulation signal of the lower tube of the first bridge arm of the inverter (16) v _gs4 , the output end of the third OR gate (13) is the modulation signal of the upper tube of the second bridge arm of the inverter (17) v _gs2 , the output end of the fourth OR gate (14) is the second inverter The modulation signal of the lower tube of the bridge arm (18)v _gs 3; The port 3 output signal of the third selection switch (10) is the modulation signal (19) v _gsa of the auxiliary switching tube of the inverter. 3. the bidirectional zero-voltage switching modulation method of a kind of single-phase DC-AC converter according to claim 2, is characterized in that, described modulation wave (1) input frequency multiplication SPWM modulation module (6), frequency multiplication The SPWM modulation module (6) adopts a symmetrical triangular carrier wave (20), the amplitudes are V _t and -V _t , the carrier frequency is f _s , and the carrier cycle is T _s ; the AC fundamental wave frequency of the converter is f _g , and the AC fundamental wave cycle is is T _g ; the carrier frequency is an integer multiple of the fundamental frequency, and there are N multiplied SPWM carrier periods in one AC fundamental period: In the kth carrier cycle (1≤k≤N), the triangular carrier expression is v _tri (t): In the kth carrier period, the amplitude of the modulating wave (1) is v _m (k): -V _t ＜v _m (k)＜V _t , 1≤k≤N Modulated wave (1) connects the positive input end of the second comparator (22) and the input end of the first inverter (21), and the output end of the first inverter (21) connects the third comparator (23) Positive input terminal, triangle carrier (20) connects the negative input terminal of the second comparator (22) and the negative input terminal of the third comparator (23), the output of the second comparator (22) connects the second inverter ( 24) of the input terminal and the input terminal of the first rising edge delay module (26), the output of the third comparator (23) is connected to the input terminal of the third inverter (25) and the third rising edge delay module ( 28), the output of the second inverter (24) is connected to the second rising edge delay module (27), and the output of the third inverter (25) is connected to the fourth rising edge delay module (29 ); The output end of the first rising edge delay module (26) is the output port 1 of the frequency multiplication SPWM modulation module (6), and the output end of the second rising edge delay module (27) is the output port of the frequency multiplication SPWM modulation module (6). Output port 2, the output end of the third rising edge delay module (28) is the output port 3 of the frequency multiplication SPWM modulation module (6), and the output end of the fourth rising edge delay module (29) is the frequency multiplication SPWM modulation module Output port 4 of (6). 4. The bidirectional zero voltage switching modulation method of a kind of single-phase DC-AC converter according to claim 1, is characterized in that, the first sawtooth that described forward zero voltage (ZVS) pulse module (7) adopts The amplitude of the carrier (30) is V _t and -V _t , the frequency of the first sawtooth carrier (30) is 2f _s , and the period is T _s /2; In the k-th triangular carrier (20) period, the expression of the first sawtooth carrier (30) is v _saw1 (t): The negative input terminal of the first sawtooth carrier (30) connects the 4th comparator (33) and the positive input terminal of the 5th comparator (34), the output of absolute value module (3) is |v _m (k)|, connects To an input end of the first adder (31), the offset value-v ₁ inputs the other input end of the first adder (31), and the output end of the first adder (31) connects the 4th comparator (33 ) of the positive input and an input of the second adder (32), the positive modulation wave increment-v ₂ is connected to an input of the second adder (32), the output of the second adder (32) Connect the negative input terminal of the 5th comparator (34), the output terminal of the 4th comparator (33) and the 5th comparator (34) connect two input terminals of the first AND gate (35) respectively, the first AND gate The output end of (35) connects the input end of the fifth rising edge delay module (37) and the fourth inverter (36), and the output end of the fourth inverter (36) connects the sixth rising edge delay module ( 38), the output terminal of the fifth rising edge delay module (37) is the output port 2 of the positive zero voltage pulse module (7), and outputs the forward bridge arm short-circuit signal, and the sixth rising edge delay module (38) The output end is the output port 3 of the forward zero voltage pulse module (7), which outputs the forward modulation signal of the auxiliary switch. 5. The bidirectional zero voltage switching modulation method of a kind of single-phase DC-AC converter according to claim 1, is characterized in that, the second sawtooth that described reverse zero voltage (ZVS) pulse module (8) adopts The amplitude of the carrier (39) is V _t and -V _t , the frequency of the second sawtooth carrier (39) is 2f _s , and the period is T _s /2; In the k-th triangular carrier (20) period, the expression of the second sawtooth carrier (39) is v _saw2 (t): The second sawtooth carrier (39) connects the positive input of the sixth comparator (42) and the negative input of the seventh comparator (43), the output of the absolute value module (3) is |v _m (k)|, connected To an input end of the third adder (40), the offset v ₁ -V _t is input to the other input end of the third adder (40), and the output end of the third adder (40) is connected to the sixth comparator The negative input terminal of (42) and an input terminal of the fourth adder (41), the reverse modulation wave increment v ₃ connects the other input end of the fourth adder (41), the fourth adder (41) The output end connects the positive input end of the seventh comparator (43), the output end of the sixth comparator (42) and the seventh comparator (43) connects two input ends of the second AND gate (44) respectively, the second The output terminal of the AND gate (44) is connected to the input terminal of the seventh rising edge delay module (46) and the fifth inverter (45), and the output terminal of the fifth inverter (45) is connected to the eighth rising edge delay module. Module (47), the output terminal of the seventh rising edge delay module (46) is the port 2 of the reverse zero voltage pulse module (8), outputting the reverse bridge arm short circuit signal, the eighth rising edge delay module (47) The output terminal is port 3 of the reverse zero voltage pulse module (8), which outputs the reverse modulation signal of the auxiliary switch. 6. The bidirectional zero-voltage switching modulation method of a single-phase DC-AC converter according to any one of claims 3 to 5, characterized in that the first rising edge delay module (26), the second Rising edge delay module (27), third rising edge delay module (28), fourth rising edge delay module (29), fifth rising edge delay module (37), sixth rising edge delay module ( 38), the seventh rising edge delay module (47), the function of the eighth rising edge delay module (48) is to delay the rising edge of the module input signal, and the output signal is equal to the input signal at the rest of the time, the first The rising edge delay of the first rising edge delay module (26), the second rising edge delay module (27), the third rising edge delay module (28), and the fourth rising edge delay module (29) is t _d0 , the rising edge delay of the fifth rising edge delay module (37) is t _d4 , the rising edge delay of the sixth rising edge delay module (38) is t _d5 , and the rising edge delay of the seventh rising edge delay module (47) The rising edge delay is _td6 , and the rising edge delay of the eighth rising edge delay module (48) is _td7 ; and must satisfy: