CN107546304B

CN107546304B - light-emitting element

Info

Publication number: CN107546304B
Application number: CN201710133334.XA
Authority: CN
Inventors: 陈昭兴; 王佳琨; 庄文宏; 曾咨耀; 吕政霖; 许启祥; 蒋宗勋; 胡柏均
Original assignee: Epistar Corp
Current assignee: Epistar Corp
Priority date: 2016-06-28
Filing date: 2017-03-08
Publication date: 2021-04-06
Anticipated expiration: 2037-03-08
Also published as: US10361342B2; DE102017114215A1; CN113113517B; TWI692115B; CN107546304A; TW201801341A; CN113113517A; US20170373226A1

Abstract

The invention discloses a light-emitting element, comprising a semiconductor lamination layer which is provided with a first semiconductor layer, a second semiconductor layer and an active layer positioned between the first semiconductor layer and the second semiconductor layer; a first bonding pad electrically connected to the first semiconductor layer; a second bonding pad electrically connected to the second semiconductor layer; and a metal layer on the semiconductor stack, wherein the metal layer surrounds the sidewalls of the second pad, and the metal layer is spaced apart from the second pad by a distance.

Description

Light emitting element

Technical Field

The present invention relates to a light emitting device, and more particularly, to a light emitting device including a semiconductor stack and a bonding pad on the semiconductor stack.

Background

Light-Emitting diodes (LEDs) are solid-state semiconductor Light-Emitting elements that have the advantages of low power consumption, low heat generation, long operating life, shock resistance, small size, fast response speed, and good optoelectronic properties, such as stable emission wavelength. Therefore, the light emitting diode is widely applied to household appliances, equipment indicator lamps, photoelectric products and the like.

Disclosure of Invention

The light-emitting element comprises a semiconductor lamination layer which is provided with a first semiconductor layer, a second semiconductor layer and an active layer positioned between the first semiconductor layer and the second semiconductor layer; a first bonding pad electrically connected to the first semiconductor layer; a second bonding pad electrically connected to the second semiconductor layer; and a metal layer on the semiconductor stack, wherein the metal layer surrounds the sidewalls of the second pad, and the metal layer is spaced apart from the second pad by a distance.

The light-emitting element comprises a semiconductor lamination layer which is provided with a first semiconductor layer, a second semiconductor layer and an active layer positioned between the first semiconductor layer and the second semiconductor layer; a first contact layer on the semiconductor stack; a first bonding pad including a side edge on the first contact layer; a second bonding pad on the semiconductor stack; and an insulating layer, the insulating layer includes a first part covered by the first pad, and a connecting part adjacent to the side of the first pad, wherein the insulating layer includes an opening between the first part and the connecting part to expose the first contact layer, the opening is composed of a first side of the first part and a side of the connecting part, and a distance between the side of the first pad and the first side of the first part or the side of the connecting part is less than 100 μm.

Drawings

Fig. 1 to 9B are schematic diagrams illustrating a method for manufacturing a light emitting device 1 and a structure of the light emitting device 1 according to an embodiment of the invention;

fig. 10A is a top view of a light emitting device 2 according to an embodiment of the present invention;

fig. 10B is a cross-sectional view of a light emitting device 2 according to an embodiment of the present invention;

fig. 11 is a schematic structural diagram of a light-emitting device 3 according to an embodiment of the invention;

fig. 12 is a schematic structural diagram of a light-emitting device 4 according to an embodiment of the invention.

Description of the symbols

1, 2 light emitting element

3, 4 light emitting device

11a substrate

10a semiconductor stack

101a first semiconductor layer

102a second semiconductor layer

103a active layer

100a hole part

102s surface

1011a first surface

1012a second surface

111a surround part

20a first insulating layer

200a first insulating layer surrounding area

201a first insulating layer footprint

202a first insulating layer opening

203a first insulating layer opening

30a transparent conductive layer

301a transparent conductive layer outer edge

40a reflective layer

401a outer edge of reflective layer

41a barrier layer

411a outer edge of barrier layer

50a second insulating layer

501a, 502a second insulating layer opening

60a contact layer

600a thimble region

601a first contact layer

602a second contact layer

70a third insulating layer

701a, 702a third insulating layer opening

80a, 80b first pads

90a, 90b second pad

801a, 902a side edge

811b first convex part

812b first recess

911b first recess

7000a connection

7011a first part

7022A second part

70001, 70002 side

70111 first edge

70222 second side

912b second recess

1000a semiconductor structure

1001a second outer side wall

1002a inner side wall

1003a first outer side wall

51 packaging substrate

511 first gasket

512 second gasket

53 insulating part

54 reflective structure

602 lampshade

604 reflecting mirror

606 bearing part

608 luminous unit

610 luminous module

612 lamp holder

614 Heat sink

616 connection part

618 electric connection element

Detailed Description

In order to make the description of the present invention more complete and complete, reference is made to the following description of the embodiments taken in conjunction with the accompanying drawings. However, the following examples are provided to illustrate the light-emitting element of the present invention, and the present invention is not limited to the following examples. The dimensions, materials, shapes, relative arrangements and the like of the constituent elements described in the embodiments of the present invention are not limited to the above description, and the scope of the present invention is not limited to these, but is merely illustrative. The sizes, positional relationships, and the like of the components shown in the drawings are exaggerated for clarity. In the following description, the same or similar members are denoted by the same names and symbols for the sake of appropriately omitting detailed description.

Fig. 1 to 9B illustrate a method for manufacturing a light emitting device 1 and a structure thereof according to an embodiment of the present invention.

As shown in fig. 1, the method for manufacturing the light emitting device 1 includes the steps of forming a semiconductor stack 10a, which includes providing a substrate 11 a; and forming a semiconductor stack 10a on the substrate 11a, wherein the semiconductor stack 10a includes a first semiconductor layer 101a, a second semiconductor layer 102a, and an active layer 103a between the first semiconductor layer 101a and the second semiconductor layer 102 a.

In one embodiment of the present invention, the substrate 11a is a growth substrate including a gallium arsenide (GaAs) wafer for growing aluminum gallium indium phosphide (AlGaInP) or sapphire (Al) wafer for growing indium gallium nitride (InGaN)₂O₃) A wafer, a gallium nitride (GaN) wafer, or a silicon carbide (SiC) wafer.

In an embodiment of the present invention, a semiconductor stack 10a having electro-optical characteristics, such as a light-emitting (light-emitting) stack, is formed on a substrate 11a by a Metal Organic Chemical Vapor Deposition (MOCVD), Molecular Beam Epitaxy (MBE), hydride vapor deposition (HVPE), Physical Vapor Deposition (PVD) or ion plating method, wherein the PVD method includes a Sputtering (Sputtering) or an evaporation (evaporation) method. The first semiconductor layer 101a and the second semiconductor layer 102a may be cladding layers (cladding layers) or confining layers (confining layers), which have different conductivity types, electrical properties, polarities, or doped elements to provide electrons or holes, for example, the first semiconductor layer 101a is an n-type electrical semiconductor, and the second semiconductor layer 102a is a p-type electrical semiconductor. The active layer 103a is formed between the first semiconductor layer 101a and the second semiconductor layer 102a, and electrons and holes are recombined in the active layer 103a under a current driving, so that electric energy is converted into light energy to emit light. The wavelength of light emitted from the light-emitting element 1 is adjusted by changing the physical and chemical composition of one or more layers of the stacked semiconductor layers 10 a. The material of the semiconductor stack 10a includes a group III-V semiconductor material, such as Al_xIn_yGa_(1-x-y)N or Al_xIn_yGa_(1-x-y)P, wherein x is more than or equal to 0, and y is less than or equal to 1;(x + y) is less than or equal to 1. According to the material of the active layer 103a, when the semiconductor stack 10a is an AlInGaP material, the semiconductor stack can emit red light with a wavelength between 610nm and 650nm, green light with a wavelength between 530nm and 570nm, when the semiconductor stack 10a is an InGaN material, the semiconductor stack can emit blue light with a wavelength between 450nm and 490nm, or when the semiconductor stack 10a is an AlGaN material or an AlInGaN material, the semiconductor stack can emit ultraviolet light with a wavelength between 400nm and 250 nm. The active layer 103a may be a Single Heterostructure (SH), a Double Heterostructure (DH), a double-side double heterostructure (DDH), a multi-quantum well (MQW). The material of the active layer 103a may be a neutral, p-type or n-type conductivity semiconductor.

In an embodiment of the present invention, PVD aluminum nitride (AlN) may be used as a buffer layer formed between the semiconductor stack 10a and the substrate 11a to improve the epitaxial quality of the semiconductor stack 10 a. In one embodiment, the target material used to form PVD aluminum nitride (AlN) is comprised of aluminum nitride. In another embodiment, a target comprised of aluminum is used that reacts with the aluminum target to form aluminum nitride in the presence of a nitrogen source.

As shown in the top view of fig. 2A and the cross-sectional view of fig. 2B along the line a-a' of fig. 2A, after the semiconductor stack 10a is formed on the substrate 11a, the method of manufacturing the light emitting element 1 includes a step of forming a mesa. The semiconductor stack 10a is patterned by photolithography and etching, portions of the second semiconductor layer 102a and the active layer 103a are removed, one or more semiconductor structures 1000a are formed, a surrounding portion 111a is disposed around the one or more semiconductor structures 1000a to expose a first surface 1011a of the first semiconductor layer 101a, and one or more hole portions 100a are disposed to expose a second surface 1012a of the first semiconductor layer 101 a.

In an embodiment of the invention, the plurality of semiconductor structures 1000a may be separated from each other to expose a surface 11s of the substrate 11a or connected to each other through the first semiconductor layer 101 a. The one or more semiconductor structures 1000a each comprise a first outer sidewall 1003a, a second outer sidewall 1001a, and one or more inner sidewalls 1002a, wherein the first outer sidewall 1003a is a sidewall of the first semiconductor layer 101a, the second outer sidewall 1001a is a sidewall of the active layer 103a and/or the second semiconductor layer 102a, one end of the second outer sidewall 1001a is connected to a surface 102s of the second semiconductor layer 102a, and the other end of the second outer sidewall 1001a is connected to the first surface 1011a of the first semiconductor layer 101 a; one end of the inner sidewall 1002a is connected to the surface 102s of the second semiconductor layer 102a, and the other end of the inner sidewall 1002a is connected to the second surface 1012a of the first semiconductor layer 101 a. As shown in fig. 2B, an obtuse angle or a right angle is formed between the inner sidewall 1002a of the semiconductor structure 1000a and the second surface 1012a of the first semiconductor layer 101a, an obtuse angle or a right angle is formed between the first outer sidewall 1003a of the semiconductor structure 1000a and the surface 11s of the substrate 11a, and an obtuse angle or a right angle is formed between the second outer sidewall 1001a of the semiconductor structure 1000a and the first surface 1011a of the first semiconductor layer 101 a.

In an embodiment of the invention, the surrounding portion 111a is a rectangular or polygonal ring shape viewed from the top view of the light emitting device 1 shown in fig. 2A.

In an embodiment of the invention, the opening shape of the hole 100a includes a circle, an ellipse, a rectangle, a polygon, or an arbitrary shape. The plurality of hole portions 100a may be arranged in a plurality of rows, and the hole portions 100a of any two adjacent rows or each two adjacent rows may be aligned with or offset from each other.

In an embodiment of the invention, the plurality of hole portions 100a may be arranged in a first row and a second row, two adjacent hole portions 100a in the same row include a first shortest distance therebetween, and a second shortest distance includes between the hole portions 100a in the first row and the hole portions 100a in the second row, wherein the first shortest distance is greater than or less than the second shortest distance. When an external current is injected into light-emitting element 1, the light field distribution of light-emitting element 1 can be uniformized and the forward voltage of light-emitting element 1 can be reduced by the dispersed arrangement of hole portions 100 a.

In an embodiment of the invention, the plurality of hole portions 100a may be arranged in a first row, a second row and a third row, a first shortest distance is included between the hole portions 100a on the first row and the hole portions 100a on the second row, and a second shortest distance is included between the hole portions 100a on the second row and the hole portions 100a on the third row, wherein the first shortest distance is smaller than the second shortest distance. When an external current is injected into light-emitting element 1, the light field distribution of light-emitting element 1 can be uniformized and the forward voltage of light-emitting element 1 can be reduced by the dispersed arrangement of hole portions 100 a.

In an embodiment of the invention, when the light emitting device 1 includes a side longer than 30mil, the light emitting device 1 includes a surrounding portion 111a and one or more hole portions 100 a. A first shortest distance is included between two adjacent hole portions 100a, and a second shortest distance is included between any one of the hole portions 100a and the first outer sidewall 1003a of the first semiconductor layer 101a, wherein the first shortest distance is smaller than the second shortest distance. When an external current is injected into the light-emitting element 1, the surrounding portion 111a and one or more hole portions 100a are distributed, so that the optical field distribution of the light-emitting element 1 is uniformized, and the forward voltage of the light-emitting element 1 can be reduced.

In an embodiment of the invention, when the light emitting device 1 includes a side less than 30mil, the light emitting device 1 includes the surrounding portion 111a but does not include the hole portion 100a to increase an area of the active layer capable of emitting light. When an external current is injected into the light emitting device 1, the surrounding portion 111a surrounds the semiconductor structure 1000a, so that the optical field distribution of the light emitting device 1 is uniform, and the forward voltage of the light emitting device 1 can be reduced.

Following the step of forming the mesa, as shown in the top view of fig. 3A and the cross-sectional view of fig. 3B along the line a-a' of fig. 3A, the method of manufacturing the light emitting device 1 includes a step of forming a first insulating layer. A first insulating layer 20a is formed on the semiconductor structure 1000a by a physical vapor deposition method or a chemical vapor deposition method, and the first insulating layer 20a is patterned by photolithography and etching, a first insulating layer surrounding region 200a is formed to cover a portion of the first surface 1011a of the surrounding portion 111a and cover the second outer sidewall 1001a of the semiconductor structure 1000a, a group of first insulating layer covering regions 201a is formed to cover the second surfaces 1012a of the plurality of hole portions 100a and cover the inner sidewalls 1002a of the semiconductor structure 1000a, and a first insulating layer opening 202a is formed to expose the surface 102s of the second semiconductor layer 102 a. The first insulating layer footprints 201a of a group are each otherAnd are separated and respectively correspond to the plurality of holes 100 a. The first insulating layer 20a may have a single layer or a stacked layer structure. When the first insulating layer 20a is a single-layer structure, the first insulating layer 20a can protect sidewalls of the semiconductor structure 1000a to prevent the active layer 103a from being damaged by a subsequent manufacturing process. When the first insulating layer 20a has a stacked structure, the first insulating layer 20a may selectively reflect light of a specific wavelength by alternately stacking two or more materials having different refractive indexes to form a bragg reflector (DBR) structure, in addition to protecting the semiconductor structure 1000 a. The first insulating layer 20a is made of a non-conductive material, and includes an organic material, such as Su8, benzocyclobutene (BCB), Perfluorocyclobutane (PFCB), Epoxy (Epoxy), Acrylic Resin (Acrylic Resin), cyclic olefin Polymer (COC), polymethyl methacrylate (PMMA), polyethylene terephthalate (PET), Polycarbonate (PC), Polyetherimide (polyethylimide), Fluorocarbon Polymer (Fluorocarbon Polymer), or an inorganic material, such as silicon gel (Silicone), Glass (Glass), or a dielectric material, such as aluminum oxide (Al)₂O₃) Silicon nitride (SiN)_x) Silicon oxide (SiO)_x) Titanium oxide (TiO)_x) Or magnesium fluoride (MgF)_x)。

In an embodiment of the invention, following the first insulating layer forming step, as shown in the top view of fig. 4A and the cross-sectional view of fig. 4B along the line a-a' of fig. 4A, the manufacturing method of the light emitting device 1 includes a transparent conductive layer forming step. A transparent conductive layer 30a is formed in the first insulating layer opening 202a by physical vapor deposition or chemical vapor deposition, wherein an outer edge 301a of the transparent conductive layer 30a is spaced apart from the first insulating layer 20a to expose a portion of the surface 102s of the second semiconductor layer 102 a. Since the transparent conductive layer 30a is formed over substantially the entire surface of the second semiconductor layer 102a and is in contact with the second semiconductor layer 102a, current is uniformly diffused throughout the second semiconductor layer 102a through the transparent conductive layer 30 a. The material of the transparent conductive layer 30a includes a material transparent to light emitted from the active layer 103a, such as Indium Tin Oxide (ITO) or Indium Zinc Oxide (IZO).

In another embodiment of the present invention, after the step of forming the mesa, a step of forming a transparent conductive layer may be performed, and then a step of forming a first insulating layer may be performed.

In another embodiment of the present invention, after the step of forming the mesa, the step of forming the first insulating layer may be omitted and the step of forming the transparent conductive layer may be directly performed.

In an embodiment of the invention, following the transparent conductive layer forming step, as shown in the top view of fig. 5A, the partially enlarged view of the area B of fig. 5B, the partially enlarged view of the area C of fig. 5C, the cross-sectional view of fig. 5D along the line a-a' of fig. 5A, and the partially enlarged view of the area E of fig. 5E, the manufacturing method of the light emitting device 1 includes a reflective structure forming step. A reflective structure 400 is directly formed on the transparent conductive layer 30a by physical vapor deposition or chemical vapor deposition, wherein the reflective structure 400 includes a reflective layer 40a and/or a barrier layer 41a, and the reflective layer 40a is located between the transparent conductive layer 30a and the barrier layer 41 a. In an embodiment of the present invention, the outer edge 401a of the reflective layer 40a may be disposed inside, outside, or in coincident alignment with the outer edge 301a of the transparent conductive layer 30a, and the outer edge 411a of the barrier layer 41a may be disposed inside, outside, or in coincident alignment with the outer edge 401a of the reflective layer 40a, of the outer edge 301a of the transparent conductive layer 30 a. As shown in fig. 5B, the partial enlarged view of fig. 5C, and the partial enlarged view of fig. 5E, the outer edge 401a of the reflective layer 40a does not overlap the outer edge 301a of the transparent conductive layer 30a, and the outer edge 301a of the transparent conductive layer 30a is covered by the reflective layer 40a, so that the barrier layer 41a does not contact the transparent conductive layer 30 a.

In another embodiment of the present invention, the formation of the transparent conductive layer can be omitted, and after the step of forming the mesa or the step of forming the first insulating layer, the step of forming the reflective structure is directly performed, for example, the reflective layer 40a and/or the barrier layer 41a are directly formed on the second semiconductor layer 102a, and the reflective layer 40a is located between the second semiconductor layer 102a and the barrier layer 41 a.

The reflective layer 40a may be a single layer or a stacked layer structure, such as a bragg reflective structure. The material of the reflective layer 40a includes a metal material having a high reflectance, for example, a metal such as silver (Ag), aluminum (Al), or rhodium (Rh), or an alloy of the above materials. The term "have a high reflectance" as used herein means that the light-emitting element 1 has a reflectance of 80% or more with respect to the wavelength of light emitted therefrom. In an embodiment of the present invention, the barrier layer 41a covers the reflective layer 40a to prevent the surface of the reflective layer 40a from being oxidized to deteriorate the reflectivity of the reflective layer 40 a. The material of the barrier layer 41a includes a metal material, for example, a metal such as titanium (Ti), tungsten (W), aluminum (Al), indium (In), tin (Sn), nickel (Ni), platinum (Pt), or an alloy of the above materials. The barrier layer 41a may have a single layer or a stacked structure, such as titanium (Ti)/aluminum (Al), and/or titanium (Ti)/tungsten (W). In an embodiment of the invention, the barrier layer 41a includes a laminated structure of titanium (Ti)/tungsten (W) on a side close to the reflective layer 40a, and includes a laminated structure of titanium (Ti)/aluminum (Al) on a side far from the reflective layer 40 a. In an embodiment of the invention, the materials of the reflective layer 40a and the barrier layer 41a include gold (Au) or a metal material other than copper (Cu), so as to prevent the metal in the package solder, such as tin (Sn), from diffusing into the light emitting element 1 and forming a co-gold with the metal material inside the light emitting element 1, such as gold (Au) or copper (Cu), during the subsequent manufacturing process, which may cause the structural deformation of the light emitting element 1.

In an embodiment of the invention, following the formation step of the reflective structure, as shown in the top view of fig. 6A and the cross-sectional view of fig. 6B along the line a-a' of fig. 6A, the manufacturing method of the light emitting device 1 includes a second insulating layer forming step. Forming a second insulating layer 50a on the semiconductor structure 1000a by physical vapor deposition or chemical vapor deposition, patterning the second insulating layer 50a by photolithography and etching, to form one or a first group of second insulating layer openings 501a to expose the first semiconductor layer 101a, and one or a second group of second insulating layer openings 502a to expose the reflective layer 40a or the barrier layer 41a, wherein, in the process of patterning the second insulating layer 50a, the first insulating layer surrounding region 200a covering the surrounding portion 111a and the first insulating layer covering region 201a of the first group in the hole portion 100a in the first insulating layer forming step are partially etched and removed to expose the first semiconductor layer 101a, a first group of first insulating layer openings 203a is formed in the hole 100a to expose the first semiconductor layer 101 a.

In the present embodiment, as shown in the top view of fig. 6A and the cross-sectional view of fig. 6B, the first group of second insulating layer openings 501a includes a shape or number corresponding to the shape or number of the hole portions 100 a. The second insulating layer opening 501a on the first semiconductor layer 101a and the second insulating layer opening 502a on the second semiconductor layer 102a have different shapes, widths, and numbers. The top view opening of the second insulating

layer openings

501a, 502a is shaped as a ring opening.

In the present embodiment, as shown in fig. 6A, the second insulating layer openings 501a on the first semiconductor layer 101a are separated from each other and respectively correspond to the plurality of hole portions 100a, and the second insulating layer openings 502a on the second semiconductor layer 102a are located on a side close to the substrate 11a, for example, on a left side or a right side of a center line C-C' of the substrate 11 a. The second insulating layer 50a may have a single layer or a stacked structure. When the second insulating layer 50a is a single-layer structure, the second insulating layer 50a can protect sidewalls of the semiconductor structure 1000a to prevent the active layer 103a from being damaged by a subsequent manufacturing process. When the second insulating layer 50a has a stacked structure, the second insulating layer 50a may include more than two materials having different refractive indexes that are alternately stacked to form a bragg reflector (DBR) structure that selectively reflects light having a specific wavelength. The second insulating layer 50a is made of a non-conductive material including an organic material, such as Su8, benzocyclobutene (BCB), Perfluorocyclobutane (PFCB), Epoxy (Epoxy), Acrylic Resin (Acrylic Resin), cyclic olefin Polymer (COC), polymethyl methacrylate (PMMA), polyethylene terephthalate (PET), Polycarbonate (PC), Polyetherimide (polyethylimide), Fluorocarbon Polymer (fluorosiloxane Polymer), or an inorganic material, such as silica gel (Silicone), Glass (Glass), or a dielectric material, such as aluminum oxide (Al)₂O₃) Silicon nitride (SiN)_x) Silicon oxide (SiO)_x) Titanium oxide (TiO)_x) Or magnesium fluoride (MgF)_x)。

Following the second insulating layer forming step, in an embodiment of the invention, as shown in the top view of fig. 7A and the cross-sectional view of fig. 7B along the line a-a' of fig. 7A, the manufacturing method of the light emitting device 1 includes a contact layer forming step. A contact layer 60a is formed on the semiconductor stack 10a by physical vapor deposition or chemical vapor deposition, and the contact layer 60a is patterned by photolithography and etching to form a first contact layer 601a, a second contact layer 602a and a tip region 600 a. The first contact layer 601a is filled in the hole portion 100a and covers the second insulating layer opening 501a to contact the first semiconductor layer 101a, and extends to cover the second insulating layer 50a and a portion of the surface of the second semiconductor layer 102a, wherein the first contact layer 601a is insulated from the second semiconductor layer 102a by the second insulating layer 50 a. The second contact layer 602a is formed in the annular opening 502a of the second insulating layer 50a to contact the partially reflective layer 40a and/or the barrier layer 41 a.

In an embodiment of the present invention, the first contact layer 601a, the second contact layer 602a and the pin field 600a are separated from each other by a distance. The second contact layer 602a is partially extended and formed in the annular opening 502a of the second insulating layer 50a, the sidewall 6021a of the second contact layer 602a is separated from the sidewall 5021a of the annular opening 502a by a distance, and the sidewall 6011a of the first contact layer 601a is separated from the sidewall 6021a of the second contact layer 602a by a distance, so that the first contact layer 601a is not connected to the second contact layer 602a, and the first contact layer 601a and the second contact layer 602a are electrically isolated by a portion of the second insulating layer 50 a. In a top view of the light emitting element 1, the first contact layer 601a covers the surrounding portion 111a of the semiconductor stacked layer 10a, so that the first contact layer 601a surrounds the plurality of sidewalls of the second contact layer 602 a.

In an embodiment of the invention, the first contact layer 601a passes through the surrounding portion 111a and the hole portion 100a to contact the first semiconductor layer 101 a. When an external current is injected into the light emitting element 1, a part of the current is conducted to the first semiconductor layer 101a through the surrounding portion 111a, and another part of the current is conducted to the first semiconductor layer 101a through the plurality of hole portions 100 a.

As shown in FIG. 7A, the second contact layer 602a is adjacent to one side of the substrate 11a, such as the left or right side of the centerline C-C' of the substrate 11 a. The tip region 600a is located at a geometric center on the stack of semiconductor layers 10 a. The thimble region 600a is not connected to the first contact layer 601a and the second contact layer 602a, and is electrically isolated from the first contact layer 601a and the second contact layer 602a, and the thimble region 600a comprises the same material as the first contact layer 601a and/or the second contact layer 602 a. The pin field 600a serves as a structure for protecting the epitaxial layer from damage caused by external forces, such as probe pins or pins, during the subsequent fabrication processes of the epitaxial layer, such as die separation, die testing, and packaging. The shape of the thimble region 600a may include a rectangle, an ellipse, or a circle.

In an embodiment of the present invention, the thimble region 600a is located at a geometric center on the stack of semiconductor layers 10 a. The thimble region 600a is connected to the first contact layer 601a or the second contact layer 602a, and the thimble region 600a comprises the same material as the first contact layer 601a and/or the second contact layer 602 a.

In one embodiment of the present invention, the contact layer 60a may be a single layer or a stacked layer. In order to reduce the resistance In contact with the first semiconductor layer 101a, the material of the contact layer 60a includes a metal material, for example, chromium (Cr), titanium (Ti), tungsten (W), gold (Au), aluminum (Al), indium (In), tin (Sn), nickel (Ni), platinum (Pt), or an alloy of the above materials. The material of the contact layer 60a includes a metal material other than gold (Au) and copper (Cu), so that it can be avoided that, in a subsequent manufacturing process, a metal in the package solder, for example, tin (Sn), diffuses into the light emitting element 1 to form a co-gold with the metal material inside the light emitting element 1, for example, gold (Au) and copper (Cu), which results in structural deformation of the light emitting element 1.

In one embodiment of the present invention, the material of the contact layer 60a includes a metal with high reflectivity, such as aluminum (Al) or platinum (Pt).

In an embodiment of the present invention, a side of the contact layer 60a contacting the first semiconductor layer 101a includes chromium (Cr) or titanium (Ti) to increase a bonding strength of the contact layer 60a and the first semiconductor layer 101 a.

In an embodiment of the invention, following the contact layer forming steps shown in fig. 7A and 7B, the method for manufacturing the light emitting device 1 includes a third insulating layer forming step, as shown in the top view of fig. 8A and the cross-sectional view of fig. 8B along the line a-a' of fig. 8A, forming a third insulating layer 70a on the semiconductor structure 1000a by physical vapor deposition or chemical vapor deposition, and patterning the third insulating layer 70a by photolithography and etching to form third insulating

layer openings

701a, 702a to expose the first contact layer 601a and the second contact layer 602a, respectively; forming a first portion 7011a of the third insulating layer 70a, the first portion 7011a being surrounded by the third insulating layer opening 701 a; forming a second portion 7022a of the third insulating layer 70a, the second portion 7022a being surrounded by the third insulating layer opening 702 a; and forming a connection portion 7000a of the third insulating layer 70a between the third insulating layer opening 701a and the third insulating layer opening 702 a. As shown in fig. 8A, the connection portions 7000a of the third insulating layer 70a surround the first portion 7011a and the second portion 7022a of the third insulating layer 70a, respectively. As shown in fig. 8B, the connection portions 7000a of the third insulating layer 70a are located at both sides of the first portion 7011a of the third insulating layer 70a, and the connection portions 7000a of the third insulating layer 70a are located at both sides of the second portion 7022a of the third insulating layer 70 a. The third insulating layer opening 701a is formed by a first side 70111 of the first portion 7011a of the third insulating layer 70a and a side 70001 of the connecting portion 7000a of the third insulating layer 70a, and the third insulating layer opening 702a is formed by a second side 70222a of the second portion 7022a of the third insulating layer 70a and another side 70002a of the connecting portion 7000a of the third insulating layer 70 a.

In an embodiment of the invention, the first contact layer 601a on the second semiconductor layer 102a is sandwiched between the second insulating layer 50a and the third insulating layer 70 a. The tip region 600a is surrounded and covered by the connecting portion 7000a of the third insulating layer 70 a.

In an embodiment of the invention, as shown in fig. 8A, the third insulating

layer openings

701a, 702a are staggered from the plurality of hole portions 100a, and do not overlap each other. In other words, the third insulating layer opening 701a and the second insulating layer opening 501a are shifted from each other and do not overlap with each other. The third insulating layer opening 702a may be surrounded by the second insulating layer opening 502 a. In the top view of fig. 8A, the third insulating

layer openings

701a, 702a are located on both sides of the center line C-C ' of the substrate 11a, e.g., the third insulating layer opening 701a is located on the right side of the center line C-C ' of the substrate 11a and the third insulating layer opening 702a is located on the left side of the center line C-C ' of the substrate 11 a.

In an embodiment of the present invention, the third insulating layer opening 701a includes a width smaller than that of the second insulating layer opening 501a, and the third insulating layer opening 702a includes a width smaller than that of the second insulating layer opening 502 a.

In an embodiment of the present invention, the third insulating layer opening 701a includes a width greater than that of the second insulating layer opening 501a, and the third insulating layer opening 702a includes a width greater than that of the second insulating layer opening 502 a.

The third insulating layer 70a may have a single layer or a stacked layer structure. When the third insulating layer 70a has a stacked structure, the third insulating layer 70a may include more than two materials having different refractive indexes that are alternately stacked to form a bragg reflector (DBR) structure that selectively reflects light of a specific wavelength. The third insulating layer 70a is made of a non-conductive material, and includes an organic material, such as Su8, benzocyclobutene (BCB), Perfluorocyclobutane (PFCB), Epoxy (Epoxy), Acrylic Resin (Acrylic Resin), cyclic olefin Polymer (COC), polymethyl methacrylate (PMMA), polyethylene terephthalate (PET), Polycarbonate (PC), Polyetherimide (polyethylimide), Fluorocarbon Polymer (Fluorocarbon Polymer), or an inorganic material, such as silicon gel (Silicone), Glass (Glass), or a dielectric material, such as aluminum oxide (Al)₂O₃) Silicon nitride (SiN)_x) Silicon oxide (SiO)_x) Titanium oxide (TiO)_x) Or magnesium fluoride (MgF)_x)。

Following the third insulating layer forming step, the manufacturing method of the light emitting device 1 includes a bonding pad forming step. As shown in the top view of fig. 9A and the cross-sectional view of fig. 9B along the line a-a' of fig. 9A, a first bonding pad 80a and a second bonding pad 90a are formed on the one or more semiconductor structures 1000a by electroplating, pvd, cvd, or the like. In the top view of fig. 9A, the first pad 80a is near one side of the substrate 11a, e.g., the right side of the centerline C-C 'of the substrate 11a, and the second pad 90a is near the other side of the substrate 11a, e.g., the left side of the centerline C-C' of the substrate 11 a. The first pad 80a covers the third insulating layer opening 701a to contact the first contact layer 601a, and is electrically connected to the first semiconductor layer 101a through the first contact layer 601a and the hole portion 100 a. The second pad 90a covers the third insulating layer opening 702a, contacts the second contact layer 602a, and is electrically connected to the second semiconductor layer 102a through the second contact layer 602a, the reflective layer 40a, or the barrier layer 41 a. As shown in fig. 9A, the first pad 80a and the second pad 90a do not cover any of the holes 100a, and the hole 100a is formed in a region other than the first pad 80a and the second pad 90 a.

In an embodiment of the present invention, the first bonding pad 80a includes a size, which may be a width or an area, the same as or different from a size of the second bonding pad 90 a.

In one embodiment of the present invention, as shown in fig. 9B, the first pad 80a includes a side 801a, and the side 801a of the first pad 80a is separated from the first side 70111 of the first portion 7011a of the third insulating layer 70a or the side 70001 of the connection portion 7000a of the third insulating layer 70a by a distance, which is preferably less than 100 μm, more preferably less than 50 μm, and most preferably less than 20 μm. The second pad 90a includes a side 902a, and the side 902a of the second pad 90a is spaced apart from the second side 70222a of the second portion 7022a of the third insulating layer 70a or the other side 70002a of the connecting portion 7000a of the third insulating layer 70a by a distance which is preferably less than 100 μm, more preferably less than 50 μm, and most preferably less than 20 μm.

In an embodiment of the present invention, in a top view of the light-emitting element 1, the side 801a of the first pad 80a is arranged along the

sides

70001 and 70111 of the opening 701a in the third insulating layer, and the side 902a of the second pad 90a is arranged along the

sides

70002 and 70222a of the opening 702a in the third insulating layer.

Fig. 9A is a top view of the light emitting element 1, and fig. 9B is a cross-sectional view of the light emitting element 1. The light emitting device 1 according to the present embodiment is a flip-chip light emitting diode device. The light-emitting element 1 includes a substrate 11 a; one or more semiconductor structures 1000a are located on the substrate 11 a; the surrounding portion 111a surrounds the one or more semiconductor structures 1000 a; and the first pad 80a and the second pad 90a are located on the semiconductor stack 10 a. The one or more semiconductor structures 1000a each comprise a semiconductor stack 10a, the semiconductor stack 10a comprising a first semiconductor layer 101a, a second semiconductor layer 102a, and an active layer 103a between the first semiconductor layer 101a and the second semiconductor layer 102 a.

As shown in fig. 9A and 9B, the periphery of one or more semiconductor structures 1000a is surrounded by a surrounding portion 111 a. In an embodiment of the invention, the plurality of semiconductor structures 1000a may be connected to each other through the first semiconductor layer 101a, and the surrounding portion 111a includes the first surface 1011a of the first semiconductor layer 101a to surround the plurality of semiconductor structures 1000 a. In another embodiment of the present invention, the plurality of semiconductor structures 1000a may be separated from each other by a distance to expose a surface 11s of the substrate 11 a.

The light emitting device 1 further includes one or more holes 100a penetrating through the second semiconductor layer 102a and the active layer 103a to expose one or more second surfaces 1012a of the first semiconductor layer 101 a.

The light emitting device 1 further includes a first contact layer 601a formed on the first surface 1011a of the first semiconductor layer 101a to surround the periphery of the semiconductor structure 1000a and contact with the first semiconductor layer 101a for forming an electrical connection, and formed on one or more second surfaces 1012a of the first semiconductor layer 101a to cover the one or more holes 100a and contact with the first semiconductor layer 101a for forming an electrical connection; and a second contact layer 602a is formed on the surface 102s of the second semiconductor layer 102 a. In an embodiment of the invention, in a top view of the light emitting device 1 as shown in fig. 7A, the first contact layer 601a surrounds a plurality of sidewalls of the second contact layer 602 a.

In an embodiment of the present invention, the first pad 80a and/or the second pad 90a covers the plurality of semiconductor structures 1000 a.

In an embodiment of the invention, the forming positions of the first pad 80a and the second pad 90a are around the forming position of the hole 100a, so that the forming positions of the first pad 80a and the second pad 90a do not overlap the forming position of the hole 100 a.

In an embodiment of the invention, in a top view of the light emitting device 1, the shape of the first pad 80a is the same as that of the second pad 90a, for example, the shapes of the first pad 80a and the second pad 90a are rectangular, as shown in fig. 9A.

In an embodiment of the invention, the size of the first pad 80a is different from the size of the second pad 90a, for example, the area of the first pad 80a is larger or smaller than the area of the second pad 90 a. The material of the first and

second pads

80a and 90a includes a metal material, such as chromium (Cr), titanium (Ti), tungsten (W), aluminum (Al), indium (In), tin (Sn), nickel (Ni), platinum (Pt), or an alloy thereof. The first bonding pad 80a and the second bonding pad 90a may have a single-layer structure or a stacked structure. When the first bonding pad 80a and the second bonding pad 90a are stacked, the first bonding pad 80a includes a first upper layer bonding pad and a first lower layer bonding pad, and the second bonding pad 90a includes a second upper layer bonding pad and a second lower layer bonding pad. The upper layer bonding pad and the lower layer bonding pad have different functions respectively.

In one embodiment of the present invention, the function of the upper layer bonding pad is mainly used for bonding and forming the lead. The light emitting element 1 can be mounted on the package substrate in a flip chip form by an upper layer pad using solder (solder) or by eutectic bonding of, for example, AuSn material. The metal material of the upper pad includes a highly ductile material, for example, tin (Sn), nickel (Ni), cobalt (Co), iron (Fe), titanium (Ti), copper (Cu), gold (Au), tungsten (W), zirconium (Zr), molybdenum (Mo), tantalum (Ta), aluminum (Al), silver (Ag), platinum (Pt), palladium (Pd), rhodium (Rh), iridium (Ir), ruthenium (Ru), osmium (Os), or an alloy thereof. The upper layer bonding pad can be a single layer or a laminated structure of the materials. In an embodiment of the present invention, the material of the upper layer bonding pad includes nickel (Ni) and/or gold (Au), and the upper layer bonding pad is a single layer or a stacked layer structure.

In an embodiment of the present invention, the function of the lower layer pad forms a stable interface with the contact layer 60a, the reflective layer 40a, or the barrier layer 41a, for example, the interface bonding strength between the first lower layer pad and the first contact layer 601a is improved, or the interface bonding strength between the second lower layer pad and the reflective layer 40a or the barrier layer 41a is improved. Another function of the lower bonding pad is to prevent tin (Sn) in the solder or AuSn eutectic from diffusing into the reflective structure, destroying the reflectivity of the reflective structure. Therefore, the lower pad includes a metal material other than gold (Au) and copper (Cu), for example, a metal such as nickel (Ni), cobalt (Co), iron (Fe), titanium (Ti), tungsten (W), zirconium (Zr), molybdenum (Mo), tantalum (Ta), aluminum (Al), silver (Ag), platinum (Pt), palladium (Pd), rhodium (Rh), iridium (Ir), ruthenium (Ru), osmium (Os), or an alloy thereof, and may have a single layer or a stacked layer structure. In one embodiment of the present invention, the lower bonding pad comprises a titanium (Ti)/aluminum (Al) stack structure or a chromium (Cr)/aluminum (Al) stack structure.

In one embodiment of the present invention, in order to prevent tin (Sn) in the solder or AuSn eutectic from diffusing into the reflective structure, the reflectivity of the reflective structure is deteriorated. Therefore, the side of the first contact layer 601a contacting the first pad 80a includes a metal material selected from the group consisting of titanium (Ti) and platinum (Pt). The side of the second contact layer 602a contacting the second pad 90a includes a metal material selected from the group consisting of titanium (Ti) and platinum (Pt).

Fig. 10A is a top view of a light emitting device 2 according to an embodiment of the invention, and fig. 10B is a cross-sectional view of the light emitting device 2. Compared with the light emitting device 1 in the above embodiment, the light emitting device 2 further includes a metal layer 900b surrounding the sidewalls of the first pad 80b and/or the second pad 90b, and a first electrode bump 810b and a second electrode bump 910b respectively located above the first pad 80b and the second pad 90 b. In addition, since the light emitting element 2 and the light emitting element 1 have substantially the same structure, the light emitting element 2 in fig. 10B and the light emitting element 1 in fig. 9A to 9B have the same name and reference numeral structure, show the same structure, have the same material, or have the same function with respect to fig. 10A, and description thereof will be omitted or omitted.

The light emitting device 2 according to the present embodiment is a flip-chip light emitting diode device. The light emitting element 2 includes a substrate 11 a; one or more semiconductor structures 1000a are located on the substrate 11 a; the surrounding portion 111a surrounds the one or more semiconductor structures 1000 a; the first pad 80b and the second pad 90b are located on the semiconductor stack 10 a; and a first electrode bump 810b and a second electrode bump 910b respectively located above the first pad 80b and the second pad 90 b. The one or more semiconductor structures 1000a each comprise a semiconductor stack 10a, the semiconductor stack 10a comprising a first semiconductor layer 101a, a second semiconductor layer 102a, and an active layer 103a between the first semiconductor layer 101a and the second semiconductor layer 102 a.

As shown in fig. 10A and 10B, the periphery of one or more semiconductor structures 1000A is surrounded by a surrounding portion 111 a. In an embodiment of the invention, the plurality of semiconductor structures 1000a may be connected to each other through the first semiconductor layer 101a, and the surrounding portion 111a includes the first surface 1011a of the first semiconductor layer 101a to surround the plurality of semiconductor structures 1000 a. In another embodiment of the present invention, the plurality of semiconductor structures 1000a may be separated from each other by a distance to expose a surface 11s of the substrate 11 a.

The light emitting device 2 further includes one or more holes 100a penetrating through the second semiconductor layer 102a and the active layer 103a to expose one or more second surfaces 1012a of the first semiconductor layer 101 a.

The light emitting device 2 further includes a first contact layer 601a formed on the first surface 1011a of the first semiconductor layer 101a to surround the periphery of the semiconductor structure 1000a and contact with the first semiconductor layer 101a for forming an electrical connection, and formed on one or more second surfaces 1012a of the first semiconductor layer 101a to cover the one or more holes 100a and contact with the first semiconductor layer 101a for forming an electrical connection; and the second contact layer 602a is formed on the surface 102s of the second semiconductor layer 102a, and is electrically connected to the second semiconductor layer 102 a. In an embodiment of the invention, in a top view of the light emitting device 2, the first contact layer 601a surrounds a plurality of sidewalls of the second contact layer 602a, and the second contact layer 602a includes a size, such as an area, smaller than that of the first contact layer 601 a.

In an embodiment of the invention, the first pad 80b covers a part or all of the hole 100a and/or the second pad 90b covers a part or all of the hole 100 a. As shown in fig. 10A, the first pad 80b covers part of the hole 100A, and the second pad 90b does not cover any of the holes 100A.

When the light-emitting element is flip-chip mounted on the package substrate, the insulating layer on the surface of the light-emitting element is easily broken by an external force, so that solder or a eutectic-bonded material such as AuSn enters the inside of the light-emitting element through a crack in the insulating layer, and the light-emitting element fails. In an embodiment of the invention, the light emitting device 2 includes a metal layer 900b on the semiconductor stack 10a to protect an underlying insulating layer from being damaged by an external impact. As shown in fig. 10A, the metal layer 900b surrounds sidewalls of the second pad 90b, and the metal layer 900b is spaced apart from the second pad 90b by a distance. The metal layer 900b covers a portion of the hole portion 100a, and a portion of the first contact layer 601a is located under the metal layer 900b and insulated from the metal layer 900b by the third insulating layer 70 a.

In an embodiment of the present invention, the first bonding pad 80b, the second bonding pad 90b and the metal layer 900b are separated from each other by a distance and are not connected to each other.

In an embodiment of the invention, the light emitting device 2 includes a third insulating layer 70a, the third insulating layer 70a has one or

more openings

701a, 702a to expose the first contact layer 601a and the second contact layer 602a, respectively, wherein a space is located between the metal layer 900b and the second pad 90b to expose a portion of the surface of the third insulating layer 70 a.

In an embodiment of the invention, in a top view of the light emitting device 2, the shape of the first pad 80b is different from the shape of the second pad 90b, for example, the shape of the first pad 80b is rectangular, and the shape of the second pad 90b is comb-shaped.

In an embodiment of the invention, the first bonding pad 80b includes a size, such as an area, different from a size of the second bonding pad 90b in a top view of the light emitting device 2.

In an embodiment of the present invention, the sizes of the first pad 80b and the second pad 90b are different from the sizes of the first electrode bump 810b and the second electrode bump 910b, respectively, for example, the area of the first pad 80b is larger than the area of the first electrode bump 810b, and the area of the second pad 90b is larger than the area of the second electrode bump 910 b.

In an embodiment of the present invention, a distance between the first pad 80b and the second pad 90b is smaller than a distance between the first electrode bump 810b and the second electrode bump 910 b.

In an embodiment of the invention, in a top view of the light emitting device 2, the shape of the first electrode bump 810b is similar to or the same as the shape of the second electrode bump 910b, for example, the first electrode bump 810b and the second electrode bump 910b are comb-shaped, as shown in fig. 10A, the first electrode bump 810b has a plurality of first protrusions 811b and a plurality of first recesses 812b alternately connected to each other. The second electrode bump 910b has a plurality of second protrusions 911b and a plurality of second recesses 912b alternately connected to each other. The position of the first recess 812b of the first electrode bump 810b and the position of the second recess 912b of the second electrode bump 910b substantially correspond to the position of the hole 100 a. In other words, the width of the first concave portion 812b of the first electrode bump 810b or the width of the second concave portion 912b of the second electrode bump 910b is greater than the diameter of any one of the hole portions 100a, so that the first electrode bump 810b and the second electrode bump 910b do not cover any one of the hole portions 100a, and the first concave portion 812b of the first electrode bump 810b and the second concave portion 912b of the second electrode bump 910b bypass the hole portion 100a and are formed around the hole portion 100 a. In an embodiment of the invention, the plurality of first recesses 812b are substantially aligned with the plurality of second recesses 912b in a top view. In another embodiment of the present invention, the plurality of first concave portions 812b are offset from the plurality of second concave portions 912b in a top view.

In one embodiment of the present invention, when the light emitting device 2 is flip-chip mounted on the package substrate, since the first bonding pad 80b, the second bonding pad 90b and the semiconductor stack 10a include multiple insulation layers, the first bonding pad 80b and the second bonding pad 90b of the light emitting device 2 are affected by external force, such as stress generated during eutectic bonding with solder or AuSn, may cause cracks in the first and

second bonding pads

80b and 90b and the insulating layer, therefore, the light emitting device 2 includes the first electrode bump 810b and the second electrode bump 910b respectively located above the first pad 80b and the second pad 90b, and is bonded to the outside through the first electrode bump 810b and the second electrode bump 910b, the first electrode bump 810b and the second electrode bump 910b are formed at positions that bypass the formation position of the opening 100a to reduce stress between the pad and the insulating layer due to an external force.

In another embodiment of the present invention, the first pad 80b and the second pad 90b have larger areas than the first electrode bump 810b and the second electrode bump 910b to release the pressure of the first electrode bump 810b and the second electrode bump 910b during die bonding. In a cross-sectional view of the light emitting device 2, the first pad 80b includes a width 1.2 to 2.5 times, preferably 2 times, the width of the first electrode bump 810 b.

In another embodiment of the present invention, the first pad 80b and the second pad 90b have larger areas than the first electrode bump 810b and the second electrode bump 910b to release the pressure of the first electrode bump 810b and the second electrode bump 910b during die bonding. In the cross-sectional view of the light emitting element 2, the first pad 80b has an outward expansion distance of 1 time or more, preferably 2 times or more, of its own thickness.

In another embodiment of the present invention, the first electrode bump 810b and the second electrode bump 910b include a thickness between 1 μm and 100 μm, preferably between 1.5 μm and 6 μm, and are flip-chip mounted on the package substrate via the first electrode bump 810b and the second electrode bump 910 b. The first bonding pad 80b and the second bonding pad 90b include a thickness greater than 0.2 μm, preferably greater than 0.5 μm and less than 1 μm, so as to release the pressure of the first electrode bump 810b and the second electrode bump 910b during die bonding.

In another embodiment of the present invention, the first bonding pad 80b, the second bonding pad 90b and the metal layer 900b comprise the same metal material and/or have the same metal stack.

The first pad 80b, the second pad 90b and the metal layer 900b may be a single layer or a stacked layer structure. The function of the first pad 80b and the second pad 90b forms a stable interface with the first contact layer 601a, the reflective layer 40a, or the barrier layer 41a, for example, the first pad 80b contacts the first contact layer 601a, and the second pad 90b contacts the reflective layer 40a or the barrier layer 41 a. The first bonding pad 80b and the second bonding pad 90b include metal materials other than gold (Au) and copper (Cu), such as metals of chromium (Cr), nickel (Ni), cobalt (Co), iron (Fe), titanium (Ti), tungsten (W), zirconium (Zr), molybdenum (Mo), tantalum (Ta), aluminum (Al), silver (Ag), platinum (Pt), palladium (Pd), rhodium (Rh), iridium (Ir), ruthenium (Ru), osmium (Os), or alloys thereof, so as to prevent tin (Sn) in the solder or AuSn eutectic from diffusing into the light emitting element 2 and generating Co-gold with the metals, such as gold (Au) and copper (Cu), included in the first bonding pad 80b and the second bonding pad 90 b. The metal layer 900b includes a metal material other than gold (Au) and copper (Cu), for example, metals such as chromium (Cr), nickel (Ni), cobalt (Co), iron (Fe), titanium (Ti), tungsten (W), zirconium (Zr), molybdenum (Mo), tantalum (Ta), aluminum (Al), silver (Ag), platinum (Pt), palladium (Pd), rhodium (Rh), iridium (Ir), ruthenium (Ru), and osmium (Os), or alloys of these metals. The side of the metal layer 900b in contact with the third insulating layer 70a contains chromium (Cr), nickel (Ni), titanium (Ti), or platinum (Pt) to improve the interface bonding strength between the metal layer 900b and the third insulating layer 70 a.

In another embodiment of the present invention, the first bonding pad 80b and/or the second bonding pad 90b is a stacked structure, wherein the stacked structure includes a high ductility layer and a low ductility layer to prevent the stress generated when the

bonding pads

80b, 90b are eutectic bonded with solder or AuSn from causing cracks in the insulating layer between the

bonding pads

80b, 90b and the semiconductor stack 10 a. The high ductility layer and the low ductility layer contain metals having different Young's coefficients (Young's modules).

In another embodiment of the present invention, the high ductility layer of the first bonding pad 80b and/or the second bonding pad 90b includes a thickness greater than or equal to a thickness of the low ductility layer.

In another embodiment of the present invention, the first bonding pad 80b and the second bonding pad 90b are stacked, the first electrode bump 810b and the second electrode bump 910b are stacked, a surface of the first bonding pad 80b contacting the first electrode bump 810b includes the same metal material, and a surface of the second bonding pad 90b contacting the second electrode bump 910b includes the same metal material, such as chromium (Cr), nickel (Ni), titanium (Ti), or platinum (Pt), to improve the interface bonding strength between the bonding pad and the buffer pad.

In another embodiment of the present invention, the manufacturing method of the light emitting device 2 includes a fourth insulating layer forming step after the bonding pad forming step. A fourth insulating layer (not shown) is formed on the first pad 80b and the second pad 90b by physical vapor deposition or chemical vapor deposition, and the first electrode bump 810b and the second electrode bump 910b are formed on the first pad 80b and the second pad 90b, respectively, wherein the fourth insulating layer surrounds sidewalls of the first pad 80b and the second pad 90 b. The fourth insulating layer may have a single layer or a stacked layer structure. When the fourth insulating layer has a stacked structure, the fourth insulating layer may include two or more materials having different refractive indexes that are alternately stacked to form a bragg reflector (DBR) structure that selectively reflects light having a specific wavelength. The fourth insulating layer is made of a non-conductive material and includes an organic material such as Su8, benzocyclobutene (BCB), Perfluorocyclobutane (PFCB), Epoxy resin (Epoxy), acrylic resin (Acry)lic Resin), cyclic olefin Polymer (COC), polymethyl methacrylate (PMMA), polyethylene terephthalate (PET), Polycarbonate (PC), Polyetherimide (Polyetherimide), Fluorocarbon Polymer (Fluorocarbon Polymer), or inorganic materials such as silica gel (Silicone), Glass (Glass), or dielectric materials such as aluminum oxide (Al)₂O₃) Silicon nitride (SiN)_x) Silicon oxide (SiO)_x) Titanium oxide (TiO)_x) Or magnesium fluoride (MgF)_x)。

In an embodiment of the present invention, the manufacturing process of the first electrode bump 810b and the second electrode bump 910b may be directly continued after the manufacturing process of the first pad 80b and the second pad 90 b. In another embodiment of the present invention, after the manufacturing process of the first bonding pad 80b and the second bonding pad 90b, a step of forming the fourth insulating layer is performed, and then the manufacturing process of the first electrode bump 810b and the second electrode bump 910b is continued.

Fig. 11 is a schematic view of a light emitting device 3 according to an embodiment of the invention. The light emitting element 1 or the light emitting element 2 in the foregoing embodiment is flip-chip mounted on the first pad 511 or the second pad 512 of the package substrate 51. The first pad 511 and the second pad 512 are electrically insulated by an insulating portion 53 made of an insulating material. Flip chip mounting is a light extraction surface mainly formed on the growth substrate side facing the pad formation surface. In order to increase the light extraction efficiency of the light emitting device, a reflective structure 54 may be disposed around the light emitting element 1 or the light emitting element 2.

Fig. 12 is a schematic view of a light emitting device 4 according to an embodiment of the invention. The light emitting device 4 is a bulb lamp including a lampshade 602, a reflector 604, a light emitting module 610, a lamp holder 612, a heat sink 614, a connecting portion 616 and an electrical connecting element 618. The light emitting module 610 includes a carrying portion 606, and a plurality of light emitting units 608 located on the carrying portion 606, wherein the plurality of light emitting units 608 may be the

light emitting elements

1, 2, or 3 in the foregoing embodiments.

The examples are given solely for the purpose of illustration and are not intended to limit the scope of the invention. Any obvious modifications or variations can be made to the present invention without departing from the spirit or scope of the present invention.

Claims

1. A light emitting element comprising:

a semiconductor stack having a first semiconductor layer, a second semiconductor layer, and an active layer between the first semiconductor layer and the second semiconductor layer;

a first insulating layer on the semiconductor stack layer and including an opening to expose the second semiconductor layer;

a reflective structure located on the second semiconductor layer and electrically connected to the second semiconductor layer through the opening;

a second insulating layer on the reflective structure and including an annular opening with a top view in a ring shape to expose the reflective structure;

a first pad electrically connected to the first semiconductor layer;

a second pad electrically connected to the second semiconductor layer;

a first contact layer located between the second semiconductor layer and the first bonding pad; and

and a second contact layer formed between the second semiconductor layer and the second pad and in the annular opening to contact the reflective structure, wherein the second contact layer has a size smaller than that of the first contact layer, and the first contact layer is disposed on multiple sides of the second contact layer.

2. The light emitting device of claim 1, comprising a metal layer on the semiconductor stack, wherein the metal layer surrounds sidewalls of the second pad, and the metal layer is spaced apart from the second pad by a distance.

3. The light emitting device as claimed in claim 2, wherein the metal layer, the first pad and the second pad comprise the same metal material and/or have the same metal stack.

4. The light-emitting device according to claim 1, comprising one or more holes penetrating through the second semiconductor layer and the active layer to expose the first semiconductor layer, wherein the one or more holes are formed in a region other than the first pad and the second pad in a top view of the light-emitting device.

5. The light-emitting device according to claim 1, wherein the first insulating layer covers a sidewall of the active layer.

6. The light emitting device of claim 2, wherein a portion of the first contact layer is located below the metal layer.

7. The light emitting device according to claim 1, comprising a third insulating layer on the first contact layer, the third insulating layer comprising a first portion covered by the first pad and a second portion adjacent to a side of the first pad, wherein the third insulating layer comprises an opening between the first portion and the second portion to expose the first contact layer, the opening is formed by a first side of the first portion and a second side of the second portion, the side of the first pad is separated from the first side of the first portion or the second side of the second portion by a distance, and the distance is less than 100 μm.

8. A light emitting element comprising:

a reflective structure located on the first insulating layer and electrically connected to the second semiconductor layer through the opening;

a first bonding pad including a side edge, the first bonding pad being electrically connected to the first semiconductor layer;

a second pad electrically connected to the second semiconductor layer;

a first contact layer located between the second semiconductor layer and the first bonding pad;

a second contact layer located between the second semiconductor layer and the second pad and formed in the annular opening to contact the reflective structure, wherein the second contact layer has a size smaller than that of the first contact layer in a top view of the light emitting device, and the first contact layer is located on multiple sides of the second contact layer; and

a third insulating layer having a first portion covered by the first pad, wherein the third insulating layer has an opening to expose the first contact layer, and wherein the opening of the third insulating layer is surrounded by the annular opening of the second insulating layer in the top view of the light emitting device.

9. The light emitting device of claim 8, wherein the opening of the third insulating layer is disposed along the side of the first pad in the top view of the light emitting device.

10. The light-emitting device according to claim 8, comprising a plurality of holes passing through the second semiconductor layer and the active layer to expose the first semiconductor layer, wherein the plurality of holes are formed in regions other than the first pad and the second pad on the top view of the light-emitting device.

11. The light-emitting device according to claim 8, comprising a transparent conductive layer on the second semiconductor layer, the reflective structure on the transparent conductive layer, the reflective structure comprising a barrier layer and a reflective layer, the barrier layer on the reflective layer, wherein the barrier layer is not connected to the transparent conductive layer.

12. The light emitting device according to claim 8, wherein the first insulating layer covers a sidewall of the active layer.