CN107508490A - A kind of piezoelectric vibration energy extracts circuit - Google Patents
A kind of piezoelectric vibration energy extracts circuit Download PDFInfo
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Abstract
本发明提供的压电振动能量提取电路在电路控制模块中利用电容CHP和电阻RHP组成的无源高通滤波器捕获或门产生的下降沿,成功地获得压电能量收集器电流的过零点,控制开关模块的闭合,缩短压电能量收集器内夹电容的放电时间,增加压电能量收集器向储能模块的充电时间,从而能够收集更多的压电能量;并且通过调节电容CHP的容值和电阻RHP的阻值来控制开关模块的闭合时间,适应不同压电能量收集器的工作特性,并且,该电路不含电感元件,适用于CMOS集成电路,且辅助电路器件较少,功耗较低。
The piezoelectric vibration energy extraction circuit provided by the present invention uses a passive high-pass filter composed of capacitor C HP and resistor R HP to capture the falling edge generated by the OR gate in the circuit control module, and successfully obtains the zero-crossing point of the piezoelectric energy harvester current , to control the closing of the switch module, shorten the discharge time of the capacitor in the piezoelectric energy harvester, and increase the charging time of the piezoelectric energy harvester to the energy storage module, so that more piezoelectric energy can be collected; and by adjusting the capacitor C HP The capacitance value and the resistance value of the resistor R HP are used to control the closing time of the switch module, adapting to the working characteristics of different piezoelectric energy harvesters, and the circuit does not contain inductive components, suitable for CMOS integrated circuits, and has fewer auxiliary circuit components , lower power consumption.
Description
技术领域technical field
本发明涉及压电能量提取领域,更具体地,涉及一种高效的压电振动能量提取电路。The invention relates to the field of piezoelectric energy extraction, and more particularly, relates to an efficient piezoelectric vibration energy extraction circuit.
背景技术Background technique
近年来,无线传感器与无线通信网络节点的发展获得了极大的关注,并已成为一大研究热点。无线传感器与无线通信网络节点可广泛适用于建筑安全性检测、环境控制勘察、智能家居、动物定位跟踪等场景。但是,随着节点设备的数量快速增长以及尺寸逐渐变小和节点布置的位置分布愈加分散,节点电源采用化学电池这一常规的技术方案逐渐显示其局限性和不足之处。由于化学电池的使用寿命有限,以及需要反复进行充电,因此对电池进行再次充电或者更换电池,俨然成为一大难题。In recent years, the development of wireless sensors and wireless communication network nodes has received great attention and has become a major research hotspot. Wireless sensors and wireless communication network nodes can be widely used in scenarios such as building safety detection, environmental control survey, smart home, animal positioning and tracking. However, with the rapid growth of the number of node devices and the gradual reduction in size and distribution of node locations, the conventional technical solution of using chemical batteries for node power supply gradually shows its limitations and shortcomings. Due to the limited service life of chemical batteries and the need for repeated charging, recharging or replacing batteries has become a major problem.
并且随着低功率化电子设计与低功率化电子制造的共同进步,无线传感器与通信网络节点的功耗进一步降低,可低至10到100μW。因此,可以利用压电材料的压电效应将外界无处不在的振动能转换成电能,为节点工作提供足够的电能,这种技术方案,称之为压电能量收集技术,使用的元件是压电能量收集器(piezoelectric energy harvester)。And with the common progress of low-power electronic design and low-power electronic manufacturing, the power consumption of wireless sensors and communication network nodes is further reduced, which can be as low as 10 to 100 μW. Therefore, the piezoelectric effect of piezoelectric materials can be used to convert the ubiquitous vibration energy of the outside world into electrical energy to provide sufficient electrical energy for the node to work. This technical solution is called piezoelectric energy harvesting technology, and the components used are piezoelectric Electric energy harvester (piezoelectric energy harvester).
由于压电能量收集器输出的是交变电流,且其输出阻抗呈容性。为了对压电能量进行存储以及充分利用,电路需要一个整流接口电路,将输出的交流电转换成可以适合节点使用的直流电。经典的整流接口电路是半波或者全波整流桥后接储能电容,虽然这种方案结构简单,可以输出基本稳定的直流电流,但是能量提取效率低下。为了克服这种不足,Guyomar、Lefeuvre、Richard团队提出了一种称为SSHI(Synchronized Switch Harvestingwith Inductor)的高效率非线性能量提取电路,运用电感和同步开关的辅助,加以适当的控制策略,减少压电能量收集器的内夹电容的充放电时间和增加对储能电容的充电时间,从而提高能量提取效率。Since the output of the piezoelectric energy harvester is an alternating current, and its output impedance is capacitive. In order to store and make full use of piezoelectric energy, the circuit needs a rectification interface circuit to convert the output alternating current into direct current suitable for the node. The classic rectification interface circuit is a half-wave or full-wave rectifier bridge followed by an energy storage capacitor. Although this solution has a simple structure and can output a basically stable DC current, the energy extraction efficiency is low. In order to overcome this deficiency, the team of Guyomar, Lefeuvre, and Richard proposed a high-efficiency nonlinear energy extraction circuit called SSHI (Synchronized Switch Harvesting with Inductor), which uses the assistance of inductance and synchronous switch, and applies appropriate control strategies to reduce voltage. The charging and discharging time of the internal clip capacitor of the electric energy harvester and the charging time of the energy storage capacitor are increased, thereby improving the energy extraction efficiency.
在压电能量收集领域,非线性能量提取电路SSHI现已成为了一种主流技术,且在理论上能够使得能量收集功率获得数倍的提高,如SECE电路理论上获得4倍提高,S-SSHI获得4倍提高,PSSHI电路能够获得8倍以上的提高。然而,这种电路都存在着一个不可避免的弊端,由于非线性能量提取电路SSHI都需要一个感抗值较大的电感,而这种电感尺寸都较大,导致这类电路的自供电式设计无法适用于CMOS集成电路。In the field of piezoelectric energy harvesting, the non-linear energy extraction circuit SSHI has become a mainstream technology, and in theory it can increase the power of energy harvesting several times, such as the SECE circuit can theoretically increase by 4 times, and the S-SSHI Get 4 times improvement, PSSHI circuit can get more than 8 times improvement. However, this kind of circuit has an inevitable disadvantage. Since the nonlinear energy extraction circuit SSHI needs an inductor with a large inductance value, and the size of this inductor is large, the self-powered design of this type of circuit Cannot be applied to CMOS integrated circuits.
为了解决电感尺寸较大无法适用于CMOS集成电路的问题,研究者提出了使用感性阻抗来模拟电感。但是,这种方法对器件参数要求较高,很难调节,而且器件的尺寸仍然较大,最重要的是,电路实现上仍需要外接电源,无法实现真正的独立自供电。In order to solve the problem that the large size of the inductor cannot be applied to CMOS integrated circuits, the researchers proposed to use inductive impedance to simulate the inductor. However, this method requires high device parameters, is difficult to adjust, and the size of the device is still large. Most importantly, the circuit implementation still requires an external power supply, which cannot achieve a true independent self-power supply.
在2010年,Ramadass为了在CMOS集成电路上实现压电能量的高效收集,在电路设计中放弃使用电感,提出了新型的同步开关接口电路方案,该方案中开关的闭合时间需要根据不同的压电片参数来进行人工调整,该电路无法实现自动调节控制。为了解决开关闭合时间无法自调整的问题,Shaohua Lu提出了一种新的控制电路,但是,该方案的控制电路需要较多器件,导致功耗较大。In 2010, in order to realize the efficient collection of piezoelectric energy on CMOS integrated circuits, Ramadass abandoned the use of inductance in circuit design, and proposed a new synchronous switch interface circuit scheme. In this scheme, the closing time of the switch needs to be based on different piezoelectric energy Chip parameters are manually adjusted, and the circuit cannot realize automatic adjustment control. In order to solve the problem that the switch closing time cannot be self-adjusted, Shaohua Lu proposed a new control circuit. However, the control circuit of this scheme requires more components, resulting in high power consumption.
发明内容Contents of the invention
本发明为解决以上现有技术提供的提取电路所存在的提取效率不高、其内包括的开关电路的闭合时间不能实现自调整的技术缺陷,提供了一种高效的压电振动能量提取电路。The present invention provides a high-efficiency piezoelectric vibration energy extraction circuit to solve the technical defects of the extraction circuit provided by the prior art that the extraction efficiency is not high and the closing time of the switch circuit included therein cannot be self-adjusted.
为实现以上发明目的,采用的技术方案是:For realizing above-mentioned purpose of the invention, the technical scheme that adopts is:
一种压电振动能量提取电路,包括压电能量收集器、全波整流桥、储能模块、开关模块和电路控制模块;A piezoelectric vibration energy extraction circuit, comprising a piezoelectric energy harvester, a full-wave rectifier bridge, an energy storage module, a switch module and a circuit control module;
其中压电能量收集器的正极电压输出端Vp与全波整流桥的端一连接,压电能量收集器的的负极电压输出端Vn与全波整流桥的端二连接;端一、端二处于对角位置上;Wherein the positive voltage output terminal Vp of the piezoelectric energy harvester is connected with terminal one of the full-wave rectifier bridge, and the negative voltage output terminal Vn of the piezoelectric energy harvester is connected with terminal two of the full-wave rectifier bridge; Two are in the diagonal position;
储能模块的两个输入端分别与全波整流桥的端三、端四连接;The two input terminals of the energy storage module are respectively connected to terminals 3 and 4 of the full-wave rectifier bridge;
所述电路控制模块包括电压比较器CMP1、电压比较器CMP2、电压比较器CMP3、或门VOR、电容CHP和电阻RHP;电压比较器CMP1的反相输入端、电压比较器CMP2的反相输入端分别与压电能量收集器的正极电压输出端Vp、负极电压输出端Vn连接,电压比较器CMP1的正向输入端、电压比较器CMP2的正向输入端、电压比较器CMP3的正向输入端与参考电压Vref连接;电压比较器CMP1的输出端、电压比较器CMP2的输出端分别与或门VOR的两个输入端连接,或门VOR的输出端通过电容CHP与电压比较器CMP3的反相输入端连接,电压比较器CMP3的反相输入端通过电阻RHP接地;The circuit control module includes a voltage comparator CMP 1 , a voltage comparator CMP 2 , a voltage comparator CMP 3 , an OR gate V OR , a capacitor C HP and a resistor R HP ; the inverting input terminal of the voltage comparator CMP 1 , the voltage comparator The inverting input terminal of the CMP 2 is respectively connected with the positive voltage output terminal V p and the negative voltage output terminal V n of the piezoelectric energy harvester, the positive input terminal of the voltage comparator CMP 1 and the positive voltage output terminal of the voltage comparator CMP 2 The input terminal and the positive input terminal of the voltage comparator CMP 3 are connected to the reference voltage V ref ; the output terminals of the voltage comparator CMP 1 and the output terminal of the voltage comparator CMP 2 are respectively connected to the two input terminals of the OR gate V OR , The output terminal of the OR gate V OR is connected to the inverting input terminal of the voltage comparator CMP 3 through the capacitor C HP , and the inverting input terminal of the voltage comparator CMP 3 is grounded through the resistor R HP ;
所述开关模块包括NMOS管M1和NMOS管M2,其中NMOS管M1的D极与压电能量收集器的正极电压输出端Vp连接,NMOS管M1的S极与NMOS管M2的S极连接,NMOS管M2的D极与压电能量收集器的负极电压输出端Vn连接,NMOS管M1的G极和NMOS管M2的G极与电压比较器CMP3的输出端连接。The switch module includes an NMOS transistor M1 and an NMOS transistor M2 , wherein the D pole of the NMOS transistor M1 is connected to the positive voltage output terminal Vp of the piezoelectric energy harvester, and the S pole of the NMOS transistor M1 is connected to the NMOS transistor M2 The S pole of the NMOS transistor M2 is connected to the negative voltage output terminal Vn of the piezoelectric energy harvester, the G pole of the NMOS transistor M1 and the G pole of the NMOS transistor M2 are connected to the output of the voltage comparator CMP 3 end connection.
与现有技术相比,本发明的有益效果是:Compared with prior art, the beneficial effect of the present invention is:
本发明的电路在电路控制模块中利用电容CHP和电阻RHP组成的无源高通滤波器捕获或门产生的下降沿,成功地获得压电能量收集器的电流过零点,控制开关模块的闭合,缩短压电片的内夹电容的放电时间,增加压电片向储能模块的充电时间,从而能够收集更多的压电能量;并且通过调节电容CHP的容值和电阻RHP的阻值来控制开关模块的闭合时间,适应不同压电能量收集器的工作特性,并且,该电路不含电感元件,适用于CMOS集成电路,且辅助电路器件较少,功耗较低。The circuit of the present invention uses a passive high-pass filter composed of capacitor C HP and resistor R HP in the circuit control module to capture the falling edge generated by the OR gate, successfully obtain the current zero-crossing point of the piezoelectric energy harvester, and control the closing of the switch module , shorten the discharge time of the internal clip capacitor of the piezoelectric sheet, increase the charging time of the piezoelectric sheet to the energy storage module, so that more piezoelectric energy can be collected; and by adjusting the capacitance of the capacitor C HP and the resistance of the resistor R HP The value is used to control the closing time of the switch module, adapting to the working characteristics of different piezoelectric energy harvesters, and the circuit does not contain inductive components, is suitable for CMOS integrated circuits, and has fewer auxiliary circuit components and lower power consumption.
附图说明Description of drawings
图1为本发明的电路实现示意图。Fig. 1 is a schematic diagram of circuit realization of the present invention.
图2为本发明的电路在稳定状态下各电压与电流的波形图。FIG. 2 is a waveform diagram of various voltages and currents in a steady state of the circuit of the present invention.
图3为本发明的电路在初始充电阶段的示意图。Fig. 3 is a schematic diagram of the circuit of the present invention in the initial charging stage.
图4为本发明的电路在能量提取阶段的示意图。Fig. 4 is a schematic diagram of the circuit of the present invention in the energy extraction stage.
图5为本发明的电路在同步开关闭合阶段的示意图。FIG. 5 is a schematic diagram of the circuit of the present invention in the closing phase of the synchronous switch.
图6为本发明的电路在下半周期初始充电阶段的示意图。FIG. 6 is a schematic diagram of the circuit of the present invention in the initial charging stage of the second half cycle.
具体实施方式detailed description
附图仅用于示例性说明,不能理解为对本专利的限制;The accompanying drawings are for illustrative purposes only and cannot be construed as limiting the patent;
以下结合附图和实施例对本发明做进一步的阐述。The present invention will be further elaborated below in conjunction with the accompanying drawings and embodiments.
实施例1Example 1
如图1所示,本发明提供的一种压电振动能量提取电路,包括压电能量收集器、全波整流桥、储能模块、开关模块和电路控制模块;As shown in Figure 1, a piezoelectric vibration energy extraction circuit provided by the present invention includes a piezoelectric energy harvester, a full-wave rectifier bridge, an energy storage module, a switch module and a circuit control module;
其中压电能量收集器的正极电压输出端Vp与全波整流桥的端一连接,压电能量收集器的的负极电压输出端Vn与全波整流桥的端二连接;Wherein the positive voltage output terminal Vp of the piezoelectric energy harvester is connected to terminal one of the full-wave rectifier bridge, and the negative voltage output terminal Vn of the piezoelectric energy harvester is connected to terminal two of the full-wave rectifier bridge;
储能模块的两个输入端分别与全波整流桥的端三、端四连接;The two input terminals of the energy storage module are respectively connected to terminals 3 and 4 of the full-wave rectifier bridge;
所述电路控制模块包括电压比较器CMP1、电压比较器CMP2、电压比较器CMP3、或门VOR、电容CHP和电阻RHP;电压比较器CMP1的反相输入端、电压比较器CMP2的反相输入端分别与压电能量收集器的正极电压输出端Vp、负极电压输出端Vn连接,电压比较器CMP1的正向输入端、电压比较器CMP2的正向输入端、电压比较器CMP3的正向输入端与参考电压Vref连接;电压比较器CMP1的输出端、电压比较器CMP2的输出端分别与或门VOR的两个输入端连接,或门VOR的输出端通过电容CHP与电压比较器CMP3的反相输入端连接,电压比较器CMP3的反相输入端通过电阻RHP接地;The circuit control module includes a voltage comparator CMP 1 , a voltage comparator CMP 2 , a voltage comparator CMP 3 , an OR gate V OR , a capacitor C HP and a resistor R HP ; the inverting input terminal of the voltage comparator CMP 1 , the voltage comparator The inverting input terminal of the CMP 2 is respectively connected with the positive voltage output terminal V p and the negative voltage output terminal V n of the piezoelectric energy harvester, the positive input terminal of the voltage comparator CMP 1 and the positive voltage output terminal of the voltage comparator CMP 2 The input terminal and the positive input terminal of the voltage comparator CMP 3 are connected to the reference voltage V ref ; the output terminals of the voltage comparator CMP 1 and the output terminal of the voltage comparator CMP 2 are respectively connected to the two input terminals of the OR gate V OR , The output terminal of the OR gate V OR is connected to the inverting input terminal of the voltage comparator CMP 3 through the capacitor C HP , and the inverting input terminal of the voltage comparator CMP 3 is grounded through the resistor R HP ;
所述开关模块包括NMOS管M1和NMOS管M2,其中NMOS管M1的D极与压电能量收集器的正极电压输出端Vp连接,NMOS管M1的S极与NMOS管M2的S极连接,NMOS管M2的D极与压电能量收集器的负极电压输出端Vn连接,NMOS管M1的G极和NMOS管M2的G极与电压比较器CMP3的输出端连接。The switch module includes an NMOS transistor M1 and an NMOS transistor M2 , wherein the D pole of the NMOS transistor M1 is connected to the positive voltage output terminal Vp of the piezoelectric energy harvester, and the S pole of the NMOS transistor M1 is connected to the NMOS transistor M2 The S pole of the NMOS transistor M2 is connected to the negative voltage output terminal Vn of the piezoelectric energy harvester, the G pole of the NMOS transistor M1 and the G pole of the NMOS transistor M2 are connected to the output of the voltage comparator CMP 3 end connection.
其中,所述参考电压VRef小于0,并且大于负的二极管导通电压VD,即-VD<VRef<0。Wherein, the reference voltage V Ref is less than 0 and greater than the negative diode conduction voltage V D , that is, -V D <V Ref <0.
在具体的实施过程中,所述储能模块包括储能电容Crect和负载电阻Rrect,储能电容Crect的两端、负载电阻Rrect的两端分别与端与全波整流桥的端三、端四连接;储能电容Crect的一端、负载电阻Rrect的一端接地。In a specific implementation process, the energy storage module includes an energy storage capacitor C rect and a load resistor R rect . 3. Terminal 4 is connected; one end of the energy storage capacitor C rect and one end of the load resistor R rect are grounded.
电路的充电过程分为四个阶段,在稳定的工作状态下,该电路各电压与电流的波形,见图2。The charging process of the circuit is divided into four stages. In a stable working state, the waveforms of the voltage and current of the circuit are shown in Figure 2.
如图3所示,为电路的初始充电阶段。选择压电能量收集器等效电流源ieq为0的时刻作为起点,即图2中t0时刻,由于此时压电能量收集器内夹电容Cp上的电压为0,等效电流源开始给内夹电容Cp充电,同时,内夹电阻Rp也消耗着电流源的能量。在时间t0到t1之间,由于储能电容Crect保持着电压值Vrect,而压电能量收集器两端的电压尚未达到Vrect+2VD,VD为全波整流桥二极管的正向导通电压,因此全波整流桥处于未导通状态,正极电压输出端Vp的电压Vp从0开始持续上升,而负极电压输出端Vn的电压Vn从0开始持续下降。As shown in Figure 3, it is the initial charging stage of the circuit. Select the moment when the equivalent current source i eq of the piezoelectric energy harvester is 0 as the starting point, that is, at time t 0 in Fig. Start to charge the internal clip capacitor Cp , and at the same time, the internal clip resistor Rp also consumes the energy of the current source. Between time t 0 and t 1 , since the energy storage capacitor C rect maintains the voltage value V rect , but the voltage across the piezoelectric energy harvester has not yet reached V rect +2V D , V D is the positive voltage of the full-wave rectifier bridge diode The conduction voltage is directed, so the full-wave rectifier bridge is in a non-conducting state, the voltage V p of the positive voltage output terminal V p continues to rise from 0, and the voltage V n of the negative voltage output terminal V n continues to decrease from 0.
如图4所示,为电路的能量提取阶段。直到t1时刻,压电能量收集器两端的电压达到Vrect+2VD,全波整流桥进入导通状态,由于等效电流源仍为正向电流,压电片开始为储能电容Crect充电,所以在时间t1到tπ期间,压电能量收集器能量持续被储能电容Crect与负载电阻Rrect所提取,该电路是以储能电容Crect负极为参考地,由于全波整流桥二极管的作用,负极电压输出端Vn的电压Vn降到了-VD,而参考电压Vref是略大于-VD。因此,电压比较器CMP2将参考电压Vref与电压Vn进行比较后,输出端电压V2从低电平跳变到高电平,而正极电压输出端Vp的电压Vp始终大于参考电压Vref,电压比较器CMP1输出端电压V1保持低电平,或门输入端接收低电平的V1与高电平的V2,因此,输出端电压VOR也跳变成高电平。As shown in Figure 4, it is the energy extraction stage of the circuit. Until t1 , the voltage across the piezoelectric energy harvester reaches V rect +2V D , and the full-wave rectifier bridge enters the conduction state. Since the equivalent current source is still in the forward direction, the piezoelectric sheet begins to be the energy storage capacitor C rect Therefore, during the period from time t 1 to t π , the energy of the piezoelectric energy harvester is continuously extracted by the energy storage capacitor C rect and the load resistance R rect . This circuit is based on the negative pole of the energy storage capacitor C rect as the reference ground. Due to the function of the rectifier bridge diode, the voltage V n of the negative voltage output terminal V n drops to -V D , while the reference voltage V ref is slightly greater than -V D . Therefore, after the voltage comparator CMP 2 compares the reference voltage V ref with the voltage V n , the output terminal voltage V 2 jumps from low level to high level, while the voltage V p at the positive voltage output terminal V p is always greater than the reference Voltage V ref , the voltage V 1 at the output of the voltage comparator CMP 1 remains low, and the input terminal of the OR gate receives low level V 1 and high level V 2 , therefore, the output voltage V OR also jumps to high level.
如图5所示,为电路的同步开关闭合阶段。当等效电流源ieq降到0时,极性将从正向改变成反向,即过零点时刻tπ,压电能量收集器两端电压开始下降,正极电压输出端Vp的电压Vp开始从Vrect+VD下降,同时负极电压输出端Vn的电压Vn开始从-VD开始上升。当电压Vn上升到比参考电压Vref大时,即时刻tπ+,输入端接收电压Vn与Vref的电压比较器CMP2的输出端电压V2从高电平跳变回低电平,或门输入端接收低电平的V1与低电平的V2,输出端电压VOR也从高电平跳变回低电平。电压VOR连接着无源高通滤波器(电容CHP和电阻RHP),而高通滤波器具有滤除低频分量,阻断直流分量,但能导通高频分量的特性。由于电压VOR从高电平跳变回低电平,跳变沿的高频分量得以通过无源高通滤波器,因此电压VRHP瞬间从0下降到一个极值电压,比参考电压Vref还小,接着电容CHP放电回到零状态,放电速度与时间常数τ=RHPCHP相关,电压比较器CMP3将电压VRHP与参考电压Vref进行比较,在输出端获得一个短时间的高电平VCTR。充当开关角色的NMOS管M1和M2,只有当其栅源电压VGS电压高于阈值电压VTH时,NMOS管才会进入导通状态。NMOS管M1和M2的栅极G接入电压VCTR,而电压VCTR获得的高电平大于MOS管的阈值电压VTH,因此,在tπ+时刻,电压VCTR在短时间内能够驱动NMOS管M1进入导通状态,而此时,NMOS管M2的体二极管处于正向导通状态,因此,电路能够完成同步开关的闭合,促使内夹电容Cp两端的电压从Vrect+2VD瞬间放电到0值。As shown in Figure 5, it is the synchronous switch closing stage of the circuit. When the equivalent current source i eq drops to 0, the polarity will change from forward to reverse, that is, at the zero-crossing time t π , the voltage at both ends of the piezoelectric energy harvester begins to drop, and the voltage V at the positive voltage output terminal V p p starts to drop from V rect +V D , and at the same time, the voltage V n of the negative voltage output terminal V n starts to rise from -V D. When the voltage V n rises to be greater than the reference voltage V ref , that is, at time t π+ , the output terminal voltage V 2 of the voltage comparator CMP 2 receiving the voltage V n and V ref at the input terminal jumps from a high level back to a low level. level, the input terminal of the OR gate receives low-level V 1 and low-level V 2 , and the output terminal voltage V OR also jumps from high level to low level. The voltage V OR is connected to a passive high-pass filter (capacitor C HP and resistor R HP ), and the high-pass filter has the characteristics of filtering out low-frequency components, blocking DC components, but passing high-frequency components. Since the voltage V OR jumps from high level to low level, the high-frequency component of the jump edge can pass through the passive high-pass filter, so the voltage V RHP drops from 0 to an extreme voltage instantaneously, which is lower than the reference voltage V ref small, then the capacitor C HP discharges back to zero state, the discharge speed is related to the time constant τ=R HP C HP , the voltage comparator CMP 3 compares the voltage V RHP with the reference voltage V ref , and obtains a short-term High level V CTR . The NMOS transistors M 1 and M 2 acting as switches will enter the conduction state only when their gate-source voltage V GS voltage is higher than the threshold voltage V TH . The gate G of the NMOS transistors M 1 and M 2 is connected to the voltage V CTR , and the high level of the voltage V CTR is greater than the threshold voltage V TH of the MOS transistor. Therefore, at the time t π+ , the voltage V CTR is It can drive the NMOS transistor M1 into the conduction state, and at this time, the body diode of the NMOS transistor M2 is in the forward conduction state, therefore, the circuit can complete the closing of the synchronous switch, so that the voltage at both ends of the internal clamp capacitor C p changes from V rect +2V D instantly discharges to 0 value.
其中,电路控制模块控制开关的闭合时间为ton,满足其中VH代表高电平,τ代表无源高通滤波器的时间常数,为τ=RHPCHP。Among them, the closing time of the control switch of the circuit control module is t on , which satisfies Among them, V H represents the high level, and τ represents the time constant of the passive high-pass filter, which is τ=R HP C HP .
经过上述正向振动周期的三个阶段后,电路进入下半周期,即时间tπ到t2π。电路先是重复初始充电阶段,但等效电流源的极性ieq已经从正向改变成反向,电流的流动如图6所示。之后,电路又再进入能量提取阶段,同步开关闭合阶段,依次循环。After going through the above three stages of the positive vibration cycle, the circuit enters the second half cycle, ie time t π to t 2π . The circuit first repeats the initial charging phase, but the polarity i eq of the equivalent current source has changed from forward to reverse, and the flow of current is shown in Figure 6. Afterwards, the circuit enters the stage of energy extraction again, and the stage of synchronous switch closing, which cycles in turn.
显然,本发明的上述实施例仅仅是为清楚地说明本发明所作的举例,而并非是对本发明的实施方式的限定。对于所属领域的普通技术人员来说,在上述说明的基础上还可以做出其它不同形式的变化或变动。这里无需也无法对所有的实施方式予以穷举。凡在本发明的精神和原则之内所作的任何修改、等同替换和改进等,均应包含在本发明权利要求的保护范围之内。Apparently, the above-mentioned embodiments of the present invention are only examples for clearly illustrating the present invention, rather than limiting the implementation of the present invention. For those of ordinary skill in the art, other changes or changes in different forms can be made on the basis of the above description. It is not necessary and impossible to exhaustively list all the implementation manners here. All modifications, equivalent replacements and improvements made within the spirit and principles of the present invention shall be included within the protection scope of the claims of the present invention.
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