CN107491132A - Voltage-current converter circuit - Google Patents
Voltage-current converter circuit Download PDFInfo
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- CN107491132A CN107491132A CN201610407623.XA CN201610407623A CN107491132A CN 107491132 A CN107491132 A CN 107491132A CN 201610407623 A CN201610407623 A CN 201610407623A CN 107491132 A CN107491132 A CN 107491132A
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- 238000010168 coupling process Methods 0.000 claims description 16
- 238000005859 coupling reaction Methods 0.000 claims description 16
- 230000005611 electricity Effects 0.000 description 5
- 238000004088 simulation Methods 0.000 description 4
- 230000008859 change Effects 0.000 description 3
- 239000013256 coordination polymer Substances 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- 230000001934 delay Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
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- 230000009286 beneficial effect Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
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Classifications
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is DC
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices
- G05F1/565—Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
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- Automation & Control Theory (AREA)
- Amplifiers (AREA)
Abstract
A kind of voltage-current converter circuit, the voltage-current converter circuit include：Initial voltage provides circuit and OTA circuits；The initial voltage provides circuit, is coupled between the feedback output end of the OTA circuits and the first NMOS tube of the OTA circuits, suitable for when the OTA circuits are opened, the feedback output end for the OTA circuits provides an initial voltage；The OTA circuits, suitable for default power supply voltage signal is amplified according to default gain, to export the current signal for following default triangular signal to be changed on the basis of the initial voltage.Above-mentioned scheme, it is possible to achieve OTA circuits follow to the quick of triangular signal in voltage-current converter circuit.
Description
Technical field
The present invention relates to technical field of integrated circuits, more particularly to a kind of voltage-current converter circuit.
Background technology
Voltage-current converter circuit is generally used for current compensation circuit in the switching power circuit of current mode.Current compensation
Circuit can eliminate the subharmonic oscillation of switching power circuit, improve loop stability.Its main body of current compensation circuit is one
Trsanscondutance amplifier (Operational Transconductance Amplifier, OTA circuit) circuit.As compensation circuit,
OTA circuits need to provide an electric current that triangular wave can be followed to change, and are followed due to needing to realize triangular wave, it is desirable to roomy
In the frequency of triangular signal.
In the prior art, the OTA circuits in voltage-current converter circuit need longer time to realize to described three
Angle signal wave current follows.
The content of the invention
Technical problems to be solved of the embodiment of the present invention are how to realize that OTA circuits are to triangle in voltage-current converter circuit
The quick of ripple signal follows.
In order to solve the above problems, the embodiment of the present invention provides a kind of voltage-current converter circuit, including：Initial voltage carries
Power supply road and OTA circuits；The initial voltage provides circuit, is coupled in the feedback output end and OTA electricity of the OTA circuits
Between first NMOS tube on road, suitable for when the OTA circuits are opened, the feedback output end for the OTA circuits is provided at the beginning of one
Beginning voltage；The OTA circuits, suitable for default power supply voltage signal is amplified according to default gain, with described first
Output follows the current signal that default triangular signal is changed on the basis of beginning voltage.
Alternatively, the initial voltage, which provides circuit, includes the second NMOS tube；Second NMOS tube is with the shape of diode
Formula is coupled between the feedback output end of the OTA circuits and first NMOS tube.
Alternatively, the OTA circuits include current mirroring circuit, and the current mirroring circuit includes the first PMOS；It is described
Voltage-current converter circuit also includes：Inverter circuit, suitable for based on default pulldown signal, being exported at default first moment
For the first pulldown signal for controlling first NMOS tube to open, and in OTA electricity described in default second moment output control
The second pulldown signal that the first PMOS is opened in current mirroring circuit in road；First moment is earlier than second moment.
Alternatively, the inverter circuit includes the first phase inverter, NAND gate and N number of phase inverter being connected in series；It is described
The input of first phase inverter couples with default clock signal, and the first input end of output end and the NAND gate couples；Institute
The second input and default pulldown signal for stating NAND gate couple, and output end is defeated with N number of phase inverter being connected in series
Enter end coupling.
Alternatively, the inverter circuit includes the first phase inverter, NAND gate, the second phase inverter, the 3rd phase inverter, the 4th
Phase inverter and delay circuit；The input of first phase inverter couples with default clock signal, output end with it is described with it is non-
The first input end coupling of door；Second input of the NAND gate couples with default pulldown signal, output end respectively with institute
State the input of the second phase inverter and the grid end coupling of first NMOS tube；The output end of second phase inverter with it is described
The input coupling of 3rd phase inverter, the output end of the 3rd phase inverter respectively with the input of the delay circuit and described
The input coupling of 4th phase inverter；The output end of 4th phase inverter couples with first PMOS.
Alternatively, the delay circuit is the RC delay circuits for including resistance and electric capacity；The first end of the resistance and institute
State the 3rd phase inverter output end coupling, the second end respectively with the input of the 4th phase inverter and the positive pole coupling of the electric capacity
Connect；The negative pole of the electric capacity couples with default ground voltage.
Alternatively, the delay duration of the RC delay circuits is related to the resistance and electric capacity.
Alternatively, the span of the initial voltage is 0.5V to 0.8V.
Alternatively, the initial voltage is 0.7V.
Compared with prior art, technical scheme has the advantages that：
Above-mentioned scheme, circuit is provided by initial voltage, can be opened in the OTA circuits in voltage-current converter circuit
When, a default initial voltage is provided for its feedback output end, so that the voltage of the feedback output end of OTA circuits can be
Fast lifting is carried out on the basis of the predeterminated voltage, it is possible to achieve the voltage of OTA electronic feedback output ends is to default triangle
The quick of ripple signal follows.
Further, also include inverter circuit in the voltage-current converter circuit, the first pulldown signal of output and
Second pulldown signal can control the first NMOS tube in OTA circuits to be beaten prior to the first PMOS in the current mirror of OTA circuits
Open, so as to when the first PMOS is opened, the voltage of the first PMOS be pulled down, so as to prevent the first PMOS
The voltage overshoot of pipe, thus the safety and reliability of circuit can be improved.
Further, the inverter circuit includes RC delay circuits, it is possible to reduce phase inverter in inverter circuit
Number, and improve the accuracy of delays time to control.
Brief description of the drawings
Fig. 1 is the circuit diagram of the voltage-current converter circuit in the embodiment of the present invention；
Fig. 2 is the simulation result schematic diagram of the output voltage of the feedback output end of the OTA circuits in the embodiment of the present invention；
Fig. 3 is the simulation result schematic diagram of the output voltage of the feedback output end of OTA circuits of the prior art；
Fig. 4 is a kind of structural representation of inverter circuit in the embodiment of the present invention；
Fig. 5 is the structural representation of another inverter circuit in the embodiment of the present invention.
Embodiment
Voltage x current compensation circuit of the prior art includes voltage-current converter circuit, and voltage-current converter circuit is in electricity
It is typically applied in the switching power circuit of flow pattern in current compensation circuit.Current compensation circuit can eliminate switching power circuit
Subharmonic oscillation, improve loop stability.Current compensation circuit as compensation circuit needs offer one to follow triangular wave
The current signal of change, followed due to needing to realize triangular current signal, it is desirable to which band is wider than triangular current signal
Frequency.
Current compensation circuit of the prior art includes OTA circuits, and its operation principle is by unit gain negative-feedback, reality
The voltage follow triangular signal change of the feedback output end of existing OTA circuits.Due to being a triangular signal, so circuit
The voltage of feedback output end exists in the form of triangular wave.The electricity being connected between the ground voltage of the feedback output end of OTA circuits
The electric current at the both ends of resistance is VRAMP/R14, and is changed with triangular wave patterns, and VRAMP therein is the number of the triangular signal
Value, R14 are the resistance of resistance.Size is that VRAMP/R14 electric currents are amplified by the current mirroring circuit in OTA circuits 101, is used
Compensated in artificial slope.
In specific implementation, in order to cost-effective, the lining for the NMOS tube that the feedback output end of grid end and OTA circuits is coupled
Bottom is connected to the ground, to save deep N-well layer, because the lining drain voltage VBS of grid end and the NMOS tube of the feedback output end of OTA circuits is not
Zero so that its threshold voltage is more than normal threshold voltage, higher so as to be also required to the output voltage of OTA circuits.Because artificial oblique
Slope compensation is just worked in the unlatching each time of Switching Power Supply, it requires the voltage of the feedback output end output of OTA circuits
Need that triangular signal is carried out quickly to follow simultaneously normal work.
But the voltage of the feedback output end of OTA circuits of the prior art output usually requires longer time and just may be used
Triangular signal is followed with realizing, there are problems that following slow-footed, has had a strong impact on voltage-current converter circuit
Performance.
To solve the above problems, the technical scheme of the embodiment of the present invention provides circuit by initial voltage, can be in voltage
When OTA circuits in current converter circuit are opened, a default initial voltage is provided for its feedback output end, so that OTA
The voltage of the feedback output end of circuit can carry out fast lifting on the basis of the predeterminated voltage, to realize OTA circuits
The voltage of feedback output end follows to the quick of default triangular signal.
It is understandable to enable above-mentioned purpose, feature and the beneficial effect of the present invention to become apparent, below in conjunction with the accompanying drawings to this
The specific embodiment of invention is described in detail.
Fig. 1 is a kind of structural representation of voltage-current converter circuit in the embodiment of the present invention.Fig. 1 is refer to, is being had
During body is implemented, the voltage-current converter circuit in the embodiment of the present invention can include OTA circuits 101 and initial voltage provides circuit
102。
Wherein, initial voltage provides feedback output end OUT and the OTA circuit 101 that circuit 102 is coupled in OTA circuits 101
, can be when OTA circuits 101 be opened, at the beginning of the feedback output end OUT outputs one in OTA circuits 101 between first NMOS tube NM1
Beginning voltage, default triangular signal VRAMP therein pass through the 4th POMS pipes PM4 to the tenth POMS pipe PM10, and the 4th
NMOS tube NM4 is under the synergy of the devices such as the 8th NMOS tube NM8 so that the feedback output end OUT of OTA circuits 101 voltage
It is gradually increasing on the basis of initial voltage, the quick of default triangular signal VRAMP is followed so as to reach.
In specific implementation, the value of the initial voltage can be configured according to the actual needs, such as described initial
The span of voltage can be 0.5V to 0.8V.In an embodiment of the present invention, the initial voltage is 0.7V.
In an embodiment of the present invention, it is the 2nd NOMS pipes NM2 that initial voltage, which provides circuit 102,.Wherein, the 2nd NOMS is managed
NM2 be coupled in diode feedback output end OUT and the OTA circuit 101 of OTA circuits 101 the first NOMS pipes NM1 it
Between.
Wherein, the operation principle of voltage-current converter circuit as shown in Figure 1 is as follows：
When power vd D is not opened, the 2nd NOMS pipes NM2 exports one or two poles in the feedback output end OUT of OTA circuits 101
Tube voltage, as initial voltage.Simultaneously as the lining drain voltage VBS of the 3rd NMOS tube NM3 in OTA circuits 101 is not zero,
And the 3rd NMOS tube NM3 be not used deep N-well so that the 3rd NMOS tube NM3 threshold voltage is larger, and the 2nd NOMS pipes NM2 exists
Initial voltage caused by the feedback output end OUT of OTA circuits 101 is not enough to open the 3rd NMOS tube NM3.Meanwhile current mirror
In the second PMOS PM1 and the 3rd PMOS PM2 grid end voltage be high level, so as to by under the voltage of current mirroring circuit
Draw.
When power vd D electric power startings, the NMOS of low level control the first is set to by NMOS tube NM1 grid end voltage first
Pipe NM1 disconnects, and the feedback output end OUT of OTA circuits 101 voltage slowly rises on the basis of initial voltage, the first PMOS
Pipe PM1 weak current flows through the 3rd NMOS tube NM3.Now, the first PMOS PM1 in current mirroring circuit is disconnected, entirely
Circuit enters Voltage to current transducer process.Because the feedback output end OUT of OTA circuits 101 is basic electric when OTA circuits are opened
Press as the initial voltage, so that this allows OTA circuits to enter following state at once, specific following state please join
See Fig. 2 and Fig. 3.
Fig. 2 shows the output of the feedback output end of OTA circuits in the voltage-current converter circuit in the embodiment of the present invention
Simulation result, Fig. 3 shows the output of the feedback output end of OTA circuits in voltage-current converter circuit of the prior art
Simulation result.The feedback output end OUT of OTA circuits in the prior art output needs are can be seen that from Fig. 2 and Fig. 3 comparison
Time more than 100ns completes to follow triangular signal, there are problems that following slow-footed, have impact on the property of circuit
Energy；And the OTA circuits 101 in the embodiment of the present invention feedback output end OUT output voltage in voltage-current converter circuit just
The moment often to work, that is, enter the following state to triangular signal VRAMP, this will substantially reduce OTA circuit outputs and follow
The settling time of triangular signal.Meanwhile because the 3rd NMOS tube NM3 is without using deep N-well, it can cause the 3rd NMOS tube NM3's
Threshold voltage raises, and then causes initial voltage to provide the initial voltage of circuit output and can not open the 3rd NMOS tube NM3, can
To save cost, and shorten the time that OTA circuits enter following state.
In an embodiment of the present invention, in order to prevent the grid end voltage of the PMOS of current mirroring circuit in OTA circuits from occurring
Overshoot, line delay can be entered to default pulldown signal by inverter circuit and generate default first pulldown signal and default
Second pulldown signal, the first NMOS tube in OTA circuits is controlled to be beaten prior to the second PMOS in current mirror and the 3rd PMOS
Open, when being opened with the second PMOS in current mirror and the 3rd PMOS, by the second PMOS and the grid end of the 3rd PMOS
Voltage is pulled down, and specifically refers to Fig. 4.
Refer to Fig. 4 and combine Fig. 1, in an embodiment of the present invention, inverter circuit include the first phase inverter A1, with it is non-
Door NAND and N number of phase inverter A being connected in series1~AN.Wherein, the first phase inverter A1 input and default clock signal CP
Coupling, output end and NAND gate NAND first input end couple, and NAND gate NAND the second input is believed with default drop-down
Number PDn coupling, output end and N number of phase inverter A being connected in series1~ANInput coupling.
Wherein, default clock signal CP by the first phase inverter A1 carry out it is anti-phase after, export to the of NAND gate NAND
One output end, the pulldown signal PDn of control access NAND gate the second inputs of NAND are exporting tool after NOT gate NAND processing
There is the first pulldown signal SLnn of a fixed response time.First pulldown signal SLnn and the NM1 of the first NMOS tube grid end couple, so as to
The first NMOS tube NM1 is controlled to be opened at default first moment.
Meanwhile first pulldown signal SLnn pass through N number of phase inverter A being connected in series in inverter circuit again1~ANRespectively
Delay process is carried out, in phase inverter ANOutput end output second pull down signal SL.Second pulls down signal SL by controlling OTA electric
The unlatching of the first PMOS PM1 in road 101, and then cause the second PMOS PM2 in the current mirroring circuit in OTA circuits 101
Opened with the 3rd PMOS at default second moment.M is the integer less than or equal to N, and M numerical value can be according to reality
Control needs are configured.
It by the first pulldown signal SLnn is by N number of phase inverter A being connected in series to be due to the second pulldown signal SL1~AN
Delay process is carried out respectively to obtain so that the NM1 of the first NMOS tube of grid end and the first pulldown signal SLnn coupling earlier than
PMOS in circuit mirror circuit, i.e. the second PMOS PM2 and the 3rd PMOS PM3 are opened, so as in the second PMOS PM2 and
It when 3rd PMOS PM3 is opened, can will be pulled down in the second PMOS PM2 and the 3rd PMOS PM3 voltage, avoid the
There is voltage overshoot in two PMOS PM2 and the 3rd PMOS PM3 grid end, to improve the safety and reliability of circuit work.
In an embodiment of the present invention, in order to simplify the structure of inverter circuit, the precise control of postpones signal is improved,
By using RC delay circuits in inverter circuit, to reduce the quantity of the phase inverter used in inverter circuit, and improve
Carryover effects, specifically refer to Fig. 5.
Refer to Fig. 5 and combine Fig. 1, in an embodiment of the present invention, inverter circuit include the first phase inverter A1, with it is non-
Door NAND, the second phase inverter A2, the 3rd phase inverter A3, the 4th phase inverter A4 and delay circuit 501.Wherein, the first phase inverter A1
Input and default clock signal CP couple, output end and NAND gate NAND first input end couple, NAND gate NAND
The second input and default pulldown signal PDn couple, the output end input and first with the second phase inverter A2 respectively
NMOS tube NM1 grid end coupling, the second phase inverter A2 output end couple with the 3rd phase inverter A3 input, the 3rd phase inverter
A3 output end couples with the input of delay circuit 501 and the 4th phase inverter A4 input respectively, the 4th phase inverter A4's
Output end couples with the first PMOS PM1 in the current mirroring circuit of OTA circuits 101.
In an embodiment of the present invention, delay circuit 501 is RC delay circuits.Wherein, RC delay circuits include resistance R and
Electric capacity C, resistance R first end and the 3rd phase inverter A3 output end couple, the input with the 4th phase inverter A4 respectively of the second end
End and electric capacity C positive pole couple, and electric capacity C negative pole couples with default ground voltage AVSS.
Pass through and RC delay circuits added in inverter circuit, it is possible to reduce phase inverter number in inverter circuit it is same
When, improve carryover effects.
In specific implementation, the time delay of RC delay circuits is T=RC, the electricity of the resistance R by changing delay circuit
The capacitance of resistance and electric capacity C, corresponding time delay is adjusted, to realize the setting of different delays time.
The operation principle of other devices refers to the introduction of Fig. 4 appropriate sections in inverter circuit shown in Fig. 5, herein not
Repeat again.
Above-mentioned scheme, circuit is provided by initial voltage, can be opened in the OTA circuits in voltage-current converter circuit
When, a default initial voltage is provided for its feedback output end, so that the voltage of OTA circuit output ends can be described pre-
If fast lifting is carried out on the basis of voltage, it is possible to achieve the voltage of OTA circuit output ends is fast to default triangular signal
Speed follows.
Although present disclosure is as above, the present invention is not limited to this.Any those skilled in the art, this is not being departed from
In the spirit and scope of invention, it can make various changes or modifications, therefore protection scope of the present invention should be with claim institute
The scope of restriction is defined.
Claims (9)
- A kind of 1. voltage-current converter circuit, it is characterised in that including：Initial voltage provides circuit and OTA circuits；The initial voltage provides circuit, is coupled in the feedback output end of the OTA circuits and the first NMOS of the OTA circuits Between pipe, suitable for when the OTA circuits are opened, the feedback output end for the OTA circuits provides an initial voltage；The OTA circuits, suitable for being amplified default power supply voltage signal according to default gain when opening, with institute State the current signal for exporting on the basis of initial voltage and following default triangular signal to be changed.
- 2. voltage-current converter circuit according to claim 1, it is characterised in that the initial voltage, which provides circuit, to be included Second NMOS tube；Second NMOS tube is coupled in the feedback output end of the OTA circuits and first NMOS tube in the form of diode Between.
- 3. voltage-current converter circuit according to claim 2, it is characterised in that the OTA circuits include current mirror Circuit, the current mirroring circuit include the first PMOS；Also include：Inverter circuit, suitable for based on default pulldown signal, being exported at default first moment for controlling described first The first pulldown signal that NMOS tube is opened, and the current mirroring circuit in OTA circuits described in default second moment output control In the first PMOS open the second pulldown signal；First moment is earlier than second moment.
- 4. voltage-current converter circuit according to claim 3, it is characterised in that it is anti-that the inverter circuit includes first Phase device, NAND gate and N number of phase inverter being connected in series；The input of first phase inverter couples with default clock signal, the first input end of output end and the NAND gate Coupling；Second input of the NAND gate couples with default pulldown signal, output end with it is described it is N number of be connected in series it is anti-phase The input coupling of device.
- 5. voltage-current converter circuit according to claim 3, it is characterised in that it is anti-that the inverter circuit includes first Phase device, NAND gate, the second phase inverter, the 3rd phase inverter, the 4th phase inverter and delay circuit；The input of first phase inverter couples with default clock signal, the first input end of output end and the NAND gate Coupling；Second input of the NAND gate couples with default pulldown signal, and output end is defeated with second phase inverter respectively Enter the grid end coupling of end and first NMOS tube；The output end of second phase inverter and the input of the 3rd phase inverter couple, the output end of the 3rd phase inverter Coupled respectively with the input of the delay circuit and the input of the 4th phase inverter；The output end of 4th phase inverter couples with first PMOS.
- 6. voltage-current converter circuit according to claim 5, it is characterised in that the delay circuit be include resistance and The RC delay circuits of electric capacity；The output end of the first end of the resistance and the 3rd phase inverter couples, the second end respectively with the 4th phase inverter The positive pole of input and the electric capacity couples；The negative pole of the electric capacity couples with default ground voltage.
- 7. voltage-current converter circuit according to claim 6, it is characterised in that the delay duration of the RC delay circuits It is related to the resistance and electric capacity.
- 8. voltage-current converter circuit according to claim 1, it is characterised in that the span of the initial voltage is 0.5V to 0.8V.
- 9. voltage-current converter circuit according to claim 8, it is characterised in that the initial voltage is 0.7V.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610407623.XA CN107491132B (en) | 2016-06-12 | 2016-06-12 | Voltage-current converter circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610407623.XA CN107491132B (en) | 2016-06-12 | 2016-06-12 | Voltage-current converter circuit |
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| Publication Number | Publication Date |
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| CN107491132A true CN107491132A (en) | 2017-12-19 |
| CN107491132B CN107491132B (en) | 2019-11-05 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201610407623.XA Active CN107491132B (en) | 2016-06-12 | 2016-06-12 | Voltage-current converter circuit |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110058629A (en) * | 2018-01-19 | 2019-07-26 | 株式会社索思未来 | Differential voltage-current converter circuit |
| CN112445265A (en) * | 2019-09-04 | 2021-03-05 | 亚德诺半导体国际无限责任公司 | Voltage-current converter with complementary current mirror |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4835487A (en) * | 1988-04-14 | 1989-05-30 | Motorola, Inc. | MOS voltage to current converter |
| US5047729A (en) * | 1989-12-01 | 1991-09-10 | Deutsche Itt Industries Gmbh | Transconductance amplifier |
| CN101034873A (en) * | 2007-02-02 | 2007-09-12 | 清华大学 | Lower voltage conductor-spanning amplifier capable of improving the linearity and input range |
| CN103326682A (en) * | 2013-05-27 | 2013-09-25 | 苏州贝克微电子有限公司 | Adjustable operational transconductance amplifier with high linearity |
| CN105406829A (en) * | 2015-12-03 | 2016-03-16 | 中国科学院电子学研究所 | Variable gain amplifier with continuously adjustable gain |
-
2016
- 2016-06-12 CN CN201610407623.XA patent/CN107491132B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4835487A (en) * | 1988-04-14 | 1989-05-30 | Motorola, Inc. | MOS voltage to current converter |
| US5047729A (en) * | 1989-12-01 | 1991-09-10 | Deutsche Itt Industries Gmbh | Transconductance amplifier |
| CN101034873A (en) * | 2007-02-02 | 2007-09-12 | 清华大学 | Lower voltage conductor-spanning amplifier capable of improving the linearity and input range |
| CN103326682A (en) * | 2013-05-27 | 2013-09-25 | 苏州贝克微电子有限公司 | Adjustable operational transconductance amplifier with high linearity |
| CN105406829A (en) * | 2015-12-03 | 2016-03-16 | 中国科学院电子学研究所 | Variable gain amplifier with continuously adjustable gain |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110058629A (en) * | 2018-01-19 | 2019-07-26 | 株式会社索思未来 | Differential voltage-current converter circuit |
| CN112445265A (en) * | 2019-09-04 | 2021-03-05 | 亚德诺半导体国际无限责任公司 | Voltage-current converter with complementary current mirror |
| CN112445265B (en) * | 2019-09-04 | 2022-04-29 | 亚德诺半导体国际无限责任公司 | Voltage-current converter and electronic component |
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| Publication number | Publication date |
|---|---|
| CN107491132B (en) | 2019-11-05 |
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