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CN107425728B - A kind of digital optimal control method and its system of the synchronous rectification of LLC full-bridge converter - Google Patents

A kind of digital optimal control method and its system of the synchronous rectification of LLC full-bridge converter Download PDF

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Publication number
CN107425728B
CN107425728B CN201710589939.XA CN201710589939A CN107425728B CN 107425728 B CN107425728 B CN 107425728B CN 201710589939 A CN201710589939 A CN 201710589939A CN 107425728 B CN107425728 B CN 107425728B
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synchronous rectifier
full
llc
time
drain voltage
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CN107425728A (en
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孙伟锋
夏熙
俞居正
朱俊杰
钱钦松
陆生礼
时龙兴
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Southeast University
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Southeast University
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of DC power input into DC power output
    • H02M3/22Conversion of DC power input into DC power output with intermediate conversion into AC
    • H02M3/24Conversion of DC power input into DC power output with intermediate conversion into AC by static converters
    • H02M3/28Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC
    • H02M3/325Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33569Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements
    • H02M3/33576Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements having at least one active switching element at the secondary side of an isolation transformer
    • H02M3/33592Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements having at least one active switching element at the secondary side of an isolation transformer having a synchronous rectifier circuit or a synchronous freewheeling circuit at the secondary side of an isolation transformer
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of DC power input into DC power output
    • H02M3/22Conversion of DC power input into DC power output with intermediate conversion into AC
    • H02M3/24Conversion of DC power input into DC power output with intermediate conversion into AC by static converters
    • H02M3/28Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC
    • H02M3/325Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33507Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters
    • H02M3/33515Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters with digital control
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)
  • Rectifiers (AREA)

Abstract

一种LLC全桥变换器同步整流的数字优化控制方法及其系统,对全桥LLC副边的同步整流管关断之前和关断之后的漏端电压分别进行采样,将两次采样结果通过比较器进行逻辑比较,根据逻辑比较结果由微控制器对全桥LLC副边同步整流管的关断时间进行调整并利用微控制器的中断配合,实现LLC副边同步整流管关断前后漏端电压的精确采样,通过实时比较由微控制器给出的需要调整的时间命令,实现全桥LLC副边同步整流管在最佳时刻关断,提高全桥LLC电路的整体效率。

A digital optimal control method and system for synchronous rectification of an LLC full-bridge converter. The drain voltages before and after the synchronous rectifier on the secondary side of the full-bridge LLC are sampled respectively, and the two sampling results are compared by comparing the two sampling results. According to the logic comparison result, the microcontroller adjusts the turn-off time of the full-bridge LLC secondary-side synchronous rectifier, and uses the interrupt cooperation of the microcontroller to realize the drain voltage before and after the LLC secondary-side synchronous rectifier is turned off. By comparing in real time with the time command that needs to be adjusted, the secondary side synchronous rectifier of the full-bridge LLC can be turned off at the best time, and the overall efficiency of the full-bridge LLC circuit can be improved.

Description

A kind of digital optimal control method and its system of the synchronous rectification of LLC full-bridge converter
Technical field
The present invention relates to the LLC resonant full bridge switch converters more particularly to a kind of LLC full-bridge using synchronous rectification mode The digital optimal control method and its system of transducer synchronous rectification.
Background technique
Currently, the switching frequency in LLC power converter is higher and higher, switching frequency to increase the advantages of bringing as follows: 1. energy storage device (inductance, transformer, capacitor etc.) volume in circuit reduces accordingly.2. the power density of entire circuit is into one Step increases.But the increase of switching frequency also brings the increase of various switching losses and conduction loss, thus synchronous rectification quilt The rectification to replace diode is widely applied, especially in the case where exporting high current.
Currently, being applied to the synchronous rectification control method of LLC topological circuit has 3 classes: electric current testing;The quasi- electricity of self-powered dynamic model Press detection method;It is leading digital detecting technique with microcontroller or FPGA.Wherein, current detection technology is more accurate, but The energy loss for being resistance brought by current detecting is efficiency that is comparable big, therefore will affect whole topology.Detection Synchronous rectifier drain terminal voltage becomes the efficient synchronous rectification control program of only one, based on detection synchronous rectifier hourglass source electrode The analog voltage detection technique of voltage has sufficiently complex circuit structure, is just unable to satisfy the requirement of high power density in this way, together When, such technology will lead to parasitic gate concussion.It is leading digital detecting technique with microcontroller or FPGA is to compare at present Preferable source-drain voltage detection technique, currently, a kind of more common synchronous rectification control program mainly detect synchronize it is whole Whether the body diode of flow tube is connected, adaptive rapidly if conducting to close synchronous rectifier, but this scheme mainly by The influence that body diode conducting and reverse-conducting switch between the two, can be such that entire LLC circuit efficiency reduces, while corresponding The ratio that latency issue can highlight at high frequencies is more serious.
As present generation power supplies are towards high power density, efficient development, excellent simple digital synchronous rectifies controlling party Very it is necessary to be particularly important LLC secondary synchronous rectifier in best shutdown point shutdown to method.
Summary of the invention
Object of the present invention is to be directed to the deficiency of existing LLC circuit pair side synchronous rectification control method, it is complete to provide a kind of LLC The digital optimal control method and its system of bridge transducer synchronous rectification can be such that LLC secondary synchronous rectifier is most preferably turning off Point shutdown.
To achieve the goals above, the technical solution taken is as follows by the present invention: a kind of LLC full-bridge converter synchronous rectification Digital optimal control method is adaptively adjusted shutdown based on the drain terminal voltage for detecting full-bridge LLC secondary synchronous rectifier The time of LLC secondary synchronous rectifier, it is characterised in that: to before the shutdown of the synchronous rectifier on full-bridge LLC pair side and shutdown Drain terminal voltage afterwards is sampled respectively, double sampling result is carried out logical comparison by comparator, according to logical comparison knot Fruit is adjusted by turn-off time of the microcontroller to full-bridge LLC secondary synchronous rectifier and the interruption of microcontroller is utilized to match Close, realize the accurate sampling of LLC secondary synchronous rectifier shutdown front and back source and drain end voltage, by compare in real time by microcontroller to The time order that needs out adjust, realizes that full-bridge LLC secondary synchronous rectifier is turned off in the best time, improves full-bridge LLC electricity The whole efficiency on road.
The following steps are included:
1) first in one cycle, before the shutdown of full-bridge LLC secondary synchronous rectifier, synchronous rectification is detected for the first time The voltage of pipe drain terminal, while being stored in microcontroller and exporting the reference threshold electricity to comparator as logical comparison Pressure, after the shutdown of full-bridge LLC secondary synchronous rectifier, the voltage of second of detection synchronous rectifier drain terminal;
2) the drain voltage i.e. reference threshold voltage and of obtained full-bridge LLC secondary synchronous rectifier will be detected for the first time The drain terminal voltage for the full-bridge LLC secondary synchronous rectifier that secondary detection obtains carries out logical comparison, same with what is detected for the first time Step rectifying tube drain terminal voltage subtract the drain terminal voltage of the synchronous rectifier detected for the second time as logical comparison as a result, if Logical comparison result is positive, and illustrates the body diode conducting of synchronous rectifier, is then denoted as logical one, is otherwise denoted as logical zero;
3) microcontroller is transferred to adjust the turn-off time of full-bridge LLC secondary synchronous rectifier logical comparison result It is whole.If the logical comparison result of output is " 1 ", microcontroller postpones a period of time shutdown full-bridge LLC in next cycle Synchronous rectifier, if output logical comparison result be " 0 ", show that synchronous rectifier turn-off criterion is substantially met at this time;
4) it needs to carry out next step judgement when logical comparison result is " 0 ", the full-bridge LLC pair side for judging at this time synchronizes whole Whether the drain terminal voltage of flow tube meets within safe range, i.e., the synchronous rectifier leakage of second of detection in guarantee a cycle End voltage is negative, if the synchronous rectifier drain terminal voltage of second of detection is that canonical is expressed as not within safe range, to prevent Only the time of synchronous rectifier shutdown occurs excessively adjusting phenomenon too late, leads to the consequence for electric current reverse irrigation occur;
5) it is " 0 " in logical comparison result, while meets the leakage of the synchronous rectifier detected for the second time within this period End voltage is negative within i.e. safe range, then microcontroller keeps output constant to the clock signal of synchronous rectifier, i.e., at this time The shutdown moment of synchronous rectifier is more satisfactory;
6) above-mentioned steps are recycled in next cycle, so that synchronous rectifier is turned off in optimum time point.
Cooperated using the interruption of microcontroller, realizes the accurate of LLC secondary synchronous rectifier shutdown front and back source-drain voltage The method of sampling is as follows:
1) in one cycle, internal clocking failing edge is broken as in the logic unit at the t0 moment using microcontroller Mouthful;
2) in the failing edge of t1 instance sample full-bridge LLC secondary synchronous rectifier drain voltage, microcontroller at this moment Logic unit internal clocking generate interruption;
3) the t3 moment interrupts before full-bridge LLC secondary synchronous rectifier turns off, while sampling full-bridge LLC pair for the first time The drain terminal voltage of synchronous rectifier;
4) the t4 moment interrupts after the shutdown of full-bridge LLC secondary synchronous rectifier, while second of sampling full-bridge LLC The drain terminal voltage of secondary synchronous rectifier.
The control system of the digital optimal control method of above-mentioned LLC full-bridge converter synchronous rectification, it is characterised in that: including Full-bridge LLC topological circuit, full-bridge LLC topological circuit secondary synchronous rectifier drain voltage detection circuit, using microcontroller as core The control circuit and isolated drive circuit of the heart;
Full-bridge LLC topological circuit secondary synchronous rectifier drain voltage detection circuit includes full-bridge LLC topological circuit pair side Drain terminal voltage sampling circuit, comparator CMP and the resistance R of synchronous rectifier0With capacitor C0The filter circuit of composition;Full-bridge LLC The drain terminal voltage sampling circuit of topological circuit secondary synchronous rectifier includes resistance R1, resistance R2And diode Db, resistance R1's One end connects power source voltage Vcc, resistance R1The other end connect resistance R2One end and diode DbAnode, diode Db's Cathode connects the drain terminal of any one devices in the devices of two, side of full-bridge LLC topological circuit pair, electricity Hinder R2The other end be the synchronous rectifier drain terminal voltage sample output end connect comparator CMP negative terminal, comparator CMP's Output end connects resistance R0One end, resistance R0The other end connect capacitor C0One end and output end as filter circuit, electricity Hold C0The other end ground connection;
It include digital analog converter DAC, analog-digital converter ADC0, logic control list by the control circuit of core of microcontroller Member and two clock modules, the input terminal connection full-bridge LLC topological circuit secondary synchronous rectifier leakage of analog-digital converter ADC0 The output end of filter circuit in terminal voltage detecting circuit, output and the logic control element of analog-digital converter ADC0 are bi-directionally connected, The output all the way of logic control element exports after a clock module is separately connected two, full-bridge LLC topological circuit pair side together The grid of step rectification metal-oxide-semiconductor, another output connect after another clock module using isolated drive circuit output respectively The grid of full-bridge LLC topological circuit four metal-oxide-semiconductors of primary side is connect, there are also export after digital analog converter DAC feedback link all the way extremely The anode of comparator CMP in LLC topological circuit secondary synchronous rectifier drain voltage detection circuit;
When whole system start starting when, LLC topological circuit start to work, while the primary side metal-oxide-semiconductor of LLC topological circuit with Secondary synchronous rectifier cooperating, secondary synchronous rectifier are turned off according to switching frequency is corresponding to the progress of the relationship of resonance frequency The adjustment of time, LLC circuit secondary synchronous rectifier drain terminal detection circuit detects the drain terminal voltage of synchronous rectifier, in LLC pair Detection detection synchronous rectifier drain terminal voltage, while the synchronous rectifier that will be detected for the first time for the first time before the shutdown of side rectifying tube Drain terminal voltage the anode of comparator CMP is connected to as the reference threshold voltage of comparator, in LLC circuit pair side synchronous rectification Second detection synchronous rectifier drain terminal voltage after pipe shutdown, and using the synchronous rectifier drain terminal voltage of second of detection as than Negative terminal input signal compared with device CMP, the drain voltage detected twice are compared, when two pole of body of LLC secondary synchronous rectifier When pipe is connected, the logic output of comparator CMP is " 1 ", controls LLC pair side by the control system that microcontroller is core at this time Synchronous rectifier extends certain turn-on time in next cycle, while constantly judging that it compared patrols in the next period Output is collected up to logic output is " 0 ", when it is " 0 " that comparator logic, which exports, while judging it in logic output for the week of " 0 " In phase the drain terminal voltage of second of sampling guarantees that synchronizing for interior second of the detection of a cycle is whole whether within safe range Flow tube drain terminal voltage is negative, and is expressed as not within safe range if the synchronous rectification tube voltage of second of detection is positive, with The problem of overregulating is prevented, when the drain terminal voltage of second sampling meets in safe range, that is, the synchronous rectifier detected After drain terminal voltage is negative, then the turn-off time of LLC secondary synchronous rectifier at this time is defaulted as the time most preferably turned off, at this time The efficiency of entire LLC topological circuit has reached highest efficiency.
Advantages of the present invention and remarkable result:
1, using digital control, control more flexible compared to the application that traditional simulation controls digital control algorithm Precision is more increased.
2, in same period, using the drain voltage of the LLC circuit secondary synchronous rectifier of first time sampling as this week The comparator reference threshold value of phase has just obtained an exact references threshold value with periodic time self-adapting rather than in universal method in this way A fixed threshold, thus its adaptive ability is stronger, and the time control of synchronous rectifier shutdown is more accurate.
3, in same period, the logic ratio of the drain voltage and the drain voltage of second of sampling of first time sampling is utilized It is very concise and clear compared with the judgment criteria that value " 1 " or " 0 " adjust the turn-off time as the control system that microcontroller is core, have Conducive to the more accurate turn-off time adjustment of realization.
4, in the mediation process of control system, while judging whether second of sampling is negative value i.e. safety in same period It in range, is beneficial to prevent and overregulates, be achieved in accurate shutdown synchronous rectifier, improve efficiency.
Detailed description of the invention
Fig. 1 is control system block diagram of the present invention;
Fig. 2 is present system schematic diagram;
Fig. 3 is present invention control program flow diagram;
Fig. 4 is LLC circuit secondary synchronous rectifier source-drain voltage detection waveform figure;
Fig. 5 be the present invention under full load conditions with efficiency comparative's curve graph of universal control method.
Specific embodiment
The technical solution of invention is described in detail with reference to the accompanying drawing.
Such as Fig. 1,2, control system of the present invention includes full-bridge LLC topological circuit, full-bridge LLC topological circuit pair side synchronous rectification Tube drain voltage detection circuit, using microcontroller as the control circuit of core and isolated drive circuit.Wherein, full-bridge LLC topology Circuit secondary synchronous rectifier drain voltage detection circuit includes the drain terminal voltage of full-bridge LLC topological circuit secondary synchronous rectifier Sample circuit, comparator CMP and resistance R0With capacitor C0The filter circuit of composition.Full-bridge LLC topological circuit pair side synchronous rectification The drain terminal voltage sampling circuit of pipe includes resistance R1, resistance R2And diode Db, resistance R1One end connect power source voltage Vcc, Resistance R1The other end connect resistance R2One end and diode DbAnode, diode DbCathode connection full-bridge LLC topology electricity The drain terminal of devices M6 is (due to the drain terminal of any one in sampling two devices M6 or M5 in the pair side of road Voltage is ok, and figure embodiment is by taking the drain terminal voltage for sampling M6 as an example, similarly hereinafter) resistance R1 and R2 carry out partial pressure sampling, resistance R2The other end be devices M6 drain terminal voltage sample output end connect comparator CMP negative terminal, comparator CMP's Output end connects resistance R0One end, resistance R0The other end connect capacitor C0One end and output end as filter circuit, electricity Hold C0The other end ground connection.
It include digital analog converter DAC, analog-digital converter ADC0, logic control list by the control circuit of core of microcontroller The input terminal connection topological circuit pair side full-bridge LLC of member and clock module 1 and clock module 2, analog-digital converter ADC0 is synchronous The output end of filter circuit in tube drain voltage detection circuit is rectified, the output of analog-digital converter ADC0 and logic control element are double To connection, the output all the way of logic control element exports after clock module 1 respectively drives full-bridge LLC topological circuit pair side two The grid of a devices M5, M6, another output is after clock module 2, using isolated drive circuit output point Not Qu Dong four metal-oxide-semiconductor M1- of full-bridge LLC topological circuit primary side M4 grid, it is anti-there are also exporting after digital analog converter DAC all the way Feedback is connected to the anode of comparator CMP in LLC topological circuit secondary synchronous rectifier drain voltage detection circuit, to store simultaneously The result that output synchronous rectifier M6 drain voltage samples for the first time in one cycle.
In present system, full-bridge LLC topological circuit secondary synchronous rectifier source and drain end voltage sampling circuit is in full-bridge LLC The front and back of secondary synchronous rectifier shutdown samples simultaneously, is adopted by subtracting the voltage after shutdown using the voltage sample value before shutdown Sample value obtains a logic judgment number, and logic judgment number is conveyed to and is realized by the control system of core of microcontroller The turn-off time adjustment of real-time full-bridge LLC secondary synchronous rectifier, microcontroller are the control system output signal control of core Full-bridge LLC secondary synchronous rectifier M5 and M6 processed is turned off in the best time.
The course of work of control system: when whole system starts starting, LLC topological circuit is started to work, while LLC is opened up The primary side metal-oxide-semiconductor and secondary synchronous rectifier cooperating of circuit are flutterred, secondary synchronous rectifier is according to switching frequency and resonance frequency The relationship of rate carries out the adjustment of corresponding turn-off time, and LLC circuit secondary synchronous rectifier drain electrode detection circuit detects synchronous rectification The drain voltage of pipe, the detection detection synchronous rectifier drain voltage for the first time before LLC pair side rectifying tube turns off, while by first The drain voltage of the secondary synchronous rectifier detected is connected to the anode of comparator CMP as the reference threshold voltage of comparator, Second of detection synchronous rectifier drain voltage after the shutdown of LLC circuit secondary synchronous rectifier, and it is same by what is detected for the second time Negative terminal input signal of the rectifying tube drain voltage as comparator CMP is walked, the drain voltage detected twice is compared, and works as LLC When the body diode conducting of secondary synchronous rectifier, the logic output of comparator CMP is " 1 ", is at this time core by microcontroller The control system control LLC secondary synchronous rectifier of the heart extends certain turn-on time in next cycle, while following Period constantly judge logic output that it compares until logic exports as " 0 ", when comparator logic exports as " 0 ", simultaneously Judge its logic output be in the period of " 0 " second drain voltage sampled whether within safe range to prevent The problem of overregulating, after the drain voltage of second of sampling meets in safe range, then LLC pair side synchronous rectification at this time The turn-off time of pipe is defaulted as the time most preferably turned off, and the efficiency of entire LLC topological circuit at this time has reached highest efficiency.
Such as Fig. 3, the control method of control system of the present invention is before turning off to the synchronous rectifier on full-bridge LLC pair side and to close Drain terminal voltage after disconnected is sampled respectively, double sampling result is carried out logical comparison by comparator, according to logic ratio It is adjusted compared with result by turn-off time of the microcontroller to full-bridge LLC secondary synchronous rectifier and utilizes the interruption of microcontroller Cooperation realizes the accurate sampling of LLC secondary synchronous rectifier shutdown front and back source-drain voltage, by comparing in real time by microcontroller The time order that the needs provided adjust, realizes that full-bridge LLC secondary synchronous rectifier is turned off in the best time, improves full-bridge LLC The whole efficiency of circuit.The following steps are included:
1) first in one cycle, full-bridge LLC secondary synchronous rectifier M6 shutdown before for the first time detection synchronize it is whole The voltage VSR (1) of flow tube M6 drain electrode, while being stored to using microcontroller in the control system of core and to export to comparing The anode of device CMP, the voltage of second of detection synchronous rectifier M6 drain electrode after full-bridge LLC secondary synchronous rectifier M6 shutdown VSR (2) is simultaneously stored.
2) by first time detection full-bridge LLC secondary synchronous rectifier M6 drain electrode voltage VSR (1) with detect for the second time The voltage VSR (2) of synchronous rectifier M6 is compared, and is subtracted with the drain voltage VSR (1) of the synchronous rectifier M6 of first time detection The synchronous rectifier drain voltage VSR (2) detected for the second time is gone to be transported to as the output result of comparator CMP with microcontroller Device is the digital logic unit of the control system of core, wherein output comparison result is positive, that is, the body of synchronous rectifier M6 Diode current flow is then denoted as logical one, is otherwise denoted as logical zero.
3) when according to the Digital Logic result of CMP output is compared to the shutdown of full-bridge LLC secondary synchronous rectifier M5 and M6 Between be adjusted.It wherein, is the control system of core under using microcontroller if the logical comparison result of output is " 1 " A cycle delay a period of time turns off the synchronous rectifier M6 of full-bridge LLC, if the logical comparison result of output is " 0 ", Show that synchronous rectifier M6 turn-off criterion is substantially met at this time.
4) it needs to carry out next step judgement when logic output result is " 0 ", the full-bridge LLC pair side for judging at this time synchronizes whole Whether flow tube M6 drain voltage meets in certain safe range the (synchronous rectification of second of detection i.e. in guarantee a cycle Pipe M6 drain terminal voltage VSR (2) storage value is negative, if synchronous rectifier M6 drain terminal voltage VSR (2) storage value of second of detection is Regular representation be not within safe range) with prevent M6 turn off time too late, result in and the phenomenon that electric current reverse irrigation occur.
5) meet comparator CMP logic output be " 0 ", while meet detected for the second time within this period synchronize it is whole Flow tube M6 drain voltage (M6 drain terminal voltage VSR (2) is negative) within safe range, then keep the arteries and veins of this synchronous rectifier M6 The wide period is constant.
6) above-mentioned steps are recycled in next cycle, so that synchronous rectifier is turned off in optimum time point.
For the accurate sampling for realizing LLC secondary synchronous rectifier shutdown front and back source-drain voltage, microcontroller is core Time of control system interrupt process the following steps are included:
1) in one cycle, the t0 moment using controller be core control system internal clocking failing edge as in Break mouth.
2) in the failing edge of t1 instance sample full-bridge LLC secondary synchronous rectifier M6 drain voltage, at this moment with micro-control Device processed is that the clock inside the control system of core generates interruption.
3) the t3 moment interrupts before full-bridge LLC secondary synchronous rectifier M6 is turned off, while sampling full-bridge LLC for the first time Secondary synchronous rectifier M6 drain voltage.
4) the t4 moment interrupts after full-bridge LLC secondary synchronous rectifier M6 shutdown, while second of this sampling is complete Bridge LLC secondary synchronous rectifier M6 drain voltage.
As shown in figure 4, be LLC circuit secondary synchronous rectifier drain terminal voltage detecting waveform diagram, detection waveform be Switching frequency is less than the waveform in the case of resonance frequency, it can be seen from the figure that the detection synchronous rectifier shutdown in Fig. 4 (a) The drain terminal voltage of front and back simultaneously carries out logic judgment, if at this moment having VSR (1) > VSR (2), and two voltages are respectively less than zero at this time, Then logic judgment is " 1 " at this time, then M6 is delayed to turn off a period of time.As shown in Fig. 4 (b), if next week after adjustment Still there is VSR (1) > VSR (2) in phase, and there are still two voltages less than zero, then logic judgment is still " 1 " at this time, then M6 is still It is old to continue to be delayed to turn off a period of time.If VSR (1) < VSR (2), devices M6 may be just in its electric current at this time Zero crossing shutdown, then need further to be judged, if VSR (1) is negative and VSR (2) is also negative, as shown in Fig. 4 (d), then The turn-off time of next switch periods synchronous rectifier M6 remains unchanged.If VSR (2) is positive, as shown in Fig. 4 (c), then micro-control Device processed can control next switch periods devices M6 driving signal, by next switch periods devices M6 Turn-off time shift to an earlier date a period of time.
Fig. 5 is the corresponding efficiency curve diagram under full load conditions, and wherein the curve graph of origin is that the efficiency of universal method is bent Line chart, peak efficiency reaches 97.5%, and corresponding triangle curve figure is the corresponding efficiency curve diagram of the present invention, compared to Its efficiency on the whole of the efficiency curve diagram of universal method is higher by 0.5% or so.

Claims (4)

1.一种LLC全桥变换器同步整流的数字优化控制方法,以检测全桥LLC副边同步整流管的漏端电压为基础,自适应地调整关断LLC副边同步整流管的时间,其特征在于:对全桥LLC副边的同步整流管关断之前和关断之后的漏端电压分别进行采样,将两次采样结果通过比较器进行逻辑比较,根据逻辑比较结果由微控制器对全桥LLC副边同步整流管的关断时间进行调整并利用微控制器的中断配合,实现LLC副边同步整流管关断前后源漏端电压的精确采样,通过实时比较由微控制器给出的需要调整的时间命令,实现全桥LLC副边同步整流管在最佳时刻关断,提高全桥LLC电路的整体效率。1. A digital optimal control method for synchronous rectification of LLC full-bridge converters, based on detecting the drain voltage of the full-bridge LLC secondary-side synchronous rectifier tube, adaptively adjusting the time for turning off the LLC secondary-side synchronous rectifier tube, which It is characterized by: sampling the drain voltage of the synchronous rectifier on the secondary side of the full-bridge LLC before and after it is turned off, comparing the two sampling results logically by the comparator, and using the microcontroller to compare the full The turn-off time of the bridge LLC secondary-side synchronous rectifier tube is adjusted and the interrupt cooperation of the microcontroller is used to achieve accurate sampling of the source-drain voltage before and after the LLC secondary-side synchronous rectifier tube is turned off. The time command that needs to be adjusted enables the full-bridge LLC secondary side synchronous rectifier to be turned off at the best time, and improves the overall efficiency of the full-bridge LLC circuit. 2.根据权利要求1所述的LLC全桥变换器同步整流的数字优化控制方法,其特征在于,包括以下步骤:2. the digital optimization control method of LLC full-bridge converter synchronous rectification according to claim 1, is characterized in that, comprises the following steps: 1)首先在一个周期内,在全桥LLC副边同步整流管关断之前,第一次检测同步整流管漏端的电压,同时将其存储到微控制器内并输出给比较器作为逻辑比较的参考阈值电压,在全桥LLC副边同步整流管关断之后,第二次检测同步整流管漏端的电压;1) First, in one cycle, before the full-bridge LLC secondary side synchronous rectifier is turned off, the voltage of the drain terminal of the synchronous rectifier is detected for the first time, and it is stored in the microcontroller and output to the comparator as a logic comparison. Referring to the threshold voltage, after the full-bridge LLC secondary side synchronous rectifier is turned off, the voltage at the drain of the synchronous rectifier is detected for the second time; 2)将第一次检测得到的全桥LLC副边同步整流管的漏极电压即参考阈值电压与第二次检测得到的全桥LLC副边同步整流管的漏端电压进行逻辑比较,用第一次检测到的同步整流管的漏端电压减去第二次检测到的同步整流管的漏端电压作为逻辑比较结果,如果逻辑比较结果为正,说明同步整流管的体二极管导通,则记为逻辑“1”,否则记为逻辑“0”;2) Logically compare the drain voltage of the secondary side synchronous rectifier tube of the full-bridge LLC detected for the first time, that is, the reference threshold voltage, and the drain voltage of the secondary-side synchronous rectifier tube of the full-bridge LLC detected by the second detection. The drain voltage of the synchronous rectifier detected once is subtracted from the drain voltage of the synchronous rectifier detected for the second time as the logical comparison result. If the logical comparison result is positive, it means that the body diode of the synchronous rectifier is turned on, then Recorded as logic "1", otherwise recorded as logic "0"; 3)将逻辑比较结果交由微控制器对全桥LLC副边同步整流管的关断时间进行调整,如果输出的逻辑比较结果为“1”,则微控制器在下一个周期延迟一段时间关断全桥LLC的同步整流管,如果输出的逻辑比较结果为“0”,表明此时同步整流管关断条件基本满足;3) The logic comparison result is handed over to the microcontroller to adjust the turn-off time of the secondary side synchronous rectifier of the full-bridge LLC. If the output logic comparison result is "1", the microcontroller will be turned off after a delay in the next cycle. For the synchronous rectifier of the full-bridge LLC, if the output logic comparison result is "0", it indicates that the turn-off condition of the synchronous rectifier is basically satisfied at this time; 4)在逻辑比较结果为“0”时需要进行下一步判断,判断此时的全桥LLC副边同步整流管的漏端电压是否满足在安全范围之内,即保证一个周期内第二次检测的同步整流管漏端电压为负,若第二次检测的同步整流管电压为正则表示为不在安全范围之内,以防止同步整流管关断的时间过晚即出现过度调节现象,导致出现电流倒灌的后果;4) When the logical comparison result is "0", the next step needs to be judged to judge whether the drain voltage of the secondary side synchronous rectifier of the full-bridge LLC is within the safe range, that is, to ensure the second detection in one cycle. The drain voltage of the synchronous rectifier tube is negative. If the voltage of the synchronous rectifier tube detected for the second time is positive, it means that it is not within the safe range, so as to prevent the synchronous rectifier tube from being turned off too late, which will cause over-regulation, resulting in the occurrence of current. consequences of flooding; 5)在逻辑比较结果为“0”,同时满足在此周期内第二次检测到的同步整流管的漏端电压为负即安全范围之内,则微控制器保持输出给同步整流管的时钟信号不变,即此时同步整流管的关断时刻比较理想;5) When the logical comparison result is "0" and the drain voltage of the synchronous rectifier tube detected for the second time in this cycle is negative, that is, within the safe range, the microcontroller keeps the clock output to the synchronous rectifier tube. The signal does not change, that is, the turn-off time of the synchronous rectifier is ideal at this time; 6)在下一个周期循环上述步骤,使得同步整流管在最佳时间点关断。6) Repeat the above steps in the next cycle, so that the synchronous rectifier is turned off at the optimum time point. 3.根据权利要求1或2所述的LLC全桥变换器同步整流的数字优化控制方法,其特征在于:利用微控制器的中断配合,实现LLC副边同步整流管关断前后源漏极电压的精确采样的方法如下:3. the digital optimization control method of LLC full-bridge converter synchronous rectification according to claim 1 and 2, it is characterized in that: utilize the interruption coordination of microcontroller, realize source-drain voltage before and after LLC secondary side synchronous rectifier is turned off The exact sampling method is as follows: 1)在一个周期内,在t0时刻将微控制器的逻辑单元中内部时钟下降沿作为中断入口;1) In one cycle, use the falling edge of the internal clock in the logic unit of the microcontroller as the interrupt entry at time t0; 2)在t1时刻采样全桥LLC副边同步整流管漏极电压的下降沿,在此时刻微控制器的逻辑单元内部时钟产生中断;2) Sampling the falling edge of the drain voltage of the secondary side synchronous rectifier tube of the full-bridge LLC at time t1, and the internal clock of the logic unit of the microcontroller is interrupted at this time; 3)在全桥LLC副边同步整流管关断前t3时刻发生中断,同时第一次采样全桥LLC副边同步整流管的漏端电压;3) An interruption occurs at time t3 before the full-bridge LLC secondary-side synchronous rectifier is turned off, and the drain voltage of the full-bridge LLC secondary-side synchronous rectifier is sampled for the first time; 4)在全桥LLC副边同步整流管关断之后t4时刻发生中断,同时第二次采样全桥LLC副边同步整流管的漏端电压。4) An interruption occurs at time t4 after the full-bridge LLC secondary-side synchronous rectifier is turned off, and the drain voltage of the full-bridge LLC secondary-side synchronous rectifier is sampled for the second time. 4.根据权利要求1所述LLC全桥变换器同步整流的数字优化控制方法的控制系统,其特征在于:包括全桥LLC拓扑电路、全桥LLC拓扑电路副边同步整流管漏端电压检测电路、以微控制器为核心的控制电路和隔离驱动电路;4. the control system of the digital optimization control method of LLC full-bridge converter synchronous rectification according to claim 1, is characterized in that: comprise full-bridge LLC topology circuit, full-bridge LLC topology circuit secondary side synchronous rectifier tube drain voltage detection circuit , Microcontroller as the core control circuit and isolation drive circuit; 全桥LLC拓扑电路副边同步整流管漏端电压检测电路包括全桥LLC拓扑电路副边同步整流管的漏端电压采样电路、比较器CMP以及电阻R0与电容C0构成的滤波电路;全桥LLC拓扑电路副边同步整流管的漏端电压采样电路包括电阻R1、电阻R2以及二极管Db,电阻R1的一端连接电源电压Vcc,电阻R1的另一端连接电阻R2的一端和二极管Db的阳极,二极管Db的阴极连接全桥LLC拓扑电路副边两个同步整流MOS管中任意一个同步整流MOS管的漏端,电阻R2的另一端为该同步整流管的漏端电压采样输出端连接比较器CMP的负端,比较器CMP的输出端连接电阻R0的一端,电阻R0的另一端连接电容C0的一端并作为滤波电路的输出端,电容C0的另一端接地;The full-bridge LLC topology circuit's secondary-side synchronous rectifier drain voltage detection circuit includes a full-bridge LLC topology circuit's secondary-side synchronous rectifier drain voltage sampling circuit, a comparator CMP, and a filter circuit composed of a resistor R 0 and a capacitor C 0 ; The drain voltage sampling circuit of the secondary side synchronous rectifier tube of the bridge LLC topology circuit includes a resistor R 1 , a resistor R 2 and a diode D b , one end of the resistor R 1 is connected to the power supply voltage Vcc, and the other end of the resistor R 1 is connected to one end of the resistor R 2 and the anode of the diode D b , the cathode of the diode D b is connected to the drain of any one of the two synchronous rectification MOS tubes on the secondary side of the full-bridge LLC topology circuit, and the other end of the resistor R 2 is the drain of the synchronous rectifier tube. The terminal voltage sampling output terminal is connected to the negative terminal of the comparator CMP, the output terminal of the comparator CMP is connected to one end of the resistor R 0 , and the other end of the resistor R 0 is connected to one end of the capacitor C 0 and used as the output terminal of the filter circuit . The other end is grounded; 以微控制器为核心的控制电路包括数模转换器DAC、模数转换器ADC0、逻辑控制单元以及两个时钟模块,模数转换器ADC0的输入端连接全桥LLC拓扑电路副边同步整流管漏端电压检测电路中滤波电路的输出端,模数转换器ADC0的输出与逻辑控制单元双向连接,逻辑控制单元的一路输出经过一个时钟模块后输出分别连接全桥LLC拓扑电路副边两个同步整流MOS管的栅极,另一路输出经过另一个时钟模块后,再经过隔离驱动电路输出分别连接全桥LLC拓扑电路原边四个MOS管的栅极,还有一路输出经数模转换器DAC后反馈连接至LLC拓扑电路副边同步整流管漏端电压检测电路中比较器CMP的正端;The control circuit with a microcontroller as the core includes a digital-to-analog converter DAC, an analog-to-digital converter ADC0, a logic control unit and two clock modules. The input end of the analog-to-digital converter ADC0 is connected to the secondary side synchronous rectifier tube of the full-bridge LLC topology circuit The output of the filter circuit in the drain voltage detection circuit, the output of the analog-to-digital converter ADC0 is bidirectionally connected to the logic control unit, and one output of the logic control unit passes through a clock module and then the outputs are respectively connected to the secondary side of the full-bridge LLC topology circuit. The gate of the rectifier MOS tube, the other output is connected to the gates of the four MOS tubes on the primary side of the full-bridge LLC topology circuit after the other output passes through another clock module, and then the output of the isolated drive circuit is connected to the gates of the four MOS tubes on the primary side of the full-bridge LLC topology circuit. The back feedback is connected to the positive terminal of the comparator CMP in the secondary side synchronous rectifier tube drain voltage detection circuit of the LLC topology circuit; 当整个系统开始启动时,LLC拓扑电路开始工作,同时LLC拓扑电路的原边MOS管与副边同步整流管配合工作,副边同步整流管根据开关频率与谐振频率的关系进行相应关断时间的调整,LLC电路副边同步整流管漏端检测电路检测同步整流管的漏端电压,在LLC副边整流管关断前检测第一次检测同步整流管漏端电压,同时将第一次检测到的同步整流管的漏端电压作为比较器的参考阈值电压连接在比较器CMP的正端,在LLC电路副边同步整流管关断后第二次检测同步整流管漏端电压,并将第二次检测的同步整流管漏端电压作为比较器CMP的负端输入信号,两次检测的漏极电压进行比较,当LLC副边同步整流管的体二极管导通时,比较器CMP的逻辑输出为“1”,此时通过微控制器为核心的控制系统控制LLC副边同步整流管在下一个周期延长一定的导通时间,同时在接下来的周期不断判断其比较的逻辑输出直至逻辑输出为“0”,在比较器逻辑输出为“0”时,同时判断其在逻辑输出为“0”的周期内第二次采样的漏端电压是否在安全范围之内,即保证一个周期内第二次检测的同步整流管漏端电压为负,若第二次检测的同步整流管电压为正则表示为不在安全范围之内,以防止出现过调节的问题,当第二次采样的漏端电压满足安全范围内,即检测的同步整流管漏端电压为负之后,则此时的LLC副边同步整流管的关断时间默认为最佳关断的时间,此时整个LLC拓扑电路的效率达到了最高的效率。When the whole system starts to start, the LLC topology circuit starts to work, and at the same time, the primary side MOS transistor of the LLC topology circuit cooperates with the secondary side synchronous rectifier transistor. Adjustment, the leakage terminal detection circuit of the secondary side synchronous rectifier tube of the LLC circuit detects the leakage terminal voltage of the synchronous rectifier tube. The drain voltage of the synchronous rectifier is connected to the positive terminal of the comparator CMP as the reference threshold voltage of the comparator. After the secondary side of the LLC circuit is turned off, the drain voltage of the synchronous rectifier is detected for the second time, and the second The second detected synchronous rectifier drain voltage is used as the negative input signal of the comparator CMP, and the two detected drain voltages are compared. When the body diode of the LLC secondary side synchronous rectifier is turned on, the logic output of the comparator CMP is "1", at this time, the control system with the microcontroller as the core controls the LLC secondary-side synchronous rectifier to extend a certain on-time in the next cycle, and at the same time, the logic output of the comparison is continuously judged in the next cycle until the logic output is "" 0", when the logic output of the comparator is "0", at the same time, it is judged whether the drain voltage of the second sampling in the period when the logic output is "0" is within the safe range, that is, the second sampling in a period is guaranteed. The detected synchronous rectifier drain voltage is negative. If the second detected synchronous rectifier voltage is positive, it means that it is not within the safe range to prevent over-regulation problems. When the second sampled drain voltage meets the safety requirements Within the range, that is, after the detected drain voltage of the synchronous rectifier is negative, the turn-off time of the LLC secondary synchronous rectifier at this time defaults to the optimal turn-off time. At this time, the efficiency of the entire LLC topology circuit reaches the highest s efficiency.
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