CN107420243A - A kind of economizer circuit for controlling output voltage - Google Patents
A kind of economizer circuit for controlling output voltage Download PDFInfo
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- CN107420243A CN107420243A CN201710741079.7A CN201710741079A CN107420243A CN 107420243 A CN107420243 A CN 107420243A CN 201710741079 A CN201710741079 A CN 201710741079A CN 107420243 A CN107420243 A CN 107420243A
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- 239000003990 capacitor Substances 0.000 claims abstract description 112
- 239000000446 fuel Substances 0.000 claims abstract description 6
- 230000005669 field effect Effects 0.000 claims description 26
- 238000000034 method Methods 0.000 abstract description 4
- 238000001514 detection method Methods 0.000 abstract description 2
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 2
- 229910052799 carbon Inorganic materials 0.000 description 2
- 239000002699 waste material Substances 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000002485 combustion reaction Methods 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000007599 discharging Methods 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 238000003912 environmental pollution Methods 0.000 description 1
- 230000000087 stabilizing effect Effects 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Classifications
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- F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
- F02—COMBUSTION ENGINES; HOT-GAS OR COMBUSTION-PRODUCT ENGINE PLANTS
- F02N—STARTING OF COMBUSTION ENGINES; STARTING AIDS FOR SUCH ENGINES, NOT OTHERWISE PROVIDED FOR
- F02N11/00—Starting of engines by means of electric motors
- F02N11/08—Circuits or control means specially adapted for starting of engines
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- F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
- F02—COMBUSTION ENGINES; HOT-GAS OR COMBUSTION-PRODUCT ENGINE PLANTS
- F02N—STARTING OF COMBUSTION ENGINES; STARTING AIDS FOR SUCH ENGINES, NOT OTHERWISE PROVIDED FOR
- F02N11/00—Starting of engines by means of electric motors
- F02N11/08—Circuits or control means specially adapted for starting of engines
- F02N11/0862—Circuits or control means specially adapted for starting of engines characterised by the electrical power supply means, e.g. battery
- F02N11/0866—Circuits or control means specially adapted for starting of engines characterised by the electrical power supply means, e.g. battery comprising several power sources, e.g. battery and capacitor or two batteries
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- F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
- F02—COMBUSTION ENGINES; HOT-GAS OR COMBUSTION-PRODUCT ENGINE PLANTS
- F02N—STARTING OF COMBUSTION ENGINES; STARTING AIDS FOR SUCH ENGINES, NOT OTHERWISE PROVIDED FOR
- F02N11/00—Starting of engines by means of electric motors
- F02N11/10—Safety devices
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of DC power input into DC power output
- H02M3/02—Conversion of DC power input into DC power output without intermediate conversion into AC
- H02M3/04—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters
- H02M3/06—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider
- H02M3/07—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode, e.g. charge pumps
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- F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
- F02—COMBUSTION ENGINES; HOT-GAS OR COMBUSTION-PRODUCT ENGINE PLANTS
- F02N—STARTING OF COMBUSTION ENGINES; STARTING AIDS FOR SUCH ENGINES, NOT OTHERWISE PROVIDED FOR
- F02N11/00—Starting of engines by means of electric motors
- F02N11/08—Circuits or control means specially adapted for starting of engines
- F02N2011/0881—Components of the circuit not provided for by previous groups
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- F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
- F02—COMBUSTION ENGINES; HOT-GAS OR COMBUSTION-PRODUCT ENGINE PLANTS
- F02N—STARTING OF COMBUSTION ENGINES; STARTING AIDS FOR SUCH ENGINES, NOT OTHERWISE PROVIDED FOR
- F02N2200/00—Parameters used for control of starting apparatus
- F02N2200/06—Parameters used for control of starting apparatus said parameters being related to the power supply or driving circuits for the starter
- F02N2200/063—Battery voltage
-
- F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
- F02—COMBUSTION ENGINES; HOT-GAS OR COMBUSTION-PRODUCT ENGINE PLANTS
- F02N—STARTING OF COMBUSTION ENGINES; STARTING AIDS FOR SUCH ENGINES, NOT OTHERWISE PROVIDED FOR
- F02N2250/00—Problems related to engine starting or engine's starting apparatus
- F02N2250/02—Battery voltage drop at start, e.g. drops causing ECU reset
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- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Combustion & Propulsion (AREA)
- Mechanical Engineering (AREA)
- General Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Direct Current Feeding And Distribution (AREA)
Abstract
本发明公开了一种控制输出电压的节油器电路，包括CPU基本电路部分，电源及电压控制部分；CPU基本电路部分包括CPU模块和程序下载模块；电源及电压控制部分包括电源及电压控制模块；本发明通过实际测试，可以有效控制电源为整个电路正常充电，完成充电后使输出端电容保持一个稳定的电压，整个电路可正常使用。该电路可使输出端电压在小波动的情况下可以自动调节，电路较简单且稳定，可及时作出反应，该电路较为省电，并且该电路包含有辅助充电装置，使充电过程较为安全，同时包含有掉电检测及保护部分，使该电路在电源控制上较为安全。
The invention discloses a fuel economizer circuit for controlling output voltage, which comprises a CPU basic circuit part, a power supply and a voltage control part; the CPU basic circuit part includes a CPU module and a program download module; the power supply and voltage control part includes a power supply and a voltage control module The present invention can effectively control the power supply to charge the entire circuit normally through actual testing, and after the charging is completed, the capacitor at the output terminal can maintain a stable voltage, and the entire circuit can be used normally. The circuit can automatically adjust the output terminal voltage in the case of small fluctuations. The circuit is relatively simple and stable, and can respond in time. The circuit is relatively power-saving, and the circuit includes an auxiliary charging device to make the charging process safer. It includes power-down detection and protection parts, which makes the circuit safer in power control.
Description
技术领域technical field
本发明属于工业控制技术领域，涉及一种电路，具体涉及一种控制输出电压的节油器电路。The invention belongs to the technical field of industrial control and relates to a circuit, in particular to a fuel economizer circuit for controlling output voltage.
背景技术Background technique
在车辆启动时需要由电池供电，产生电流使汽油燃烧，当电池时间较久时会出现电压不稳定的现象，此时产生的电流较小，会使汽油不能充分燃烧，并会产生积碳等其他物质，导致汽油浪费、损害设备、环境污染等。于是可安装电池辅助装置，当电池电压不稳定时，电池辅助装置运行，辅助提升并稳定电压，使汽油得到更加充分的燃烧，减小汽油浪费、设备损耗以及汽油燃烧导致的积碳等物质，实现节约能源、保护环境、保护设备等功能。因此该电池电压辅助装置十分必要。When the vehicle is started, it needs to be powered by the battery to generate current to burn the gasoline. When the battery is used for a long time, the voltage will be unstable. At this time, the generated current is small, which will make the gasoline unable to fully burn and cause carbon deposits, etc. other substances, resulting in waste of gasoline, damage to equipment, environmental pollution, etc. Therefore, a battery auxiliary device can be installed. When the battery voltage is unstable, the battery auxiliary device operates to assist in boosting and stabilizing the voltage, so that gasoline can be burned more fully, reducing gasoline waste, equipment loss, and carbon deposits caused by gasoline combustion. Realize energy saving, environmental protection, equipment protection and other functions. Therefore, the battery voltage auxiliary device is very necessary.
发明内容Contents of the invention
本发明针对现有技术的不足，提出了一种通过单片机以及相关电路实现保持电压稳定，保证点火电流满足要求，使汽油得到充分燃烧，达到节能的目的的一种控制输出电压的节油器电路。Aiming at the deficiencies of the prior art, the present invention proposes a fuel economizer circuit for controlling the output voltage through a single-chip microcomputer and related circuits to keep the voltage stable, ensure that the ignition current meets the requirements, fully burn gasoline, and achieve the purpose of saving energy. .
为了实现以上目的，本发明采用的技术方案为：In order to achieve the above object, the technical solution adopted in the present invention is:
一种控制输出电压的节油器电路，包括CPU基本电路部分，电源及电压控制部分。A fuel economizer circuit for controlling output voltage, including a CPU basic circuit part, a power supply and a voltage control part.
CPU基本电路部分包括CPU模块，程序下载模块。The CPU basic circuit part includes a CPU module and a program download module.
所述CPU模块包括一个电阻，一个CPU。第一限流电阻R1的一端与CPU的管脚2相连；所述CPU的管脚8接地；所述CPU的管脚6连接电源VCC。所述的CPU采用STC15W201S_SOP16_DIP16芯片。所述CPU在本文中未提到的管脚皆架空。The CPU module includes a resistor and a CPU. One end of the first current limiting resistor R1 is connected to the pin 2 of the CPU; the pin 8 of the CPU is grounded; the pin 6 of the CPU is connected to the power supply VCC. The CPU adopts STC15W201S_SOP16_DIP16 chip. The pins of the CPU not mentioned in this article are all overhead.
所述程序下载模块包括一个四引脚插头座。第一四引脚插头座USB-TIL的管脚1连接电源VCC；第一四引脚插头座USB-TIL的管脚2接地；第一四引脚插头座USB-TIL的管脚3连接CPU的管脚9；第一四引脚插头座USB-TIL的管脚4连接CPU的管脚10。The program download module includes a four-pin socket. Pin 1 of the first four-pin plug socket USB-TIL is connected to the power supply VCC; pin 2 of the first four-pin plug socket USB-TIL is grounded; pin 3 of the first four-pin plug socket USB-TIL is connected to the CPU Pin 9 of the first four-pin socket USB-TIL is connected to pin 10 of the CPU.
电源及电压控制部分包括电源及电压控制模块。The power supply and voltage control part includes a power supply and voltage control module.
所述电源及电压控制模块包括16个电容、2个超级电容、20个电阻、1个两引脚插头座、1个二极管、1个发光二极管、3个NPN型三极管、2个PNP型三极管、1个低压差电压调节器、2个N沟道增强型场效应管和1个运算放大器；所述低压差电压调节器的型号为7805；The power supply and voltage control module includes 16 capacitors, 2 super capacitors, 20 resistors, 1 two-pin socket, 1 diode, 1 light emitting diode, 3 NPN transistors, 2 PNP transistors, 1 low-dropout voltage regulator, 2 N-channel enhanced field effect transistors and 1 operational amplifier; the model of the low-dropout voltage regulator is 7805;
本文中所有未对电容进行特别说明为电解电容的电容均为非电解电容。第一两引脚插头座PWR外接电源。第一两引脚插头座PWR的引脚1与第一二极管D1的阳极、第一分压电阻R2的一端、第一滤波电容C13的一端、第二滤波电容C14的一端、第三滤波电容C15的一端、第四滤波电容C16的一端、第一PNP型三极管Q2的发射极、第二限流电阻R15的一端、第二分压电阻R16的一端、第一NPN型三极管Q1的集电极、第一超级电容C17的正极、第一运算放大器U1A的正电极端相连；第一二极管D1的负极与第五滤波电容C5的一端、第六滤波电容C6的一端、第七滤波电容C7的一端、第八滤波电容C8的一端、第九滤波电容C9的一端、第一低压差电压调节器VR1的管脚1连接；第一低压差电压调节器VR1的管脚3与第十滤波电容C1的一端、第十一滤波电容C2的一端、第十二滤波电容C3的一端、第十三滤波电容C4的一端连接并作为电源VCC输出；第五滤波电容C5的另一端、第六滤波电容C6的另一端、第七滤波电容C7的另一端、第八滤波电容C8的另一端、第九滤波电容C9的另一端、第一低压差电压调节器VR1的管脚2、第十滤波电容C1的另一端、第十一滤波电容C2的另一端、第十二滤波电容C3的另一端、第十三滤波电容C4的另一端都接地；第一滤波电容C13的另一端、第二滤波电容C14的另一端、第三滤波电容C15的另一端、第四滤波电容C16的另一端都接地；第一分压电阻R2的另一端与第三分压电阻R3的一端、第十四滤波电容C10的一端、第十五滤波电容C11的一端、第十六滤波电容C12的一端、所述CPU的管脚7连接；第三分压电阻R3的另一端与第十四滤波电容C10的另一端、第十五滤波电容C11的另一端、第十六滤波电容C12的另一端、第四分压电阻R8的一端、第一N沟道增强型场效应管Q4的源极、第三限流电阻R14的一端、第二N沟道增强型场效应管Q7的源极、第一两引脚插头座PWR的引脚2连接并接地；第一PNP型三极管Q2的基极与第二NPN型三极管Q5的集电极连接；第二NPN型三极管Q5的基极与第三NPN型三极管Q6的集电极、第四限流电阻R4的一端、第五分压电阻R5的一端连接；第四限流电阻R4的另一端与所述CPU的管脚16连接；第三NPN型三极管Q6的基极与第五限流电阻R6的一端连接；第五限流电阻R6的另一端与所述CPU的管脚1连接；第二NPN型三极管Q5的发射极、第五分压电阻R5的另一端、第三NPN型三极管Q6的发射极都接地；第一PNP型三极管Q2的集电极与第六限流电阻R7的一端连接；第六限流电阻R7的另一端与第四分压电阻R8的另一端、第一N沟道增强型场效应管Q4的栅极连接；第三限流电阻R14的另一端与第二N沟道增强型场效应管Q7的栅极、第一限流电阻R1的另一端连接；第二N沟道增强型场效应管Q7的漏极与第七限流电阻R9的一端、第八限流电阻R10的一端、第九限流电阻R11的一端、第十限流电阻R12的一端、第十一限流电阻R13的一端连接；第七限流电阻R9的另一端、第八限流电阻R10的另一端、第九限流电阻R11的另一端、第十限流电阻R12的另一端、第十一限流电阻R13的另一端、第一N沟道增强型场效应管Q4的漏极、第六分压电阻R17的一端、第一运算放大器U1A的负电源端、第三NPN型三极管Q3的集电极、第二超级电容C18的负极与第一发光二极管的阴极连接；第二限流电阻R15的另一端与发光二极管D2的阳极连接；第二分压电阻R16的另一端、第六分压电阻R17的另一端与第一运算放大器U1A的正向输入端连接；第一运算放大器U1A的反向输入端与第七分压电阻R18的一端、第八分压电阻R19的一端连接；第一运算放大器U1A的输出端与第七分压电阻R18的另一端、第十二限流电阻R20的一端连接；第十二限流电阻R20的另一端与第一NPN型三极管Q1的基极、第三NPN型三极管Q3的基极连接；第一NPN型三极管Q1的发射极、第三NPN型三极管Q3的发射极与第十三限流电阻R21的一端连接；第十三限流电阻R21的另一端与第一超级电容C17的负极、第二超级电容C18的正极、第八分压电阻R19的另一端连接。All capacitors that are not specifically stated as electrolytic capacitors in this article are non-electrolytic capacitors. The first two-pin header PWR external power supply. Pin 1 of the first two-pin plug socket PWR and the anode of the first diode D1, one end of the first voltage dividing resistor R2, one end of the first filter capacitor C13, one end of the second filter capacitor C14, and the third filter One end of the capacitor C15, one end of the fourth filter capacitor C16, the emitter of the first PNP transistor Q2, one end of the second current limiting resistor R15, one end of the second voltage dividing resistor R16, and the collector of the first NPN transistor Q1 , the positive pole of the first supercapacitor C17 is connected to the positive electrode terminal of the first operational amplifier U1A; the negative pole of the first diode D1 is connected to one end of the fifth filter capacitor C5, one end of the sixth filter capacitor C6, and the seventh filter capacitor C7 One end of the eighth filter capacitor C8, one end of the ninth filter capacitor C9, and pin 1 of the first low dropout voltage regulator VR1 are connected; pin 3 of the first low dropout voltage regulator VR1 is connected to the tenth filter capacitor One end of C1, one end of the eleventh filter capacitor C2, one end of the twelfth filter capacitor C3, one end of the thirteenth filter capacitor C4 are connected and output as the power supply VCC; the other end of the fifth filter capacitor C5, the sixth filter capacitor The other end of C6, the other end of the seventh filter capacitor C7, the other end of the eighth filter capacitor C8, the other end of the ninth filter capacitor C9, the pin 2 of the first low dropout voltage regulator VR1, the tenth filter capacitor C1 The other end of the eleventh filter capacitor C2, the other end of the twelfth filter capacitor C3, and the other end of the thirteenth filter capacitor C4 are all grounded; the other end of the first filter capacitor C13, the second filter capacitor C14 The other end of the third filter capacitor C15, the other end of the fourth filter capacitor C16 are all grounded; One end, one end of the fifteenth filter capacitor C11, one end of the sixteenth filter capacitor C12, and the pin 7 of the CPU are connected; the other end of the third voltage dividing resistor R3 is connected to the other end of the fourteenth filter capacitor C10, the The other end of the fifteenth filter capacitor C11, the other end of the sixteenth filter capacitor C12, one end of the fourth voltage dividing resistor R8, the source of the first N-channel enhanced field effect transistor Q4, and the third current limiting resistor R14 One end, the source of the second N-channel enhanced field effect transistor Q7, and the pin 2 of the first two-pin socket PWR are connected and grounded; the base of the first PNP transistor Q2 is connected to the second NPN transistor Q5 The collector is connected; the base of the second NPN transistor Q5 is connected to the collector of the third NPN transistor Q6, one end of the fourth current limiting resistor R4, and one end of the fifth voltage dividing resistor R5; the fourth current limiting resistor R4 The other end is connected to the pin 16 of the CPU; the base of the third NPN transistor Q6 is connected to one end of the fifth current limiting resistor R6; the other end of the fifth current limiting resistor R6 is connected to the pin 1 of the CPU ; The emitter of the second NPN transistor Q5, the other end of the fifth voltage dividing resistor R5, and the emitter of the third NPN transistor Q6 are all grounded; the first PNP transistor Q2 The collector of the sixth current limiting resistor R7 is connected to one end; the other end of the sixth current limiting resistor R7 is connected to the other end of the fourth voltage dividing resistor R8 and the gate of the first N-channel enhancement type field effect transistor Q4; The other end of the third current-limiting resistor R14 is connected to the gate of the second N-channel enhanced field effect transistor Q7 and the other end of the first current-limiting resistor R1; the drain of the second N-channel enhanced field-effect transistor Q7 Connect with one end of the seventh current limiting resistor R9, one end of the eighth current limiting resistor R10, one end of the ninth current limiting resistor R11, one end of the tenth current limiting resistor R12, and one end of the eleventh current limiting resistor R13; the seventh The other end of the current limiting resistor R9, the other end of the eighth current limiting resistor R10, the other end of the ninth current limiting resistor R11, the other end of the tenth current limiting resistor R12, the other end of the eleventh current limiting resistor R13, The drain of an N-channel enhanced field effect transistor Q4, one end of the sixth voltage dividing resistor R17, the negative power supply end of the first operational amplifier U1A, the collector of the third NPN transistor Q3, and the negative electrode of the second supercapacitor C18 Connected to the cathode of the first light-emitting diode; the other end of the second current limiting resistor R15 is connected to the anode of the light-emitting diode D2; the other end of the second voltage dividing resistor R16, the other end of the sixth voltage dividing resistor R17 are connected to the first operational amplifier The positive input terminal of U1A is connected; the negative input terminal of the first operational amplifier U1A is connected with one end of the seventh voltage dividing resistor R18 and one end of the eighth voltage dividing resistor R19; the output terminal of the first operational amplifier U1A is connected with the seventh dividing The other end of the piezoresistor R18 is connected to one end of the twelfth current-limiting resistor R20; the other end of the twelfth current-limiting resistor R20 is connected to the base of the first NPN transistor Q1 and the base of the third NPN transistor Q3; The emitter of the first NPN transistor Q1 and the emitter of the third NPN transistor Q3 are connected to one end of the thirteenth current-limiting resistor R21; the other end of the thirteenth current-limiting resistor R21 is connected to the negative pole of the first supercapacitor C17, The anode of the second supercapacitor C18 is connected to the other end of the eighth voltage dividing resistor R19.
有益效果：节油器装置的电路通过实际测试，可以有效控制电源为整个电路正常充电，完成充电后使输出端电容保持一个稳定的电压，整个电路可正常使用。该电路可使输出端电压在小波动的情况下可以自动调节，电路较简单且稳定，可及时作出反应，该电路较为省电，并且该电路包含有辅助充电装置，使充电过程较为安全，同时包含有掉电检测及保护部分，使该电路在电源控制上较为安全。Beneficial effects: the circuit of the fuel economizer device can effectively control the power supply to charge the entire circuit normally after passing the actual test, and after the charging is completed, the capacitor at the output end can maintain a stable voltage, and the entire circuit can be used normally. The circuit can automatically adjust the output terminal voltage in the case of small fluctuations. The circuit is relatively simple and stable, and can respond in time. The circuit is relatively power-saving, and the circuit includes an auxiliary charging device to make the charging process safer. It includes power-down detection and protection parts, which makes the circuit safer in power control.
附图说明Description of drawings
图1-1是CPU基本电路部分的CPU模块；Figure 1-1 is the CPU module of the basic circuit part of the CPU;
图1-2是CPU基本电路部分的程序下载模块；Figure 1-2 is the program download module of the basic circuit part of the CPU;
图2是电源及电压控制部分的电源及电压控制模块。Fig. 2 is the power supply and voltage control module of the power supply and voltage control part.
具体实施方式detailed description
下面结合原理图对本发明作进一步说明。The present invention will be further described below in conjunction with the schematic diagram.
如图1-1是CPU基本电路部分的CPU模块。Figure 1-1 is the CPU module of the CPU basic circuit.
所述CPU模块包括一个电阻，一个CPU。第一限流电阻R1的一端与CPU的管脚2相连；所述CPU的管脚8接地；所述CPU的管脚6连接电源VCC。所述的CPU采用STC15W201S_SOP16_DIP16芯片。所述CPU在本文中未提到的管脚皆架空。The CPU module includes a resistor and a CPU. One end of the first current limiting resistor R1 is connected to the pin 2 of the CPU; the pin 8 of the CPU is grounded; the pin 6 of the CPU is connected to the power supply VCC. The CPU adopts STC15W201S_SOP16_DIP16 chip. The pins of the CPU not mentioned in this article are all overhead.
如图1-2是CPU基本电路部分的程序下载模块；Figure 1-2 is the program download module of the basic circuit part of the CPU;
所述程序下载模块包括一个四引脚插头座。第一四引脚插头座USB-TIL的管脚1连接电源VCC；第一四引脚插头座USB-TIL的管脚2接地；第一四引脚插头座USB-TIL的管脚3连接CPU的管脚9；第一四引脚插头座USB-TIL的管脚4连接CPU的管脚10。The program download module includes a four-pin socket. Pin 1 of the first four-pin plug socket USB-TIL is connected to the power supply VCC; pin 2 of the first four-pin plug socket USB-TIL is grounded; pin 3 of the first four-pin plug socket USB-TIL is connected to the CPU Pin 9 of the first four-pin socket USB-TIL is connected to pin 10 of the CPU.
如图2是电源及电压控制部分的电源及电压控制模块。Figure 2 is the power supply and voltage control module of the power supply and voltage control part.
所述电源及电压控制模块包括16个电容、2个超级电容、20个电阻、1个两引脚插头座、1个二极管、1个发光二极管、3个NPN型三极管、2个PNP型三极管、1个低压差电压调节器、2个N沟道增强型场效应管和1个运算放大器；所述低压差电压调节器的型号为7805；The power supply and voltage control module includes 16 capacitors, 2 super capacitors, 20 resistors, 1 two-pin socket, 1 diode, 1 light emitting diode, 3 NPN transistors, 2 PNP transistors, 1 low-dropout voltage regulator, 2 N-channel enhanced field effect transistors and 1 operational amplifier; the model of the low-dropout voltage regulator is 7805;
本文中所有未对电容进行特别说明为电解电容的电容均为非电解电容。第一两引脚插头座PWR外接电源。第一两引脚插头座PWR的引脚1与第一二极管D1的阳极、第一分压电阻R2的一端、第一滤波电容C13的一端、第二滤波电容C14的一端、第三滤波电容C15的一端、第四滤波电容C16的一端、第一PNP型三极管Q2的发射极、第二限流电阻R15的一端、第二分压电阻R16的一端、第一NPN型三极管Q1的集电极、第一超级电容C17的正极、第一运算放大器U1A的正电极端相连；第一二极管D1的负极与第五滤波电容C5的一端、第六滤波电容C6的一端、第七滤波电容C7的一端、第八滤波电容C8的一端、第九滤波电容C9的一端、第一低压差电压调节器VR1的管脚1连接；第一低压差电压调节器VR1的管脚3与第十滤波电容C1的一端、第十一滤波电容C2的一端、第十二滤波电容C3的一端、第十三滤波电容C4的一端连接并作为电源VCC输出；第五滤波电容C5的另一端、第六滤波电容C6的另一端、第七滤波电容C7的另一端、第八滤波电容C8的另一端、第九滤波电容C9的另一端、第一低压差电压调节器VR1的管脚2、第十滤波电容C1的另一端、第十一滤波电容C2的另一端、第十二滤波电容C3的另一端、第十三滤波电容C4的另一端都接地；第一滤波电容C13的另一端、第二滤波电容C14的另一端、第三滤波电容C15的另一端、第四滤波电容C16的另一端都接地；第一分压电阻R2的另一端与第三分压电阻R3的一端、第十四滤波电容C10的一端、第十五滤波电容C11的一端、第十六滤波电容C12的一端、所述CPU的管脚7连接；第三分压电阻R3的另一端与第十四滤波电容C10的另一端、第十五滤波电容C11的另一端、第十六滤波电容C12的另一端、第四分压电阻R8的一端、第一N沟道增强型场效应管Q4的源极、第三限流电阻R14的一端、第二N沟道增强型场效应管Q7的源极、第一两引脚插头座PWR的引脚2连接并接地；第一PNP型三极管Q2的基极与第二NPN型三极管Q5的集电极连接；第二NPN型三极管Q5的基极与第三NPN型三极管Q6的集电极、第四限流电阻R4的一端、第五分压电阻R5的一端连接；第四限流电阻R4的另一端与所述CPU的管脚16连接；第三NPN型三极管Q6的基极与第五限流电阻R6的一端连接；第五限流电阻R6的另一端与所述CPU的管脚1连接；第二NPN型三极管Q5的发射极、第五分压电阻R5的另一端、第三NPN型三极管Q6的发射极都接地；第一PNP型三极管Q2的集电极与第六限流电阻R7的一端连接；第六限流电阻R7的另一端与第四分压电阻R8的另一端、第一N沟道增强型场效应管Q4的栅极连接；第三限流电阻R14的另一端与第二N沟道增强型场效应管Q7的栅极、第一限流电阻R1的另一端连接；第二N沟道增强型场效应管Q7的漏极与第七限流电阻R9的一端、第八限流电阻R10的一端、第九限流电阻R11的一端、第十限流电阻R12的一端、第十一限流电阻R13的一端连接；第七限流电阻R9的另一端、第八限流电阻R10的另一端、第九限流电阻R11的另一端、第十限流电阻R12的另一端、第十一限流电阻R13的另一端、第一N沟道增强型场效应管Q4的漏极、第六分压电阻R17的一端、第一运算放大器U1A的负电源端、第三NPN型三极管Q3的集电极、第二超级电容C18的负极与第一发光二极管的阴极连接；第二限流电阻R15的另一端与发光二极管D2的阳极连接；第二分压电阻R16的另一端、第六分压电阻R17的另一端与第一运算放大器U1A的正向输入端连接；第一运算放大器U1A的反向输入端与第七分压电阻R18的一端、第八分压电阻R19的一端连接；第一运算放大器U1A的输出端与第七分压电阻R18的另一端、第十二限流电阻R20的一端连接；第十二限流电阻R20的另一端与第一NPN型三极管Q1的基极、第三NPN型三极管Q3的基极连接；第一NPN型三极管Q1的发射极、第三NPN型三极管Q3的发射极与第十三限流电阻R21的一端连接；第十三限流电阻R21的另一端与第一超级电容C17的负极、第二超级电容C18的正极、第八分压电阻R19的另一端连接。All capacitors that are not specifically stated as electrolytic capacitors in this article are non-electrolytic capacitors. The first two-pin header PWR external power supply. Pin 1 of the first two-pin plug socket PWR and the anode of the first diode D1, one end of the first voltage dividing resistor R2, one end of the first filter capacitor C13, one end of the second filter capacitor C14, and the third filter One end of the capacitor C15, one end of the fourth filter capacitor C16, the emitter of the first PNP transistor Q2, one end of the second current limiting resistor R15, one end of the second voltage dividing resistor R16, and the collector of the first NPN transistor Q1 , the positive pole of the first supercapacitor C17 is connected to the positive electrode terminal of the first operational amplifier U1A; the negative pole of the first diode D1 is connected to one end of the fifth filter capacitor C5, one end of the sixth filter capacitor C6, and the seventh filter capacitor C7 One end of the eighth filter capacitor C8, one end of the ninth filter capacitor C9, and pin 1 of the first low dropout voltage regulator VR1 are connected; pin 3 of the first low dropout voltage regulator VR1 is connected to the tenth filter capacitor One end of C1, one end of the eleventh filter capacitor C2, one end of the twelfth filter capacitor C3, one end of the thirteenth filter capacitor C4 are connected and output as the power supply VCC; the other end of the fifth filter capacitor C5, the sixth filter capacitor The other end of C6, the other end of the seventh filter capacitor C7, the other end of the eighth filter capacitor C8, the other end of the ninth filter capacitor C9, the pin 2 of the first low dropout voltage regulator VR1, the tenth filter capacitor C1 The other end of the eleventh filter capacitor C2, the other end of the twelfth filter capacitor C3, and the other end of the thirteenth filter capacitor C4 are all grounded; the other end of the first filter capacitor C13, the second filter capacitor C14 The other end of the third filter capacitor C15, the other end of the fourth filter capacitor C16 are all grounded; One end, one end of the fifteenth filter capacitor C11, one end of the sixteenth filter capacitor C12, and the pin 7 of the CPU are connected; the other end of the third voltage dividing resistor R3 is connected to the other end of the fourteenth filter capacitor C10, the The other end of the fifteenth filter capacitor C11, the other end of the sixteenth filter capacitor C12, one end of the fourth voltage dividing resistor R8, the source of the first N-channel enhanced field effect transistor Q4, and the third current limiting resistor R14 One end, the source of the second N-channel enhanced field effect transistor Q7, and the pin 2 of the first two-pin socket PWR are connected and grounded; the base of the first PNP transistor Q2 is connected to the second NPN transistor Q5 The collector is connected; the base of the second NPN transistor Q5 is connected to the collector of the third NPN transistor Q6, one end of the fourth current limiting resistor R4, and one end of the fifth voltage dividing resistor R5; the fourth current limiting resistor R4 The other end is connected to the pin 16 of the CPU; the base of the third NPN transistor Q6 is connected to one end of the fifth current limiting resistor R6; the other end of the fifth current limiting resistor R6 is connected to the pin 1 of the CPU ; The emitter of the second NPN transistor Q5, the other end of the fifth voltage dividing resistor R5, and the emitter of the third NPN transistor Q6 are all grounded; the first PNP transistor Q2 The collector of the sixth current limiting resistor R7 is connected to one end; the other end of the sixth current limiting resistor R7 is connected to the other end of the fourth voltage dividing resistor R8 and the gate of the first N-channel enhancement type field effect transistor Q4; The other end of the third current-limiting resistor R14 is connected to the gate of the second N-channel enhanced field effect transistor Q7 and the other end of the first current-limiting resistor R1; the drain of the second N-channel enhanced field-effect transistor Q7 Connect with one end of the seventh current limiting resistor R9, one end of the eighth current limiting resistor R10, one end of the ninth current limiting resistor R11, one end of the tenth current limiting resistor R12, and one end of the eleventh current limiting resistor R13; the seventh The other end of the current limiting resistor R9, the other end of the eighth current limiting resistor R10, the other end of the ninth current limiting resistor R11, the other end of the tenth current limiting resistor R12, the other end of the eleventh current limiting resistor R13, the second The drain of an N-channel enhanced field effect transistor Q4, one end of the sixth voltage dividing resistor R17, the negative power supply end of the first operational amplifier U1A, the collector of the third NPN transistor Q3, and the negative electrode of the second supercapacitor C18 Connected to the cathode of the first light-emitting diode; the other end of the second current limiting resistor R15 is connected to the anode of the light-emitting diode D2; the other end of the second voltage dividing resistor R16, the other end of the sixth voltage dividing resistor R17 are connected to the first operational amplifier The positive input terminal of U1A is connected; the negative input terminal of the first operational amplifier U1A is connected with one end of the seventh voltage dividing resistor R18 and one end of the eighth voltage dividing resistor R19; the output terminal of the first operational amplifier U1A is connected with the seventh dividing resistor The other end of the piezoresistor R18 is connected to one end of the twelfth current-limiting resistor R20; the other end of the twelfth current-limiting resistor R20 is connected to the base of the first NPN transistor Q1 and the base of the third NPN transistor Q3; The emitter of the first NPN transistor Q1 and the emitter of the third NPN transistor Q3 are connected to one end of the thirteenth current-limiting resistor R21; the other end of the thirteenth current-limiting resistor R21 is connected to the negative pole of the first supercapacitor C17, The anode of the second supercapacitor C18 is connected to the other end of the eighth voltage dividing resistor R19.
工作过程：work process:
在两引脚插头座PWR接入12V电池电源，由于刚刚接通电源，电流仅通过超级电容C17、超级电容C18、以及N沟道增强型场效应管Q4回路为超级电容C17、超级电容C18充电时，电流较大，会导致电路烧毁，于是通过控制CPU使CPU管脚2输出高电平，从而使N沟道增强型场效应管Q7导通，使电流通过超级电容C17、超级电容C18、N沟道增强型场效应管Q7、以及电阻R9、R10、R11、R12、R13回路为超级电容C17、超级电容C18充电，充电一段时间后，当超级电容C17、超级电容C18、的电压接近电源电压时，通过控制CPU使CPU管脚16输出高电平，从而使N沟道增强型场效应管Q4导通，使电池通过超级电容C17、超级电容C18、以及N沟道增强型场效应管Q4回路继续为整个电路供电。电路工作期间为保证超级电容C17、超级电容C18的电压相等以及超级电容C17、超级电容C18的电压不超过超级电容C17、超级电容C18的耐压值，设置一个反馈回路实现超级电容C17、超级电容C18的动态调整，当超级电容C17、超级电容C18的电压压差超过一定额度时，通过运算放大器使三极管Q1或三极管Q3导通，使电压较高的超级电容停止充电并放电，在不影响超级电容C17、超级电容C18正常工作情况下，为使两超级电容不频繁充放电维持电压相等，设置电阻R18、电阻R19反馈回路，使超级电容C17、超级电容C18之间的压差超过20mv时，进行电压调整。最终使超级电容C17、超级电容C18的电压维持在6V左右。Connect the 12V battery power supply to the two-pin plug socket PWR. Since the power supply has just been turned on, the current only passes through the supercapacitor C17, supercapacitor C18, and N-channel enhanced field effect transistor Q4 to charge the supercapacitor C17 and supercapacitor C18. When the current is large, the circuit will burn out, so by controlling the CPU, the CPU pin 2 outputs a high level, so that the N-channel enhanced field effect transistor Q7 is turned on, and the current passes through the supercapacitor C17, supercapacitor C18, N-channel enhanced field effect transistor Q7, and resistors R9, R10, R11, R12, and R13 are used to charge supercapacitor C17 and supercapacitor C18. After charging for a period of time, when the voltage of supercapacitor C17 and supercapacitor C18 is close to the power supply When the voltage is high, the CPU pin 16 outputs a high level by controlling the CPU, so that the N-channel enhanced field effect transistor Q4 is turned on, and the battery passes through the supercapacitor C17, supercapacitor C18, and N-channel enhanced field effect transistor. The Q4 loop continues to power the entire circuit. In order to ensure that the voltages of supercapacitor C17 and supercapacitor C18 are equal and that the voltages of supercapacitor C17 and supercapacitor C18 do not exceed the withstand voltage values of supercapacitor C17 and supercapacitor C18, a feedback loop is set to realize supercapacitor C17 and supercapacitor C18. The dynamic adjustment of C18, when the voltage difference between the supercapacitor C17 and supercapacitor C18 exceeds a certain amount, the transistor Q1 or transistor Q3 is turned on through the operational amplifier, so that the supercapacitor with a higher voltage stops charging and discharging, without affecting the supercapacitor Capacitor C17 and supercapacitor C18 work normally, in order to keep the two supercapacitors infrequently charged and discharged to maintain the same voltage, set the feedback loop of resistor R18 and resistor R19, so that when the voltage difference between supercapacitor C17 and supercapacitor C18 exceeds 20mv, Make voltage adjustments. Finally, the voltages of the supercapacitor C17 and the supercapacitor C18 are maintained at about 6V.
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Effective date of registration: 20180329 Address after: Hangzhou City, Zhejiang province 310012 Xihu District Wenyi Road No. 65 room 8 Applicant after: Peng Dongliang Applicant after: Ye Jieya Applicant after: Zou Hongbo Applicant after: Yang Jingbo Applicant after: SHANGHAI XINPENG PRECISION ELECTROMECHANICAL CO.,LTD. Applicant after: HANGZHOU DIANZI University Address before: Hangzhou City, Zhejiang province 310012 Xihu District Wenyi Road No. 65 room 8 Applicant before: Peng Dongliang Applicant before: Ye Jieya Applicant before: Zou Hongbo Applicant before: Yang Jingbo |
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Application publication date: 20171201 |