CN107346774A - A kind of single chip integrated ultraviolet FPA and preparation method thereof - Google Patents

Abstract

The invention provides a monolithically integrated ultraviolet focal plane device and its preparation method, comprising: a photodiode array and a readout circuit prepared on the same substrate; a substrate is provided, and the substrate is engraved according to the design layout Etch the groove to determine the position of each photosensitive element; use epitaxial growth technology to form an N-type epitaxial layer and a P-type epitaxial layer layer by layer in the groove; etch the P-type epitaxial layer to expose part of the N-type epitaxial layer The epitaxial layer; each device in the readout circuit is prepared on the substrate; the electrodes of each photosensitive element are made, and each electrode is connected to the corresponding device in the readout circuit through a metal wire. In the monolithically integrated ultraviolet focal plane device and its preparation method of the present invention, the photodiode array and the readout circuit are prepared on the same substrate, which avoids complex preparation processes such as bonding, improves the yield rate of products, and greatly simplifies the production process , reduce the production cost, and facilitate the mass production of ultraviolet focal plane devices.

Description

A monolithic integrated ultraviolet focal plane device and its preparation method

technical field

The invention relates to the field of semiconductors, in particular to a monolithically integrated ultraviolet focal plane device and a preparation method thereof.

Background technique

In modern photodetection technology, more and more people pay attention to the ultraviolet band. Because space, flames, oil, gas pollutant molecules, and corona phenomena on high-voltage lines all contain ultraviolet radiation, ultraviolet detection and ultraviolet imaging have a wide range of application requirements in aerospace, communications, military, and civilian detection. Demand has accelerated the development of UV focal plane devices.

The principle of focal plane array detection is that an array of photosensitive elements is arranged on its focal plane, and the light emitted from infinity is imaged on these photosensitive elements on the focal plane of the system through an optical system, and the detector converts the received light signal into electrical The signal is integrated and amplified, sampled and held, through the output buffer and multiplex transmission system, and finally the electrical signal is sent to the monitoring system to form image information.

The mainstream UV focal plane detectors are based on the GaN/AlxGa1-xN material system. The UV detectors made of GaN/AlxGa1-xN have a high UV/visible light rejection ratio and are not sensitive to visible light. They do not need or can be used during work. Use less filters. Since the forbidden band width of GaN is 3.4eV, the cutoff wavelength of its spectral response is 365nm, while the forbidden bandwidth of AlN is 6.2eV, and the corresponding cutoff wavelength is 200nm. Therefore, by adjusting the composition ratio of the epitaxial material, that is, the content of aluminum doping, the band gap energy can be continuously adjusted from 3.4 to 6.2 eV, and the corresponding cut-off wavelength can be freely tailored between 200 and 365 nm.

As shown in Fig. 1, the ultraviolet focal plane detectors 1 currently on the market are all made by hybrid integration, and the GaN/AlxGa1-xN photodiode array 11 and the silicon-based readout circuit 12 are fabricated respectively, and then the indium column 13 interconnects bond the two together. Wherein, the GaN/AlxGa1-xN photodiode array 11 includes a sapphire substrate 111, an N-type AlGaN layer 112, a P-type AlGaN layer 113, and a SiN protective layer 114; the silicon-based readout circuit 12 includes a Si substrate 121 And the readout circuit 122 prepared on the Si substrate 121, the readout circuit 122 is represented by symbols, and the specific structure is not shown. This hybrid integration method needs to prepare the GaN/AlxGa1-xN photodiode array 11 and the silicon-based readout circuit 12 separately, and then interconnect the two by bonding. The preparation process is complicated, and the yield rate is low, and the production cost High, not conducive to large-scale production.

Therefore, how to simplify the production process of the ultraviolet focal plane detector and improve the product yield has become one of the problems to be solved urgently by those skilled in the art.

Contents of the invention

In view of the above-mentioned shortcomings of the prior art, the object of the present invention is to provide a monolithically integrated ultraviolet focal plane device and its preparation method, which is used to solve the problem of complex production process and poor product quality of ultraviolet focal plane detectors in the prior art. The efficiency is low, the production cost is high, and it is not conducive to problems such as large-scale production.

In order to achieve the above object and other related objects, the present invention provides a monolithically integrated ultraviolet focal plane device, and the monolithically integrated ultraviolet focal plane device at least includes:

Photodiode arrays and readout circuits fabricated on the same substrate;

The photodiode array includes a plurality of photosensitive elements, and each photosensitive element includes an N-type epitaxial layer prepared on the substrate, a P-type epitaxial layer prepared on the N-type epitaxial layer, and is used to receive ultraviolet light on the focal plane. the light;

The readout circuit is connected with the photodiode array through a metal wire, and is used for reading and outputting the charge in each photosensitive element.

Preferably, the substrate is a P-type substrate.

Preferably, the material of the N-type epitaxial layer and the P-type epitaxial layer is AlGaN.

Preferably, the photosensitive elements are isolated by an isolation layer.

Preferably, the surface of the photodiode array further includes a SiN protective layer, and the surface of the readout circuit further includes a SiO ₂ protective layer.

In order to achieve the above purpose and other related purposes, the present invention provides a method for preparing the above-mentioned monolithically integrated ultraviolet focal plane device, and the method for preparing the monolithically integrated ultraviolet focal plane device at least includes:

Step S1: providing a substrate, etching grooves on the substrate according to the design layout, and determining the position of each photosensitive element;

Step S2: using epitaxial growth technology, forming an N-type epitaxial layer and a P-type epitaxial layer layer by layer in the trench;

Step S3: etching the P-type epitaxial layer to expose part of the N-type epitaxial layer;

Step S4: preparing each device in the readout circuit on the substrate;

Step S5: making electrodes of each photosensitive element, and connecting each electrode with a corresponding device in the readout circuit through a metal wire.

Preferably, step S3 further includes forming a first protective layer on surfaces of the substrate, the N-type epitaxial layer, and the P-type epitaxial layer.

Preferably, before step S4 is performed, the protection layer and the substrate are etched according to the designed layout to form an isolation region, and an isolation layer is formed in the isolation region, and the isolation layer isolates each photosensitive element.

Preferably, step S4 further includes forming a second protection layer on the surface of each device in the readout circuit.

Preferably, each device in the readout circuit is manufactured using a standard CMOS process.

As mentioned above, the monolithically integrated ultraviolet focal plane device and its preparation method of the present invention have the following beneficial effects:

In the monolithically integrated ultraviolet focal plane device and its preparation method of the present invention, the photodiode array and the readout circuit are prepared on the same substrate, which avoids complex preparation processes such as bonding, improves the yield rate of products, and greatly simplifies the production process , reduce the production cost, and facilitate the mass production of ultraviolet focal plane devices.

Description of drawings

Fig. 1 is a schematic structural diagram of an ultraviolet focal plane detector in the prior art.

Fig. 2 is a schematic structural diagram of a monolithically integrated ultraviolet focal plane device of the present invention.

3 to 9 are schematic flow charts showing the method for manufacturing the monolithically integrated ultraviolet focal plane device of the present invention.

Component designation description

1 UV focal plane detector

11 GaN/AlxGa1-xN photodiode array

111 sapphire substrate

112 N-type AlGaN layer

113 P-type AlGaN layer

114 SiN protective layer

12 Silicon-Based Readout Circuitry

121 Si substrate

122 readout circuit

13 indium column

2 Monolithically integrated UV focal plane device

21 Substrate

211 Groove

22 photosensitive elements

221 N-type epitaxial layer

222 P-type epitaxial layer

23 Readout circuit

24 First layer of protection

25 isolation layer

26 Second protective layer

S1～S5 steps

detailed description

Embodiments of the present invention are described below through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific implementation modes, and various modifications or changes can be made to the details in this specification based on different viewpoints and applications without departing from the spirit of the present invention.

Please refer to Figure 2 to Figure 9. It should be noted that the diagrams provided in this embodiment are only schematically illustrating the basic idea of the present invention, and only the components related to the present invention are shown in the diagrams rather than the number, shape and shape of the components in actual implementation. Dimensional drawing, the type, quantity and proportion of each component can be changed arbitrarily during actual implementation, and the component layout type may also be more complicated.

As shown in Fig. 2, the present invention provides a kind of monolithically integrated ultraviolet focal plane device 2, and described monolithically integrated ultraviolet focal plane device 2 comprises at least:

The photodiode array and the readout circuit 23 are fabricated on the same substrate 21 .

As shown in FIG. 2 , the substrate 21 is located at the bottom layer. In this embodiment, the substrate 21 is a P-type Si substrate.

As shown in FIG. 2 , the photodiode array includes a plurality of photosensitive elements 22, and each photosensitive element 22 includes an N-type epitaxial layer 221 prepared on the substrate 21, a P-type epitaxial layer prepared on the N-type epitaxial layer 221. type epitaxial layer 222, and the photodiode array is used to receive light on the ultraviolet focal plane.

Specifically, as shown in FIG. 2 , in this embodiment, the material of the N-type epitaxial layer 221 and the P-type epitaxial layer 222 is AlGaN. The N-type epitaxial layer 221 and the P-type epitaxial layer 222 form a PN junction, respond to light on the external ultraviolet focal plane, and generate corresponding charges.

Specifically, as shown in FIG. 2 , in this embodiment, the surfaces of the N-type epitaxial layer 221 and the P-type epitaxial layer 222 are further covered with a first protective layer 24, and the material of the first protective layer 24 for SiN.

As shown in FIG. 2 , the readout circuit 23 is connected to the photodiode array through metal wires, and the readout circuit 23 is used to read and output the charge in each photosensitive element 22 .

Specifically, as shown in FIG. 2, the readout circuit 23 is only represented by symbols, and does not specifically present a schematic diagram of the internal structure. Those skilled in the art should understand the meaning of the representation, and its specific structure is based on the circuit structure. Herein Not one by one. The readout circuit 23 includes a circuit structure composed of a plurality of devices, and a second protection layer 26 is laid on the surface of each device. In this embodiment, the material of the second protection layer 26 is SiO ₂ .

As shown in FIG. 2 , the photosensitive elements 22 are separated by an isolation layer 25 to reduce the influence of electron movement and improve detection accuracy.

The operating principle of the monolithically integrated ultraviolet focal plane device 2 is as follows:

The monolithically integrated ultraviolet focal plane device 2 is placed on the ultraviolet focal plane, each photosensitive element 22 receives the light on the ultraviolet focal plane, and generates a corresponding amount of charge according to the light intensity, and the readout circuit 23 receives charge on each photosensitive element 22, and transmit the read electric signal to the processor, and the processor restores and displays the image on the ultraviolet focal plane.

As shown in Figures 3 to 9, the present invention provides a method for preparing the monolithically integrated ultraviolet focal plane device 1, and the method for preparing the monolithically integrated ultraviolet focal plane device at least includes:

Step S1 : providing a substrate 21 , etching grooves on the substrate 21 with a photolithography plate according to the designed layout, and determining the positions of the photosensitive elements 22 .

Specifically, as shown in FIG. 3 , a substrate 21 is provided. In this embodiment, the substrate 21 is a P-type Si substrate, and the material of the substrate 21 is not limited to the Si listed in this embodiment. Any material known in the art as a substrate is suitable. Grooves 211 are etched on the substrate 21 , and the grooves 211 are used to prepare photosensitive elements 22 .

Step S2 : forming an N-type epitaxial layer 221 and a P-type epitaxial layer 222 layer by layer in the trench 211 by using epitaxial growth technology.

Specifically, as shown in FIG. 4 , the material of the photosensitive element 22 is epitaxially grown, and after growth, a high-quality AlGaN epitaxial structure is grown in the trench 211, and an AlGaN epitaxial structure is formed on the substrate surface outside the trench 211. crystal layer. In this embodiment, an N-type epitaxial layer 221 is formed in the trench 211, the material of the N-type epitaxial layer 221 is AlGaN; a P-type epitaxial layer 222, the material of the P-type epitaxial layer 222 is AlGaN . Wherein the N-type epitaxial layer 221 and the P-type epitaxial layer 222 form a PN junction.

Specifically, the AlGaN polycrystalline layer on the surface of the substrate 21 is removed. In this embodiment, the reverse plate of the photolithography plate in step S1 can be used to remove the AlGaN polycrystalline layer on the surface of the substrate 21 through an etching process. remove. The AlGaN polycrystalline layer on the surface of the substrate 21 may also be removed by grinding, which is not limited to this embodiment.

Step S3: Etching the P-type epitaxial layer 222 to expose part of the N-type epitaxial layer 221 .

Specifically, as shown in FIG. 5 , the P-type epitaxial layer 222 is etched, and an etching groove is formed on the surface of the N-type epitaxial layer 221 to expose part of the N-type epitaxial layer 221 to facilitate the preparation of contact electrodes.

Specifically, as shown in FIG. 6 , a first protective layer 24 is formed on the surfaces of the substrate 21 , the N-type epitaxial layer 221 and the P-type epitaxial layer 222 . In this embodiment, the material of the first protection layer 24 is SiN.

Step S4: preparing each device in the readout circuit 23 on the substrate 21 .

In order to reduce the mutual influence between devices, each photosensitive element 22 is isolated by LOCOS (Local Oxidation of Silicon) process. The specific steps are as follows: as shown in FIG. The protective layer 24 and the substrate 21 form an isolation area, and in the isolation area, SiO is grown by thermal oxidation to form an isolation layer ₂₅ , and the isolation layer 25 isolates each photosensitive element 22, greatly improving the accuracy of detection .

Specifically, as shown in FIG. 8 , each device in the readout circuit 23 is prepared by using a standard CMOS process, and the specific circuit structure and preparation steps are not repeated here. In this embodiment, the readout circuit 23 is only a schematic diagram and does not represent a real readout circuit. In each actual unit, the area of the photosensitive element is much larger than the area of the readout circuit, which is only for illustration. In the process of preparing each device in the readout circuit 23, the SiN protective layer on the surface of the readout circuit 23 is etched away, and after preparing each device in the readout circuit 23, the A second protective layer 26 is formed on the surface of the substrate 21 where the devices in the readout circuit 23 are located. In this embodiment, the material of the second protective layer 26 is SiO ₂ . At the same time, the top metal layer of the readout circuit 23 is formed, which will not be repeated here.

Step S5: making electrodes of each photosensitive element 22, and connecting each electrode with corresponding devices in the readout circuit 23 through metal wires.

Specifically, as shown in FIG. 9 , the first protective layer 24 is etched to form an etching groove on the surface of the P-type epitaxial layer 222 to expose part of the P-type epitaxial layer 222 . Similarly, the first protection layer 24 and the P-type epitaxial layer 222 are etched to form etching grooves on the surface of the N-type epitaxial layer 221 to expose part of the N-type epitaxial layer 221 . Metal is filled in each etching groove to form electrodes of each photosensitive element 22 .

Specifically, as shown in FIG. 9 , each electrode is connected to a corresponding device in the readout circuit 23 through a metal wire to form a complete ultraviolet focal plane device.

As mentioned above, the monolithically integrated ultraviolet focal plane device and its preparation method of the present invention have the following beneficial effects:

In the monolithically integrated ultraviolet focal plane device and its preparation method of the present invention, the photodiode array and the readout circuit are prepared on the same substrate, which avoids complex preparation processes such as bonding, improves the yield rate of products, and greatly simplifies the production process , reduce the production cost, and facilitate the mass production of ultraviolet focal plane devices.

In summary, the present invention provides a monolithically integrated ultraviolet focal plane device, comprising: a photodiode array and a readout circuit prepared on the same substrate; the photodiode array includes a plurality of photosensitive elements, each photosensitive element Including an N-type epitaxial layer prepared on the substrate, a P-type epitaxial layer prepared on the N-type epitaxial layer, for receiving light on the ultraviolet focal plane; the readout circuit and the photodiode array Connected by metal wires, it is used to read and output the charge in each photosensitive cell. Also provided is a method for preparing a monolithically integrated ultraviolet focal plane device, including: providing a substrate, etching grooves on the substrate according to the design layout, and determining the position of each photosensitive element; using epitaxial growth technology, in Forming an N-type epitaxial layer and a P-type epitaxial layer layer by layer in the trench; etching the P-type epitaxial layer to expose part of the N-type epitaxial layer; preparing each device in the readout circuit on the substrate ; Make electrodes of each photosensitive element, and connect each electrode with corresponding devices in the readout circuit through metal wires. In the monolithically integrated ultraviolet focal plane device and its preparation method of the present invention, the photodiode array and the readout circuit are prepared on the same substrate, which avoids complex preparation processes such as bonding, improves the yield rate of products, and greatly simplifies the production process , reduce the production cost, and facilitate the mass production of ultraviolet focal plane devices. Therefore, the present invention effectively overcomes various shortcomings in the prior art and has high industrial application value.

The above-mentioned embodiments only illustrate the principles and effects of the present invention, but are not intended to limit the present invention. Anyone skilled in the art can modify or change the above-mentioned embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or changes made by those skilled in the art without departing from the spirit and technical ideas disclosed in the present invention should still be covered by the claims of the present invention.

Claims (10)

1. a kind of single chip integrated ultraviolet FPA, it is characterised in that the single chip integrated ultraviolet FPA comprises at least：

The photodiode array and reading circuit being prepared on same substrate；

The photodiode array includes multiple photosensitive members, and each photosensitive member includes the N-type extension being prepared on the substrate Layer, the p-type epitaxial layer being prepared in the N-type epitaxy layer, for receiving the light on ultraviolet focal-plane；

The reading circuit is connected with the photodiode array by metal wire, for reading the electric charge in each photosensitive member simultaneously Output.

2. single chip integrated ultraviolet FPA according to claim 1, it is characterised in that：The substrate is P type substrate.

3. single chip integrated ultraviolet FPA according to claim 1, it is characterised in that：The N-type epitaxy layer and institute The material for stating p-type epitaxial layer is AlGaN.

4. single chip integrated ultraviolet FPA according to claim 1, it is characterised in that：Pass through isolation between each photosensitive member Layer is isolated.

5. single chip integrated ultraviolet FPA according to claim 1, it is characterised in that：The photodiode array table Face also includes SiN protective layers, and the surface of the reading circuit also includes SiO₂Protective layer.

6. a kind of preparation method of single chip integrated ultraviolet FPA as claimed in any one of claims 1 to 5, wherein, its feature exist In the preparation method of the single chip integrated ultraviolet FPA comprises at least：

Step S1：One substrate is provided, according to layout etching groove over the substrate, determines the position of each photosensitive member；

Step S2：Using growth technology, N-type epitaxy layer and p-type epitaxial layer are successively formed in the groove；

Step S3：The p-type epitaxial layer is etched with N-type epitaxy layer described in exposed portion；

Step S4：Each device in reading circuit is prepared over the substrate；

Step S5：The electrode of each photosensitive member is made, by metal wire by each electrode device corresponding with the reading circuit Connection.

7. the preparation method of single chip integrated ultraviolet FPA according to claim 6, it is characterised in that：Step S3 is also Including forming the first protective layer on the surface of the substrate, the N-type epitaxy layer and the p-type epitaxial layer.

8. the preparation method of single chip integrated ultraviolet FPA according to claim 6, it is characterised in that：Performing step Before S4, the protective layer and the substrate are etched according to layout to form isolated area, and the shape in the isolated area Into separation layer, the separation layer opens each photosensitive member barrier.

9. the preparation method of single chip integrated ultraviolet FPA according to claim 6, it is characterised in that：Step S4 is also Each device surface being included in the reading circuit forms the second protective layer.

10. the preparation method of single chip integrated ultraviolet FPA according to claim 6, it is characterised in that：The reading Each device in circuit is prepared using standard CMOS process.