CN107317580A - A kind of high stability oscillator circuit and its implementation - Google Patents
A kind of high stability oscillator circuit and its implementation Download PDFInfo
- Publication number
- CN107317580A CN107317580A CN201710534524.2A CN201710534524A CN107317580A CN 107317580 A CN107317580 A CN 107317580A CN 201710534524 A CN201710534524 A CN 201710534524A CN 107317580 A CN107317580 A CN 107317580A
- Authority
- CN
- China
- Prior art keywords
- frequency
- circuit
- signal
- output
- fout
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000006243 chemical reaction Methods 0.000 claims abstract description 25
- 238000000034 method Methods 0.000 claims abstract description 19
- 230000005540 biological transmission Effects 0.000 claims description 20
- 230000005611 electricity Effects 0.000 claims 3
- 230000010355 oscillation Effects 0.000 abstract description 8
- 239000003990 capacitor Substances 0.000 description 8
- 101150110971 CIN7 gene Proteins 0.000 description 6
- 101100171060 Caenorhabditis elegans div-1 gene Proteins 0.000 description 6
- 101150110298 INV1 gene Proteins 0.000 description 6
- 101100397044 Xenopus laevis invs-a gene Proteins 0.000 description 6
- 230000000737 periodic effect Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
- H03L7/0991—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider
- H03L7/0992—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider comprising a counter or a frequency divider
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/0802—Details of the phase-locked loop the loop being adapted for reducing power consumption
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
- H03L7/0891—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
本发明公开了一种高稳定性振荡器电路及其实现方法,该振荡器电路包括:分频驱动电路,用于将压控振荡器输出的频率为Fout的振荡信号的频率除以N以输出频率为Fout/N的分频信号至电荷泵电路,并将该频率为Fout/N的分频信号经处理输出同相分频信号与反相分频信号至电荷泵电路;电荷泵电路,用于在该同相分频信号和反相分频信号控制下将参考电流与频率电流转换电路输出的与分频信号Fout/N频率成比例的反馈电流进行比较并输出误差电流;低通滤波器电路,用于将该误差电流转换为平稳的控制电压;压控振荡器,用于在该控制电压的控制下改变输出信号的频率,通过本发明,实现了一种基于闭环频率控制的低功耗、高稳定性振荡器。
The invention discloses a high-stability oscillator circuit and its realization method. The oscillator circuit includes: a frequency division driving circuit, which is used to divide the frequency of the oscillation signal whose frequency is Fout output by the voltage-controlled oscillator by N to output The frequency-division signal whose frequency is Fout/N is sent to the charge pump circuit, and the frequency-division signal whose frequency is Fout/N is processed to output the in-phase frequency-division signal and the inverted frequency-division signal to the charge pump circuit; the charge pump circuit is used for Under the control of the in-phase frequency division signal and the inverse frequency division signal, the reference current is compared with the feedback current proportional to the frequency of the frequency-division signal Fout/N frequency output by the frequency-current conversion circuit and an error current is output; the low-pass filter circuit, It is used to convert the error current into a stable control voltage; the voltage-controlled oscillator is used to change the frequency of the output signal under the control of the control voltage. Through the present invention, a low power consumption based on closed-loop frequency control, High Stability Oscillator.
Description
技术领域technical field
本发明涉及一种振荡器电路及其实现方法,特别是涉及一种高稳定性振荡器电路及其实现方法。The invention relates to an oscillator circuit and its realization method, in particular to a high-stability oscillator circuit and its realization method.
背景技术Background technique
振荡器是现代电子系统的重要组成部分,其广泛应用于电子、通信、航海航空等领域。Oscillators are an important part of modern electronic systems and are widely used in electronics, communications, navigation and aviation and other fields.
常用CMOS片上全集成振荡器有LC振荡器、环形振荡器、松弛振荡器等,其振荡频率受工艺角、电源电压、温度变化影响显著,不利于实际系统应用。目前国内外关于高稳定性片上全集成振荡器电路的设计从结构上可分为开环和闭环两种形式,对于开环形式,一般采用温度补偿电路直接对振荡器频率进行开环温度补偿,其开环结构精度受到一定的限制,受工艺角变化影响大且大多需要复杂的后期修调,闭环结构的全集成振荡器相较于开环而言,由于其自身的负反馈结构,可同时抑制温度和电源电压的变化,使其输出频率稳定度更高,但是闭环结构相对复杂且功耗较大。Commonly used CMOS on-chip fully integrated oscillators include LC oscillators, ring oscillators, relaxation oscillators, etc., and their oscillation frequency is significantly affected by process angle, power supply voltage, and temperature changes, which is not conducive to practical system applications. At present, the design of high-stability on-chip fully integrated oscillator circuits at home and abroad can be divided into two forms: open-loop and closed-loop. For the open-loop form, the temperature compensation circuit is generally used to directly perform open-loop temperature compensation on the oscillator frequency. The accuracy of its open-loop structure is limited to a certain extent, and it is greatly affected by the change of the process angle, and most of them require complex post-adjustment. Compared with the open-loop fully integrated oscillator, the closed-loop structure can simultaneously Suppressing changes in temperature and power supply voltage makes the output frequency more stable, but the closed-loop structure is relatively complex and consumes a lot of power.
因此,有必要提供一种基于闭环频率控制的低功耗、高稳定性振荡器。Therefore, it is necessary to provide an oscillator with low power consumption and high stability based on closed-loop frequency control.
发明内容Contents of the invention
为克服上述现有技术存在的不足,本发明之目的在于提供一种高稳定性振荡器电路及其实现方法,以实现一种基于闭环频率控制的低功耗、高稳定性振荡器。In order to overcome the shortcomings of the above-mentioned prior art, the object of the present invention is to provide a high stability oscillator circuit and its implementation method, so as to realize a low power consumption and high stability oscillator based on closed-loop frequency control.
为达上述及其它目的,本发明提出一种高稳定性振荡器电路,包括:In order to achieve the above and other purposes, the present invention proposes a high stability oscillator circuit, comprising:
分频驱动电路,用于将压控振荡器输出的频率为Fout的振荡信号的频率除以N以输出频率为Fout/N的分频信号至电荷泵电路,并将该频率为Fout/N的分频信号经处理输出同相分频信号与反相分频信号至电荷泵电路;A frequency-division driving circuit for dividing the frequency of the oscillating signal whose frequency is Fout output by the voltage-controlled oscillator by N to output a frequency-division signal whose frequency is Fout/N to the charge pump circuit, and using the frequency as Fout/N The frequency division signal is processed to output the in-phase frequency division signal and the inverse frequency division signal to the charge pump circuit;
电荷泵电路,用于在该同相分频信号和反相分频信号控制下将参考电流Iref与频率电流转换电路输出的与分频信号Fout/N频率成比例的反馈电流If进行比较并输出误差电流Iout;The charge pump circuit is used to compare the reference current Iref with the feedback current If output by the frequency current conversion circuit proportional to the frequency of the frequency division signal Fout/N under the control of the non-phase frequency division signal and the reverse phase frequency division signal, and output an error Current Iout;
低通滤波器电路,用于将该误差电流Iout转换为平稳的控制电压Vc;A low-pass filter circuit for converting the error current Iout into a stable control voltage Vc;
压控振荡器,用于在该控制电压Vc的控制下改变输出信号的频率Fout。The voltage-controlled oscillator is used to change the frequency Fout of the output signal under the control of the control voltage Vc.
进一步地,该分频驱动电路通过传输门输出该同相分频信号,经反相器输出该反相分频信号。Further, the frequency-division drive circuit outputs the non-phase frequency-division signal through the transmission gate, and outputs the anti-phase frequency-division signal through the inverter.
进一步地,该分频驱动电路包括N分频器、传输门以及反相器,该N分频器的输入端连接该压控振荡器的输出端,该N分频器输出的频率为Fout/N的输出信号连接至该传输门的输入端、该反相器的输入端和该电荷泵电路的频率电流转换电路的频率输入端,该传输门与该反相器的输出端连接至该电荷泵电路。Further, the frequency division drive circuit includes an N frequency divider, a transmission gate and an inverter, the input of the N frequency divider is connected to the output of the voltage-controlled oscillator, and the output frequency of the N frequency divider is Fout/ The output signal of N is connected to the input terminal of the transmission gate, the input terminal of the inverter and the frequency input terminal of the frequency current conversion circuit of the charge pump circuit, and the transmission gate and the output terminal of the inverter are connected to the charge pump circuit.
进一步地,该电荷泵电路包括一PMOS管、NMOS管、参考电流源以及频率电流转换电路,该PMOS管的栅极连接该传输门的输出端,源极接电源正端,漏极接该参考电流源Iref的输入端,该参考电流源的输出端连接至该频率电流转换电路的电流输入端和低通滤波器电路,该频率电流转换电路的电流输出端连接至该NMOS管的漏极,该NMOS管的栅极连接该反相器的输出端,源极接电源负端。Further, the charge pump circuit includes a PMOS transistor, an NMOS transistor, a reference current source and a frequency current conversion circuit, the gate of the PMOS transistor is connected to the output terminal of the transmission gate, the source is connected to the positive terminal of the power supply, and the drain is connected to the reference The input end of the current source Iref, the output end of the reference current source is connected to the current input end of the frequency current conversion circuit and the low-pass filter circuit, the current output end of the frequency current conversion circuit is connected to the drain of the NMOS tube, The gate of the NMOS transistor is connected to the output terminal of the inverter, and the source is connected to the negative terminal of the power supply.
进一步地,该频率电流转换电路输出与分频信号Fout/N频率成正比的反馈电流。Further, the frequency-to-current conversion circuit outputs a feedback current proportional to the frequency of the frequency-divided signal Fout/N.
进一步地,该低通滤波器电路采用一阶低通滤波器或二阶或多阶RC低通滤波器。Further, the low-pass filter circuit adopts a first-order low-pass filter or a second-order or multi-order RC low-pass filter.
进一步地,该低通滤波器电路包括一电容与电阻R,该电阻的一端连接该参考电流源的输出端,另一端连接至该电容的一端和该压控振荡器的控制端,该电容的另一端接电源负端。Further, the low-pass filter circuit includes a capacitor and a resistor R, one end of the resistor is connected to the output end of the reference current source, and the other end is connected to one end of the capacitor and the control end of the voltage-controlled oscillator, and the capacitor The other end is connected to the negative end of the power supply.
进一步地,该压控振荡器产生的频率为Fout的振荡信号经该N分频器后通过该传输门与反相器产生该同相分频信号、反相分频信号两路相位相反的开关信号控制该PMOS管、NMOS管开关管同时导通与关断,周期性对控制电压Vc进行充放电。Further, the oscillating signal with a frequency of F out generated by the voltage-controlled oscillator passes through the N frequency divider and then passes through the transmission gate and the inverter to generate the non-phase frequency division signal and the reverse phase frequency division signal. Two switches with opposite phases The signal controls the PMOS transistor and the NMOS transistor switch to be turned on and off at the same time, and the control voltage V c is charged and discharged periodically.
为达到上述目的,本发明还提供一种高稳定性振荡器电路的实现方法,包括如下步骤:In order to achieve the above object, the present invention also provides a method for realizing a high-stability oscillator circuit, comprising the following steps:
步骤一,将压控振荡器输出的频率为Fout的振荡信号的频率除以N以输出频率为Fout/N的分频信号至电荷泵电路,并将该频率为Fout/N的分频信号经处理输出同相分频信号与反相分频信号至电荷泵电路;Step 1, divide the frequency of the oscillating signal whose frequency is Fout output by the voltage-controlled oscillator by N to output a frequency-divided signal whose frequency is Fout/N to the charge pump circuit, and pass the frequency-divided signal whose frequency is Fout/N Process and output the non-phase frequency division signal and the anti-phase frequency division signal to the charge pump circuit;
步骤二,利用该电荷泵电路在该同相分频信号和反相分频信号控制下将参考电流源输出的参考电流Iref与频率电流转换电路输出的与分频信号Fout/N频率成比例的反馈电流If进行比较并输出误差电流Iout;Step 2, using the charge pump circuit to feed back the reference current Iref output by the reference current source and the frequency current conversion circuit output proportional to the frequency of the frequency division signal Fout/N under the control of the non-phase frequency division signal and the reverse phase frequency division signal The current If is compared and the error current Iout is output;
步骤三,利用低通滤波器电路将该误差电流Iout转换为平稳的控制电压Vc;Step 3, using a low-pass filter circuit to convert the error current Iout into a stable control voltage Vc;
步骤四,利用压控振荡器在该控制电压Vc的控制下改变输出信号的频率Fout。Step 4, using a voltage-controlled oscillator to change the frequency Fout of the output signal under the control of the control voltage Vc.
进一步地,于步骤一中,该压控振荡器产生的频率为Fout的振荡信号经N分频器后通过传输门与反相器产生该同相分频信号、反相分频信号两路相位相反的开关信号控制该电荷泵电路的PMOS管、NMOS管开关管同时导通与关断,以周期性对控制电压Vc进行充放电。Further, in step 1, the oscillating signal with a frequency of F out produced by the voltage-controlled oscillator passes through the N frequency divider and then passes through the transmission gate and the inverter to generate the non-phase frequency-divided signal and the anti-phase frequency-divided signal. The opposite switching signal controls the PMOS transistor and the NMOS transistor switching transistor of the charge pump circuit to be turned on and off at the same time, so as to periodically charge and discharge the control voltage Vc .
与现有技术相比,本发明一种高稳定性振荡器电路及其实现方法通过将压控振荡器输出的频率为Fout的振荡信号的频率除以N以输出频率为Fout/N的分频信号至电荷泵电路,并将该频率为Fout/N的分频信号经处理输出同相分频信号与反相分频信号,使得该电荷泵电路在该同相分频信号和反相分频信号控制下将参考电流Iref与频率电流转换电路输出的与分频信号Fout/N频率成比例的反馈电流If进行比较并输出误差电流Iout,并利用低通滤波器电路将该误差电流Iout转换为平稳的控制电压Vc,最后利用压控振荡器在该控制电压Vc的控制下改变输出信号的频率Fout,实现了一种基于闭环频率控制的低功耗、高稳定性振荡器的目的。Compared with the prior art, a high-stability oscillator circuit and its implementation method of the present invention divide the frequency of the oscillating signal whose frequency is Fout output by the voltage-controlled oscillator by N so that the output frequency is the frequency division of Fout/N The signal is sent to the charge pump circuit, and the frequency division signal whose frequency is Fout/N is processed to output the non-phase frequency division signal and the reverse phase frequency division signal, so that the charge pump circuit is controlled by the same phase frequency division signal and the reverse phase frequency division signal Next, compare the reference current Iref with the feedback current If output by the frequency-current conversion circuit and the frequency-division signal Fout/N frequency, and output the error current Iout, and use the low-pass filter circuit to convert the error current Iout into a stable Control the voltage Vc, and finally use the voltage-controlled oscillator to change the frequency Fout of the output signal under the control of the control voltage Vc, realizing the purpose of a low-power, high-stability oscillator based on closed-loop frequency control.
附图说明Description of drawings
图1为本发明一种高稳定性振荡器电路的电路结构图;Fig. 1 is the circuit structural diagram of a kind of high stability oscillator circuit of the present invention;
图2为本发明一种高稳定性振荡器电路的实现方法的步骤流程图。FIG. 2 is a flow chart of steps of a method for implementing a high-stability oscillator circuit in the present invention.
具体实施方式detailed description
以下通过特定的具体实例并结合附图说明本发明的实施方式,本领域技术人员可由本说明书所揭示的内容轻易地了解本发明的其它优点与功效。本发明亦可通过其它不同的具体实例加以施行或应用,本说明书中的各项细节亦可基于不同观点与应用,在不背离本发明的精神下进行各种修饰与变更。The implementation of the present invention is described below through specific examples and in conjunction with the accompanying drawings, and those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific examples, and various modifications and changes can be made to the details in this specification based on different viewpoints and applications without departing from the spirit of the present invention.
图1为本发明一种高稳定性振荡器电路的电路结构图。如图1所示,本发明一种高稳定性振荡器电路,包括:分频驱动电路10、电荷泵电路20、低通滤波器电路30以及压控振荡器40。FIG. 1 is a circuit structure diagram of a high stability oscillator circuit according to the present invention. As shown in FIG. 1 , a high-stability oscillator circuit according to the present invention includes: a frequency division drive circuit 10 , a charge pump circuit 20 , a low-pass filter circuit 30 and a voltage-controlled oscillator 40 .
其中,分频驱动电路10,包括N分频器Div1、传输门T1和反相器INV1,用于将压控振荡器40输出的频率为Fout的振荡信号的频率除以N以输出频率为Fout/N的分频信号电荷泵电路,并将频率为Fout/N的分频信号经传输门T1输出同相分频信号S1、经反相器INV1输出反相分频信号S2至电荷泵电路20;电荷泵电路20,包括PMOS管M1、NMOS管M2、参考电流源Iref以及频率电流转换电路(FIC)F1,用于在同相分频信号S1和反相分频信号S2控制下将参考电流Iref与频率电流转换电路(FIC)F1输出的与分频信号Fout/N频率成正比的反馈电流If进行比较并输出误差电流Iout;低通滤波器电路30为电阻R和电容C组成的一阶低通滤波器,用于将误差电流Iout转换为平稳的控制电压Vc,也可以采用二阶或多阶RC低通滤波器;压控振荡器40为通用电压控制频率的振荡器,用于在控制电压Vc的控制下改变输出信号的频率Fout。Wherein, the frequency division drive circuit 10 includes an N frequency divider Div1, a transmission gate T1 and an inverter INV1, which are used to divide the frequency of the oscillating signal whose frequency is Fout output by the voltage-controlled oscillator 40 by N so that the output frequency is Fout /N frequency-division signal charge pump circuit, and the frequency-division signal whose frequency is Fout/N outputs the in-phase frequency-division signal S1 through the transmission gate T1, and outputs the inverse frequency-division signal S2 to the charge pump circuit 20 through the inverter INV1; The charge pump circuit 20 includes a PMOS transistor M1, an NMOS transistor M2, a reference current source Iref, and a frequency-current conversion circuit (FIC) F1, which are used to convert the reference current Iref and The frequency current conversion circuit (FIC) F1 output is compared with the feedback current If proportional to the frequency of the frequency division signal Fout/N and outputs the error current Iout; the low-pass filter circuit 30 is a first-order low-pass composed of a resistor R and a capacitor C The filter is used to convert the error current Iout into a stable control voltage Vc, and a second-order or multi-order RC low-pass filter can also be used; the voltage-controlled oscillator 40 is an oscillator with a general voltage control frequency, used for controlling the voltage The frequency Fout of the output signal is changed under the control of Vc.
压控振荡器VCO1的输出连接至后续电路(未示出)和分频器Div1的输入端,分频器Div1输出的频率为Fout/N的输出信号连接至传输门T1的输入端、反相器INV1的输入端和频率电流转换电路(FIC)F1的频率输入端,传输门T1的输出端连接至PMOS管M1的栅极,反相器INV1的输出端连接至NMOS管M2的栅极,PMOS管M1的源极连接至电源正端VDD,NMOS管M2的源极连接至电源负端(地),PMOS管M1的漏极连接至参考电流源Iref的输入端,参考电流源Iref的输出端连接至频率电流转换电路(FIC)F1的电流输入端和电阻R的一端,频率电流转换电路(FIC)F1的电流输出端连接至NMOS管M2的漏极,电阻R的另一端连接至电容C的一端和压控振荡器VCO1的控制端,电容C的另一端接电源负端(地);分频器Div1、传输门T1、反相器INV1和压控振荡器VCO1均需连接各自的电源和地。The output of the voltage-controlled oscillator VCO1 is connected to the subsequent circuit (not shown) and the input terminal of the frequency divider Div1, and the output signal of the frequency Fout/N output by the frequency divider Div1 is connected to the input terminal of the transmission gate T1, the inverting The input terminal of the inverter INV1 and the frequency input terminal of the frequency current conversion circuit (FIC) F1, the output terminal of the transmission gate T1 is connected to the gate of the PMOS transistor M1, and the output terminal of the inverter INV1 is connected to the gate of the NMOS transistor M2, The source of the PMOS transistor M1 is connected to the positive power supply terminal VDD, the source of the NMOS transistor M2 is connected to the negative power supply terminal (ground), the drain of the PMOS transistor M1 is connected to the input terminal of the reference current source Iref, and the output of the reference current source Iref The terminal is connected to the current input terminal of the frequency current conversion circuit (FIC) F1 and one end of the resistor R, the current output terminal of the frequency current conversion circuit (FIC) F1 is connected to the drain of the NMOS transistor M2, and the other end of the resistor R is connected to the capacitor One end of C is connected to the control end of the voltage-controlled oscillator VCO1, and the other end of the capacitor C is connected to the negative end of the power supply (ground); the frequency divider Div1, the transmission gate T1, the inverter INV1, and the voltage-controlled oscillator VCO1 all need to be connected to their respective power and ground.
可见,压控振荡器VCO1根据输入的控制电压VC产生频率为Fout的周期性振荡信号;分频器Div1作用是将振荡信号频率减小N倍;频率电流转换电路(FIC)将输入频率信号转换为对应电流值,具有线性关系,满足:It can be seen that the voltage-controlled oscillator VCO1 generates a periodic oscillation signal with a frequency of Fout according to the input control voltage VC; the function of the frequency divider Div1 is to reduce the frequency of the oscillation signal by N times; the frequency-current conversion circuit (FIC) converts the input frequency signal is the corresponding current value, which has a linear relationship and satisfies:
本发明的工作原理如下:The working principle of the present invention is as follows:
压控振荡器VCO1产生的频率Fout的振荡信号经分频器Div1后通过传输门T1与反相器INV1产生同相分频信号S1、反相分频信号S2两路相位相反的开关信号控制M1、M2开关管同时导通与关断,以周期性对控制电压Vc进行充放电,电荷泵电路周期性的工作有助于降低电路系统功耗。导通周期内参考电流源产生的Iref电流与If电流相比较,输出电流值为两者之差:The oscillating signal of the frequency F out generated by the voltage-controlled oscillator VCO1 passes through the frequency divider Div1 and then passes through the transmission gate T1 and the inverter INV1 to generate the in-phase frequency division signal S1 and the inverse frequency division signal S2. Two switching signals with opposite phases control M1 , The M2 switch tube is turned on and off at the same time to periodically charge and discharge the control voltage V c , and the periodic work of the charge pump circuit helps to reduce the power consumption of the circuit system. The I ref current generated by the reference current source during the conduction period is compared with the I f current, and the output current value is the difference between the two:
若Iout>0→对Vc进行充电→电压Vc增加→频率增高→电流If增大→Iout减小,如此反复,直至Iref=If,稳定振荡频率的频率表达式为:If I out >0 → charge V c → increase voltage V c → increase frequency → increase current I f → decrease I out , repeat this process until I ref = I f , the frequency expression of the stable oscillation frequency is:
电阻R、电容C组成低通滤波电路用来降低控制电压Vc纹波,稳定系统输出的频率Fout。The resistor R and the capacitor C form a low-pass filter circuit to reduce the ripple of the control voltage Vc and stabilize the frequency Fout of the system output.
通过最终的输出频率表达式可分析得,由于分频比N、频率电流转换系数α均为固定值,通过反馈控制后得到的振荡频率仅与Iref相关,这样通过设计与工艺角、电源电压、工作温度无关的基准电流源,可以得到同样具有高稳定度的振荡信号。It can be analyzed from the final output frequency expression that since the frequency division ratio N and the frequency-to-current conversion coefficient α are all fixed values, the oscillation frequency obtained after feedback control is only related to Iref, so through design and process angle, power supply voltage, The temperature-independent reference current source can obtain the same high-stability oscillation signal.
图2为本发明一种高稳定性振荡器电路的实现方法的步骤流程图。如图2所示,本发明一种高稳定性振荡器电路的实现方法,包括如下步骤:FIG. 2 is a flow chart of steps of a method for implementing a high-stability oscillator circuit in the present invention. As shown in Figure 2, a method for realizing a high-stability oscillator circuit of the present invention includes the following steps:
步骤201,将压控振荡器输出的频率为Fout的振荡信号的频率除以N以输出频率为Fout/N的分频信号至电荷泵电路,并将该频率为Fout/N的分频信号经处理输出同相分频信号与反相分频信号至电荷泵电路;Step 201, divide the frequency of the oscillating signal whose frequency is Fout output by the voltage-controlled oscillator by N to output a frequency-divided signal whose frequency is Fout/N to the charge pump circuit, and pass the frequency-divided signal whose frequency is Fout/N Process and output the non-phase frequency division signal and the anti-phase frequency division signal to the charge pump circuit;
步骤202,将电荷泵电路在该同相分频信号和反相分频信号控制下将该参考电流源的参考电流Iref与频率电流转换电路输出的与分频信号Fout/N频率成比例的反馈电流If进行比较并输出误差电流Iout;Step 202, the charge pump circuit under the control of the non-phase frequency division signal and the reverse phase frequency division signal, the reference current Iref of the reference current source and the feedback current proportional to the frequency of the frequency division signal Fout/N output by the frequency current conversion circuit If compares and outputs the error current Iout;
步骤203,利用低通滤波器电路将该误差电流Iout转换为平稳的控制电压Vc;Step 203, using a low-pass filter circuit to convert the error current Iout into a stable control voltage Vc;
步骤204,利用压控振荡器在该控制电压Vc的控制下改变输出信号的频率Fout。Step 204, using a voltage controlled oscillator to change the frequency Fout of the output signal under the control of the control voltage Vc.
具体地说,该压控振荡器产生的频率为Fout的振荡信号经N分频器后通过传输门与反相器产生该同相分频信号、反相分频信号两路相位相反的开关信号,该电荷泵电路在该同相分频信号和反相分频信号控制下将参考电流Iref与频率电流转换电路输出的与分频信号Fout/N频率成比例的反馈电流If进行比较输出误差电流Iout至低通滤波器电路(包括电容与电阻),在本发明具体实施例中,该同相分频信号、反相分频信号分别控制该电荷泵电路的PMOS管、NMOS管开关管同时导通与关断,进而周期性地对控制电压Vc进行充放电,电荷泵电路周期性的工作有助于降低电路系统功耗。Specifically, the oscillating signal with the frequency F out generated by the voltage-controlled oscillator passes through the N frequency divider and then passes through the transmission gate and the inverter to generate the non-phase frequency-divided signal and the anti-phase frequency-divided signal. Two switching signals with opposite phases , the charge pump circuit compares the reference current Iref with the feedback current If proportional to the frequency of the frequency-division signal Fout/N output by the frequency-current conversion circuit under the control of the in-phase frequency-division signal and the reverse-phase frequency-division signal to output an error current Iout To a low-pass filter circuit (comprising a capacitor and a resistor), in a specific embodiment of the present invention, the in-phase frequency division signal and the anti-phase frequency division signal respectively control the PMOS tube and the NMOS tube switch tube of the charge pump circuit to be turned on and switched on simultaneously. Turn off, and then periodically charge and discharge the control voltage Vc , the periodic work of the charge pump circuit helps to reduce the power consumption of the circuit system.
综上所述,本发明一种高稳定性振荡器电路及其实现方法通过将压控振荡器输出的频率为Fout的振荡信号的频率除以N以输出频率为Fout/N的分频信号至电荷泵电路,并将该频率为Fout/N的分频信号经处理输出同相分频信号与反相分频信号,使得该电荷泵电路在该同相分频信号和反相分频信号控制下将参考电流Iref与频率电流转换电路输出的与分频信号Fout/N频率成比例的反馈电流If进行比较并输出误差电流Iout,并利用低通滤波器电路将该误差电流Iout转换为平稳的控制电压Vc,最后利用压控振荡器在该控制电压Vc的控制下改变输出信号的频率Fout,实现了一种基于闭环频率控制的低功耗、高稳定性振荡器的目的。In summary, a high-stability oscillator circuit and its implementation method of the present invention divide the frequency of the oscillation signal whose frequency is Fout output by the voltage-controlled oscillator by N to output a frequency-divided signal whose frequency is Fout/N to A charge pump circuit, and the frequency division signal whose frequency is Fout/N is processed to output a non-phase frequency division signal and an inverted frequency division signal, so that the charge pump circuit will be controlled by the same phase frequency division signal and the reverse phase frequency division signal. The reference current Iref is compared with the feedback current If output by the frequency-current conversion circuit proportional to the frequency of the frequency division signal Fout/N, and the error current Iout is output, and the error current Iout is converted into a stable control voltage by using a low-pass filter circuit Vc, and finally use the voltage-controlled oscillator to change the frequency Fout of the output signal under the control of the control voltage Vc, realizing the purpose of a low-power, high-stability oscillator based on closed-loop frequency control.
上述实施例仅例示性说明本发明的原理及其功效,而非用于限制本发明。任何本领域技术人员均可在不违背本发明的精神及范畴下,对上述实施例进行修饰与改变。因此,本发明的权利保护范围,应如权利要求书所列。The above-mentioned embodiments only illustrate the principles and effects of the present invention, but are not intended to limit the present invention. Any person skilled in the art can modify and change the above-mentioned embodiments without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention should be listed in the claims.
Claims (10)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201710534524.2A CN107317580B (en) | 2017-07-03 | 2017-07-03 | High-stability oscillator circuit and implementation method thereof |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201710534524.2A CN107317580B (en) | 2017-07-03 | 2017-07-03 | High-stability oscillator circuit and implementation method thereof |
Publications (2)
Publication Number | Publication Date |
---|---|
CN107317580A true CN107317580A (en) | 2017-11-03 |
CN107317580B CN107317580B (en) | 2020-09-15 |
Family
ID=60181030
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201710534524.2A Active CN107317580B (en) | 2017-07-03 | 2017-07-03 | High-stability oscillator circuit and implementation method thereof |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN107317580B (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN113054910A (en) * | 2021-03-11 | 2021-06-29 | 四川中微芯成科技有限公司 | Capacitance oscillation circuit, capacitance detection circuit and detection method |
CN114553193A (en) * | 2022-04-27 | 2022-05-27 | 灵矽微电子(深圳)有限责任公司 | Clock generation circuit and device insensitive to supply voltage and temperature |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5608463A (en) * | 1992-08-26 | 1997-03-04 | Nec Corporation | Oscillator circuit suitable for picture-in-picture system |
EP0945986A2 (en) * | 1998-03-26 | 1999-09-29 | Nec Corporation | Charge pump circuit for PLL |
CN103873054A (en) * | 2014-03-31 | 2014-06-18 | 杭州士兰微电子股份有限公司 | Clock generator |
CN104124968A (en) * | 2014-08-06 | 2014-10-29 | 西安电子科技大学 | Clock duty ratio calibration circuit for streamlined analog-digital converter |
-
2017
- 2017-07-03 CN CN201710534524.2A patent/CN107317580B/en active Active
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5608463A (en) * | 1992-08-26 | 1997-03-04 | Nec Corporation | Oscillator circuit suitable for picture-in-picture system |
EP0945986A2 (en) * | 1998-03-26 | 1999-09-29 | Nec Corporation | Charge pump circuit for PLL |
CN103873054A (en) * | 2014-03-31 | 2014-06-18 | 杭州士兰微电子股份有限公司 | Clock generator |
CN104124968A (en) * | 2014-08-06 | 2014-10-29 | 西安电子科技大学 | Clock duty ratio calibration circuit for streamlined analog-digital converter |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN113054910A (en) * | 2021-03-11 | 2021-06-29 | 四川中微芯成科技有限公司 | Capacitance oscillation circuit, capacitance detection circuit and detection method |
CN114553193A (en) * | 2022-04-27 | 2022-05-27 | 灵矽微电子(深圳)有限责任公司 | Clock generation circuit and device insensitive to supply voltage and temperature |
CN114553193B (en) * | 2022-04-27 | 2022-08-09 | 灵矽微电子(深圳)有限责任公司 | Clock generation circuit and apparatus insensitive to supply voltage and temperature |
Also Published As
Publication number | Publication date |
---|---|
CN107317580B (en) | 2020-09-15 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN101873132B (en) | PLL circuit | |
CN106559072B (en) | Self-biased phase-locked loop | |
CN101741379B (en) | Frequency complex for fast locking phaselocked loop | |
CN104113329A (en) | Frequency-locked loop circuit and semiconductor integrated circuit | |
CN104202048A (en) | Broadband totally-integrated phase-locked loop frequency synthesizer | |
CN103873054A (en) | Clock generator | |
US8547150B2 (en) | Phase-locked loop with two negative feedback loops | |
CN107317580B (en) | High-stability oscillator circuit and implementation method thereof | |
CN106856404B (en) | Phase-locked loop of digital-analog double-loop hybrid control structure | |
CN103312267B (en) | A kind of high precision oscillator and frequency generating method | |
US8373511B2 (en) | Oscillator circuit and method for gain and phase noise control | |
CN106444344A (en) | High-stability clock generation circuit based on automatic biasing frequency locking ring | |
US8970311B2 (en) | Voltage-controlled oscillator with amplitude and frequency independent of process variations and temperature | |
CN101527566A (en) | Current device applied to phase-locked loop and method thereof | |
CN104065344A (en) | Low-consumption oscillator | |
CN108123715B (en) | Frequency multiplier circuit | |
CN104143979B (en) | A kind of high-precision high frequency ring oscillator circuit | |
Robles et al. | A low power 0.6 V filter-less AD-PLL with a fast locking algorithm in the subthreshold region | |
US7277519B2 (en) | Frequency and phase correction in a phase-locked loop (PLL) | |
US8664991B1 (en) | Apparatus and methods for phase-locked loops | |
CN210093195U (en) | Oscillators, Phase Locked Loops, and Radar Systems | |
CN203722608U (en) | High-precision high-frequency ring oscillator circuit | |
CN109639270B (en) | Voltage controlled oscillator circuit | |
Saw et al. | A low power low noise current starved CMOS VCO for PLL | |
CN205430207U (en) | Treatment circuit and phase -locked loop |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |