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CN107104656A - Filter time constant changes circuit and D/A change-over circuits - Google Patents

Filter time constant changes circuit and D/A change-over circuits Download PDF

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CN107104656A
CN107104656A CN201710081756.7A CN201710081756A CN107104656A CN 107104656 A CN107104656 A CN 107104656A CN 201710081756 A CN201710081756 A CN 201710081756A CN 107104656 A CN107104656 A CN 107104656A
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filter
time constant
time
change
input signal
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CN107104656B (en
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小木曾康弘
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Azbil Corp
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H17/00Networks using digital techniques
    • H03H17/0009Time-delay networks
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/06Continuously compensating for, or preventing, undesired influence of physical parameters
    • H03M1/0617Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence
    • H03M1/0626Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence by filtering
    • H03M1/0631Smoothing
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66Digital/analogue converters
    • H03M1/82Digital/analogue converters with intermediate conversion to time interval
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H2210/00Indexing scheme relating to details of tunable filters
    • H03H2210/04Filter calibration method
    • H03H2210/043Filter calibration method by measuring time constant

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)
  • Networks Using Active Elements (AREA)

Abstract

本发明公开了一种滤波器时间常数变更电路以及D/A转换电路,在与输入信号的变化相应地变更滤波器的时间常数的构成中,降低滤波器的输出的纹波。滤波器时间常数变更电路(4)包括:变化量计算部(40,41),其计算由当前时间点的输入信号的值f(t)和从当前时间点起T时间前的输入信号的值f(t‑T)而获得的每一规定时间T的变化量h(t,T)=f(t)‑f(t‑T);以及比较部(42),其根据变化量h(t,T)与规定阈值的比较结果来输出控制滤波器(2)的时间常数的控制信号。

The present invention discloses a filter time constant change circuit and a D/A conversion circuit, in which the time constant of the filter is changed according to the change of the input signal, and the ripple of the output of the filter is reduced. The filter time constant change circuit (4) includes: a variation calculation unit (40, 41) which calculates the value f(t) of the input signal from the current time point and the value of the input signal T time before from the current time point The amount of change h(t, T)=f(t)-f(t-T) of each specified time T obtained by f(t-T); , T) and a predetermined threshold to output a control signal for controlling the time constant of the filter (2).

Description

滤波器时间常数变更电路以及D/A转换电路Filter time constant change circuit and D/A conversion circuit

技术领域technical field

本发明涉及根据输入信号的变化变更滤波器的时间常数的滤波器时间常数变更电路,以及使用滤波器时间常数变更电路的D/A转换电路。The present invention relates to a filter time constant changing circuit which changes the time constant of a filter according to a change of an input signal, and a D/A conversion circuit using the filter time constant changing circuit.

背景技术Background technique

在D/A转换电路的输出中,一般采用通过低通滤波器对脉冲的波形进行平滑化而输出的方式。根据此时的滤波器的时间常数的大小,响应速度与纹波不能同时兼顾。实际上在确定滤波器的时间常数时,例如在能够容许的纹波的值中确定为尽可能快的响应速度等。另一方面,在逐步地进行D/A转换电路的输出的大的变化时,存在着由于该响应速度的限制导致的跟随的延迟成为问题的情形。In the output of the D/A conversion circuit, generally, the pulse waveform is smoothed by a low-pass filter and output. Depending on the size of the time constant of the filter at this time, the response speed and the ripple cannot be balanced at the same time. In fact, when determining the time constant of the filter, for example, the response speed is determined as fast as possible within the allowable ripple value. On the other hand, when a large change in the output of the D/A conversion circuit is performed step by step, there are cases where a follow-up delay due to the limitation of the response speed becomes a problem.

作为这样问题的解决对策,提出了如下的技术:在存在D/A转换电路的输出的大且急的变化时,通过减小滤波器的时间常数,实现纹波的限制并且加快响应(参照专利文献1)。图14为表示专利文献1所公开的D/A转换电路的构成的框图。图14的D/A转换电路使用ASIC(Application Specific Integrated Circuit,专用集成电路)300,以使响应性提高。在制作PWM信号的数字数据发生了变化时,切换为由电阻302和电容303形成的时间常数较小的模拟滤波器,改善响应性。在数字数据没有变化时,切换为由电阻301和电容303构成的时间常数较大的模拟滤波器,抑制输出纹波。As a solution to such a problem, a technique has been proposed in which, when there is a large and sharp change in the output of the D/A conversion circuit, by reducing the time constant of the filter, the limitation of the ripple is realized and the response is quickened (see patent Literature 1). FIG. 14 is a block diagram showing the configuration of a D/A conversion circuit disclosed in Patent Document 1. As shown in FIG. The D/A conversion circuit of FIG. 14 uses an ASIC (Application Specific Integrated Circuit, application specific integrated circuit) 300 to improve responsiveness. When the digital data for generating the PWM signal changes, it is switched to an analog filter with a small time constant formed by the resistor 302 and the capacitor 303 to improve responsiveness. When there is no change in the digital data, it is switched to an analog filter with a relatively large time constant composed of the resistor 301 and the capacitor 303 to suppress the output ripple.

在与从D/A转换电路输入至滤波器的输入信号的变化的大小相对应地使滤波器的时间常数发生变化的情况下,作为常识的想法,能够想到例如图15那样的构成。在图15的例子中,变化量计算部100计算输入信号f(t)的变化量Δf(t)/Δt,根据该变化量Δf(t)/Δt,时间常数变更部101变更滤波器102的时间常数。在图16的例子中,在输入信号f(t)发生了变化时,变更滤波器102的时间常数。另一方面,在图17的例子中,在变化量Δf(t)/Δt超过了阈值TH时,变更滤波器102的时间常数。When changing the time constant of the filter according to the magnitude of the change in the input signal from the D/A conversion circuit to the filter, for example, a configuration such as that shown in FIG. 15 is conceivable as common sense. In the example of FIG. 15 , the change amount calculation unit 100 calculates the change amount Δf(t)/Δt of the input signal f(t), and the time constant change unit 101 changes the time constant of the filter 102 based on the change amount Δf(t)/Δt. time constant. In the example of FIG. 16, when the input signal f(t) changes, the time constant of the filter 102 is changed. On the other hand, in the example of FIG. 17 , when the amount of change Δf(t)/Δt exceeds the threshold value TH, the time constant of the filter 102 is changed.

一般地,在变化量计算部100进行的处理相当于微分,生成用于滤波器102的时间常数变更的控制信号(图16、图17的滤波器时间常数变更标识)被限制于输入信号f(t)具有倾斜的期间。因此,在输入信号f(t)具有倾斜的时间宽度非常短的情况下,生成用于时间常数变更的控制信号的时间宽度也变短。进行滤波器102的时间常数变更的适当的时间宽度依存于滤波器102具有的时间常数以及滤波器102的目的,因此,如果生成用于时间常数变更的控制信号的时间宽度变短的话,则有可能不能够充分地发挥滤波器102的时间常数变更为目的的功能。Generally, the processing performed in the change amount calculation unit 100 is equivalent to differentiation, and the generation of a control signal for changing the time constant of the filter 102 (filter time constant change flags in FIGS. 16 and 17 ) is limited to the input signal f( t) has a period of inclination. Therefore, when the time width in which the input signal f(t) has an inclination is very short, the time width in which the control signal for changing the time constant is generated also becomes short. The appropriate time width for changing the time constant of the filter 102 depends on the time constant of the filter 102 and the purpose of the filter 102. Therefore, if the time width for generating a control signal for changing the time constant is shortened, there may be The function for changing the time constant of the filter 102 may not be fully exhibited.

例如,考虑如下的情况:为了与某一定以上的输入信号f(t)的急剧的变化相对应,与输入信号f(t)的变化对应地暂时减小滤波器102的时间常数。此时,变更时间常数的时间宽度需要为如下长度:即,根据变更后的滤波器102的时间常数,能够充分地追随输入信号f(t)。但即使仅在输入信号f(t)的变化期间(仅在微分值超过阈值TH期间)减小滤波器102的时间常数,滤波器102的输出也成为图18那样,并不能够充分地发挥滤波器102的功能。在图18的例子中,g(t)表示滤波器102的实际的输出,g’(t)表示理想的输出。根据图18可知,滤波器102的输出g(t)并不能够追随输入信号f(t)的变化。For example, consider a case where the time constant of the filter 102 is temporarily reduced in response to a change in the input signal f(t) in order to respond to a sudden change in the input signal f(t) greater than a certain level. In this case, the time width of the changed time constant needs to be such that the time constant of the filter 102 after the change can sufficiently follow the input signal f(t). However, even if the time constant of the filter 102 is reduced only during the change period of the input signal f(t) (only during the period when the differential value exceeds the threshold value TH), the output of the filter 102 becomes as shown in FIG. The function of device 102. In the example of Fig. 18, g(t) represents the actual output of the filter 102, and g'(t) represents the ideal output. It can be seen from FIG. 18 that the output g(t) of the filter 102 cannot follow the change of the input signal f(t).

针对这样的图15构成的问题点,容易想到:使用计时器,以变化量计算部100的输出(输入信号f(t)的微分值)作为触发,在变化量计算部100的输出超过了阈值的情况下将滤波器102的时间常数变更保持一定时间的机制,由此能够充分地发挥滤波器102的功能。在图19的例子中,通过在变化量计算部100和时间常数变更部101之间设置计时器103,由计时器103制作向输入信号f(t)的追随所必要的时间宽度的信号,由此如图20所示,给予向输入信号f(t)的追随所必要的时间常数变更的时间宽度。With regard to the problem of such a configuration in FIG. 15 , it is easy to think that using a timer and using the output of the variation calculation unit 100 (the differential value of the input signal f(t)) as a trigger, when the output of the variation calculation unit 100 exceeds the threshold value In this case, the time constant of the filter 102 is changed and maintained for a certain period of time, so that the function of the filter 102 can be fully exerted. In the example of FIG. 19 , by providing a timer 103 between the variation calculating unit 100 and the time constant changing unit 101, the timer 103 creates a signal with a time width necessary to follow the input signal f(t), and As shown in FIG. 20, this provides a time width for changing the time constant necessary for tracking the input signal f(t).

但是,在图19所示的构成中,在以变化量计算部100的输出(输入信号f(t)的微分值)作为滤波器102的时间常数变更的触发中,存在着增大在原本无意场景下的误动作之虞。例如,图21所示那样的与瞬间的输入信号f(t)的变化相对应,进行了一定时间滤波器102的时间常数变更,存在着在无意图的区域滤波器102的输出g(t)产生纹波的问题。However, in the configuration shown in FIG. 19 , when the output of the change amount calculation unit 100 (the differential value of the input signal f(t)) is used as the trigger for changing the time constant of the filter 102, there is an unintentional increase. The risk of misoperation in the scene. For example, as shown in FIG. 21, the time constant of the filter 102 is changed for a certain period of time corresponding to the change of the instantaneous input signal f(t), and there is an output g(t) of the filter 102 in an unintended area. The ripple problem.

现有技术文献prior art literature

专利文献patent documents

专利文献1:日本特开2003-101413号公报Patent Document 1: Japanese Patent Laid-Open No. 2003-101413

发明内容Contents of the invention

发明要解决的问题The problem to be solved by the invention

如以上那样,在与输入信号的变化相应地变更滤波器的时间常数的构成中,存在着如下的问题点:如果使滤波器的输出充分地追随输入信号的变化,则在滤波器的输出产生较大的纹波。As described above, in the configuration of changing the time constant of the filter according to the change of the input signal, there is a problem that if the output of the filter is made to sufficiently follow the change of the input signal, a Larger ripple.

另外,以上的问题并不限于以D/A转换电路的输出为输入的滤波器,例如在对模拟信号进行滤波处理并输入至A/D转换电路的滤波器等中也同样地发生。Note that the above problems are not limited to filters that receive the output of the D/A conversion circuit, and similarly occur in filters that filter an analog signal and input it to the A/D conversion circuit, for example.

本发明为了解决上述问题而完成的,其目的在于,提供一种在与输入信号的变化相应地变更滤波器的时间常数的构成中,能够降低滤波器的输出的纹波的滤波器时间常数变更电路。The present invention was made to solve the above-mentioned problems, and an object of the present invention is to provide a filter time constant change that can reduce ripple in the output of the filter in a configuration that changes the time constant of the filter according to changes in the input signal. circuit.

解决问题的技术手段technical means to solve problems

本发明为确定用于对输入信号进行滤波的滤波器的时间常数的滤波器时间常数变更电路,所述滤波器时间常数变更电路的特征在于,变化量计算部,其计算由当前时间点的所述输入信号的值f(t)和从当前时间点起T时间前的输入信号的值f(t-T)而获得的每一规定时间T的变化量h(t,T)=f(t)-f(t-T);以及比较部,其根据所述变化量h(t,T)与规定的阈值的比较结果来输出控制所述滤波器的时间常数的控制信号。The present invention is a filter time constant change circuit for determining a time constant of a filter for filtering an input signal. The filter time constant change circuit is characterized in that a change amount calculation unit calculates the time constant obtained from the current time point. The value f(t) of the input signal and the value f(t-T) of the input signal before T time from the current time point, the change amount h(t, T) for each specified time T = f(t)- f(t-T); and a comparison unit that outputs a control signal for controlling a time constant of the filter based on a comparison result between the change amount h(t, T) and a predetermined threshold.

另外,在本发明的滤波器时间常数变更电路的一构成例中,其特征在于,在所述变化量h(t,T)为所述阈值以下的情况下,所述比较部输出使所述滤波器的时间常数为第1滤波器时间常数τ1的控制信号;在所述变化量h(t,T)超过所述阈值的情况下,所述比较部输出使所述滤波器的时间常数变更为小于所述第1滤波器时间常数τ1的第2滤波器时间常数τ2的控制信号。In addition, in a configuration example of the filter time constant changing circuit of the present invention, when the change amount h(t, T) is equal to or less than the threshold value, the comparison unit outputs the The time constant of the filter is a control signal of the first filter time constant τ1; when the amount of change h(t, T) exceeds the threshold, the comparison unit outputs a signal to change the time constant of the filter is a control signal of a second filter time constant τ2 smaller than the first filter time constant τ1.

另外,在本发明的滤波器时间常数变更电路的一构成例中,其特征在于,所述规定时间T为从所述输入信号的变化开始时间点起,直到在所述第2滤波器时间常数τ2中,所述滤波器的输出信号的值相对于该变化的最终值达到规定的比例为止的时间。In addition, in an example configuration of the filter time constant changing circuit of the present invention, the predetermined time T is from the time when the change of the input signal starts until the second filter time constant In τ2, the time until the value of the output signal of the filter reaches a predetermined ratio with respect to the final value of the change.

另外,本发明的D/A转换电路的特征在于,包括:D/A转换部,其将数字输入信号转换为模拟信号;滤波器,其对该D/A转换部的输出信号进行平滑化;以及技术方案1至3中任一项所述的滤波器时间常数变更电路,其以所述数字输入信号为输入,并输出控制所述滤波器的时间常数的控制信号。In addition, the D/A conversion circuit of the present invention is characterized by including: a D/A conversion unit that converts a digital input signal into an analog signal; a filter that smoothes an output signal of the D/A conversion unit; And the filter time constant changing circuit according to any one of claims 1 to 3, which receives the digital input signal as an input and outputs a control signal for controlling the time constant of the filter.

发明的效果The effect of the invention

根据本发明,通过设置变化量计算部和比较部,能够使滤波器的输出追随输入信号的变化,并且能够降低滤波器的输出的纹波。另外,在本发明中,由于能够不使用现有那样的计时器地实现滤波器的输出的纹波降低,因此能够容易地进行电路的安装。According to the present invention, by providing the variation calculating unit and the comparing unit, the output of the filter can be made to follow the variation of the input signal, and the ripple of the output of the filter can be reduced. In addition, in the present invention, since the ripple of the output of the filter can be reduced without using a conventional timer, circuit mounting can be easily performed.

附图说明Description of drawings

图1为说明本发明所涉及的变化量计算的原理的波形图。FIG. 1 is a waveform diagram illustrating the principle of variation calculation according to the present invention.

图2为说明本发明所涉及的变化量计算的原理的波形图。FIG. 2 is a waveform diagram illustrating the principle of variation calculation according to the present invention.

图3为说明在本发明中变更滤波器的时间常数的动作的波形图。Fig. 3 is a waveform diagram illustrating the operation of changing the time constant of the filter in the present invention.

图4为表示本发明所涉及的变化量计算的其他例子的波形图。FIG. 4 is a waveform diagram showing another example of variation calculation according to the present invention.

图5为表示本发明所涉及的变化量计算的其他例子的波形图。FIG. 5 is a waveform diagram showing another example of variation calculation according to the present invention.

图6为说明在本发明中变更滤波器的时间常数的动作的波形图。Fig. 6 is a waveform diagram illustrating the operation of changing the time constant of the filter in the present invention.

图7为表示本发明所涉及的变化量计算的其他例子的波形图。FIG. 7 is a waveform diagram showing another example of variation calculation according to the present invention.

图8为表示本发明所涉及的变化量计算的其他例子的波形图。FIG. 8 is a waveform diagram showing another example of variation calculation according to the present invention.

图9为说明在本发明中变更滤波器的时间常数的动作的波形图。Fig. 9 is a waveform diagram illustrating the operation of changing the time constant of the filter in the present invention.

图10为表示本发明的实施方式所涉及的D/A转换电路的构成的框图。FIG. 10 is a block diagram showing the configuration of a D/A conversion circuit according to the embodiment of the present invention.

图11为说明本发明的实施方式中的规定时间的设定方法的图。FIG. 11 is a diagram illustrating a method of setting a predetermined time in the embodiment of the present invention.

图12为表示本发明的实施方式所涉及的D/A转换电路的响应的例子的波形图。FIG. 12 is a waveform diagram showing an example of the response of the D/A conversion circuit according to the embodiment of the present invention.

图13为表示本发明的实施方式所涉及的D/A转换电路的响应的实测结果的波形图。13 is a waveform diagram showing actual measurement results of the response of the D/A conversion circuit according to the embodiment of the present invention.

图14为表示现有的D/A转换电路的构成的框图。FIG. 14 is a block diagram showing the configuration of a conventional D/A conversion circuit.

图15为表示使滤波器的时间常数发生变化的构成的框图。FIG. 15 is a block diagram showing a configuration for changing the time constant of a filter.

图16为说明在图15的构成中变更滤波器的时间常数的动作的波形图。FIG. 16 is a waveform diagram illustrating the operation of changing the time constant of the filter in the configuration of FIG. 15 .

图17为说明在图15的构成中变更滤波器的时间常数的其他动作的波形图。Fig. 17 is a waveform diagram illustrating another operation of changing the time constant of the filter in the configuration of Fig. 15 .

图18为说明图15的构成的问题点的波形图。FIG. 18 is a waveform diagram illustrating a problem with the configuration of FIG. 15 .

图19表示使滤波器的时间常数发生变化的其他构成的框图。FIG. 19 is a block diagram showing another configuration for changing the time constant of the filter.

图20为说明在图19的构成中变更滤波器的时间常数的动作的波形图。FIG. 20 is a waveform diagram illustrating the operation of changing the time constant of the filter in the configuration of FIG. 19 .

图21为说明图19的构成的问题点的波形图。FIG. 21 is a waveform diagram illustrating a problem with the configuration of FIG. 19 .

具体实施方式detailed description

[发明原理][Principle of invention]

图1的(A)~图1的(C),图2的(A)~图2的(C)为说明本发明所涉及的变化量计算的原理的波形图。在本发明中,将计算输入信号的变化量(微分值)的现有的构成替换为计算与作为滤波器的目的的时间常数变化相对应的每一个时间宽度T的变化量的构成,由此,使滤波器的时间常数变更的效果恰当地反映。具体来说,计算由想要计算变化量的当前时间点的输入信号的值f(t)与从当前时间点起T时间前的输入信号的值f(t-T)而获得的每一规定时间的变化量h(t,T)=f(t)-f(t-T),并根据该计算结果来确定滤波器的时间常数。在图1的(A)~图1的(C)、图2的(A)~图2的(C)的例子中,示出了相应于随时间变化的输入信号逐次计算变化量h(t,T)的状况。1(A) to 1(C) and FIG. 2(A) to 2(C) are waveform diagrams illustrating the principle of variation calculation according to the present invention. In the present invention, the conventional configuration for calculating the amount of change (differential value) of the input signal is replaced with a configuration for calculating the amount of change for each time width T corresponding to the change of the time constant that is the purpose of the filter, thereby , so that the effect of changing the time constant of the filter is properly reflected. Specifically, calculate the value f(t) of the input signal at the current time point at which the amount of change is desired to be calculated and the value f(t-T) of the input signal before T time from the current time point for each specified time The variation h(t, T)=f(t)-f(t-T), and the time constant of the filter is determined according to the calculation result. In the examples of Fig. 1 (A) to Fig. 1 (C) and Fig. 2 (A) to Fig. 2 (C), it is shown that the change amount h(t , T) situation.

若采用在如以上那样计算出的变化量h(t,T)超过了规定是阈值TH时滤波器的时间常数变小(将滤波器时间常数变更标识作为“1”)的构成的话,滤波器的输出g(t)成为图3所示那样。图3中的g’(t)表示理想的输出。If the time constant of the filter is reduced (the filter time constant change flag is set to "1") when the amount of change h(t, T) calculated as above exceeds the predetermined threshold value TH, the filter The output g(t) of is as shown in FIG. 3 . g'(t) in Fig. 3 represents the ideal output.

与图20的情况进行比较的话则可以看出,本发明滤波器的输出g(t)更早地追随输入信号f(t)。Comparing with the situation in Fig. 20, it can be seen that the output g(t) of the filter of the present invention follows the input signal f(t) earlier.

另外,在本发明中,变化量h(t,T)为将输入信号f(t)的变化的大小的总量作为信息而包含的形式,因此不会发生在图21说明那样的纹波的问题。在图4的(A)~图4的(D)、图5中示出了针对图21所示那样的瞬间的输入信号f(t)变化的本发明的变化量计算的结果。In addition, in the present invention, since the amount of change h(t, T) is in a format that includes the total amount of change in the input signal f(t) as information, ripples as described in FIG. 21 do not occur. question. 4(A) to 4(D) and FIG. 5 show the results of calculation of the amount of change of the present invention for the instantaneous input signal f(t) change as shown in FIG. 21 .

若采用在图4的(A)~图4的(D)、图5的计算结果超过了阈值TH时将滤波器的时间常数变小的构成,则滤波器的输出g(t)成为图6所示那样。在本发明中,根据输入信号的二点间的差(f(t)-f(t-T)能够取得的最大值来规定阈值TH,因此不会发生由低于阈值TH的噪声所导致的误动作。If the time constant of the filter is reduced when the calculation result in Fig. 4(A) to Fig. 4(D) and Fig. 5 exceeds the threshold value TH, the output g(t) of the filter becomes as shown. In the present invention, the threshold TH is defined based on the maximum value of the difference (f(t)-f(t-T) between two points of the input signal, so that malfunctions caused by noise below the threshold TH do not occur. .

另外,在本发明中,即使在非常尖锐且大的值的噪声混入了输入信号f(t)中的情况下,也由于在该噪声的峰的时间宽度×2以内的时间宽度下对滤波器的时间常数进行变更的动作,因此能够期待与图19使用计时器的情况相比对滤波器输出的影响变小。在图7的(A)~图7的(C)、图8的(A)、图8的(B)中示出了针对这样的噪声输入的本发明的变化量计算的结果。In addition, in the present invention, even when very sharp and large-value noise is mixed into the input signal f(t), since the time width of the peak of the noise is within ×2, the filter Since the operation of changing the time constant of , it can be expected that the influence on the filter output will be smaller than the case of using the timer in FIG. 19 . 7(A) to 7(C), FIG. 8(A), and FIG. 8(B) show the results of calculation of the amount of change in the present invention for such a noise input.

若采用在图7的(A)~图7的(C)、图8的(A)、图8的(B)的计算结果超过了阈值TH时将滤波器的时间常数变小的构成,则滤波器的输出g(t)成为图9所示那样。If the calculation results of (A) to (C) in Fig. 7, (A) in Fig. 8, and (B) in Fig. 8 exceed the threshold value TH, the time constant of the filter is reduced, The output g(t) of the filter becomes as shown in FIG. 9 .

如以上所述,在本发明中,能够解决在现有技术中产生的、在无意图的区域滤波器的输出g(t)产生纹波这样的问题。As described above, in the present invention, it is possible to solve the conventional problem that ripples are generated in the output g(t) of the filter in an unintended region.

[实施方式][implementation mode]

以下,参照附图对本发明的实施方式进行说明。图10为表示本发明的实施方式所涉及的D/A转换电路的构成的框图。本实施方式的D/A转换电路由如下部分构成:D/A转换部1,其将16bit的数字输入信号f(t)转换为模拟信号;低通滤波器2,其对D/A转换部1的输出信号进行平滑化;缓冲电路3,其被连接于低通滤波器2的输出端子;以及滤波器时间常数变更电路4,其基于输入信号f(t)的变化量来确定低通滤波器2的时间常数。Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 10 is a block diagram showing the configuration of a D/A conversion circuit according to the embodiment of the present invention. The D/A conversion circuit of the present embodiment is made up of following parts: D/A conversion part 1, it converts the digital input signal f(t) of 16bit into analog signal; The output signal of 1 is smoothed; the buffer circuit 3 is connected to the output terminal of the low-pass filter 2; and the filter time constant change circuit 4 is used to determine the low-pass filter based on the change amount of the input signal f(t). The time constant of device 2.

作为D/A转换部1,能够适用ΔΣ调制器、PWM(Pulse Width Modulation,脉冲宽度调制)调制器、T形电阻型的D/A转换器等各种各样的构成,本发明并不限定D/A转换的方式。Various configurations such as a ΔΣ modulator, a PWM (Pulse Width Modulation, pulse width modulation) modulator, and a T-shaped resistance type D/A converter can be applied as the D/A converter 1, and the present invention is not limited thereto. The way of D/A conversion.

低通滤波器2由如下部分构成:电阻R1、R2,其串联地设置于D/A转换部1的输出端子与缓冲电路3的输入端子之间;开关SW1,其根据来自滤波器时间常数变更电路4的控制信号来短路电阻R1;以及电容C1,其被设置于缓冲电路3的输入端子与接地之间。The low-pass filter 2 is composed of the following parts: resistors R1, R2, which are arranged in series between the output terminal of the D/A conversion part 1 and the input terminal of the buffer circuit 3; The control signal of the circuit 4 is used to short-circuit the resistor R1; and the capacitor C1 is arranged between the input terminal of the buffer circuit 3 and the ground.

滤波器时间常数变更电路4由延迟部40、减法部41以及比较部42(比较器)构成。延迟部40与减法部41构成了变化量计算部。The filter time constant changing circuit 4 is composed of a delay unit 40 , a subtraction unit 41 , and a comparison unit 42 (comparator). The delay unit 40 and the subtraction unit 41 constitute a variation calculation unit.

延迟部40使数字输入信号f(t)延迟规定时间T。作为延迟部40,能够使用多级级联的触发器。The delay unit 40 delays the digital input signal f(t) for a predetermined time T. As the delay unit 40 , a multi-stage cascaded flip-flop can be used.

减法部41从数字输入信号f(t)减去延迟部40的数字输出信号。这样,能够计算每一时间T的输入信号的变化量,即能够计算h(t,T)=f(t)-f(t-T)。The subtraction unit 41 subtracts the digital output signal of the delay unit 40 from the digital input signal f(t). In this way, the change amount of the input signal per time T can be calculated, that is, h(t, T)=f(t)-f(t-T) can be calculated.

比较部42将减法部41的数字输出信号与规定的阈值TH进行比较。在减法部41的数字输出信号的值超过了阈值TH时,比较部42将用于控制低通滤波器2的开关SW1的控制信号(滤波器时间常数变更标识)设为“1”(High,高),在减法部41的数字输出信号的值为阈值TH以下时,比较部42将控制信号设为“0”(Low,低)。关于阈值TH,考虑输入信号的两点间的差(f(t)-f(t-T)能够取得的最大值以及想要去除的噪声的大小而预先进行设定即可。The comparison unit 42 compares the digital output signal of the subtraction unit 41 with a predetermined threshold value TH. When the value of the digital output signal of the subtraction part 41 exceeds the threshold value TH, the comparison part 42 sets the control signal (filter time constant change flag) for controlling the switch SW1 of the low-pass filter 2 to "1" (High, High), and when the value of the digital output signal of the subtraction unit 41 is equal to or less than the threshold TH, the comparison unit 42 sets the control signal to “0” (Low). The threshold TH may be set in advance in consideration of the maximum possible value of the difference (f(t)-f(t-T) between two points of the input signal and the magnitude of the noise to be removed.

低通滤波器2为能够改变时间常数的有源滤波器。在从比较部42输出的控制信号为“1”时,开关SW1为导通状态。由此,由于电阻R1被短路,因而低通滤波器2的时间常数变小。在从比较部42输出的控制信号为“0”时,开关SW1为断开状态。由此,由于电阻R1与R2串联地连接,因而低通滤波器2的时间常数变大。The low-pass filter 2 is an active filter whose time constant can be changed. When the control signal output from the comparator 42 is "1", the switch SW1 is turned on. Accordingly, since the resistor R1 is short-circuited, the time constant of the low-pass filter 2 becomes small. When the control signal output from the comparator 42 is "0", the switch SW1 is turned off. Accordingly, since the resistors R1 and R2 are connected in series, the time constant of the low-pass filter 2 becomes large.

如图11所示,成为延迟部40的延迟时间的规定时间T,预先将如下的时间设定为T即可:即,从输入信号f(t)的变化开始时间点起,直到D/A转换电路的输出信号g(t)的值相对于该变化的最终值(100%)达到规定的比例A(例如63.2%或者90%)为止的时间。比例A根据D/A转换电路的所期望的性能来进行设定即可。As shown in FIG. 11 , the predetermined time T serving as the delay time of the delay unit 40 may be set in advance as T such that the time from the change start time of the input signal f(t) to the time when the D/A The time until the value of the output signal g(t) of the conversion circuit reaches a predetermined ratio A (for example, 63.2% or 90%) to the final value (100%) of the change. The ratio A may be set according to the desired performance of the D/A conversion circuit.

在本实施方式中,由低通滤波器2的时间常数决定D/A转换电路的输出信号g(t)追随输入信号f(t)的速度和输出信号g(t)的纹波的水平,该速度与纹波的水平不能同时兼顾。在本实施方式中,低通滤波器2以例如τ1=10msec的时间常数作为基本,但是在另一方面有时也需要1msec的高速响应。但是,若将低通滤波器2的时间常数作为τ2=1msec,则输出信号g(t)的纹波变大。因此,准备有T=1msec、A=63.2%,且能够追随输入信号f(t)的急剧变化的高速响应模式。In this embodiment, the speed at which the output signal g(t) of the D/A conversion circuit follows the input signal f(t) and the ripple level of the output signal g(t) are determined by the time constant of the low-pass filter 2, The speed and the level of ripple cannot be taken into account at the same time. In the present embodiment, the low-pass filter 2 is based on, for example, a time constant of τ1 = 10 msec, but on the other hand, a high-speed response of 1 msec may be required. However, if the time constant of the low-pass filter 2 is τ2 = 1 msec, the ripple of the output signal g(t) becomes large. Therefore, T=1 msec, A=63.2%, and a high-speed response mode capable of following a sudden change of the input signal f(t) are prepared.

根据本实施方式,如图12所示,在输入信号f(t)发生了变化时,成为如下的动作:在变化量h(t,T)超过了阈值TH的t1时间点,低通滤波器2的时间常数从例如τ1=10msec变更为τ2=1msec(开关SW1导通);在输出信号g(t)相对于输入信号f(t)达到比例A=63.2%的t2时间点,低通滤波器2的时间常数从τ2=1msec变更为τ1=10msec(开关SW1断开)。According to the present embodiment, as shown in FIG. 12 , when the input signal f(t) changes, the operation is as follows: at time t1 when the change amount h(t, T) exceeds the threshold value TH, the low-pass filter The time constant of 2 is changed from, for example, τ1=10msec to τ2=1msec (switch SW1 is turned on); at the time point t2 when the output signal g(t) reaches the ratio A=63.2% of the input signal f(t), low-pass filtering The time constant of the device 2 is changed from τ2 = 1 msec to τ1 = 10 msec (the switch SW1 is turned off).

图13为表示本实施方式的D/A转换电路的响应的实测结果的波形图。图13的130表示在将低通滤波器2的时间常数固定为1msec时的D/A转换电路的输出信号g(t),131表示在将低通滤波器2的时间常数固定为10msec时的D/A转换电路的输出信号g(t),132表示本实施方式的D/A转换电路的输出信号g(t)。FIG. 13 is a waveform diagram showing actual measurement results of the response of the D/A conversion circuit of the present embodiment. 130 in FIG. 13 represents the output signal g(t) of the D/A conversion circuit when the time constant of the low-pass filter 2 is fixed at 1 msec, and 131 represents the output signal g(t) when the time constant of the low-pass filter 2 is fixed at 10 msec. The output signal g(t) of the D/A conversion circuit, 132 represents the output signal g(t) of the D/A conversion circuit of this embodiment.

由图13可以看出,若减小低通滤波器2的时间常数则在输出信号g(t)中出现很大的纹波。因此,想要仅在追随输入信号f(t)的变化期间减小低通滤波器2的时间常数,但是即使仅在输入信号f(t)的变化瞬间减小时间常数也是不够的。因此,在本实施方式中,通过计算输入信号f(t)的变化量h(t,T),仅在变化量h(t,T)超出了阈值TH期间减小低通滤波器2的时间常数,实现了充分的时间常数变更的时间。It can be seen from FIG. 13 that if the time constant of the low-pass filter 2 is reduced, large ripples appear in the output signal g(t). Therefore, it is intended to reduce the time constant of the low-pass filter 2 only during following the change of the input signal f(t), but it is not enough to reduce the time constant only at the moment of the change of the input signal f(t). Therefore, in this embodiment, by calculating the variation h(t, T) of the input signal f(t), the time of the low-pass filter 2 is reduced only when the variation h(t, T) exceeds the threshold value TH Constant, realizes the time of sufficient time constant change.

在本实施方式中,由于能够不使用图19所示的计时器而实现输出的纹波降低,因此能够容易地进行向集成电路的D/A转换电路的安装。In the present embodiment, since output ripple can be reduced without using the timer shown in FIG. 19 , mounting to a D/A conversion circuit of an integrated circuit can be easily performed.

另外,在本实施方式中,作为低通滤波器2的例子以一阶滤波器作为例子进行了列举说明,但是并不限定于此,在例如将一阶滤波器多级级联的高阶滤波器等其他滤波器中也能够适用本发明。In addition, in this embodiment, as an example of the low-pass filter 2, a first-order filter is used as an example for description, but it is not limited thereto. The present invention can also be applied to other filters such as filters.

另外,在本实施方式中,以作为D/A转换电路所适用的例子进行了说明,也可以将本发明的滤波器时间常数变更电路4应用为A/D转换电路的输入部。这种情况下,将模拟输入信号f(t)输入至低通滤波器2,将低通滤波器2的输出信号输入至A/D转换电路即可。滤波器时间常数变更电路4由模拟电路构成。作为延迟部40的例子,例如有CCD(Charge-CoupledDevice,电荷耦合元件)。In addition, in this embodiment, an example of application to a D/A conversion circuit was described, but the filter time constant changing circuit 4 of the present invention may be applied to an input unit of an A/D conversion circuit. In this case, it is sufficient to input the analog input signal f(t) to the low-pass filter 2 and input the output signal of the low-pass filter 2 to the A/D conversion circuit. The filter time constant changing circuit 4 is composed of an analog circuit. An example of the delay unit 40 is, for example, a CCD (Charge-Coupled Device, charge-coupled device).

【产业上的利用可能性】【Industrial Utilization Possibility】

本发明能够应用于基于输入信号而变更滤波器的时间常数的技术。The present invention can be applied to a technique of changing the time constant of a filter based on an input signal.

符号说明Symbol Description

1…D/A转换部,2…低通滤波器,3…缓冲电路,4…滤波器时间常数变更电路,40…延迟部,41…减法部,42…比较部,R1,R2…电阻,C1…电容,SW1…开关。1...D/A conversion section, 2...Low-pass filter, 3...Buffer circuit, 4...Filter time constant change circuit, 40...Delay section, 41...Subtraction section, 42...Comparison section, R1, R2...Resistor, C1...capacitor, SW1...switch.

Claims (4)

1. a kind of filter time constant changes circuit, the time that its determination is used for the wave filter being filtered to input signal is normal Number, the filter time constant changes circuit and is characterised by, including:
Variable quantity calculating part, its calculate by current point in time the input signal value f (t) and from current time light T when Between before input signal value f (t-T) and obtain each stipulated time T variable quantity h (t, T)=f (t)-f (t-T);And
Comparing section, its wave filter according to the comparative result of the variable quantity h (t, T) and defined threshold value carrys out output control The control signal of time constant.
2. filter time constant as claimed in claim 1 changes circuit, it is characterised in that
In the case where the variable quantity h (t, T) is below the threshold value, the comparing section output makes the time of the wave filter Constant is the 1st filter time constant τ 1 control signal;
In the case where the variable quantity h (t, T) exceedes the threshold value, the comparing section output makes the time of the wave filter normal Number is changed to the control signal of the 2nd filter time constant τ 2 less than the 1st filter time constant τ 1.
3. filter time constant as claimed in claim 2 changes circuit, it is characterised in that
The stipulated time T is lights from the change time started of the input signal, until normal in the 2nd filter temporal In number τ 2, the value of the output signal of the wave filter relative to the end value of the change reach as defined in time untill ratio.
4. a kind of D/A change-over circuits, it is characterised in that including:
D/A converter sections, digital input signals are converted to analog signal by it;
Wave filter, its output signal to the D/A converter sections is smoothed;And
Filter time constant change circuit any one of claims 1 to 3, it is using the digital input signals to be defeated Enter, and the control signal of filter time constant described in output control.
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113110343A (en) * 2021-04-23 2021-07-13 广东电网有限责任公司电力科学研究院 Control method and system of double-parameter approximate sliding window filter

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06338797A (en) * 1992-10-08 1994-12-06 Nippon Columbia Co Ltd Bit length extension device
CN1197556A (en) * 1996-07-09 1998-10-28 昆腾公司 Pulser-width-modulated digital-to-analog converter with high gain and low gain modes
US5936564A (en) * 1996-07-09 1999-08-10 Samsung Electronics Co., Ltd. Digital to analog converter using pulse width modulation and the controlling method thereof

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB9212263D0 (en) * 1992-06-10 1992-07-22 Shaye Communications Ltd System for data recovery
JP3011577B2 (en) * 1993-07-21 2000-02-21 三洋電機株式会社 A / D converter
US5914633A (en) * 1997-08-08 1999-06-22 Lucent Technologies Inc. Method and apparatus for tuning a continuous time filter
JP2003101413A (en) * 2001-09-25 2003-04-04 Ricoh Co Ltd D/a converter
JP2005244413A (en) * 2004-02-25 2005-09-08 Rohm Co Ltd Automatic time constant adjustment circuit
TWI240485B (en) * 2004-05-14 2005-09-21 Via Tech Inc Global automatic RC time constant tuning circuit and method for on chip RC filters
JP4648779B2 (en) * 2005-07-07 2011-03-09 Okiセミコンダクタ株式会社 Digital / analog converter
TWM386518U (en) * 2010-04-07 2010-08-11 Idesyn Semiconductor Corp Linear regulator
TWI517590B (en) * 2013-06-18 2016-01-11 瑞昱半導體股份有限公司 Method and apparatus for estimating sampling delay error between first and second analog-to-digital converters of time-interleaved analog-to-digital converter

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06338797A (en) * 1992-10-08 1994-12-06 Nippon Columbia Co Ltd Bit length extension device
CN1197556A (en) * 1996-07-09 1998-10-28 昆腾公司 Pulser-width-modulated digital-to-analog converter with high gain and low gain modes
US5936564A (en) * 1996-07-09 1999-08-10 Samsung Electronics Co., Ltd. Digital to analog converter using pulse width modulation and the controlling method thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113110343A (en) * 2021-04-23 2021-07-13 广东电网有限责任公司电力科学研究院 Control method and system of double-parameter approximate sliding window filter

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