CN107092757A - The inspection method of pore pressure cut-off rule is crossed in a kind of PCB design - Google Patents
The inspection method of pore pressure cut-off rule is crossed in a kind of PCB design Download PDFInfo
- Publication number
- CN107092757A CN107092757A CN201710294042.4A CN201710294042A CN107092757A CN 107092757 A CN107092757 A CN 107092757A CN 201710294042 A CN201710294042 A CN 201710294042A CN 107092757 A CN107092757 A CN 107092757A
- Authority
- CN
- China
- Prior art keywords
- pad
- network
- rule
- internal planes
- pressure cut
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000007689 inspection Methods 0.000 title claims abstract description 20
- 238000000034 method Methods 0.000 title claims abstract description 15
- 239000011148 porous material Substances 0.000 title claims abstract description 15
- 102100025444 Gamma-butyrobetaine dioxygenase Human genes 0.000 claims abstract description 11
- 101000934612 Homo sapiens Gamma-butyrobetaine dioxygenase Proteins 0.000 claims abstract description 11
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 9
- 229910052802 copper Inorganic materials 0.000 claims abstract description 9
- 239000010949 copper Substances 0.000 claims abstract description 9
- 238000004064 recycling Methods 0.000 claims abstract description 4
- 230000006870 function Effects 0.000 claims description 9
- 230000011218 segmentation Effects 0.000 abstract description 3
- 238000005516 engineering process Methods 0.000 description 4
- 238000004590 computer program Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/39—Circuit design at the physical level
- G06F30/398—Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM]
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Evolutionary Computation (AREA)
- Geometry (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)
Abstract
The present invention discloses the inspection method that pore pressure cut-off rule is crossed in a kind of PCB design, comprises the following steps：S101, select all via pads；S102, filter out all internal planes；S103, filter out all via pads with network with internal planes；S104, each internal planes of circulation display, screen the hole not in the range of copper sheet according to the BBOX of via and pad, create list；S105, each internal planes of circulation display, recycling and internal planes with network via and pad BBOX network, it is matched with the network of copper bound around via and pad, if identical, the list is added into；S106, the duplicate keys deleted in the list；S107, all erroneous vias of display or pad DBID.The present invention can quickly check quantity and the position of all segmentation plane network vias and pad pressure cut-off rule, and precise and high efficiency greatly reduces the time that Traditional Man inspection is spent.
Description
Technical field
The present invention relates to the inspection method that pore pressure cut-off rule is crossed in PCB fields, more particularly to a kind of PCB design.
Background technology
In PCB design, because the design of designer is improper, often easily there is the situation of pore pressure cut-off rule, seriously
When, the situation for crossing pore pressure cut-off rule easily causes PCB short circuit, influences the use in later stage.At present, for via in PCB design
The inspection of cut-off rule is pressed, is still based on hand inspection, it is necessary to each internal planes are successively checked, is not only wasted time and energy, and
Easily occur missing inspection, flase drop, the accuracy rate for having a strong impact on the efficiency of inspection and checking.
The content of the invention
It is an object of the invention to the inspection method by crossing pore pressure cut-off rule in a kind of PCB design, to solve the above back of the body
The problem of scape technology segment is mentioned.
For up to this purpose, the present invention uses following technical scheme：
The inspection method of pore pressure cut-off rule is crossed in a kind of PCB design, it comprises the following steps：
S101, select all via pads；
S102, filter out all internal planes；
S103, filter out all via pads with network with internal planes；
S104, each internal planes of circulation display, the hole not in the range of copper sheet, wound are screened according to the BBOX of via and pad
Build list (list1)；The BBOX refers to the rectangular graph that the area that element is covered is constituted；
S105, each internal planes of circulation display, recycling and internal planes with network via and pad BBOX network,
It is matched with the network of copper bound around via and pad, if identical, the list is added into；
S106, the duplicate keys deleted in the list；
S107, all erroneous vias of display or pad DBID；Wherein, the DBID refers to the corresponding unique mark of element
Know；
Especially, the step S101 is specifically included：All via pads are selected, are filtered out using foreach functions
All through hole disks for having network；Wherein, the foreach functions are a loop computation functions.
Especially, the step S107 is specifically included：Establishment form panels, all erroneous vias of display or pad
DBID, realizes redirect when clicked, and be highlighted.
The inspection method of pore pressure cut-off rule is crossed in PCB design proposed by the present invention can quickly check all segmentation planes
Network via and pad pressure cut-off rule quantity and position, precise and high efficiency, greatly reduce Traditional Man inspection spent when
Between.
Brief description of the drawings
Fig. 1 is the inspection method flow chart of mistake pore pressure cut-off rule in PCB design provided in an embodiment of the present invention.
Embodiment
The invention will be further described with reference to the accompanying drawings and examples.It is understood that tool described herein
Body embodiment is used only for explaining the present invention, rather than limitation of the invention.It also should be noted that, for the ease of retouching
State, part related to the present invention rather than full content are illustrate only in accompanying drawing, it is unless otherwise defined, used herein all
Technology and scientific terminology are identical with belonging to the implication that the those skilled in the art of the present invention are generally understood that.It is used herein
Term be intended merely to describe specific embodiment, it is not intended that in limitation the present invention.
It refer to shown in Fig. 1, Fig. 1 is the inspection method of mistake pore pressure cut-off rule in PCB design provided in an embodiment of the present invention
Flow chart.
The inspection method for crossing pore pressure cut-off rule in the present embodiment in PCB design specifically includes following steps：
S101, select all via pads.
All via pads are selected, all through hole disks for having network are filtered out using foreach functions；Wherein, institute
It is a loop computation function to state foreach functions.
S102, filter out all internal planes.
S103, filter out all via pads with network with internal planes.
S104, each internal planes of circulation display, the hole not in the range of copper sheet, wound are screened according to the BBOX of via and pad
Build list (list1)；Wherein, the BBOX refers to the rectangular graph that the area that element is covered is constituted.This step is filtered out
With the item of current layer copper sheet network identical via and pad completely not in internal planes shape.
S105, each internal planes of circulation display, recycling and internal planes with network via and pad BBOX network,
It is matched with the network of copper bound around via and pad, if identical, the list is added into.Wherein, it is described
BBOX refers to the rectangular graph that the area that element is covered is constituted.This step has filtered out via or weldering of the part in shape
Disk.
S106, the duplicate keys deleted in the list.
S107, all erroneous vias of display or pad DBID；Wherein, the DBID refers to the corresponding unique mark of element
Know.Specifically, creating form panels, the DBID of all erroneous vias or pad is shown, realizes redirect when clicked, and it is highlighted aobvious
Show.
Technical scheme can quickly check that all segmentation plane network vias and pad press the number of cut-off rule
Amount and position, precise and high efficiency greatly reduce the time that Traditional Man inspection is spent.
One of ordinary skill in the art will appreciate that realize all or part of flow in above-described embodiment method, being can be with
The hardware of correlation is instructed to complete by computer program, described program can be stored in a computer read/write memory medium
In, the program is upon execution, it may include such as the flow of the embodiment of above-mentioned each method.Wherein, described storage medium can be magnetic
Dish, CD, read-only memory (Read-Only Memory, ROM) or random access memory (Random Access
Memory, RAM) etc..
Note, above are only presently preferred embodiments of the present invention and institute's application technology principle.It will be appreciated by those skilled in the art that
The invention is not restricted to specific embodiment described here, can carry out for a person skilled in the art it is various it is obvious change,
Readjust and substitute without departing from protection scope of the present invention.Therefore, although the present invention is carried out by above example
It is described in further detail, but the present invention is not limited only to above example, without departing from the inventive concept, also
Other more equivalent embodiments can be included, and the scope of the present invention is determined by scope of the appended claims.
Claims (3)
1. the inspection method of pore pressure cut-off rule is crossed in a kind of PCB design, it is characterised in that comprise the following steps：
S101, select all via pads；
S102, filter out all internal planes；
S103, filter out all via pads with network with internal planes；
S104, each internal planes of circulation display, screen the hole not in the range of copper sheet according to the BBOX of via and pad, create row
Table；
S105, each internal planes of circulation display, recycling and internal planes with network via and pad BBOX network, by it
Matched with the network of copper bound around via and pad, if identical, be added into the list；
S106, the duplicate keys deleted in the list；
S107, all erroneous vias of display or pad DBID.
2. the inspection method of pore pressure cut-off rule is crossed in PCB design according to claim 1, it is characterised in that the step
S101 is specifically included：All via pads are selected, all through hole disks for having network are filtered out using foreach functions；Its
In, the foreach functions are a loop computation functions.
3. the inspection method of pore pressure cut-off rule is crossed in the PCB design according to any one of claim 1 or 2, it is characterised in that
The step S107 is specifically included：Form panels are created, the DBID of all erroneous vias or pad is shown, realizes jump when clicked
Turn, and be highlighted.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710294042.4A CN107092757B (en) | 2017-04-28 | 2017-04-28 | Method for checking through hole pressure dividing line in PCB design |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710294042.4A CN107092757B (en) | 2017-04-28 | 2017-04-28 | Method for checking through hole pressure dividing line in PCB design |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN107092757A true CN107092757A (en) | 2017-08-25 |
| CN107092757B CN107092757B (en) | 2020-12-22 |
Family
ID=59638198
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710294042.4A Active CN107092757B (en) | 2017-04-28 | 2017-04-28 | Method for checking through hole pressure dividing line in PCB design |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN107092757B (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107885950A (en) * | 2017-11-24 | 2018-04-06 | 郑州云海信息技术有限公司 | A kind of method that overlapping via is deleted in PCB design |
| CN109635400A (en) * | 2018-12-03 | 2019-04-16 | 郑州云海信息技术有限公司 | A kind of method of static copper rotating state copper in PCB design |
| CN116822442A (en) * | 2023-07-18 | 2023-09-29 | 涟水县苏杭科技有限公司 | A quality control system and method for PCB design and production |
| CN117369017A (en) * | 2023-12-06 | 2024-01-09 | 苏州元脑智能科技有限公司 | Integrity detection method and device for copper laying of through holes in PCB and electronic equipment |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20120215515A1 (en) * | 2011-02-22 | 2012-08-23 | Norte Andrew D | Printed circuit board via model design for high frequency performance |
| CN103577615A (en) * | 2012-07-18 | 2014-02-12 | 鸿富锦精密工业（深圳）有限公司 | Automatic checking system and method for high-speed differential signal line via holes |
| CN103681715A (en) * | 2012-09-10 | 2014-03-26 | 奥普蒂兹公司 | Low profile image sensor package and method |
-
2017
- 2017-04-28 CN CN201710294042.4A patent/CN107092757B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20120215515A1 (en) * | 2011-02-22 | 2012-08-23 | Norte Andrew D | Printed circuit board via model design for high frequency performance |
| CN103577615A (en) * | 2012-07-18 | 2014-02-12 | 鸿富锦精密工业（深圳）有限公司 | Automatic checking system and method for high-speed differential signal line via holes |
| CN103681715A (en) * | 2012-09-10 | 2014-03-26 | 奥普蒂兹公司 | Low profile image sensor package and method |
Non-Patent Citations (4)
| Title |
|---|
| HENRIQUE GOMES DA SILVA, ETC: "Automatic optical inspection for detecting defective solders on printed circuit boards", 《CONFERENCE ON IEEE INDUSTRIAL ELECTRONICS SOCIETY》 * |
| 宋昀岑: "PCB自动光学检测系统基础算法研究", 《中国博士论文全文数据库 信息科技辑》 * |
| 肖明耀，等: "《PLC创新制作技能实训》", 30 June 2013 * |
| 魏雄，等: "《OrCAD和PADS Layout电路设计与实践》", 1 March 2011 * |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107885950A (en) * | 2017-11-24 | 2018-04-06 | 郑州云海信息技术有限公司 | A kind of method that overlapping via is deleted in PCB design |
| CN109635400A (en) * | 2018-12-03 | 2019-04-16 | 郑州云海信息技术有限公司 | A kind of method of static copper rotating state copper in PCB design |
| CN116822442A (en) * | 2023-07-18 | 2023-09-29 | 涟水县苏杭科技有限公司 | A quality control system and method for PCB design and production |
| CN117369017A (en) * | 2023-12-06 | 2024-01-09 | 苏州元脑智能科技有限公司 | Integrity detection method and device for copper laying of through holes in PCB and electronic equipment |
| CN117369017B (en) * | 2023-12-06 | 2024-02-23 | 苏州元脑智能科技有限公司 | Integrity detection method and device for copper laying of through holes in PCB and electronic equipment |
Also Published As
| Publication number | Publication date |
|---|---|
| CN107092757B (en) | 2020-12-22 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN107092757A (en) | The inspection method of pore pressure cut-off rule is crossed in a kind of PCB design | |
| JP6754889B2 (en) | Printed circuit board metal mask manufacturing system | |
| US8677292B2 (en) | Cell-context aware integrated circuit design | |
| US6536023B1 (en) | Method and system for hierarchical metal-end, enclosure and exposure checking | |
| US8595662B1 (en) | Methods, systems, and articles of manufacture for implementing a physical design of an electronic circuit with automatic snapping | |
| US9064063B1 (en) | Methods, systems, and articles of manufacture for implementing interactive, real-time checking or verification of complex constraints | |
| JP2012518837A5 (en) | ||
| CN112016921A (en) | Transaction processing method, device and equipment | |
| CN105045980A (en) | Method for configuring component library in PCB | |
| CN103593447B (en) | Data processing method and device applied to database table | |
| CN104573243A (en) | PCB design layout audit device | |
| CN109615171A (en) | Characteristic threshold value determines that method and device, problem objects determine method and device | |
| US10204080B2 (en) | Rich formatting for a data label associated with a data point | |
| US8667409B2 (en) | Systems and methods for handling focus of application user interface elements | |
| FI118064B (en) | Creation of a finite state machine model | |
| CN106095600A (en) | For the method and apparatus promoting persistence application programming interface | |
| JPS6079470A (en) | Automatic generating method of connecting path in space layout plan | |
| CN109800496A (en) | A method of via hole is added along pcb board side | |
| CN114548022A (en) | PCB aided design information processing method, system and storage medium | |
| CN105224719A (en) | A kind of method realizing same page part and sort out fast | |
| CN109543260B (en) | Circuit, method and storage medium for recording chip version number | |
| CN117317271A (en) | Method, system, device and storage medium for assembling multi-layer stacked package structure | |
| US20050150680A1 (en) | Calculation method for packing a plurality of wires and calculation apparatus using the same | |
| US20130024832A1 (en) | DFM Improvement Utility with Unified Interface | |
| US20080010624A1 (en) | Object-oriented layout data model and integrated circuit layout method using the same |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| TA01 | Transfer of patent application right |
Effective date of registration: 20191218 Address after: Wuxi District of Jiangsu city of Wuxi province Qingyuan Road 214135 No. 18 Taihu International Science Park sensor network university science and Technology Park 530 Building No. C207-2 Applicant after: P.C.B.A. ELECTRONIC (WUXI) LTD. Address before: 214028 Jiangsu Province, Wuxi City Qingyuan Road No. 18 Taihu International Science Park sensor network university science and Technology Park 530 Building No. C207-4 Applicant before: WUXI JUN'AN ELECTRONIC TECHNOLOGY CO.,LTD. |
|
| TA01 | Transfer of patent application right | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| CP03 | Change of name, title or address |
Address after: No. 11-3 Hongyi Road, Xinwu District, Wuxi City, Jiangsu Province, 214028 Patentee after: Wuxi Synchronous Electronic Technology Co.,Ltd. Country or region after: China Address before: 214135 No. 18 Qingyuan Road, Wuxi New District, Wuxi City, Jiangsu Province C207-2, 530 Building, Sensor Network University Science Park, Taihu International Science Park Patentee before: P.C.B.A. ELECTRONIC (WUXI) LTD. Country or region before: China |
|
| CP03 | Change of name, title or address |