CN107086859A - Digital Automatic Gain Control Circuit for Wireless Communication Receiver - Google Patents

Abstract

The invention discloses a kind of digital resources obtainment circuit for wireless communication receiver, including digital amplifier, magnitude calculation circuit, averaging filter, power calculation circuit and error processing circuitry；Digital amplifier is integrated with amplifying circuit, peak detection circuit and error-detector circuit；What peak detection circuit and error-detector circuit were designed primarily directed to jump signal present in circuit, energy quick detection jump signal readjusts digital AGC circit, realizes the quick lock in of digital AGC；Power calculation circuit and error processing circuitry are mainly handled signal in log-domain, obtain gain coefficient, for driving the digital amplifier of digital AGC, complete AGC loop.The present invention adjusts power in log-domain, with the features such as setup time is short, control is flexible；And peak detection circuit and error-detector circuit also can be to jump signal quick responses so that digital AGC loop is stable.

Description

Digital Automatic Gain Control Circuit for Wireless Communication Receiver

technical field

The invention relates to a digital automatic gain control technology in a zero-IF receiver, in particular to a digital automatic gain control circuit for a wireless communication receiver.

Background technique

In the wireless communication system, due to the influence of factors such as transmission distance and terrain, there are different degrees of fading of radio waves in the process of space propagation, and the signal strength received by the input terminal of the receiver has a great change, and the change range may be as high as 60-80dB . Faced with a received signal with a large dynamic range, a high-resolution ADC can obtain a large dynamic range, but the performance of the receiver will still be greatly affected when the signal is relatively small. Therefore, automatic gain control (Automatic Gain Control) Gain Control (AGC) system is an important way to improve receiver demodulation performance.

The AGC system consists of three parts: a variable gain amplifier, a detector and a gain control circuit. The detector extracts signal strength information from the output of the variable gain amplifier, and the gain control circuit automatically adjusts the gain of the variable gain amplifier accordingly to ensure The strength of the demodulated signal is at a stable level to improve the demodulation performance of the receiver. The receiver sensitivity of satellite positioning communication receivers is usually below the noise level, and the correlation of the signal is used to achieve demodulation, which requires a large gain in the receiver chain to amplify the signal (including noise) to a significant power level for quantization . In addition, in recent years, due to its high system integration and simple circuit structure, the application of zero-IF receivers has gradually replaced superheterodyne receivers.

The AGC system can be divided into analog AGC, digital AGC and digital-analog mixed AGC. The variable gain amplifier, detector and gain control circuit of the analog AGC system are all implemented in the analog domain. When the input signal changes, the intensity of the output (input) signal is fed back (feedforward) after the signal intensity is detected by the square law device. Gain controls the signal to a variable gain stage that locks the signal strength to within a specified range. The variable gain amplifier of the digital-analog hybrid AGC system adopts the amplifier structure with programmable gain, but the gain control and even the signal strength detection are realized in the digital domain. This feedback technique improves the performance of the amplifier. The all-digital AGC completely avoids the use of analog circuits. It uses high-resolution ADCs to directly quantize high-dynamic-range analog baseband signals, and then achieves signal gain in the digital domain. This not only has high reliability, convenient configuration, easy debugging and The advantages of high accuracy also reduce the link of analog signal processing, thus alleviating the deterioration of the signal-to-noise ratio caused by nonlinear distortion. Digital AGC has more precise gain adjustment step size and stronger AGC control ability, and the output signal fluctuation can be less than 1dB or even smaller. The analog AGC output signal fluctuation is usually 3~6dB to ensure the stability of the system. With the development of high-speed and high-precision ADC design technology and high-speed, low-cost digital signal processing chips, all-digital AGC has shown many advantages and has been widely used.

Contents of the invention

Purpose of the invention: In view of the above problems, the present invention proposes a digital automatic gain control circuit for a wireless communication receiver.

Technical solution: In order to achieve the purpose of the present invention, the technical solution adopted in the present invention is: a digital automatic gain control circuit for a wireless communication receiver, including a digital amplifier, a modulus calculation circuit, an average value filter, a power calculation circuit, threshold comparison circuit and error processing circuit.

The input signal is injected into the modulus calculation circuit after passing through the digital amplifier to obtain the modulus value of the baseband signal; the average value filter segments the modulus signal of the modulus calculation circuit and calculates the average modulus value of each segment; The modulus value passes through the power calculation circuit, and the average modulus value is transformed into the logarithmic domain to obtain the power value of the baseband signal; the power value is sequentially injected into the threshold comparison circuit and the error processing circuit.

The error processing circuit includes a gain coefficient adjustment circuit and an antilogarithmic operation circuit; the gain coefficient adjustment circuit applies a segmented adjustment mechanism according to the threshold comparison result to obtain a gain coefficient in the logarithmic domain; the antilogarithmic operation circuit converts the gain coefficient in the logarithmic domain The coefficients are transformed into the linear domain and used to drive the digital amplifier of the digital AGC to complete the AGC loop.

The digital amplifier includes an amplifying circuit, a peak detection circuit and an error detection circuit; the amplifying circuit multiplies the input signal and the gain coefficient to realize the amplification and reduction of the input signal, so that the output signal is maintained within a constant power range; the peak detection circuit and the error The detection circuit quickly detects the sudden change signal, readjusts the digital AGC circuit, and realizes the fast locking of the digital AGC.

The peak detection circuit controls the gain coefficient by judging whether the result of multiplying the average estimated modulus of the signal by the gain coefficient signal exceeds the maximum value allowed by the signal. Its working method is to take the average estimated modulus value of the signal within a period of time, multiply it by the gain coefficient, and judge whether it exceeds the maximum threshold of the normal signal. If it exceeds the range, a flag will be generated to reset the gain coefficient control circuit in the error processing circuit. bit, so that the gain coefficient quickly returns to the initial value; if it is not exceeded, it means that the signal is normal.

The error detection circuit detects whether the output of the amplifying circuit exceeds its allowable maximum threshold. If it exceeds the maximum threshold, it means that the output signal of the amplifying circuit is inaccurate, and the selector outputs a signal that has not been adjusted by the amplifying circuit; if the input signal does not exceed the maximum threshold, it means that the amplifying circuit The adjusted signal is effective, and the selector outputs the signal adjusted by the amplifying circuit.

Beneficial effects: the present invention uses logarithmic operations to realize power regulation in the logarithmic domain, converts the original multiplication and division operations into addition and subtraction operations, greatly improves the operation speed and locking time of digital AGC, has fast response, and simple control circuit , flexible control and so on. At the same time, the error processing circuit uses a segmented adjustment mechanism to simplify the complexity of gain coefficient control, improve the operational efficiency of the circuit, and reasonably control signal fluctuations.

The invention introduces a peak detection circuit and an error processing circuit to effectively eliminate the influence of a sudden change signal and ensure the normal operation of the receiver. The invention has a wide dynamic range, and when the input signal changes in the wide dynamic range, the average power of the output signal of the AGC output device is approximately kept constant, so that the signal size is maintained in a suitable range to improve the demodulation performance of the receiver.

Description of drawings

Fig. 1 is the location diagram of the receiver where the circuit of the present invention is located;

Fig. 2 is a digital automatic gain control circuit diagram for a wireless communication receiver according to the present invention;

Fig. 3 is a structural diagram of a digital amplifier;

Fig. 4 is a structural diagram of a peak detection circuit;

Fig. 5 is a structural diagram of an error detection circuit;

Fig. 6 is a control flowchart of the present invention;

Fig. 7 is a graph of simulation results of the present invention.

detailed description

The technical solutions of the present invention will be further described below in conjunction with the accompanying drawings and embodiments.

The position of the receiver where the circuit of the present invention is located is as shown in Figure 1, and the received radio frequency signal becomes two-way signals of baseband I and Q after being sampled by the radio frequency front end and ADC of the zero-IF receiver. The I and Q two-way signals of the baseband pass through the digital AGC circuit, so that the power of the output signal is basically constant. Finally, the signal after automatic gain control is sent to the digital receiver for demodulation and other work.

The digital AGC circuit of the present invention, as shown in Figure 2, includes a digital amplifier, a modulus calculation circuit, an average value filter, a power calculation circuit, a gain coefficient adjustment circuit and an antilog conversion circuit in the error processing circuit.

The concrete control method of digital AGC circuit of the present invention is:

In the initial state, the AGC control device generates the initial gain factor factor. After the signal passes through the zero-IF receiver and the sigma-delta A/D converter, two complex signals of I and Q are obtained, expressed as XI+j*XQ. After the digital amplifier shown in Figure 3, the complex signal is multiplied by the gain coefficient to obtain an adjusted complex signal, expressed as YI+j*YQ, and its expression can be written as:

YI+j*YQ＝(XI+j*XQ)*factor

At the same time, the peak detection circuit mainly controls the gain coefficient by judging whether the result of multiplying the average estimated modulus of the signal by the gain coefficient signal exceeds the maximum value allowed by the signal. As shown in Figure 4, its working method is: take the average estimated modulus value of the signal within a period of time, multiply it by the gain coefficient, and judge whether it exceeds the maximum threshold of the normal signal. Once it exceeds the range, a flag will be generated. The gain coefficient control circuit in the error processing circuit is reset, so that the gain coefficient quickly returns to the initial value; if it does not exceed, it means that the signal is normal.

The signal adjusted by the amplifier circuit and the original input signal are injected into the data selector of the error detection circuit shown in Figure 5 at the same time, and the output signal after the signal adjusted by the amplifier circuit flows into the comparison control circuit is used as Control signal for the data selector. The comparison control circuit is mainly used to detect whether the output of the amplifying circuit exceeds its allowable maximum threshold. Once the maximum threshold is exceeded, it indicates that the output signal of the amplifying circuit is not accurate, and the selector outputs a signal that has not been adjusted by the amplifying circuit; if the input If the signal does not exceed the maximum threshold, it indicates that the adjusted signal is valid, and the selector outputs the signal adjusted by the amplifying circuit.

The output signal of the digital amplifier is injected into the modulus calculation circuit to obtain the modulus A of the complex signal at this time, and its expression can be written as:

Through the average value filter, the input modulus value is segmented with N _agc as the unit, and the average value of each segment is obtained to reduce the error and burr caused by noise and improve the stability and reliability of the AGC loop. The expression for the modulus mean of a segment is:

The above average modulus Inject into the power calculation circuit, and obtain its average power in the logarithmic domain through the logarithmic algorithm Its calculation formula is as follows:

The power adjustment is performed in the logarithmic domain, and the original multiplication and division operations are converted into addition and subtraction operations, which greatly improves the operation speed and lock time of the digital AGC. Again Compared with the threshold value (thr) set by AGC, an appropriate AGC coefficient control word in the logarithmic domain is set according to the gain coefficient adjustment circuit, and the adjustment process is shown in FIG. 6 . Then through the antilog circuit, the above control word is transformed from the logarithmic domain to the linear domain and fed back to the digital amplifier as the gain coefficient of the complex signal below, thereby adjusting the input power of the AGC to achieve a stable power value.

In the above gain coefficient control process, the gain step needs to be carefully determined. If the gain step is too large, the loop is likely to be unstable, and if the gain step is too small, the system may take too long to converge. Therefore, in this scheme, different gain steps are used for adjustment according to the gap between the initial value and the target value, so as to ensure that the system converges as quickly as possible under the condition of stability.

First, the power of the input signal is subtracted from the threshold value thr, and the resulting difference is denoted as e, which is expressed as the magnitude of the input signal relative to the reference power. Then, the sign of e is judged. If it is positive, it indicates that the input signal needs to be attenuated; if it is negative, it indicates that the input signal needs to be amplified. In order to achieve accurate control of the digital AGC gain coefficient, a multi-threshold method is introduced here to realize the segmented control of the digital AGC, that is, multiple different thresholds are set at the decision end, and the gain corresponding to each threshold is set according to these different thresholds Adjust the step. Compare the absolute value of the difference e with the threshold, select the appropriate gain control step, and determine whether the digital AGC performs amplification control or attenuation control according to the sign of the difference e, so as to achieve the purpose of signal power regulation. Here, four thresholds (thr1>thr2>thr3>thr4) are set to correspond to the gain adjustment steps of each threshold (coef1>coef2>coef3>coef4).

The basic judgment process is as follows:

If |e|≥thr1, it means that the power of the input signal is quite different from the reference power, then use the first gain step coef1; if thr2≤|e|<thr1, it means that the power of the input signal is relatively different from the reference power is large, then use the second largest gain step coef2; if thr3≤|e|<thr2, it means that the difference between the power of the input signal and the reference power is relatively small, then use the third gain step coefS; if thr4≤|e |<thr3, it means that the difference between the power of the input signal and the reference power is small, and the fourth gain step coef4 is used; if |e|<thr4, it means that the power of the input signal is very different from the reference power, and the gain coefficient is maintained constant. While selecting the gain step, determine whether the digital AGC performs amplification control or attenuation control according to the sign of the difference e. If it is positive, it indicates that the input signal needs to be under attenuation control; if it is negative, it indicates that the input signal needs to be under amplification control. In this way, the power of the signal can be quickly adjusted, and the stability of the circuit can be ensured.

The simulation effect of the present invention is shown in Fig. 7, it can be seen from the figure that the present invention can quickly respond to the change of the input signal, so that the AGC loop is stable. Compared with the traditional AGC circuit, it can detect the signal strength more accurately and control the gain step more accurately. When the input signal changes greatly, the fluctuation of the output signal can still be made small. Adopt digital AGC, set up time is short, control is flexible, circuit structure is simple, cost is low, have extensive application prospect.

Claims (6)

1. a kind of digital resources obtainment circuit for wireless communication receiver, it is characterised in that：Including digital amplifier, Magnitude calculation circuit, averaging filter, power calculation circuit, thresholding comparison circuit and error processing circuitry；

Wherein, input signal obtains the modulus value of baseband signal by being injected into after digital amplifier in magnitude calculation circuit；It is flat Mean filter is segmented to the modulus value signal of magnitude calculation circuit, and asks for each section of average modulus value；Average modulus value is passed through Power calculation circuit, average modulus value is transformed in log-domain, obtains the performance number of baseband signal；Performance number is implanted sequentially door Limit comparison circuit and error processing circuitry；

Error processing circuitry includes gain coefficient adjustment circuit and antilogarithm computing circuit；Gain coefficient adjustment circuit is according to thresholding Result of the comparison, using sectional-regulated mechanism, obtains a gain coefficient in log-domain；Antilogarithm computing circuit is by logarithm Gain coefficient in domain is transformed in linear domain, for driving the digital amplifier of digital AGC, completes AGC loop.

2. the digital resources obtainment circuit according to claim 1 for wireless communication receiver, it is characterised in that： Digital amplifier includes amplifying circuit, peak detection circuit and error-detector circuit；Amplifying circuit is by input signal and gain system Number is multiplied, and realizes the amplification and diminution of input signal, output signal is maintained in a constant power bracket；Peakvalue's checking Circuit and error-detector circuit quick detection jump signal, readjust digital AGC circit, realize the quick lock in of digital AGC.

3. the digital resources obtainment circuit according to claim 2 for wireless communication receiver, it is characterised in that： Peak detection circuit is by judging whether the averaged power spectrum modulus value of signal and the result of gain coefficient signal multiplication permit beyond signal Perhaps maximum, to control gain coefficient；

Its method of work is：The averaged power spectrum modulus value of signal in a period of time is taken, is multiplied, is seen if fall out just with gain coefficient The max-thresholds of regular signal, are gone beyond the scope, then produce a flag bit, and circuit weight is controlled to gain coefficient in error processing circuitry New set, makes gain coefficient be quickly returning to initial value；Without departing from, then it represents that signal is normal.

4. the digital resources obtainment circuit according to claim 2 for wireless communication receiver, it is characterised in that： Whether the output of error-detector circuit detection amplifying circuit exceeds the max-thresholds of its permission, beyond max-thresholds, represents amplification The output signal of circuit is inaccurate, the signal that selector output is adjusted without amplifying circuit；Input signal is without departing from maximum Threshold value, represents that the signal of amplifying circuit regulation is effective, selector exports the signal after amplifying circuit is adjusted.

5. the digital resources obtainment circuit according to claim 1 for wireless communication receiver, it is characterised in that： Power calculation circuit utilizes logarithm operation, and power adjusting is realized in log-domain, by original multiplication and division computing in coefficient control Be converted to signed magnitude arithmetic(al).

6. the digital resources obtainment circuit according to claim 1 for wireless communication receiver, it is characterised in that： Gain coefficient adjustment circuit is sectional-regulated, according to input power and the difference of reference power, sets different gain steppings, control The fluctuation of output signal processed.