CN107071232B - VGA video signal shunting system - Google Patents
VGA video signal shunting system Download PDFInfo
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- CN107071232B CN107071232B CN201710315761.XA CN201710315761A CN107071232B CN 107071232 B CN107071232 B CN 107071232B CN 201710315761 A CN201710315761 A CN 201710315761A CN 107071232 B CN107071232 B CN 107071232B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/14—Picture signal circuitry for video frequency region
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Abstract
The invention provides a VGA video signal shunting system. The VGA video signal shunting system of the invention comprises: the device comprises a control unit, a VGA video input interface, a line-field synchronous processing unit, an RGB homodromous gain shunt output unit, an HS/VS drive shunt output unit and a plurality of VGA video output interfaces; the pure analog VGA video signal shunt system is realized through elements such as a common comparator, a tri-state gate and the like, and the stability and the reliability of a product are high; secondly, level comparison and synchronization belong to symmetrical design, and consistency of multiple groups of signals is improved. The problems that in the prior art, a circuit is complex, a multi-stage conversion chip is required, and the cost is high are solved; the secondary conversion and shunt between the analog signal and the digital signal have the risk of losing effective information of the video; the problem that multiple paths of videos are not synchronous easily exists when video signals pass through a multi-stage chip.
Description
Technical Field
The invention relates to a video processing technology, in particular to a VGA video signal shunting system, and belongs to the technical field of electronics.
Background
With the continuous development of video display technology, it is necessary to apply the video display technology to multiple channels in various situations such as data center control, information distribution, conference room demonstration, etc.
The digital video multi-path display technology determines that the division of the digital video signal is relatively simple due to the characteristics (strong anti-interference capability of the digital signal) of the digital video multi-path display technology, and the imaging quality, the color information degree reduction and the synchronization effect after the division are superior to those of the analog video signal, and the digital video multi-path display technology has signal buffering and amplifying capabilities. The branching of analog video signals such as VGA is complicated, and the general VGA video signal branching technology is prone to have some problems such as distortion, loss of color information, and asynchronism after signal branching, however, VGA video signals are a very important video display technology nowadays, and how to perform high-quality signal branching under the condition of avoiding the above problems becomes an important subject in the multimedia field nowadays.
As shown in fig. 1, a conventional VGA video signal splitting system converts a VGA video signal into a digital signal, splits the converted digital signal into a plurality of digital video signals, and converts the digital video signals back into the VGA video signal.
However, the existing VGA video signal splitting system has the following disadvantages: the circuit is complex, a multi-stage conversion chip is needed, and the cost is high; the secondary conversion and shunt between the analog signal and the digital signal have the risk of losing effective information of the video; the problem that multiple paths of videos are not synchronous easily exists when video signals pass through a multi-stage chip.
Disclosure of Invention
The invention aims to solve the problems that the circuit is complex, a multi-stage conversion chip is used, and the cost is high; the secondary conversion and shunt between the analog signal and the digital signal have the risk of losing effective information of the video; the problem that multiple paths of videos are not synchronous easily exists when the video signals pass through a multi-stage chip; the VGA video signal shunting system is mature in technology and high in product stability and reliability by adopting common elements such as a comparator, a tri-state gate and the like; and the level comparison and the synchronous symmetrical design are adopted, so that the consistency of multiple groups of signals is improved.
In order to achieve the above object, the present invention relates to a VGA video signal splitting system, which comprises: the control unit realizes the control of the VGA video signal shunt system; a VGA video input interface for receiving a VGA video signal from the outside; the line-field synchronous processing unit is used for adjusting the swing amplitude of line-field signals in the input VGA video signals, eliminating slow periodic signal edges, synchronously comparing and outputting, firstly shunting the line-field signals, outputting RGB _ VS and RGB _ HS signals to the HS/VS driving shunting output unit, and outputting VS _ y and HS _ y signals to the control unit; the RGB homodromous gain shunt output unit is used for amplifying and shunting the RGB signals in the input VGA video signals and outputting the RGB signals to the VGA video output interface; the HS/VS drives the shunt output unit, which carries out shunt drive on RGB _ VS and RGB _ HS signals according to the state of the control signal of the control unit and outputs the signals to the VGA video output interface; the VGA video output interface is a plurality of interfaces, which output signals from the RGB syntropy gain shunt output unit and the HS/VS drive shunt output unit to an external device.
Further, according to the above VGA video signal splitting system, wherein the line-field synchronization processing unit includes a dual voltage comparator for comparing HSIN and VSIN with NET _ HV to make the first adjustment of signal amplitude and synchronization.
Further, according to the above-mentioned VGA video signal splitting system, wherein the line-field synchronization processing unit includes a schmitt inverter for changing a periodic signal whose edge changes slowly into a rectangular pulse signal whose edge changes steeply.
Further, according to the above VGA video signal shunt system, wherein the line-field synchronization processing unit includes a rail-to-rail operational amplifier, and the output voltage or signal swing of the rail-to-rail operational amplifier is substantially consistent with the power supply voltage.
Further, according to the above-mentioned VGA video signal branching system, the RGB homotropic gain branching output unit can realize homotropic gain, and branch the R, G, B three-color signal.
Further, according to the above-mentioned VGA video signal branching system, wherein the RGB homodyne gain branching output unit includes a single-power operational amplifier which can output at full amplitude and has a disable function.
Further, according to the above-mentioned VGA video signal branching system, wherein the amplification factor of the single power supply operational amplifier is 2 times.
Further, according to the above VGA video signal splitting system, wherein the HS/VS drive splitting output unit includes a tri-state 8-bit buffer.
Further, according to the above-mentioned VGA video signal shunting system, wherein the tri-state 8-bit buffer temporarily stores the address code on the bus according to the state of the control signal of the control unit.
Further, according to the above-mentioned VGA video signal shunting system, wherein the G terminal of the tri-state 8-bit buffer is grounded, and the level of the output terminal varies with the level of the input terminal, so as to achieve synchronization.
Further, according to the above VGA video signal splitting system, wherein the VGA video splitting system can be packaged as an IC integrated circuit.
By adopting the VGA video signal shunt system and adopting common elements such as the comparator, the tristate gate and the like, the technology is mature, and the stability and the reliability of the product are high; secondly, level comparison and synchronization are symmetrical in design, and consistency of multiple groups of signals can be improved. In addition, the VGA video signal shunting system adopts a pure analog signal shunting technology, so that the signal quality is ensured, no distortion and no loss are caused, and the video signal after shunting and an interface are relatively independent and can read the EDID information of the display.
Drawings
FIG. 1 is a schematic diagram of a VGA video signal splitting system in the prior art;
FIG. 2 is a schematic diagram of a VGA video signal splitting system according to the present invention;
FIG. 3 is a circuit diagram of a line-field synchronization processing unit;
FIG. 4 is a circuit diagram of an RGB homodromous gain shunt output unit;
FIG. 5 is a circuit diagram of the HS/VS drive shunt output unit.
Detailed Description
The invention is further illustrated by the following examples:
example 1
The VGA video signal shunting system related in the invention comprises: the device comprises a control unit, a VGA video input interface, a line-field synchronous processing unit, an RGB homodromous gain shunt output unit, an HS/VS drive shunt output unit and a VGA video output interface. As shown in fig. 2, the VGA video input interface is used for receiving VGA video signals from the outside; the line-field synchronous processing unit is used for adjusting the swing amplitude of line-field signals in the input VGA video signals, eliminating slow periodic signal edges, synchronously comparing and outputting, carrying out first shunting on the line-field signals, then outputting RGB _ VS and RGB _ HS signals (HS2/VS2) to the HS/VS driving shunting output unit, and outputting VS _ y and HS _ y signals (HS1/VS1) to the control unit; the RGB homodromous gain shunt output unit is used for carrying out operational amplification and shunt on RGB signals in VGA video signals obtained from the VGA video input interface, and the shunted RGB signals are respectively output to a VGA output 1 and a VGA output 2; the HS/VS driving shunt output unit drives the HS2/VS2 according to the state of a control signal of the control unit MCU: RGB _ VS and RGB _ HS signals are driven in a shunt way and output to VGA output 1 and VGA output 2; the state of the control signal of the control unit MCU is determined by HS1/VS1 from the line-field sync processing unit: VS _ y, HS _ y signal; the VGA output 1 and the VGA output 2 form a VGA video output interface of the whole system, and the VGA video output interfaces can also be set to more than two, for example 3 or more, as required.
The operation principle of the present invention is briefly described above with reference to the schematic diagram of the VGA video signal splitting system according to the present invention, and the technical effects of the present invention can be summarized through the description of the above embodiments: by adopting the VGA video signal shunt system and adopting common elements such as the comparator, the tristate gate and the like, the technology is mature, and the stability and the reliability of the product are high; secondly, level comparison and synchronization are symmetrical in design, and consistency of multiple groups of signals can be improved. In addition, the VGA video signal shunting system adopts a pure analog signal shunting technology, so that the signal quality is ensured, no distortion and no loss are caused, and the video signal after shunting and an interface are relatively independent and can read the EDID information of the display.
Hereinafter, embodiments of the present invention will be described in more detail with reference to circuit diagrams of respective portions.
Fig. 3 is a circuit diagram of a line-field synchronization processing unit of a VGA video signal splitting system according to the present invention, and as shown in fig. 3, the circuit portion of the line-field synchronization processing unit mainly includes: dual voltage comparator LM393DR, schmitt inverter 74LVC1G14, and rail-to-rail operational amplifier LMV 7219.
The dual-voltage comparator LM393DR is used for comparing HSIN and VSIN with NET _ HV and performing first adjustment on signal amplitude and synchronization; the schmitt inverter 74LVC1G14 is used to change a periodic signal with slow edge change to a rectangular pulse signal with steep edges; the rail-to-rail operational amplifier LMV7219 is characterized by a very low voltage occupation on its terminals, which increases the dynamic range of the system, so that its output voltage or signal swing is substantially identical to the supply voltage VCC.
Through the processing of the line-field synchronous processing unit shown in fig. 3, the branched RGB _ VS and RGB _ HS signals are respectively output to the next-stage processing circuit (HS/VS drive branch output circuit); and the VS _ y and HS _ y signals are output to the control unit MCU.
Fig. 4 is a circuit diagram of the RGB equidirectional gain shunt output unit of the VGA video signal shunt system according to the present invention, and as shown in fig. 4, the RGB equidirectional gain shunt output unit is mainly composed of a single-power operational amplifier MAX 4382. The single power supply operational amplifier MAX4382 can output full swing and has an inhibiting function. The circuit has a homodromous gain, and the output end of the circuit is equal to 2 times of the input end.
Through the RGB equidirectional gain branching output unit shown in fig. 4, after the R, G, B three-color signals from the VGA video input interface are subjected to equidirectional gain, the R, G, B three-color signals are subjected to branching processing, and the R, G, B three-color signals subjected to branching processing are respectively output to the VGA video output interface.
Fig. 5 is a circuit diagram of the HS/VS driving shunt output unit of the VGA video signal shunt system according to the present invention, and as shown in fig. 5, the HS/VS driving shunt output unit mainly includes a tri-state 8-bit buffer 74LS 244. The tri-state 8-bit buffer 74LS244 drives the bus branches RGB _ HS and RGB _ VS, and the chip has no latch function and temporarily stores the address code on the bus according to the state of the control signal. And the G end is grounded and is at a low level, and the level of the output end Y of the tri-state gate changes along with the level of the A end of the input end, so that synchronization is realized.
The HS/VS driving shunt output unit shown in fig. 5 is used to perform shunt processing on the line field signals from the line field synchronization processing unit, and the line field signals after shunt processing are respectively output to the VGA video output interface.
The VGA video signal splitting systems referred to in the above embodiments may be packaged as IC integrated circuits, so that their applicability as commodities can be improved and they can be easily assembled into devices. Meanwhile, the storage and the transportation are convenient.
Through the above description of the embodiments, the invention aims at the problems of complex circuit, use of multi-stage conversion chip and high cost in the prior art; the secondary conversion and shunt between the analog signal and the digital signal have the risk of losing effective information of the video; video signals pass through a multi-stage chip, so that a series of problems of asynchronous multi-path videos and the like easily exist; the VGA video signal shunting system is mature in technology and high in product stability and reliability by adopting common elements such as a comparator, a tri-state gate and the like; and the level comparison and the synchronous symmetrical design are adopted, so that the consistency of multiple groups of signals is improved.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the invention has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.
Claims (8)
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CN108182040B (en) * | 2017-12-07 | 2020-11-24 | 山东超越数控电子股份有限公司 | System for realizing local and remote display based on one-way VGA |
CN109714500A (en) * | 2019-01-17 | 2019-05-03 | 中孚信息股份有限公司 | A kind of VGA video unidirectional transmission method and device |
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CN1773599A (en) * | 2004-11-08 | 2006-05-17 | 三星电子株式会社 | Display device and driving device thereof |
CN101043113A (en) * | 2006-03-22 | 2007-09-26 | 明基电通股份有限公司 | Image signal connection circuit powered by computer side |
CN202103778U (en) * | 2011-06-23 | 2012-01-04 | 中国华录集团有限公司 | A video graphic array interface circuit |
KR20140037162A (en) * | 2014-01-28 | 2014-03-26 | 주식회사 디오에프연구소 | Multi-period sinusoidal video signal, camera trigger signal generator and structured light 3d scanner with the signal generator |
CN205726072U (en) * | 2016-05-04 | 2016-11-23 | 深圳市东健宇电子有限公司 | A kind of high definition VGA signal distributor of high performance-price ratio |
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Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
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JPH08191453A (en) * | 1995-01-06 | 1996-07-23 | Mitsubishi Electric Corp | Image input interface device |
CN2338795Y (en) * | 1998-01-11 | 1999-09-15 | 张显达 | Arrangement for switching video data and audio data |
CN1773599A (en) * | 2004-11-08 | 2006-05-17 | 三星电子株式会社 | Display device and driving device thereof |
CN101043113A (en) * | 2006-03-22 | 2007-09-26 | 明基电通股份有限公司 | Image signal connection circuit powered by computer side |
CN202103778U (en) * | 2011-06-23 | 2012-01-04 | 中国华录集团有限公司 | A video graphic array interface circuit |
KR20140037162A (en) * | 2014-01-28 | 2014-03-26 | 주식회사 디오에프연구소 | Multi-period sinusoidal video signal, camera trigger signal generator and structured light 3d scanner with the signal generator |
CN205726072U (en) * | 2016-05-04 | 2016-11-23 | 深圳市东健宇电子有限公司 | A kind of high definition VGA signal distributor of high performance-price ratio |
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