CN107068659B - Fan-out chip integrated antenna packaging structure and method - Google Patents
Fan-out chip integrated antenna packaging structure and method Download PDFInfo
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- CN107068659B CN107068659B CN201710258021.7A CN201710258021A CN107068659B CN 107068659 B CN107068659 B CN 107068659B CN 201710258021 A CN201710258021 A CN 201710258021A CN 107068659 B CN107068659 B CN 107068659B
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- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
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- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
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- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/33—Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
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- H01L2223/64—Impedance arrangements
- H01L2223/66—High-frequency adaptations
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- H01L2223/6677—High-frequency adaptations for passive devices for antenna, e.g. antenna included within housing of semiconductor device
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- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
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- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
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- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
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- H01L2224/24151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/24153—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate
- H01L2224/24195—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate the item being a discrete passive component
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- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
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- H01L2224/96—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
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Abstract
The embodiment of the invention provides a fan-out type chip integrated antenna packaging structure and a method, wherein the structure comprises the following steps: the antenna comprises at least one functional chip and at least one antenna structure, wherein the at least one functional chip and the at least one antenna structure are packaged into an integral structure, a first surface of the functional chip and a first surface of the antenna structure are arranged on a first side of the integral structure, a first bonding pad is arranged on the first surface of the functional chip, a second bonding pad is arranged on the first surface of the antenna structure, the antenna structure comprises a substrate, a reflecting metal layer positioned on the first surface of the substrate, and an antenna plane positioned on the second surface of the substrate opposite to the first surface of the substrate; and a rewiring layer formed on a first side of the unitary structure. The embodiment of the invention provides a fan-out chip integrated antenna packaging structure and a fan-out chip integrated antenna packaging method, which solve the problem of antenna integration in fan-out packaging and avoid the defect that the height of a solder ball between a printed circuit board and the packaging structure influences the performance of an antenna.
Description
Technical Field
The invention relates to the technical field of semiconductor manufacturing, in particular to a fan-out type chip integrated antenna packaging structure and a fan-out type chip integrated antenna packaging method.
Background
With the increasing commercial application of high-frequency systems such as 4G/5G communication systems, internet of things, millimeter wave wireless communication, etc., especially short-distance high-data wireless transmission systems, passive imaging systems, automotive radar systems, etc., the requirements for high performance, miniaturization, high integration level and low cost are increasing.
Therefore, in order to reduce parasitic parameter effects of the system interconnect, more and more passive systems are integrated within the package. The Antenna is a typical passive device in a communication system, and research on Antenna-in-package (AiP) is continuously carried out in the 2000s industry, and integration of substrates such as LTCC (low temperature co-fired ceramic), LCP (liquid crystal display) and an active chip is mainly adopted. With the application of fan-out packages in high frequency fields such as automotive radar, passive devices typified by antennas are also beginning to be integrated in fan-out packages.
AiP research characteristics based on fan-out type package in the prior art mainly include: passive devices, represented by antenna structures, are also beginning to be integrated in fan-out packages, all using the surface metal layer of the printed circuit board as the reflection plane for the signals, and therefore the height of the solder balls between the printed circuit board and the package structure affects the antenna performance.
Disclosure of Invention
In view of this, the embodiments of the present invention provide a fan-out chip integrated antenna package structure and method, which solve the problem of antenna integration in fan-out package, and avoid the problem that the solder ball height between the printed circuit board and the package structure affects the antenna performance.
In a first aspect, an embodiment of the present invention provides a fan-out chip integrated antenna package structure, including:
the antenna comprises at least one functional chip and at least one antenna structure, wherein a high dielectric constant medium is arranged between the two surfaces of the antenna structure, the at least one functional chip and the at least one antenna structure are packaged into an integrated structure, the first surface of the functional chip and the first surface of the antenna structure are arranged on the first side of the integrated structure, the first surface of the functional chip is provided with a first bonding pad, the first surface of the antenna structure is provided with a second bonding pad, the antenna structure comprises a substrate, a reflecting metal layer positioned on the first surface of the substrate, and an antenna plane positioned on the second surface of the substrate opposite to the first surface of the substrate, and the antenna plane is electrically connected with the second bonding pad through a metal conductive via penetrating through the substrate; a rewiring layer formed on a first side of the integrated structure, the rewiring layer being electrically connected to both the first pad and the second pad;
and a passivation layer formed over the rerouting layer, the passivation layer covering the rerouting layer and exposing at least one pair of external connection points.
Optionally, the substrate is any one of a semiconductor substrate such as a silicon substrate, a gallium nitride substrate, a gallium arsenide substrate, etc., and may also be any one of an insulating substrate such as a ceramic substrate, a resin substrate, a glass substrate, etc.
Optionally, a first protection layer is formed outside the second surface of the antenna structure, and the first protection layer exposes the integrated structure.
Optionally, a second surface of the functional chip opposite to the first surface of the functional chip exposes the integral structure, and a second protective layer is arranged outside a second side of the integral structure opposite to the first side of the integral structure.
Optionally, the first protective layer is any one of epoxy, polyimide, benzocyclobutene, and polybenzoxa .
Optionally, the second protective layer is any one of epoxy resin, polyimide, benzocyclobutene and polybenzoxa ;
optionally, solder balls are formed on the external connection points.
Optionally, the thickness of the first protective layer ranges from 5um to 50um.
Optionally, the thickness range of the second protective layer is greater than or equal to 10um and less than or equal to 100um.
In a second aspect, an embodiment of the present invention provides a method for manufacturing a fan-out chip integrated antenna package structure, including:
providing at least one functional chip and at least one antenna structure, wherein a high dielectric constant medium is arranged between two surfaces of the antenna structure, the at least one functional chip and the at least one antenna structure are packaged into an integral structure, the first surface of the functional chip and the first surface of the antenna structure are arranged on the first side of the integral structure, the first surface of the functional chip is provided with a first bonding pad, the first surface of the antenna structure is provided with a second bonding pad, and the antenna structure comprises a substrate, a reflective metal layer positioned on the first surface of the substrate, and an antenna plane positioned on the second surface of the substrate opposite to the first surface of the substrate;
forming a rewiring layer on a first side of the integrated structure, wherein the rewiring layer is electrically connected with the first bonding pad and the second bonding pad;
a passivation layer is formed over the rerouting layer, the passivation layer covering the rerouting layer and exposing at least one pair of external connection points.
The embodiment of the invention provides a fan-out chip integrated antenna packaging structure and a fan-out chip integrated antenna packaging method, wherein a rewiring layer is used for electrically connecting a bonding pad of a functional chip with an antenna of an antenna structure, so that transmission of an electric signal of the functional chip to the antenna structure is realized. The transmission path of the electric signal of the functional chip is a first bonding pad, a rewiring layer, a second bonding pad and an antenna plane of the antenna structure. Compared with the prior art, the reflective metal layer is made outside the external connection point and is illustratively a surface metal layer of a printed circuit board connected with the solder balls, the transmission path length of the electric signal is long, the transmission path side length is because the electric signal can pass through the external connection point and also can pass through an air medium between the external connection point and the reflective metal layer, and other structures are illustratively solder balls, and the height of the solder balls can influence the performance of the antenna structure. Therefore, the fan-out type chip integrated antenna packaging structure provided by the embodiment of the invention has the advantages that the reflective metal layer is arranged on the first surface of the antenna structure, the path for electric signal transmission is shortened, the defect that the height of the solder balls between the printed circuit board and the packaging structure influences the performance of the antenna is avoided, and the influence factors of the damaged performance of the antenna structure are reduced.
Drawings
The above and other features and advantages of the present invention will become more apparent to those of ordinary skill in the art by describing in detail exemplary embodiments of the present invention or the prior art with reference to the attached drawings.
Fig. 1 is a schematic structural diagram of a fan-out chip integrated antenna package structure according to a first embodiment of the present invention;
fig. 2 is a schematic structural diagram of a fan-out chip integrated antenna package structure according to a first embodiment of the present invention;
fig. 3 is a schematic structural diagram of a fan-out chip integrated antenna package structure according to a first embodiment of the present invention;
fig. 4 is a schematic structural diagram of a fan-out chip integrated antenna package structure according to a first embodiment of the present invention;
fig. 5 is a flowchart of a method for manufacturing a fan-out chip integrated antenna package structure according to a second embodiment of the present invention;
fig. 6 is a flowchart of a method for manufacturing a fan-out chip integrated antenna package structure according to a second embodiment of the present invention;
fig. 7 is a schematic structural diagram of a fan-out chip integrated antenna package structure according to a second embodiment of the present invention;
fig. 8 is a schematic structural diagram of a fan-out chip integrated antenna package structure according to a second embodiment of the present invention;
fig. 9 is a flowchart of a method for manufacturing a fan-out chip-on-chip integrated antenna package structure according to a second embodiment of the present invention.
Detailed Description
The invention is described in further detail below with reference to the drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting thereof. It should be further noted that, for convenience of description, only some, but not all of the structures related to the present invention are shown in the drawings.
Example 1
The embodiment of the invention provides a fan-out type chip integrated antenna packaging structure, which comprises the following components: it should be noted that, the at least one functional chip 10 and the at least one antenna structure 20 are encapsulated into a unitary structure 30 by the molding layer 34, and the first surface 11 of the functional chip 10 and the first surface 21 of the antenna structure 20 are disposed on the first side of the unitary structure 30, the first surface 11 of the functional chip 10 is provided with the first bonding pad 12, the first surface 21 of the antenna structure 20 is provided with the second bonding pad 22, the antenna structure 20 includes the substrate 26, the reflective metal layer 23 disposed on the first surface 21 of the substrate 26, and the antenna plane 25 disposed on the second surface 24 opposite to the first surface 21 of the substrate 26; the antenna plane 25 is electrically connected to the second pad 22 through a conductive via 27 penetrating the substrate 26; a rewiring layer 32 formed on a first side of the integrated structure 30, the rewiring layer 32 being electrically connected to both the first pad 12 and the second pad 22; a passivation layer 33 formed over the re-wiring layer 32, the passivation layer covering the re-wiring layer 32 and exposing at least one external connection point 32C. The redistribution layer 32 includes a first redistribution layer 32A, a second redistribution layer 32B, and a redistribution layer conductive via 32D for connecting the first redistribution layer 32A and the second redistribution layer 32B, and for connecting the first redistribution layer and the first pad 12, and the second pad 22, and the redistribution layer 32 further includes an external connection point 32C.
The practitioner involved in selecting the functional chip 10 selects an appropriate chip type according to the function of the chip. The rewiring layer 32 and the second bond pads 22 and the conductive vias 27 electrically connect the bond pads 12 of the functional chip 10 and the antenna plane 25 of the antenna structure 20, enabling the transmission of electrical signals of the functional chip 10 to the antenna structure 20. The transmission paths of the electrical signals of the functional chip 10 are the first pads 12, the rewiring layer 32, the second pads 22, the conductive vias 27 and the antenna plane 25 of the antenna structure 20. Compared with the prior art, the reflective metal layer 23 is made outside the external connection point 32C, which is illustratively a surface metal layer of a printed circuit board connected with solder balls, the transmission path length of the electric signal is long, the transmission path side length is because the electric signal can pass through the external connection point 32C, and also can pass through an air medium between the external connection point 32C and the reflective metal layer 23, and other structures are illustratively solder balls, and the height of the solder balls can affect the performance of the antenna structure. Therefore, the fan-out type chip integrated antenna packaging structure provided by the embodiment of the invention has the advantages that the reflective metal layer is arranged on the first surface of the antenna structure and is electrically connected with the antenna penetrating through the antenna structure chip, so that the path of electric signal transmission is shortened, the defect that the height of the solder balls between the printed circuit board and the packaging structure can influence the performance of the antenna is avoided, and the influence factor of the performance damage of the antenna structure chip is reduced. It should be noted that the surface of the antenna plane 25 remote from the substrate 26 may be coated with a protective layer for protecting the metallic tracks of the antenna plane 25 itself, and that the antenna plane 25 may also be coated with a protective layer for achieving an electrical insulation between the antenna plane 25 and the substrate 26, as is exemplary with the substrate 26, but is not shown in fig. 1.
Optionally, based on the above technical solution, the substrate 26 of the antenna structure 20 may be any one of a semiconductor substrate such as a silicon substrate, a gallium nitride substrate, a gallium arsenide substrate, or any one of an insulating substrate such as a ceramic substrate, a resin substrate, and a glass substrate. Illustratively, a silicon substrate is disposed between the reflective metal layer 23 and the antenna plane 25. I.e. the substrate 26 material of the antenna structure 20 is a silicon substrate material. A silicon substrate is used as the antenna medium. It should be noted that the type of the antenna plane 25 of the silicon substrate may be a dipole antenna, a loop antenna, a patch antenna, a diamond antenna, etc. according to the pattern of the antenna plane 25, and one antenna unit or antenna array may be implemented according to different applications. The antenna planes 25 of these different patterns each extend through the substrate 26 material of the antenna structure 20 via conductive vias 27. The silicon substrate has a relatively high dielectric constant (11.8) which is advantageous for miniaturization of the antenna or antenna array. Taking the patch antenna as an example, the physical size of the patch antenna is reduced by about 75% compared to a conventional high frequency board (e.g., rogers 5880 relative permittivity 2.2) as the antenna medium, i.e., the base material of the antenna structure 20. In addition, the antenna structure 20 is a silicon substrate chip, and the silicon substrate material is used as a substrate, which belongs to a relatively mature semiconductor process and is beneficial to process processing. The medium for transmission of the electrical signal is the substrate 26 material of the antenna structure 20. The dielectric constant of the base material may be changed by setting the kind of the base material. The dielectric constant of the substrate material is increased, the fan-out chip integrated antenna packaging structure can be used for low-frequency devices, the dielectric constant of the substrate material is reduced, and the fan-out chip integrated antenna packaging structure can be used for low-frequency devices. The antenna structure 20 is a silicon substrate chip, and a silicon substrate is arranged between the reflective metal layer 23 and the antenna plane 25, and has a relatively high dielectric constant, so that the packaging structure is suitable for low-frequency devices.
Alternatively, referring to fig. 2, a first protective layer 28 is formed outside the second surface 24 of the antenna structure 20, the first protective layer 28 exposing the integral structure 30. Alternatively, the material of the first protective layer 28 may be any one of epoxy, polyimide, benzocyclobutene, and polybenzoxa . Optionally, the thickness of the first protective layer 28 ranges from 5um or more to 50um or less. The proper thickness can not only protect the second surface of the antenna structure 20 from moisture entering the antenna structure 20, but also prevent the first protective layer 28 from being too thick, and weaken the radiation range of the electrical signal. It should be noted that the material of the first protective layer 28 may be selected from materials that have less loss to the electrical signal. The first protective layer 28 is formed outside the second surface 24 of the antenna structure 20 in the embodiment of the present invention, on the one hand, because the surface of the antenna plane 25 shows a thin protective layer for protecting the metal circuit of the antenna plane 25 itself, and the protective layer may be continuously coated outside the second surface 24 of the antenna structure 20; on the other hand, instead of using the plastic layer 34 to replace the first protective layer 28, the first protective layer 28 is formed outside the second surface 24 of the antenna structure 20, where the material with smaller electrical signal loss should be selected in consideration of the electrical signal transmission through the antenna structure 20, and the first protective layer 28 has smaller electrical signal loss than the common plastic layer.
Alternatively, referring to fig. 3, the second surface 13 of the functional chip 10 opposite to the first surface 11 thereof exposes the integrated structure 30, and a second protective layer 35 is disposed outside a second side of the integrated structure 30 opposite to the first side thereof. It should be noted that, in the horizontal direction of the vertical and integrated structure 30, when the height of the functional chip 10 is higher than the height of the antenna structure 20 plus the thickness of the first protective layer 28, the second protective layer 35 is disposed on the second surface 13 of the functional chip 10, and outside the second side of the integrated structure 30 opposite to the first side thereof, so that the second surface 13 of the functional chip 10 is prevented from being directly exposed to air, and from being damaged by moisture and dust in the air. It should be noted that, in the horizontal direction of the vertical and integrated structure 30, the first protective layer 28 shown in fig. 3 is thicker than the first protective layer 28 shown in fig. 2, so that the height of the functional chip 10 and the height of the antenna structure 20 after the first protective layer 28 is disposed are equal, so that the flat second protective layer 35 is formed. It should be noted that, the first protection layer 28 may not be disposed outside the second surface 24 of the antenna structure 20, and the antenna structure 20 may be protected by the protection layer on the planar surface of the antenna. In this way, when the height of the functional chip 10 is higher than the height of the antenna structure 20 in the horizontal direction of the vertical and integrated structure 30, the second protection layer 35 is disposed outside the second surface 13 of the functional chip 10 on the second side of the integrated structure 30 opposite to the first side thereof, so that the second surface 13 of the functional chip 10 is prevented from being directly exposed to the air and from being damaged by moisture and dust in the air.
Alternatively, the material of the second protective layer 35 may be any one of epoxy, polyimide, benzocyclobutene, and polybenzoxa . Optionally, the thickness of the second protective layer 35 is in a range of 10um or more and 100um or less. The proper thickness can not only play a role in preventing moisture from entering the inside of the functional chip 10 on the second surface of the functional chip 10, but also play a role in avoiding the too thick thickness of the second protection layer 35 and weakening the radiation range of the electrical signal.
Alternatively, in the technology of the above technical solution, referring to fig. 4, solder balls 40 are formed on the external connection points 32C; the package structure further includes a printed circuit board 41, and the solder balls 40 are electrically connected to the printed circuit board 41. Compared with the prior art, the reflective metal layer 23 is arranged outside the external connection point 32C, so that the path of electric signal transmission between the solder balls 40 and the printed circuit board 41 is shortened, and the height of the solder balls 40 does not affect the performance of the antenna structure 20.
Example two
Based on the same inventive concept, the embodiment of the present invention provides a method for manufacturing a fan-out chip integrated antenna package structure, taking the fan-out chip integrated antenna package structure shown in fig. 1 as an example, and the manufacturing method refers to fig. 5, and includes the following steps:
step 110, providing at least one functional chip and at least one antenna structure, and packaging the at least one functional chip and the at least one antenna structure into an integrated structure, wherein a first surface of the functional chip and a first surface of the antenna structure are arranged on a first side of the integrated structure, a first bonding pad is arranged on the first surface of the functional chip, a second bonding pad is arranged on the first surface of the antenna structure, and the antenna structure comprises a reflective metal layer positioned on the first surface and an antenna plane positioned on a second surface opposite to the first surface.
Referring to fig. 1, at least one functional chip 10 and at least one antenna structure 20 are provided, and the at least one functional chip 10 and the at least one antenna structure 20 are packaged as a unitary structure 30, and a first surface 11 of the functional chip 10 and a first surface 21 of the antenna structure 20 are disposed at a first side of the unitary structure 30, the first surface 11 of the functional chip 10 is provided with a first bonding pad 12, the first surface 21 of the antenna structure 20 is provided with a second bonding pad 22, and the antenna structure 20 includes a substrate and a reflective metal layer 23 disposed on the first surface 21 of the substrate, and an antenna plane 25 disposed on a second surface 24 of the substrate opposite the first surface 21.
And 120, forming a rewiring layer on the first side of the integrated structure, wherein the rewiring layer is electrically connected with the first bonding pad and the second bonding pad.
Referring to fig. 1, it should be noted that the redistribution layer 32 includes a first redistribution layer 32A, a second redistribution layer 32B, an external connection point 32C, and a redistribution layer conductive via 32D for connecting the first redistribution layer 32A and the second redistribution layer 32B, and the redistribution layer 32 further includes the external connection point 32C. Forming a rewiring layer 32 on a first side of the unitary structure 30, the rewiring layer 32 being electrically connected to both the first pad 12 and the second pad 22;
and 130, forming a passivation layer above the rewiring layer, wherein the passivation layer covers the rewiring layer and exposes at least one external connection point.
Referring to fig. 1, a passivation layer 33 is formed over the re-wiring layer 32, the passivation layer 33 covering the re-wiring layer 32 and exposing at least one external connection point 32C.
According to the fan-out type chip integrated antenna packaging method provided by the embodiment of the invention, the reflective metal layer 23 is arranged on the first surface 21 of the antenna structure 20, so that the path for electric signal transmission is shortened, the problem that the height of the solder ball between the printed circuit board and the packaging structure influences the performance of the antenna because the reflective metal layer 23 is arranged outside the external connection point 32C and is an exemplary surface metal layer of the printed circuit board connected with the solder ball in the prior art is avoided, and the influence factor of the chip performance damage of the antenna structure is reduced.
It should be noted that, by taking fig. 7 as an example, the embodiment of the present invention provides a method for manufacturing the antenna structure 20. The manufacturing process of the antenna structure 20 specifically includes the following steps, see fig. 6:
the substrate material may be a semiconductor material, and may include any of a silicon substrate, a gallium nitride substrate, a gallium arsenide substrate, and the like. When the base material is a semiconductor material, the base may also be referred to as a substrate. It should be noted that the surface of the antenna plane 25 remote from the substrate 26 may be coated with a protective layer for protecting the metallic wiring of the antenna plane 25 itself, and that the antenna plane 25 may also be coated with a protective layer for electrically insulating the antenna plane 25 from the substrate 26, for example, when it is attached to the substrate 26. Step 210, preparing a substrate material, etching and filling into blind holes (i.e. conductive vias in the antenna structure) on the second surface of the substrate, and forming patterned metal (i.e. antenna plane in the antenna structure) on the second surface of the substrate.
Referring to fig. 7, preparing a base material 26, etching and filling a plurality of blind holes 27 (blind holes 27 are conductive vias 27 in fig. 1) on a second surface 24 of the base material 26, coating a protective layer on a surface of the base material 26, and then forming a patterned metal, namely an antenna plane 25 in fig. 1, on the second surface 24 of the base material 26, coating a protective layer on a surface filling layer of the blind holes 27 of the base material 26 for electrically insulating the substrate 26 from the antenna plane, and forming a protective layer on a surface of the antenna plane 25 in a direction away from the substrate 26 for protecting a line of the antenna plane 25, wherein the protective layer between the antenna plane 25 and the substrate 26 and the protective layer on the surface of the antenna plane 25 in a direction away from the substrate 26 are not shown in fig. 7;
step 220, the first surface of the substrate is thinned until the conductive via penetrating the antenna structure is exposed.
Referring to fig. 7, the first surface 21 of the substrate is thinned until the conductive material of the blind via 27 through the antenna structure 20 is exposed, the blind via 27 being prepared as a conductive via 27.
At step 230, a patterned metal (i.e., a reflective metal layer and a second bond pad in the antenna structure) is formed on the thinned first surface of the substrate.
Referring to fig. 1, patterned metal (i.e., reflective metal layer 23 and second bond pad 22 in antenna structure 20) is formed on first surface 21 of thinned substrate 26. Illustratively, substrate material 26 is also required to be cut into individual antenna structures 20 by a cutting process.
Taking fig. 8 as an example, a method for manufacturing an integrated structure 30 is provided in the embodiment of the present invention, and the steps are as follows with reference to fig. 9:
step 310, preparing a carrier plate.
Referring to fig. 8, a carrier plate 50 is prepared.
Step 320, coating temporary bonding glue on the surface of the carrier plate.
Referring to fig. 8, a temporary bonding adhesive 51 is coated on the surface of the carrier plate 50.
And 330, attaching the first surface of the functional chip and the first surface of the antenna structure to the surface of the temporary bonding adhesive.
Referring to fig. 8, the first surface 11 of the functional chip 10 and the first surface 21 of the antenna structure 20 are attached to the surface of the temporary bonding adhesive 51.
And 340, preparing a plastic sealing layer on the surfaces of the functional chip and the antenna structure.
Referring to fig. 8, a plastic layer 34 is prepared on the surfaces of the functional chip 10 and the antenna structure 20.
Step 350, thinning the plastic sealing layer until the first protective layer of the antenna structure is exposed; and removing the carrier plate and the temporary bonding adhesive to complete the manufacture of the integrated structure.
Referring to fig. 8, the plastic layer 34 is thinned until the first protective layer 28 of the antenna structure 20 is exposed; the carrier plate 50 and the temporary bonding glue 51 are removed.
Referring to fig. 4, a redistribution layer 32 is formed on a first side of the integrated structure 30 of the functional chip 10 and the antenna structure 20; the rewiring layer 32 electrically connects the first bonding pad 12 of the functional chip 10 and the second bonding pad 22 of the antenna structure 20; preparing a passivation layer 33 on the surface of the re-wiring layer 32; the passivation layer 33 exposes the external connection point 32C; solder balls 40 are prepared, and the integrated structure 30 is electrically connected to the printed circuit board 41 through the solder balls 40.
Alternatively, taking fig. 3 as an example, the second surface 13 of the functional chip 10 opposite to the first surface 11 thereof exposes a unitary structure, and a second protective layer 35 is disposed outside a second side of the unitary structure opposite to the first side thereof.
Optionally, the first protective layer is any one of epoxy, polyimide, benzocyclobutene, and polybenzoxa . Optionally, the second protective layer is any one of epoxy resin, polyimide, benzocyclobutene and polybenzoxa .
Optionally, the thickness of the first protective layer ranges from 5um to 50um.
Optionally, the thickness range of the second protective layer is greater than or equal to 10um and less than or equal to 100um.
Note that the above is only a preferred embodiment of the present invention and the technical principle applied. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, while the invention has been described in connection with the above embodiments, the invention is not limited to the embodiments, but may be embodied in many other equivalent forms without departing from the spirit or scope of the invention, which is set forth in the following claims.
Claims (9)
1. A fan-out chip integrated antenna package structure, comprising:
the antenna comprises at least one functional chip and at least one antenna structure, wherein the at least one functional chip and the at least one antenna structure are packaged into an integral structure, a first surface of the functional chip and a first surface of the antenna structure are arranged on a first side of the integral structure, a first bonding pad is arranged on the first surface of the functional chip, a second bonding pad is arranged on the first surface of the antenna structure, the antenna structure comprises a substrate, a reflecting metal layer positioned on the first surface of the substrate, and an antenna plane positioned on the second surface of the substrate opposite to the first surface of the substrate, and the antenna plane is electrically connected with the second bonding pad through a conductive via penetrating through the substrate;
a rewiring layer formed on a first side of the integrated structure, the rewiring layer being electrically connected to both the first pad and the second pad;
a passivation layer formed over the rerouting layer, the passivation layer covering the rerouting layer and exposing at least one pair of external connection points;
a first protection layer is formed on the outer side of the second surface of the antenna structure, and the first protection layer exposes the integrated structure;
a second surface of the functional chip opposite to the first surface of the functional chip exposes the integrated structure, and a second protective layer is arranged outside a second side of the integrated structure opposite to the first side of the integrated structure.
2. The package structure of claim 1, wherein the substrate is a semiconductor substrate or an insulating substrate.
3. The package structure according to claim 1, wherein the substrate is any one of a silicon substrate, a gallium nitride substrate, and a gallium arsenide substrate, or any one of a ceramic substrate, a resin substrate, and a glass substrate.
4. The package structure of claim 1, wherein the first protective layer is any one of epoxy, polyimide, benzocyclobutene, and polybenzoxa .
5. The package structure of claim 1, wherein,
the second protective layer is any one of epoxy resin, polyimide, benzocyclobutene and polybenzoxa .
6. The package structure of claim 1, wherein solder balls are formed on the external connection points.
7. The package structure of claim 1, wherein,
the thickness range of the first protective layer is more than or equal to 5um and less than or equal to 50um.
8. The package structure of claim 1, wherein,
the thickness range of the second protective layer is more than or equal to 10um and less than or equal to 100um.
9. A method of fabricating a fan-out chip integrated antenna package structure, comprising:
providing at least one functional chip and at least one antenna structure, and packaging the at least one functional chip and the at least one antenna structure into a whole structure, wherein a first surface of the functional chip and a first surface of the antenna structure are arranged on a first side of the whole structure, a first bonding pad is arranged on the first surface of the functional chip, a second bonding pad is arranged on the first surface of the antenna structure, and the antenna structure comprises a substrate, a reflective metal layer positioned on the first surface of the substrate, and an antenna plane positioned on a second surface of the substrate opposite to the first surface of the substrate;
forming a rewiring layer on a first side of the integrated structure, wherein the rewiring layer is electrically connected with the first bonding pad and the second bonding pad;
forming a passivation layer over the rerouting layer, the passivation layer covering the rerouting layer and exposing at least one pair of external connection points;
a first protection layer is formed on the outer side of the second surface of the antenna structure, and the first protection layer exposes the integrated structure;
a second surface of the functional chip opposite to the first surface of the functional chip exposes the integrated structure, and a second protective layer is arranged outside a second side of the integrated structure opposite to the first side of the integrated structure.
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| CN107706520A (en) * | 2017-10-25 | 2018-02-16 | 中芯长电半导体（江阴）有限公司 | Fan-out-type antenna packages structure and preparation method thereof |
| CN107742778A (en) * | 2017-10-25 | 2018-02-27 | 中芯长电半导体（江阴）有限公司 | Fan-out-type antenna packages structure and preparation method thereof |
| KR102019354B1 (en) * | 2017-11-03 | 2019-09-09 | 삼성전자주식회사 | Antenna module |
| CN107910312A (en) * | 2017-12-07 | 2018-04-13 | 中芯长电半导体（江阴）有限公司 | Fan-out-type semiconductor package with antenna module and preparation method thereof |
| CN108336494B (en) * | 2018-03-16 | 2022-03-01 | 盛合晶微半导体(江阴)有限公司 | Antenna packaging structure and packaging method |
| US20200036081A1 (en) * | 2018-07-30 | 2020-01-30 | Innolux Corporation | Package structure and antenna device using the same |
| CN109244642B (en) * | 2018-08-07 | 2020-11-13 | 清华大学 | Manufacturing method of packaged antenna |
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| CN109599388B (en) * | 2018-10-26 | 2024-07-02 | 集美大学 | Packaging structure for packaging antenna |
| US10651541B1 (en) * | 2019-02-27 | 2020-05-12 | Nxp Usa, Inc. | Package integrated waveguide |
| TWI739150B (en) * | 2019-08-30 | 2021-09-11 | 南茂科技股份有限公司 | Package structure of micro memory and package structure of memory |
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| CN111403356B (en) * | 2020-04-02 | 2024-08-02 | 杭州晶通科技有限公司 | Preparation technology of fan-out type packaging structure of modularized antenna |
| CN111403354A (en) * | 2020-04-02 | 2020-07-10 | 杭州晶通科技有限公司 | Flip-chip process of packaging structure of complete plastic package antenna |
| CN112038779B (en) * | 2020-09-08 | 2023-05-16 | 日月光半导体制造股份有限公司 | Antenna semiconductor package device and method of manufacturing the same |
| CN113013605B (en) | 2021-01-29 | 2021-12-10 | 中国电子科技集团公司第三十八研究所 | Multi-feed packaged antenna based on fan-out packaging |
| CN113097197A (en) * | 2021-05-14 | 2021-07-09 | 湖南越摩先进半导体有限公司 | Semiconductor packaging structure and preparation method |
| CN114093853A (en) * | 2021-12-15 | 2022-02-25 | 矽典微电子(上海)有限公司 | Fan-out package, packaging method, communication module and terminal |
| CN114639669B (en) * | 2022-03-02 | 2025-04-08 | 江苏长电科技股份有限公司 | Embedded antenna chip packaging structure and preparation method |
| CN115020964B (en) * | 2022-06-14 | 2024-04-23 | 中国电子科技集团公司第十四研究所 | Laminated antenna based on BCB transmission structure |
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