CN107037371A - The detection circuit of the internal resistance of cell - Google Patents

Abstract

The present application provides a detection circuit for battery internal resistance, the circuit includes a control circuit, a constant current circuit and a processing circuit, the control circuit is connected to the constant current circuit, the constant current circuit is connected to the battery to form a loop, the The processing circuit is connected to both ends of the battery; the control circuit is used to generate a first pulse signal, and the first pulse signal is used to control the constant current circuit so that the current in the loop is constant; the processing circuit detects the voltage at both ends of the battery and the current of the loop, and calculate the internal resistance of the battery according to the voltage and the current. In the embodiment of the present application, since the constant current resistor can output a constant circuit under the control of the pulse signal output by the control circuit, the processing circuit can accurately detect the current in the loop composed of the constant current circuit and the battery and the voltage at both ends of the battery , and then accurately calculate the internal resistance of the battery.

Description

Detection circuit of battery internal resistance

technical field

The present application relates to the field of power electronics, and more specifically, to a detection circuit for battery internal resistance in the field of power electronics.

Background technique

In modern power systems, batteries play an important role. The stability of the storage battery is closely related to the reliability of the entire power supply system. The internal resistance of the battery is considered to be a decisive parameter for judging the capacity state of the battery, and it is also an important indicator to measure the performance of the battery. Therefore, the battery can be evaluated by measuring the internal resistance of the battery.

In the prior art, when measuring the internal resistance of a small-capacity battery, a pulse discharge method is usually used. Figure 1 shows the basic circuit diagram of the pulse discharge method. The central processing unit (CPU) sends a high and low pulse signal (expressed as MOS_CON) to control the metal oxide semiconductor (Metal Oxide Semiconductor, MOS) tube on and off. Due to the existence of the internal resistance of the battery, there will be a The pulse of high and low pulses, by collecting the voltage ΔU and current ΔI values at both ends of the battery, through to calculate the battery internal resistance R _internal . However, since the voltage at both ends of the battery is a pulse voltage, the current in the loop composed of the battery, diode D1, MOS transistor Q1, resistors R1 and R2 is not stable, and it cannot be guaranteed that the collected voltage ΔU and current ΔI are at the same moment in the loop. The voltage and current values of the measurement cannot be guaranteed.

Contents of the invention

The present application provides a battery internal resistance detection circuit, which can accurately detect the internal resistance of the battery.

In one aspect, a battery internal resistance detection circuit is provided, wherein the circuit includes a control circuit, a constant current circuit and a processing circuit, the control circuit is connected to the constant current circuit, and the constant current circuit is connected to the constant current circuit. The battery is connected to form a loop, and the processing circuit is connected to both ends of the battery; the control circuit is used to generate a first pulse signal, and the first pulse signal is used to control the constant current circuit so that the current in the loop constant; the processing circuit detects the voltage across the battery and the current of the loop, and calculates the internal resistance of the battery according to the voltage and the current.

In the embodiment of the present application, since the constant current resistor can output a constant circuit under the control of the pulse signal output by the control circuit, the processing circuit can accurately detect the current in the loop composed of the constant current circuit and the battery and the voltage at both ends of the battery , and then accurately calculate the internal resistance of the battery. Here, the internal resistance of the battery is the ratio of the voltage to the current.

Optionally, the control circuit is further configured to generate second pulse information, and the second pulse signal is used to control the constant current circuit to keep the current in the loop constant or to disconnect the loop.

In this way, when the circuit is disconnected, there is no current in the circuit, and the detection circuit will not detect the internal resistance of the battery at this time, which can avoid battery damage caused by applying voltage to the battery for a long time.

Optionally, the constant current circuit includes a metal oxide semiconductor MOS transistor, a negative feedback circuit and a source resistor, the drain of the MOS transistor is connected to the positive pole of the battery, and the negative pole of the battery is grounded; the MOS transistor The gate of the tube is connected to the output terminal of the negative feedback circuit, and works in the variable resistance region under the control of the signal output by the output terminal of the negative feedback circuit; the source of the MOS tube is connected to the negative feedback circuit The negative input terminal of the circuit is connected to the ground through the source resistor; the positive input terminal of the negative feedback circuit is connected to the control circuit and receives the first pulse signal. Optionally, the MOS transistor is a field effect transistor

When the source _of the MOS transistor Q1 is directly connected to the negative input terminal of the negative feedback circuit, and current flows through the source resistor _RS , the input voltage at the negative input terminal is the voltage at both ends of the source resistor. When the voltages at the positive and negative input terminals of the negative feedback circuit are equal, the output voltage of the negative feedback circuit is constant. Further, the voltage V _GS between the gate and the source in the MOS tube is constant, the voltage V _DS between the drain and the source in the MOS tube, and the resistance R _DS are constant, therefore, the drain current I _s is also a constant current current.

In the embodiment of the present application, the change of the battery to be detected will lead to the change of the current in the circuit. When the circuit changes, the constant current circuit can dynamically adjust the current in the loop, so that the current in the loop composed of the constant current circuit and the battery tends to be constant. After the circuit in the loop is constant, the processing circuit can detect the voltage and current on both sides of the battery, and then calculate the internal resistance of the battery based on the voltage and current values on both sides of the battery.

Optionally, the constant current circuit further includes a differential operational amplifier circuit, the output terminal of the differential operational amplifier circuit is connected to the negative input terminal of the negative feedback circuit, and the positive input terminal of the differential operational amplifier circuit is connected to the negative input terminal of the negative feedback circuit. The source of the MOS transistor is connected, and the negative input terminal of the differential operational amplifier circuit is grounded.

The differential operational amplifier circuit can amplify the input voltage signal, so that the signal input to the negative feedback circuit can meet the requirements.

Optionally, the circuit further includes a transistor, the input terminal of the transistor inputs a second pulse signal, and the transistor is connected between the negative input terminal of the negative feedback circuit and the power supply, wherein the second pulse signal The MOS transistor is controlled to be in an on state or in an off state by controlling the input signal of the negative input terminal.

As an example, the transistor is a PNP transistor.

When the second pulse signal is at low level, the PNP transistor is turned on, which is equivalent to connecting the power supply V _DD connected to the transistor to the negative input terminal of the negative feedback circuit. The voltage provided by the power supply V _DD to the negative input terminal is higher than the voltage input by the positive input terminal, so that when the voltage output by the negative feedback circuit continues to decrease, and the gate voltage of the MOS transistor Q1 is lower _than the turn _- on voltage of the MOS transistor Q1, the MOS Tube _Q1 will be off. In this way, no current will flow in the loop formed by the constant current circuit and the battery.

And when MOS_CON is high level, the PNP transistor _Q2 is not conducting, and the output terminal of the differential operational amplifier circuit is connected to the input terminal of the negative feedback circuit. At this time, the current in the loop composed of the constant current circuit and the battery is constant, and The internal resistance of the battery is obtained by calculating the processing circuit.

Optionally, the constant current circuit further includes a resistor connected between the drain of the MOS transistor and the anode of the power supply. As an embodiment, the resistor is a power resistor, and the power resistor may specifically be a cement resistor.

Here, the resistor is connected to the circuit in the form of voltage division, which can divide the voltage for the MOS transistor Q1. _In this way, when the battery to be detected is a large-capacity battery, it can ensure that most of the power is dissipated on the resistor, and at the same time it can Ensure that the MOS tube Q ₁ works in the variable resistance area to realize the constant current of the loop composed of the constant current circuit and the battery.

Optionally, in the embodiment of the present application, the battery is a single battery or a battery pack in which multiple batteries are connected in series.

Description of drawings

FIG. 1 is a schematic diagram of a circuit for detecting battery internal resistance in the prior art.

FIG. 2 is a schematic block diagram of a battery internal resistance detection circuit according to an embodiment of the present application.

FIG. 3 is a schematic diagram of a specific circuit for detecting battery internal resistance according to an embodiment of the present application.

detailed description

The technical solution in this application will be described below with reference to the accompanying drawings.

FIG. 2 shows a schematic block diagram of a battery internal resistance detection circuit according to an embodiment of the present application, and the circuit includes a control circuit 11 , a constant current circuit 12 and a processing circuit 13 .

The output end of the control circuit 11 is connected to the input end of the constant current circuit 12, the control circuit 11 is used to generate a first pulse signal, and the first pulse signal is used to control the constant current circuit 12 so that the The current in the loop formed by the constant current circuit 12 and the battery is constant; the processing circuit 13 is connected to both ends of the battery for detecting the voltage at both ends of the battery and the current of the constant current circuit, and according to The voltage and the current calculate the internal resistance of the battery.

In the embodiment of the present application, since the loop composed of the constant current circuit 12 and the battery can have a constant current under the control of the first pulse signal output by the control circuit, the current of the loop is the circuit flowing through the battery. In this way, the processing circuit can accurately detect the current in the loop and the voltage at both ends of the battery, and then calculate the internal resistance of the battery. Here, the internal resistance of the battery is the ratio of the voltage to the current.

In the embodiment of the present application, the control circuit is also used to generate a second pulse signal, and the second pulse signal is used to control the constant current circuit 12 so that the current in the loop composed of the constant current circuit 12 and the battery is constant, or to make the constant current The loop formed by the circuit 12 and the battery is disconnected.

It can be understood that when the circuit is disconnected, there is no current in the circuit, and the detection circuit will not detect the internal resistance of the battery at this time, which can avoid battery damage caused by applying voltage to the battery for a long time.

FIG. 3 shows a schematic diagram of a specific battery internal resistance detection circuit according to an embodiment of the present application. It should be understood that FIG. 3 shows a schematic circuit diagram of a detection circuit for detecting battery internal resistance, but the circuit diagram in FIG. 3 is only an example, and the embodiment of the present application may also include other electronic components or be a deformation of the circuit in FIG. 3 , And it is possible that not all of the devices in Figure 3 are required. In addition, the same reference numerals in FIG. 3 and FIG. 2 represent the same or similar meanings, and for the sake of brevity, details are not repeated here.

As shown in FIG. 3 , as an example, the control circuit 11 may be a CPU. The constant current circuit 12 may include a metal oxide semiconductor MOS transistor Q ₁ , a negative feedback circuit 121 and a source resistor R _S , the drain of the MOS transistor Q ₁ is connected to the positive pole of the battery, and the negative pole of the battery is grounded; the MOS transistor Q 1 _The gate of Q1 is connected to the output terminal of the negative feedback circuit 121, and works in the variable resistance region under the control of the signal output by the output terminal of the negative feedback circuit _; the source terminal of the MOS transistor Q1 is connected to the output terminal of the negative feedback circuit The negative input terminal of the negative feedback circuit 121 is connected to the ground through the source resistor _RS ; the positive input terminal of the negative feedback circuit 121 is connected to the control circuit 11 and used to receive the first pulse signal . In the embodiment of the present application, the MOS transistor Q1 may be _a field effect transistor.

Here, the high and low pulse signals can be sent by the CPU. The pulse signal includes the first pulse signal, and the first pulse signal may be represented as a SET_VREF signal. It can be understood that the magnitude of the equivalent voltage output by the SET_VREF signal is the product of the high level voltage of the signal and the duty ratio, and the duty ratio of the SET_VREF signal can be 50% or 60%. For example, when the high level of the SET_VREF signal is 4V and the duty cycle is 50%, its equivalent voltage is 4×50%=2V. When the positive input terminal of the negative feedback circuit is connected to the output port of the SET_VREF signal, the output The equivalent voltage to the positive input of the negative feedback circuit is 2V.

In the embodiment of the present application, the source _of the MOS transistor Q1 is connected to the negative input terminal of the negative feedback circuit 121, and is grounded through the source resistor _RS , that is, when the source _of the MOS transistor Q1 is connected to the negative feedback circuit 121 The negative input terminal of the negative input terminal is directly connected, and when the current flows through the source resistance R _S , the input voltage of the negative input terminal is the voltage at both ends of the source resistance. When the voltages of the positive input terminal and the negative input terminal of the negative feedback circuit 121 are equal, the output voltage of the negative feedback circuit is constant. It can be understood that because the output terminal of the negative feedback circuit 121 is connected to the gate _of the MOS transistor Q1, when the output voltage of the negative feedback circuit 121 is constant, the voltage V _GS between the gate and the source in the MOS transistor is constant, further Ground, the voltage V _DS between the drain and the source in the MOS tube, and the resistance R _DS are constant, so the drain current I _s is also a constant current. That is, in the embodiment of the present application, the current in the loop formed by the constant current circuit and the battery is constant.

In the embodiment of the present application, the change of the battery to be detected will lead to the change of the current in the loop. When the current changes, the constant current circuit 12 can dynamically adjust the current in the loop. For example, when I _s increases, the voltage drop on the drain resistor R _S will increase, and the voltage input to the negative input terminal of the negative feedback circuit will increase, resulting in a decrease in the output voltage of the negative feedback circuit 121, that is, the voltage input to the negative input terminal of the negative feedback circuit 121 will decrease, that is, The voltage at the gate _of the MOS transistor Q1 will decrease, and at this time, the voltage V _GS between the gate and the source _of the MOS transistor Q1 will decrease. Since the MOS tube works in the variable resistance region, when the V _GS decreases, the R _DS will increase and the drain current I _s will decrease. Similarly, when the I _s decreases, the negative feedback circuit and the dynamic adjustment of the MOS tube can also finally reduce the R _DS and increase the drain current I _s to realize the dynamic adjustment of the current in the loop.

Therefore, in the embodiment of the present application, the MOS tube works in the variable resistance region, and can dynamically adjust the resistance of the R _DS of the MOS tube according to the change of the current in the loop, so that the current in the loop composed of the constant current circuit and the battery tends to be constant. After the circuit in the loop is constant, the processing circuit can detect the voltage and current on both sides of the battery, and then calculate the internal resistance of the battery based on the voltage and current values on both sides of the battery.

Optionally, the constant current circuit 12 may also include a differential operational amplifier circuit 122, the output terminal of the differential operational amplifier circuit 122 is connected to the negative input terminal of the negative feedback circuit 121, and the differential operational amplifier circuit 122 The positive input terminal is connected to the source _of the MOS transistor Q1, and the negative input terminal of the differential operational amplifier circuit 122 is grounded.

The differential operational amplifier circuit 122 can amplify the input voltage signal, so that the signal input to the negative feedback circuit 121 meets the requirements. Specifically, in the embodiment of the present application, the differential operational amplifier circuit can amplify the voltage at both ends of the drain resistor R _S . For example, when the drain current Is is 2A and the drain resistance R _S is 100mΩ, the voltage input to the differential operational amplifier circuit 122 is 2A×100mΩ=0.2V. If the amplification factor of the differential operational amplifier circuit 122 is 10 times, the voltage output to the negative input terminal of the negative feedback circuit 121 is 0.2V×10=2V.

Optionally, in the embodiment of the present application, the circuit further includes a transistor Q ₂ , the input terminal of the transistor Q ₂ inputs the second pulse signal, and the transistor Q ₂ is connected to the negative input terminal of the negative feedback circuit 121 and the power supply V _DD , wherein the second pulse signal controls the MOS transistor Q1 to be _on or off by controlling the input signal at the negative input terminal. Here, the voltage provided by V _DD is higher than the voltage input by the positive input terminal of the negative feedback circuit 121 . The second pulse signal can control the switching state of the MOS transistor, and the second pulse signal can be denoted as MOS_CON.

Optionally, the above-mentioned transistor _Q2 may be a PNP triode.

When MOS_CON is at low level, the PNP transistor is turned on, which is equivalent to connecting the power supply V _DD connected to the transistor to the negative input terminal of the negative feedback circuit 121 . The voltage provided by the power supply V _DD to the negative input terminal is higher than the voltage input by the positive input terminal, for example, the power supply voltage V _DD may be higher than the equivalent voltage of the SET_VREF signal. In this way, the output voltage of the negative feedback circuit 121 will decrease, that is, the voltage applied to the gate _of the MOS transistor Q1 will decrease. Since the power supply V _DD continuously inputs voltage to the input terminal of the negative feedback circuit (for example, V _DD is continuously input to the negative input terminal for several milliseconds), the output voltage of the negative feedback circuit 121 will continue to decrease. When the gate voltage of the MOS transistor Q1 is lower _than the turn _- on voltage of the MOS transistor Q1, the MOS transistor Q1 will be in _an off state. In this way, no current will flow in the loop formed by the constant current circuit 12 and the battery.

And when MOS_CON is high level, this PNP triode Q ₂ is not conducted, and the output terminal of differential operational amplifier circuit 122 is connected with the input terminal of negative feedback circuit 121 at this moment, promptly can output the output signal of differential operational amplifier circuit 121 directly To the negative input terminal of the negative feedback circuit 121, the current in the loop formed by the constant current circuit 12 and the battery is constant at this time, and the internal resistance of the battery can be obtained by calculating the processing circuit.

In the embodiment of the present application, the constant current circuit 12 may further include a resistor 123 . The resistor 123 may include multiple resistors, and may be connected in series between the positive electrode of the battery and the drain _of the MOS transistor Q1. As an example, the resistor 123 may be a power resistor, specifically a cement resistor. Here, the resistor 123 is connected to the circuit in the form of voltage division, and the resistor 123 can divide the voltage for the MOS transistor Q1, so that when the detected battery is _a large-capacity battery, it can ensure that most of the power is dissipated on the resistor 123 , and at the same time, it can also ensure that the MOS transistor Q1 works in the variable resistance area, so as to realize the constant current _of the circuit composed of the constant current circuit 12 and the battery.

Those skilled in the art can appreciate that the units and algorithm steps of the examples described in conjunction with the embodiments disclosed herein can be implemented by electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are executed by hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art may use different methods to implement the described functions for each specific application, but such implementation should not be regarded as exceeding the scope of the present application.

Those skilled in the art can clearly understand that for the convenience and brevity of the description, the specific working process of the above-described system, device and unit can refer to the corresponding process in the foregoing method embodiment, which will not be repeated here.

In the several embodiments provided in this application, it should be understood that the disclosed systems, devices and methods may be implemented in other ways. For example, the device embodiments described above are only illustrative. For example, the division of the units is only a logical function division. In actual implementation, there may be other division methods. For example, multiple units or components can be combined or May be integrated into another system, or some features may be ignored, or not implemented. In another point, the mutual connection or direct connection or communication connection shown or discussed may be through some interfaces, and the indirect connection or communication connection of devices or units may be in electrical, mechanical or other forms.

The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place, or may be distributed to multiple network units. Part or all of the units can be selected according to actual needs to achieve the purpose of the solution of this embodiment.

In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, each unit may exist separately physically, or two or more units may be integrated into one unit.

If the functions described above are realized in the form of software function units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application is essentially or the part that contributes to the prior art or the part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including Several instructions are used to make a computer device (which may be a personal computer, a server, or a network device, etc.) execute all or part of the steps of the methods described in the various embodiments of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (Read-Only Memory, ROM), random access memory (Random Access Memory, RAM), magnetic disk or optical disk and other various media that can store program codes. .

The above is only a specific implementation of the application, but the scope of protection of the application is not limited thereto. Anyone familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the application. Should be covered within the protection scope of this application. Therefore, the protection scope of the present application should be determined by the protection scope of the claims.

Claims (10)

1. A detection circuit for battery internal resistance, characterized in that the circuit comprises a control circuit, a constant current circuit and a processing circuit, the control circuit is connected to the constant current circuit, and the constant current circuit is connected to the battery to form a loop, the processing circuit is connected to both ends of the battery; The control circuit is used to generate a first pulse signal, and the first pulse signal is used to control the constant current circuit so that the current in the loop is constant; The processing circuit detects the voltage across the battery and the current of the loop, and calculates the internal resistance of the battery according to the voltage and the current. 2. The circuit of claim 1, wherein The control circuit is also used to generate a second pulse signal, and the second pulse signal is used to control the constant current circuit so that the current in the loop is constant or the loop is disconnected. 3. The circuit according to claim 1 or 2, wherein the constant current circuit comprises a metal oxide semiconductor MOS transistor, a negative feedback circuit and a source resistor, The drain of the MOS tube is connected to the positive pole of the battery, and the negative pole of the battery is grounded; The gate of the MOS transistor is connected to the output terminal of the negative feedback circuit, and works in the variable resistance region under the control of the signal output by the output terminal of the negative feedback circuit; The source of the MOS transistor is connected to the negative input terminal of the negative feedback circuit, and grounded through the source resistor; The positive input terminal of the negative feedback circuit is connected with the control circuit and receives the first pulse signal. 4. The circuit according to claim 3, wherein the constant current circuit further comprises a differential operational amplifier circuit, the output terminal of the differential operational amplifier circuit is connected to the negative input terminal of the negative feedback circuit, and the The positive input terminal of the differential operational amplifier circuit is connected to the source of the MOS transistor, and the negative input terminal of the differential operational amplifier circuit is grounded. 5. The circuit according to claim 3 or 4, characterized in that, the circuit also includes a transistor, the input of the transistor inputs the second pulse signal, and the transistor is connected to the negative input of the negative feedback circuit and the power supply, wherein the second pulse signal controls the MOS transistor to be in the on state or off state by controlling the input signal of the negative input terminal. 6. The method according to claim 5, wherein the transistor is a PNP transistor. 7. The circuit according to any one of claims 3-6, wherein the MOS transistor is a field effect transistor. 8. The circuit according to any one of claims 3-7, wherein the constant current circuit further comprises a resistor connected between the drain of the MOS transistor and the positive pole of the power supply . 9. The circuit according to claim 8, wherein the resistor is a power resistor. 10. The circuit according to any one of claims 1-9, wherein the battery is a single battery or a battery pack with multiple batteries connected in series.